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* config/tc-m32c.c (md_cgen_lookup_reloc): Add more relocs. Print
[binutils.git] / opcodes / m32c-ibld.c
blobbbf9a870352fb149123f4751f93ee319aee42f33
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
7 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171
172 if ((unsigned long) value > maxval)
173 {
174 /* xgettext:c-format */
175 sprintf (errbuf,
176 _("operand out of range (%lu not between 0 and %lu)"),
177 value, maxval);
178 return errbuf;
179 }
180 }
181 else
182 {
183 if (! cgen_signed_overflow_ok_p (cd))
184 {
185 long minval = - (1L << (length - 1));
186 long maxval = (1L << (length - 1)) - 1;
187
188 if (value < minval || value > maxval)
189 {
190 sprintf
191 /* xgettext:c-format */
192 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
193 value, minval, maxval);
194 return errbuf;
195 }
196 }
197 }
198
199 #if CGEN_INT_INSN_P
200
201 {
202 int shift;
203
204 if (CGEN_INSN_LSB0_P)
205 shift = (word_offset + start + 1) - length;
206 else
207 shift = total_length - (word_offset + start + length);
208 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
209 }
210
211 #else /* ! CGEN_INT_INSN_P */
212
213 {
214 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
215
216 insert_1 (cd, value, start, length, word_length, bufp);
217 }
218
219 #endif /* ! CGEN_INT_INSN_P */
220
221 return NULL;
222 }
223
224 /* Default insn builder (insert handler).
225 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
226 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
227 recorded in host byte order, otherwise BUFFER is an array of bytes
228 and the value is recorded in target byte order).
229 The result is an error message or NULL if success. */
230
231 static const char *
232 insert_insn_normal (CGEN_CPU_DESC cd,
233 const CGEN_INSN * insn,
234 CGEN_FIELDS * fields,
235 CGEN_INSN_BYTES_PTR buffer,
236 bfd_vma pc)
237 {
238 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
239 unsigned long value;
240 const CGEN_SYNTAX_CHAR_TYPE * syn;
241
242 CGEN_INIT_INSERT (cd);
243 value = CGEN_INSN_BASE_VALUE (insn);
244
245 /* If we're recording insns as numbers (rather than a string of bytes),
246 target byte order handling is deferred until later. */
247
248 #if CGEN_INT_INSN_P
249
250 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
251 CGEN_FIELDS_BITSIZE (fields), value);
252
253 #else
254
255 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
256 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
257 value);
258
259 #endif /* ! CGEN_INT_INSN_P */
260
261 /* ??? It would be better to scan the format's fields.
262 Still need to be able to insert a value based on the operand though;
263 e.g. storing a branch displacement that got resolved later.
264 Needs more thought first. */
265
266 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
267 {
268 const char *errmsg;
269
270 if (CGEN_SYNTAX_CHAR_P (* syn))
271 continue;
272
273 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
274 fields, buffer, pc);
275 if (errmsg)
276 return errmsg;
277 }
278
279 return NULL;
280 }
281
282 #if CGEN_INT_INSN_P
283 /* Cover function to store an insn value into an integral insn. Must go here
284 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
285
286 static void
287 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
288 CGEN_INSN_BYTES_PTR buf,
289 int length,
290 int insn_length,
291 CGEN_INSN_INT value)
292 {
293 /* For architectures with insns smaller than the base-insn-bitsize,
294 length may be too big. */
295 if (length > insn_length)
296 *buf = value;
297 else
298 {
299 int shift = insn_length - length;
300 /* Written this way to avoid undefined behaviour. */
301 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
302
303 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
304 }
305 }
306 #endif
307 \f
308 /* Operand extraction. */
309
310 #if ! CGEN_INT_INSN_P
311
312 /* Subroutine of extract_normal.
313 Ensure sufficient bytes are cached in EX_INFO.
314 OFFSET is the offset in bytes from the start of the insn of the value.
315 BYTES is the length of the needed value.
316 Returns 1 for success, 0 for failure. */
317
318 static CGEN_INLINE int
319 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
320 CGEN_EXTRACT_INFO *ex_info,
321 int offset,
322 int bytes,
323 bfd_vma pc)
324 {
325 /* It's doubtful that the middle part has already been fetched so
326 we don't optimize that case. kiss. */
327 unsigned int mask;
328 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
329
330 /* First do a quick check. */
331 mask = (1 << bytes) - 1;
332 if (((ex_info->valid >> offset) & mask) == mask)
333 return 1;
334
335 /* Search for the first byte we need to read. */
336 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
337 if (! (mask & ex_info->valid))
338 break;
339
340 if (bytes)
341 {
342 int status;
343
344 pc += offset;
345 status = (*info->read_memory_func)
346 (pc, ex_info->insn_bytes + offset, bytes, info);
347
348 if (status != 0)
349 {
350 (*info->memory_error_func) (status, pc, info);
351 return 0;
352 }
353
354 ex_info->valid |= ((1 << bytes) - 1) << offset;
355 }
356
357 return 1;
358 }
359
360 /* Subroutine of extract_normal. */
361
362 static CGEN_INLINE long
363 extract_1 (CGEN_CPU_DESC cd,
364 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
365 int start,
366 int length,
367 int word_length,
368 unsigned char *bufp,
369 bfd_vma pc ATTRIBUTE_UNUSED)
370 {
371 unsigned long x;
372 int shift;
373
374 x = cgen_get_insn_value (cd, bufp, word_length);
375
376 if (CGEN_INSN_LSB0_P)
377 shift = (start + 1) - length;
378 else
379 shift = (word_length - (start + length));
380 return x >> shift;
381 }
382
383 #endif /* ! CGEN_INT_INSN_P */
384
385 /* Default extraction routine.
386
387 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
388 or sometimes less for cases like the m32r where the base insn size is 32
389 but some insns are 16 bits.
390 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
391 but for generality we take a bitmask of all of them.
392 WORD_OFFSET is the offset in bits from the start of the insn of the value.
393 WORD_LENGTH is the length of the word in bits in which the value resides.
394 START is the starting bit number in the word, architecture origin.
395 LENGTH is the length of VALUE in bits.
396 TOTAL_LENGTH is the total length of the insn in bits.
397
398 Returns 1 for success, 0 for failure. */
399
400 /* ??? The return code isn't properly used. wip. */
401
402 /* ??? This doesn't handle bfd_vma's. Create another function when
403 necessary. */
404
405 static int
406 extract_normal (CGEN_CPU_DESC cd,
407 #if ! CGEN_INT_INSN_P
408 CGEN_EXTRACT_INFO *ex_info,
409 #else
410 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
411 #endif
412 CGEN_INSN_INT insn_value,
413 unsigned int attrs,
414 unsigned int word_offset,
415 unsigned int start,
416 unsigned int length,
417 unsigned int word_length,
418 unsigned int total_length,
419 #if ! CGEN_INT_INSN_P
420 bfd_vma pc,
421 #else
422 bfd_vma pc ATTRIBUTE_UNUSED,
423 #endif
424 long *valuep)
425 {
426 long value, mask;
427
428 /* If LENGTH is zero, this operand doesn't contribute to the value
429 so give it a standard value of zero. */
430 if (length == 0)
431 {
432 *valuep = 0;
433 return 1;
434 }
435
436 if (word_length > 32)
437 abort ();
438
439 /* For architectures with insns smaller than the insn-base-bitsize,
440 word_length may be too big. */
441 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
442 {
443 if (word_offset == 0
444 && word_length > total_length)
445 word_length = total_length;
446 }
447
448 /* Does the value reside in INSN_VALUE, and at the right alignment? */
449
450 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
451 {
452 if (CGEN_INSN_LSB0_P)
453 value = insn_value >> ((word_offset + start + 1) - length);
454 else
455 value = insn_value >> (total_length - ( word_offset + start + length));
456 }
457
458 #if ! CGEN_INT_INSN_P
459
460 else
461 {
462 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
463
464 if (word_length > 32)
465 abort ();
466
467 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
468 return 0;
469
470 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
471 }
472
473 #endif /* ! CGEN_INT_INSN_P */
474
475 /* Written this way to avoid undefined behaviour. */
476 mask = (((1L << (length - 1)) - 1) << 1) | 1;
477
478 value &= mask;
479 /* sign extend? */
480 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
481 && (value & (1L << (length - 1))))
482 value |= ~mask;
483
484 *valuep = value;
485
486 return 1;
487 }
488
489 /* Default insn extractor.
490
491 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
492 The extracted fields are stored in FIELDS.
493 EX_INFO is used to handle reading variable length insns.
494 Return the length of the insn in bits, or 0 if no match,
495 or -1 if an error occurs fetching data (memory_error_func will have
496 been called). */
497
498 static int
499 extract_insn_normal (CGEN_CPU_DESC cd,
500 const CGEN_INSN *insn,
501 CGEN_EXTRACT_INFO *ex_info,
502 CGEN_INSN_INT insn_value,
503 CGEN_FIELDS *fields,
504 bfd_vma pc)
505 {
506 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
507 const CGEN_SYNTAX_CHAR_TYPE *syn;
508
509 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
510
511 CGEN_INIT_EXTRACT (cd);
512
513 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
514 {
515 int length;
516
517 if (CGEN_SYNTAX_CHAR_P (*syn))
518 continue;
519
520 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
521 ex_info, insn_value, fields, pc);
522 if (length <= 0)
523 return length;
524 }
525
526 /* We recognized and successfully extracted this insn. */
527 return CGEN_INSN_BITSIZE (insn);
528 }
529 \f
530 /* Machine generated code added here. */
531
532 const char * m32c_cgen_insert_operand
533 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
534
535 /* Main entry point for operand insertion.
536
537 This function is basically just a big switch statement. Earlier versions
538 used tables to look up the function to use, but
539 - if the table contains both assembler and disassembler functions then
540 the disassembler contains much of the assembler and vice-versa,
541 - there's a lot of inlining possibilities as things grow,
542 - using a switch statement avoids the function call overhead.
543
544 This function could be moved into `parse_insn_normal', but keeping it
545 separate makes clear the interface between `parse_insn_normal' and each of
546 the handlers. It's also needed by GAS to insert operands that couldn't be
547 resolved during parsing. */
548
549 const char *
550 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
551 int opindex,
552 CGEN_FIELDS * fields,
553 CGEN_INSN_BYTES_PTR buffer,
554 bfd_vma pc ATTRIBUTE_UNUSED)
555 {
556 const char * errmsg = NULL;
557 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
558
559 switch (opindex)
560 {
561 case M32C_OPERAND_A0 :
562 break;
563 case M32C_OPERAND_A1 :
564 break;
565 case M32C_OPERAND_A1A0 :
566 break;
567 case M32C_OPERAND_AN16_PUSH_S :
568 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
569 break;
570 case M32C_OPERAND_BIT16AN :
571 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
572 break;
573 case M32C_OPERAND_BIT16RN :
574 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
575 break;
576 case M32C_OPERAND_BIT32ANPREFIXED :
577 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
578 break;
579 case M32C_OPERAND_BIT32ANUNPREFIXED :
580 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
581 break;
582 case M32C_OPERAND_BIT32RNPREFIXED :
583 {
584 long value = fields->f_dst32_rn_prefixed_QI;
585 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
586 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
587 }
588 break;
589 case M32C_OPERAND_BIT32RNUNPREFIXED :
590 {
591 long value = fields->f_dst32_rn_unprefixed_QI;
592 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
593 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
594 }
595 break;
596 case M32C_OPERAND_BITBASE16_16_S8 :
597 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
598 break;
599 case M32C_OPERAND_BITBASE16_16_U16 :
600 {
601 long value = fields->f_dsp_16_u16;
602 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
603 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
604 }
605 break;
606 case M32C_OPERAND_BITBASE16_16_U8 :
607 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
608 break;
609 case M32C_OPERAND_BITBASE16_8_U11_S :
610 {
611 {
612 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
613 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
614 }
615 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
616 if (errmsg)
617 break;
618 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
619 if (errmsg)
620 break;
621 }
622 break;
623 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
624 {
625 {
626 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
627 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
628 }
629 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
630 if (errmsg)
631 break;
632 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
633 if (errmsg)
634 break;
635 }
636 break;
637 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
638 {
639 {
640 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
641 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
642 }
643 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
644 if (errmsg)
645 break;
646 {
647 long value = fields->f_dsp_16_s16;
648 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
649 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
650 }
651 if (errmsg)
652 break;
653 }
654 break;
655 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
656 {
657 {
658 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
659 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
660 }
661 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
662 if (errmsg)
663 break;
664 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
665 if (errmsg)
666 break;
667 }
668 break;
669 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
670 {
671 {
672 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
673 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
674 }
675 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
676 if (errmsg)
677 break;
678 {
679 long value = fields->f_dsp_16_u16;
680 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
681 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
682 }
683 if (errmsg)
684 break;
685 }
686 break;
687 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
688 {
689 {
690 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
691 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
692 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
693 }
694 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
695 if (errmsg)
696 break;
697 {
698 long value = fields->f_dsp_16_u16;
699 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
700 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
701 }
702 if (errmsg)
703 break;
704 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
705 if (errmsg)
706 break;
707 }
708 break;
709 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
710 {
711 {
712 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
713 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
714 }
715 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
716 if (errmsg)
717 break;
718 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
719 if (errmsg)
720 break;
721 }
722 break;
723 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
724 {
725 {
726 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
727 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
728 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
729 }
730 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
731 if (errmsg)
732 break;
733 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
734 if (errmsg)
735 break;
736 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
737 if (errmsg)
738 break;
739 }
740 break;
741 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
742 {
743 {
744 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
745 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
746 }
747 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
748 if (errmsg)
749 break;
750 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
751 if (errmsg)
752 break;
753 }
754 break;
755 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
756 {
757 {
758 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
759 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
760 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
761 }
762 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
763 if (errmsg)
764 break;
765 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
766 if (errmsg)
767 break;
768 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
769 if (errmsg)
770 break;
771 }
772 break;
773 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
774 {
775 {
776 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
777 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
778 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
779 }
780 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
781 if (errmsg)
782 break;
783 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
784 if (errmsg)
785 break;
786 {
787 long value = fields->f_dsp_32_u16;
788 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
789 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
790 }
791 if (errmsg)
792 break;
793 }
794 break;
795 case M32C_OPERAND_BITNO16R :
796 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
797 break;
798 case M32C_OPERAND_BITNO32PREFIXED :
799 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
800 break;
801 case M32C_OPERAND_BITNO32UNPREFIXED :
802 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
803 break;
804 case M32C_OPERAND_DSP_10_U6 :
805 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
806 break;
807 case M32C_OPERAND_DSP_16_S16 :
808 {
809 long value = fields->f_dsp_16_s16;
810 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
811 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
812 }
813 break;
814 case M32C_OPERAND_DSP_16_S8 :
815 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
816 break;
817 case M32C_OPERAND_DSP_16_U16 :
818 {
819 long value = fields->f_dsp_16_u16;
820 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
821 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
822 }
823 break;
824 case M32C_OPERAND_DSP_16_U20 :
825 {
826 {
827 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
828 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
829 }
830 {
831 long value = fields->f_dsp_16_u16;
832 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
833 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
834 }
835 if (errmsg)
836 break;
837 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
838 if (errmsg)
839 break;
840 }
841 break;
842 case M32C_OPERAND_DSP_16_U24 :
843 {
844 {
845 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
846 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
847 }
848 {
849 long value = fields->f_dsp_16_u16;
850 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
851 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
852 }
853 if (errmsg)
854 break;
855 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
856 if (errmsg)
857 break;
858 }
859 break;
860 case M32C_OPERAND_DSP_16_U8 :
861 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
862 break;
863 case M32C_OPERAND_DSP_24_S16 :
864 {
865 {
866 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
867 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
868 }
869 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
870 if (errmsg)
871 break;
872 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
873 if (errmsg)
874 break;
875 }
876 break;
877 case M32C_OPERAND_DSP_24_S8 :
878 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
879 break;
880 case M32C_OPERAND_DSP_24_U16 :
881 {
882 {
883 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
884 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
885 }
886 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
887 if (errmsg)
888 break;
889 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
890 if (errmsg)
891 break;
892 }
893 break;
894 case M32C_OPERAND_DSP_24_U20 :
895 {
896 {
897 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
898 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
899 }
900 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
901 if (errmsg)
902 break;
903 {
904 long value = fields->f_dsp_32_u16;
905 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
906 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
907 }
908 if (errmsg)
909 break;
910 }
911 break;
912 case M32C_OPERAND_DSP_24_U24 :
913 {
914 {
915 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
916 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
917 }
918 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
919 if (errmsg)
920 break;
921 {
922 long value = fields->f_dsp_32_u16;
923 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
924 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
925 }
926 if (errmsg)
927 break;
928 }
929 break;
930 case M32C_OPERAND_DSP_24_U8 :
931 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
932 break;
933 case M32C_OPERAND_DSP_32_S16 :
934 {
935 long value = fields->f_dsp_32_s16;
936 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
937 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
938 }
939 break;
940 case M32C_OPERAND_DSP_32_S8 :
941 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
942 break;
943 case M32C_OPERAND_DSP_32_U16 :
944 {
945 long value = fields->f_dsp_32_u16;
946 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
947 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
948 }
949 break;
950 case M32C_OPERAND_DSP_32_U20 :
951 {
952 long value = fields->f_dsp_32_u24;
953 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
954 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
955 }
956 break;
957 case M32C_OPERAND_DSP_32_U24 :
958 {
959 long value = fields->f_dsp_32_u24;
960 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
961 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
962 }
963 break;
964 case M32C_OPERAND_DSP_32_U8 :
965 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
966 break;
967 case M32C_OPERAND_DSP_40_S16 :
968 {
969 long value = fields->f_dsp_40_s16;
970 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
971 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
972 }
973 break;
974 case M32C_OPERAND_DSP_40_S8 :
975 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
976 break;
977 case M32C_OPERAND_DSP_40_U16 :
978 {
979 long value = fields->f_dsp_40_u16;
980 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
981 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
982 }
983 break;
984 case M32C_OPERAND_DSP_40_U24 :
985 {
986 long value = fields->f_dsp_40_u24;
987 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
988 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
989 }
990 break;
991 case M32C_OPERAND_DSP_40_U8 :
992 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
993 break;
994 case M32C_OPERAND_DSP_48_S16 :
995 {
996 long value = fields->f_dsp_48_s16;
997 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
998 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
999 }
1000 break;
1001 case M32C_OPERAND_DSP_48_S8 :
1002 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1003 break;
1004 case M32C_OPERAND_DSP_48_U16 :
1005 {
1006 long value = fields->f_dsp_48_u16;
1007 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1008 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1009 }
1010 break;
1011 case M32C_OPERAND_DSP_48_U24 :
1012 {
1013 {
1014 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1015 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1016 }
1017 {
1018 long value = fields->f_dsp_48_u16;
1019 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1020 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1021 }
1022 if (errmsg)
1023 break;
1024 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1025 if (errmsg)
1026 break;
1027 }
1028 break;
1029 case M32C_OPERAND_DSP_48_U8 :
1030 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1031 break;
1032 case M32C_OPERAND_DSP_8_S8 :
1033 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1034 break;
1035 case M32C_OPERAND_DSP_8_U16 :
1036 {
1037 long value = fields->f_dsp_8_u16;
1038 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1039 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1040 }
1041 break;
1042 case M32C_OPERAND_DSP_8_U24 :
1043 {
1044 long value = fields->f_dsp_8_u24;
1045 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1046 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1047 }
1048 break;
1049 case M32C_OPERAND_DSP_8_U6 :
1050 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1051 break;
1052 case M32C_OPERAND_DSP_8_U8 :
1053 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1054 break;
1055 case M32C_OPERAND_DST16AN :
1056 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1057 break;
1058 case M32C_OPERAND_DST16AN_S :
1059 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1060 break;
1061 case M32C_OPERAND_DST16ANHI :
1062 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1063 break;
1064 case M32C_OPERAND_DST16ANQI :
1065 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1066 break;
1067 case M32C_OPERAND_DST16ANQI_S :
1068 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1069 break;
1070 case M32C_OPERAND_DST16ANSI :
1071 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1072 break;
1073 case M32C_OPERAND_DST16RNEXTQI :
1074 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1075 break;
1076 case M32C_OPERAND_DST16RNHI :
1077 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1078 break;
1079 case M32C_OPERAND_DST16RNQI :
1080 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1081 break;
1082 case M32C_OPERAND_DST16RNQI_S :
1083 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1084 break;
1085 case M32C_OPERAND_DST16RNSI :
1086 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1087 break;
1088 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1089 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1090 break;
1091 case M32C_OPERAND_DST32ANPREFIXED :
1092 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1093 break;
1094 case M32C_OPERAND_DST32ANPREFIXEDHI :
1095 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1096 break;
1097 case M32C_OPERAND_DST32ANPREFIXEDQI :
1098 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1099 break;
1100 case M32C_OPERAND_DST32ANPREFIXEDSI :
1101 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1102 break;
1103 case M32C_OPERAND_DST32ANUNPREFIXED :
1104 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1105 break;
1106 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1107 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1108 break;
1109 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1110 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1111 break;
1112 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1113 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1114 break;
1115 case M32C_OPERAND_DST32R0HI_S :
1116 break;
1117 case M32C_OPERAND_DST32R0QI_S :
1118 break;
1119 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1120 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1121 break;
1122 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1123 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1124 break;
1125 case M32C_OPERAND_DST32RNPREFIXEDHI :
1126 {
1127 long value = fields->f_dst32_rn_prefixed_HI;
1128 value = ((((value) + (2))) % (4));
1129 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1130 }
1131 break;
1132 case M32C_OPERAND_DST32RNPREFIXEDQI :
1133 {
1134 long value = fields->f_dst32_rn_prefixed_QI;
1135 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1136 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1137 }
1138 break;
1139 case M32C_OPERAND_DST32RNPREFIXEDSI :
1140 {
1141 long value = fields->f_dst32_rn_prefixed_SI;
1142 value = ((value) + (2));
1143 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1144 }
1145 break;
1146 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1147 {
1148 long value = fields->f_dst32_rn_unprefixed_HI;
1149 value = ((((value) + (2))) % (4));
1150 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1151 }
1152 break;
1153 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1154 {
1155 long value = fields->f_dst32_rn_unprefixed_QI;
1156 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1157 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1158 }
1159 break;
1160 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1161 {
1162 long value = fields->f_dst32_rn_unprefixed_SI;
1163 value = ((value) + (2));
1164 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1165 }
1166 break;
1167 case M32C_OPERAND_G :
1168 break;
1169 case M32C_OPERAND_IMM_12_S4 :
1170 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1171 break;
1172 case M32C_OPERAND_IMM_13_U3 :
1173 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1174 break;
1175 case M32C_OPERAND_IMM_16_HI :
1176 {
1177 long value = fields->f_dsp_16_s16;
1178 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1179 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1180 }
1181 break;
1182 case M32C_OPERAND_IMM_16_QI :
1183 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1184 break;
1185 case M32C_OPERAND_IMM_16_SI :
1186 {
1187 {
1188 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1189 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1190 }
1191 {
1192 long value = fields->f_dsp_16_u16;
1193 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1194 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1195 }
1196 if (errmsg)
1197 break;
1198 {
1199 long value = fields->f_dsp_32_u16;
1200 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1201 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1202 }
1203 if (errmsg)
1204 break;
1205 }
1206 break;
1207 case M32C_OPERAND_IMM_20_S4 :
1208 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1209 break;
1210 case M32C_OPERAND_IMM_24_HI :
1211 {
1212 {
1213 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1214 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1215 }
1216 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1217 if (errmsg)
1218 break;
1219 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1220 if (errmsg)
1221 break;
1222 }
1223 break;
1224 case M32C_OPERAND_IMM_24_QI :
1225 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1226 break;
1227 case M32C_OPERAND_IMM_24_SI :
1228 {
1229 {
1230 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1231 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1232 }
1233 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1234 if (errmsg)
1235 break;
1236 {
1237 long value = fields->f_dsp_32_u24;
1238 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1239 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1240 }
1241 if (errmsg)
1242 break;
1243 }
1244 break;
1245 case M32C_OPERAND_IMM_32_HI :
1246 {
1247 long value = fields->f_dsp_32_s16;
1248 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1249 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1250 }
1251 break;
1252 case M32C_OPERAND_IMM_32_QI :
1253 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1254 break;
1255 case M32C_OPERAND_IMM_32_SI :
1256 {
1257 long value = fields->f_dsp_32_s32;
1258 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1259 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1260 }
1261 break;
1262 case M32C_OPERAND_IMM_40_HI :
1263 {
1264 long value = fields->f_dsp_40_s16;
1265 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1266 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1267 }
1268 break;
1269 case M32C_OPERAND_IMM_40_QI :
1270 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1271 break;
1272 case M32C_OPERAND_IMM_40_SI :
1273 {
1274 {
1275 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1276 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1277 }
1278 {
1279 long value = fields->f_dsp_40_u24;
1280 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1281 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1282 }
1283 if (errmsg)
1284 break;
1285 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1286 if (errmsg)
1287 break;
1288 }
1289 break;
1290 case M32C_OPERAND_IMM_48_HI :
1291 {
1292 long value = fields->f_dsp_48_s16;
1293 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1294 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1295 }
1296 break;
1297 case M32C_OPERAND_IMM_48_QI :
1298 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1299 break;
1300 case M32C_OPERAND_IMM_48_SI :
1301 {
1302 {
1303 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1304 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1305 }
1306 {
1307 long value = fields->f_dsp_48_u16;
1308 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1309 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1310 }
1311 if (errmsg)
1312 break;
1313 {
1314 long value = fields->f_dsp_64_u16;
1315 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1316 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1317 }
1318 if (errmsg)
1319 break;
1320 }
1321 break;
1322 case M32C_OPERAND_IMM_56_HI :
1323 {
1324 {
1325 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1326 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1327 }
1328 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1329 if (errmsg)
1330 break;
1331 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1332 if (errmsg)
1333 break;
1334 }
1335 break;
1336 case M32C_OPERAND_IMM_56_QI :
1337 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1338 break;
1339 case M32C_OPERAND_IMM_64_HI :
1340 {
1341 long value = fields->f_dsp_64_s16;
1342 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1343 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1344 }
1345 break;
1346 case M32C_OPERAND_IMM_8_HI :
1347 {
1348 long value = fields->f_dsp_8_s16;
1349 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1350 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1351 }
1352 break;
1353 case M32C_OPERAND_IMM_8_QI :
1354 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1355 break;
1356 case M32C_OPERAND_IMM_8_S4 :
1357 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1358 break;
1359 case M32C_OPERAND_IMM_SH_12_S4 :
1360 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1361 break;
1362 case M32C_OPERAND_IMM_SH_20_S4 :
1363 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1364 break;
1365 case M32C_OPERAND_IMM_SH_8_S4 :
1366 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1367 break;
1368 case M32C_OPERAND_IMM1_S :
1369 {
1370 long value = fields->f_imm1_S;
1371 value = ((value) - (1));
1372 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1373 }
1374 break;
1375 case M32C_OPERAND_IMM3_S :
1376 {
1377 {
1378 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1379 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1380 }
1381 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1382 if (errmsg)
1383 break;
1384 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1385 if (errmsg)
1386 break;
1387 }
1388 break;
1389 case M32C_OPERAND_LAB_16_8 :
1390 {
1391 long value = fields->f_lab_16_8;
1392 value = ((value) - (((pc) + (2))));
1393 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1394 }
1395 break;
1396 case M32C_OPERAND_LAB_24_8 :
1397 {
1398 long value = fields->f_lab_24_8;
1399 value = ((value) - (((pc) + (2))));
1400 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1401 }
1402 break;
1403 case M32C_OPERAND_LAB_32_8 :
1404 {
1405 long value = fields->f_lab_32_8;
1406 value = ((value) - (((pc) + (2))));
1407 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1408 }
1409 break;
1410 case M32C_OPERAND_LAB_40_8 :
1411 {
1412 long value = fields->f_lab_40_8;
1413 value = ((value) - (((pc) + (2))));
1414 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1415 }
1416 break;
1417 case M32C_OPERAND_LAB_5_3 :
1418 {
1419 long value = fields->f_lab_5_3;
1420 value = ((value) - (((pc) + (2))));
1421 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1422 }
1423 break;
1424 case M32C_OPERAND_LAB_8_16 :
1425 {
1426 long value = fields->f_lab_8_16;
1427 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1428 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1429 }
1430 break;
1431 case M32C_OPERAND_LAB_8_24 :
1432 {
1433 long value = fields->f_lab_8_24;
1434 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1435 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1436 }
1437 break;
1438 case M32C_OPERAND_LAB_8_8 :
1439 {
1440 long value = fields->f_lab_8_8;
1441 value = ((value) - (((pc) + (1))));
1442 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1443 }
1444 break;
1445 case M32C_OPERAND_LAB32_JMP_S :
1446 {
1447 {
1448 SI tmp_val;
1449 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1450 FLD (f_7_1) = ((tmp_val) & (1));
1451 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
1452 }
1453 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1454 if (errmsg)
1455 break;
1456 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1457 if (errmsg)
1458 break;
1459 }
1460 break;
1461 case M32C_OPERAND_Q :
1462 break;
1463 case M32C_OPERAND_R0 :
1464 break;
1465 case M32C_OPERAND_R0H :
1466 break;
1467 case M32C_OPERAND_R0L :
1468 break;
1469 case M32C_OPERAND_R1 :
1470 break;
1471 case M32C_OPERAND_R1R2R0 :
1472 break;
1473 case M32C_OPERAND_R2 :
1474 break;
1475 case M32C_OPERAND_R2R0 :
1476 break;
1477 case M32C_OPERAND_R3 :
1478 break;
1479 case M32C_OPERAND_R3R1 :
1480 break;
1481 case M32C_OPERAND_REGSETPOP :
1482 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1483 break;
1484 case M32C_OPERAND_REGSETPUSH :
1485 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1486 break;
1487 case M32C_OPERAND_RN16_PUSH_S :
1488 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1489 break;
1490 case M32C_OPERAND_S :
1491 break;
1492 case M32C_OPERAND_SRC16AN :
1493 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1494 break;
1495 case M32C_OPERAND_SRC16ANHI :
1496 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1497 break;
1498 case M32C_OPERAND_SRC16ANQI :
1499 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1500 break;
1501 case M32C_OPERAND_SRC16RNHI :
1502 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1503 break;
1504 case M32C_OPERAND_SRC16RNQI :
1505 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1506 break;
1507 case M32C_OPERAND_SRC32ANPREFIXED :
1508 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1509 break;
1510 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1511 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1512 break;
1513 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1514 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1515 break;
1516 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1517 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1518 break;
1519 case M32C_OPERAND_SRC32ANUNPREFIXED :
1520 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1521 break;
1522 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1523 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1524 break;
1525 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1526 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1527 break;
1528 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1529 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1530 break;
1531 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1532 {
1533 long value = fields->f_src32_rn_prefixed_HI;
1534 value = ((((value) + (2))) % (4));
1535 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1536 }
1537 break;
1538 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1539 {
1540 long value = fields->f_src32_rn_prefixed_QI;
1541 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1542 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1543 }
1544 break;
1545 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1546 {
1547 long value = fields->f_src32_rn_prefixed_SI;
1548 value = ((value) + (2));
1549 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1550 }
1551 break;
1552 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1553 {
1554 long value = fields->f_src32_rn_unprefixed_HI;
1555 value = ((((value) + (2))) % (4));
1556 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1557 }
1558 break;
1559 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1560 {
1561 long value = fields->f_src32_rn_unprefixed_QI;
1562 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1563 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1564 }
1565 break;
1566 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1567 {
1568 long value = fields->f_src32_rn_unprefixed_SI;
1569 value = ((value) + (2));
1570 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1571 }
1572 break;
1573 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1574 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1575 break;
1576 case M32C_OPERAND_X :
1577 break;
1578 case M32C_OPERAND_Z :
1579 break;
1580 case M32C_OPERAND_COND16_16 :
1581 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1582 break;
1583 case M32C_OPERAND_COND16_24 :
1584 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1585 break;
1586 case M32C_OPERAND_COND16_32 :
1587 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1588 break;
1589 case M32C_OPERAND_COND16C :
1590 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1591 break;
1592 case M32C_OPERAND_COND16J :
1593 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1594 break;
1595 case M32C_OPERAND_COND16J5 :
1596 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1597 break;
1598 case M32C_OPERAND_COND32 :
1599 {
1600 {
1601 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1602 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1603 }
1604 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1605 if (errmsg)
1606 break;
1607 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1608 if (errmsg)
1609 break;
1610 }
1611 break;
1612 case M32C_OPERAND_COND32_16 :
1613 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1614 break;
1615 case M32C_OPERAND_COND32_24 :
1616 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1617 break;
1618 case M32C_OPERAND_COND32_32 :
1619 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1620 break;
1621 case M32C_OPERAND_COND32_40 :
1622 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1623 break;
1624 case M32C_OPERAND_COND32J :
1625 {
1626 {
1627 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1628 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1629 }
1630 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1631 if (errmsg)
1632 break;
1633 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1634 if (errmsg)
1635 break;
1636 }
1637 break;
1638 case M32C_OPERAND_CR1_PREFIXED_32 :
1639 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1640 break;
1641 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1642 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1643 break;
1644 case M32C_OPERAND_CR16 :
1645 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1646 break;
1647 case M32C_OPERAND_CR2_32 :
1648 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1649 break;
1650 case M32C_OPERAND_CR3_PREFIXED_32 :
1651 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1652 break;
1653 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1654 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1655 break;
1656 case M32C_OPERAND_FLAGS16 :
1657 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1658 break;
1659 case M32C_OPERAND_FLAGS32 :
1660 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1661 break;
1662 case M32C_OPERAND_SCCOND32 :
1663 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1664 break;
1665 case M32C_OPERAND_SIZE :
1666 break;
1667
1668 default :
1669 /* xgettext:c-format */
1670 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1671 opindex);
1672 abort ();
1673 }
1674
1675 return errmsg;
1676 }
1677
1678 int m32c_cgen_extract_operand
1679 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1680
1681 /* Main entry point for operand extraction.
1682 The result is <= 0 for error, >0 for success.
1683 ??? Actual values aren't well defined right now.
1684
1685 This function is basically just a big switch statement. Earlier versions
1686 used tables to look up the function to use, but
1687 - if the table contains both assembler and disassembler functions then
1688 the disassembler contains much of the assembler and vice-versa,
1689 - there's a lot of inlining possibilities as things grow,
1690 - using a switch statement avoids the function call overhead.
1691
1692 This function could be moved into `print_insn_normal', but keeping it
1693 separate makes clear the interface between `print_insn_normal' and each of
1694 the handlers. */
1695
1696 int
1697 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1698 int opindex,
1699 CGEN_EXTRACT_INFO *ex_info,
1700 CGEN_INSN_INT insn_value,
1701 CGEN_FIELDS * fields,
1702 bfd_vma pc)
1703 {
1704 /* Assume success (for those operands that are nops). */
1705 int length = 1;
1706 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1707
1708 switch (opindex)
1709 {
1710 case M32C_OPERAND_A0 :
1711 break;
1712 case M32C_OPERAND_A1 :
1713 break;
1714 case M32C_OPERAND_A1A0 :
1715 break;
1716 case M32C_OPERAND_AN16_PUSH_S :
1717 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1718 break;
1719 case M32C_OPERAND_BIT16AN :
1720 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1721 break;
1722 case M32C_OPERAND_BIT16RN :
1723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1724 break;
1725 case M32C_OPERAND_BIT32ANPREFIXED :
1726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1727 break;
1728 case M32C_OPERAND_BIT32ANUNPREFIXED :
1729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1730 break;
1731 case M32C_OPERAND_BIT32RNPREFIXED :
1732 {
1733 long value;
1734 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1735 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1736 fields->f_dst32_rn_prefixed_QI = value;
1737 }
1738 break;
1739 case M32C_OPERAND_BIT32RNUNPREFIXED :
1740 {
1741 long value;
1742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1743 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1744 fields->f_dst32_rn_unprefixed_QI = value;
1745 }
1746 break;
1747 case M32C_OPERAND_BITBASE16_16_S8 :
1748 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1749 break;
1750 case M32C_OPERAND_BITBASE16_16_U16 :
1751 {
1752 long value;
1753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1754 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1755 fields->f_dsp_16_u16 = value;
1756 }
1757 break;
1758 case M32C_OPERAND_BITBASE16_16_U8 :
1759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1760 break;
1761 case M32C_OPERAND_BITBASE16_8_U11_S :
1762 {
1763 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1764 if (length <= 0) break;
1765 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1766 if (length <= 0) break;
1767 {
1768 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1769 }
1770 }
1771 break;
1772 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1773 {
1774 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1775 if (length <= 0) break;
1776 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1777 if (length <= 0) break;
1778 {
1779 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1780 }
1781 }
1782 break;
1783 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1784 {
1785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1786 if (length <= 0) break;
1787 {
1788 long value;
1789 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1790 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1791 fields->f_dsp_16_s16 = value;
1792 }
1793 if (length <= 0) break;
1794 {
1795 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1796 }
1797 }
1798 break;
1799 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1800 {
1801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1802 if (length <= 0) break;
1803 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1804 if (length <= 0) break;
1805 {
1806 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1807 }
1808 }
1809 break;
1810 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1811 {
1812 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1813 if (length <= 0) break;
1814 {
1815 long value;
1816 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1817 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1818 fields->f_dsp_16_u16 = value;
1819 }
1820 if (length <= 0) break;
1821 {
1822 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1823 }
1824 }
1825 break;
1826 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1827 {
1828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1829 if (length <= 0) break;
1830 {
1831 long value;
1832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1833 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1834 fields->f_dsp_16_u16 = value;
1835 }
1836 if (length <= 0) break;
1837 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1838 if (length <= 0) break;
1839 {
1840 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1841 }
1842 }
1843 break;
1844 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1845 {
1846 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1847 if (length <= 0) break;
1848 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1849 if (length <= 0) break;
1850 {
1851 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1852 }
1853 }
1854 break;
1855 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1856 {
1857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1858 if (length <= 0) break;
1859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1860 if (length <= 0) break;
1861 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1862 if (length <= 0) break;
1863 {
1864 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1865 }
1866 }
1867 break;
1868 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1869 {
1870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1871 if (length <= 0) break;
1872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1873 if (length <= 0) break;
1874 {
1875 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1876 }
1877 }
1878 break;
1879 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1880 {
1881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1882 if (length <= 0) break;
1883 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1884 if (length <= 0) break;
1885 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1886 if (length <= 0) break;
1887 {
1888 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1889 }
1890 }
1891 break;
1892 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1893 {
1894 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1895 if (length <= 0) break;
1896 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1897 if (length <= 0) break;
1898 {
1899 long value;
1900 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1901 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1902 fields->f_dsp_32_u16 = value;
1903 }
1904 if (length <= 0) break;
1905 {
1906 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1907 }
1908 }
1909 break;
1910 case M32C_OPERAND_BITNO16R :
1911 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1912 break;
1913 case M32C_OPERAND_BITNO32PREFIXED :
1914 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1915 break;
1916 case M32C_OPERAND_BITNO32UNPREFIXED :
1917 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1918 break;
1919 case M32C_OPERAND_DSP_10_U6 :
1920 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1921 break;
1922 case M32C_OPERAND_DSP_16_S16 :
1923 {
1924 long value;
1925 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1926 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1927 fields->f_dsp_16_s16 = value;
1928 }
1929 break;
1930 case M32C_OPERAND_DSP_16_S8 :
1931 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1932 break;
1933 case M32C_OPERAND_DSP_16_U16 :
1934 {
1935 long value;
1936 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1937 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1938 fields->f_dsp_16_u16 = value;
1939 }
1940 break;
1941 case M32C_OPERAND_DSP_16_U20 :
1942 {
1943 {
1944 long value;
1945 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1946 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1947 fields->f_dsp_16_u16 = value;
1948 }
1949 if (length <= 0) break;
1950 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1951 if (length <= 0) break;
1952 {
1953 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1954 }
1955 }
1956 break;
1957 case M32C_OPERAND_DSP_16_U24 :
1958 {
1959 {
1960 long value;
1961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1962 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1963 fields->f_dsp_16_u16 = value;
1964 }
1965 if (length <= 0) break;
1966 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1967 if (length <= 0) break;
1968 {
1969 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1970 }
1971 }
1972 break;
1973 case M32C_OPERAND_DSP_16_U8 :
1974 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1975 break;
1976 case M32C_OPERAND_DSP_24_S16 :
1977 {
1978 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1979 if (length <= 0) break;
1980 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1981 if (length <= 0) break;
1982 {
1983 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
1984 }
1985 }
1986 break;
1987 case M32C_OPERAND_DSP_24_S8 :
1988 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1989 break;
1990 case M32C_OPERAND_DSP_24_U16 :
1991 {
1992 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1993 if (length <= 0) break;
1994 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1995 if (length <= 0) break;
1996 {
1997 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
1998 }
1999 }
2000 break;
2001 case M32C_OPERAND_DSP_24_U20 :
2002 {
2003 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2004 if (length <= 0) break;
2005 {
2006 long value;
2007 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2008 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2009 fields->f_dsp_32_u16 = value;
2010 }
2011 if (length <= 0) break;
2012 {
2013 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2014 }
2015 }
2016 break;
2017 case M32C_OPERAND_DSP_24_U24 :
2018 {
2019 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2020 if (length <= 0) break;
2021 {
2022 long value;
2023 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2024 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2025 fields->f_dsp_32_u16 = value;
2026 }
2027 if (length <= 0) break;
2028 {
2029 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2030 }
2031 }
2032 break;
2033 case M32C_OPERAND_DSP_24_U8 :
2034 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2035 break;
2036 case M32C_OPERAND_DSP_32_S16 :
2037 {
2038 long value;
2039 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2040 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2041 fields->f_dsp_32_s16 = value;
2042 }
2043 break;
2044 case M32C_OPERAND_DSP_32_S8 :
2045 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2046 break;
2047 case M32C_OPERAND_DSP_32_U16 :
2048 {
2049 long value;
2050 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2051 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2052 fields->f_dsp_32_u16 = value;
2053 }
2054 break;
2055 case M32C_OPERAND_DSP_32_U20 :
2056 {
2057 long value;
2058 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2059 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2060 fields->f_dsp_32_u24 = value;
2061 }
2062 break;
2063 case M32C_OPERAND_DSP_32_U24 :
2064 {
2065 long value;
2066 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2067 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2068 fields->f_dsp_32_u24 = value;
2069 }
2070 break;
2071 case M32C_OPERAND_DSP_32_U8 :
2072 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2073 break;
2074 case M32C_OPERAND_DSP_40_S16 :
2075 {
2076 long value;
2077 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2078 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2079 fields->f_dsp_40_s16 = value;
2080 }
2081 break;
2082 case M32C_OPERAND_DSP_40_S8 :
2083 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2084 break;
2085 case M32C_OPERAND_DSP_40_U16 :
2086 {
2087 long value;
2088 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2089 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2090 fields->f_dsp_40_u16 = value;
2091 }
2092 break;
2093 case M32C_OPERAND_DSP_40_U24 :
2094 {
2095 long value;
2096 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2097 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2098 fields->f_dsp_40_u24 = value;
2099 }
2100 break;
2101 case M32C_OPERAND_DSP_40_U8 :
2102 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2103 break;
2104 case M32C_OPERAND_DSP_48_S16 :
2105 {
2106 long value;
2107 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2108 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2109 fields->f_dsp_48_s16 = value;
2110 }
2111 break;
2112 case M32C_OPERAND_DSP_48_S8 :
2113 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2114 break;
2115 case M32C_OPERAND_DSP_48_U16 :
2116 {
2117 long value;
2118 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2119 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2120 fields->f_dsp_48_u16 = value;
2121 }
2122 break;
2123 case M32C_OPERAND_DSP_48_U24 :
2124 {
2125 {
2126 long value;
2127 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2128 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2129 fields->f_dsp_48_u16 = value;
2130 }
2131 if (length <= 0) break;
2132 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2133 if (length <= 0) break;
2134 {
2135 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2136 }
2137 }
2138 break;
2139 case M32C_OPERAND_DSP_48_U8 :
2140 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2141 break;
2142 case M32C_OPERAND_DSP_8_S8 :
2143 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2144 break;
2145 case M32C_OPERAND_DSP_8_U16 :
2146 {
2147 long value;
2148 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2149 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2150 fields->f_dsp_8_u16 = value;
2151 }
2152 break;
2153 case M32C_OPERAND_DSP_8_U24 :
2154 {
2155 long value;
2156 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2157 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2158 fields->f_dsp_8_u24 = value;
2159 }
2160 break;
2161 case M32C_OPERAND_DSP_8_U6 :
2162 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2163 break;
2164 case M32C_OPERAND_DSP_8_U8 :
2165 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2166 break;
2167 case M32C_OPERAND_DST16AN :
2168 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2169 break;
2170 case M32C_OPERAND_DST16AN_S :
2171 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2172 break;
2173 case M32C_OPERAND_DST16ANHI :
2174 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2175 break;
2176 case M32C_OPERAND_DST16ANQI :
2177 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2178 break;
2179 case M32C_OPERAND_DST16ANQI_S :
2180 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2181 break;
2182 case M32C_OPERAND_DST16ANSI :
2183 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2184 break;
2185 case M32C_OPERAND_DST16RNEXTQI :
2186 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2187 break;
2188 case M32C_OPERAND_DST16RNHI :
2189 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2190 break;
2191 case M32C_OPERAND_DST16RNQI :
2192 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2193 break;
2194 case M32C_OPERAND_DST16RNQI_S :
2195 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2196 break;
2197 case M32C_OPERAND_DST16RNSI :
2198 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2199 break;
2200 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2201 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2202 break;
2203 case M32C_OPERAND_DST32ANPREFIXED :
2204 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2205 break;
2206 case M32C_OPERAND_DST32ANPREFIXEDHI :
2207 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2208 break;
2209 case M32C_OPERAND_DST32ANPREFIXEDQI :
2210 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2211 break;
2212 case M32C_OPERAND_DST32ANPREFIXEDSI :
2213 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2214 break;
2215 case M32C_OPERAND_DST32ANUNPREFIXED :
2216 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2217 break;
2218 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2219 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2220 break;
2221 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2222 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2223 break;
2224 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2225 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2226 break;
2227 case M32C_OPERAND_DST32R0HI_S :
2228 break;
2229 case M32C_OPERAND_DST32R0QI_S :
2230 break;
2231 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2232 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2233 break;
2234 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2235 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2236 break;
2237 case M32C_OPERAND_DST32RNPREFIXEDHI :
2238 {
2239 long value;
2240 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2241 value = ((((value) + (2))) % (4));
2242 fields->f_dst32_rn_prefixed_HI = value;
2243 }
2244 break;
2245 case M32C_OPERAND_DST32RNPREFIXEDQI :
2246 {
2247 long value;
2248 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2249 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2250 fields->f_dst32_rn_prefixed_QI = value;
2251 }
2252 break;
2253 case M32C_OPERAND_DST32RNPREFIXEDSI :
2254 {
2255 long value;
2256 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2257 value = ((value) - (2));
2258 fields->f_dst32_rn_prefixed_SI = value;
2259 }
2260 break;
2261 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2262 {
2263 long value;
2264 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2265 value = ((((value) + (2))) % (4));
2266 fields->f_dst32_rn_unprefixed_HI = value;
2267 }
2268 break;
2269 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2270 {
2271 long value;
2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2273 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2274 fields->f_dst32_rn_unprefixed_QI = value;
2275 }
2276 break;
2277 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2278 {
2279 long value;
2280 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2281 value = ((value) - (2));
2282 fields->f_dst32_rn_unprefixed_SI = value;
2283 }
2284 break;
2285 case M32C_OPERAND_G :
2286 break;
2287 case M32C_OPERAND_IMM_12_S4 :
2288 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2289 break;
2290 case M32C_OPERAND_IMM_13_U3 :
2291 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2292 break;
2293 case M32C_OPERAND_IMM_16_HI :
2294 {
2295 long value;
2296 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2297 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2298 fields->f_dsp_16_s16 = value;
2299 }
2300 break;
2301 case M32C_OPERAND_IMM_16_QI :
2302 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2303 break;
2304 case M32C_OPERAND_IMM_16_SI :
2305 {
2306 {
2307 long value;
2308 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2309 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2310 fields->f_dsp_16_u16 = value;
2311 }
2312 if (length <= 0) break;
2313 {
2314 long value;
2315 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2316 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2317 fields->f_dsp_32_u16 = value;
2318 }
2319 if (length <= 0) break;
2320 {
2321 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2322 }
2323 }
2324 break;
2325 case M32C_OPERAND_IMM_20_S4 :
2326 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2327 break;
2328 case M32C_OPERAND_IMM_24_HI :
2329 {
2330 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2331 if (length <= 0) break;
2332 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2333 if (length <= 0) break;
2334 {
2335 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2336 }
2337 }
2338 break;
2339 case M32C_OPERAND_IMM_24_QI :
2340 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2341 break;
2342 case M32C_OPERAND_IMM_24_SI :
2343 {
2344 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2345 if (length <= 0) break;
2346 {
2347 long value;
2348 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2349 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2350 fields->f_dsp_32_u24 = value;
2351 }
2352 if (length <= 0) break;
2353 {
2354 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2355 }
2356 }
2357 break;
2358 case M32C_OPERAND_IMM_32_HI :
2359 {
2360 long value;
2361 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2362 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2363 fields->f_dsp_32_s16 = value;
2364 }
2365 break;
2366 case M32C_OPERAND_IMM_32_QI :
2367 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2368 break;
2369 case M32C_OPERAND_IMM_32_SI :
2370 {
2371 long value;
2372 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2373 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2374 fields->f_dsp_32_s32 = value;
2375 }
2376 break;
2377 case M32C_OPERAND_IMM_40_HI :
2378 {
2379 long value;
2380 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2381 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2382 fields->f_dsp_40_s16 = value;
2383 }
2384 break;
2385 case M32C_OPERAND_IMM_40_QI :
2386 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2387 break;
2388 case M32C_OPERAND_IMM_40_SI :
2389 {
2390 {
2391 long value;
2392 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2393 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2394 fields->f_dsp_40_u24 = value;
2395 }
2396 if (length <= 0) break;
2397 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2398 if (length <= 0) break;
2399 {
2400 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2401 }
2402 }
2403 break;
2404 case M32C_OPERAND_IMM_48_HI :
2405 {
2406 long value;
2407 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2408 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2409 fields->f_dsp_48_s16 = value;
2410 }
2411 break;
2412 case M32C_OPERAND_IMM_48_QI :
2413 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2414 break;
2415 case M32C_OPERAND_IMM_48_SI :
2416 {
2417 {
2418 long value;
2419 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2420 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2421 fields->f_dsp_48_u16 = value;
2422 }
2423 if (length <= 0) break;
2424 {
2425 long value;
2426 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2427 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2428 fields->f_dsp_64_u16 = value;
2429 }
2430 if (length <= 0) break;
2431 {
2432 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2433 }
2434 }
2435 break;
2436 case M32C_OPERAND_IMM_56_HI :
2437 {
2438 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2439 if (length <= 0) break;
2440 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2441 if (length <= 0) break;
2442 {
2443 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2444 }
2445 }
2446 break;
2447 case M32C_OPERAND_IMM_56_QI :
2448 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2449 break;
2450 case M32C_OPERAND_IMM_64_HI :
2451 {
2452 long value;
2453 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2454 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2455 fields->f_dsp_64_s16 = value;
2456 }
2457 break;
2458 case M32C_OPERAND_IMM_8_HI :
2459 {
2460 long value;
2461 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2462 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2463 fields->f_dsp_8_s16 = value;
2464 }
2465 break;
2466 case M32C_OPERAND_IMM_8_QI :
2467 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2468 break;
2469 case M32C_OPERAND_IMM_8_S4 :
2470 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2471 break;
2472 case M32C_OPERAND_IMM_SH_12_S4 :
2473 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2474 break;
2475 case M32C_OPERAND_IMM_SH_20_S4 :
2476 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2477 break;
2478 case M32C_OPERAND_IMM_SH_8_S4 :
2479 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2480 break;
2481 case M32C_OPERAND_IMM1_S :
2482 {
2483 long value;
2484 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2485 value = ((value) + (1));
2486 fields->f_imm1_S = value;
2487 }
2488 break;
2489 case M32C_OPERAND_IMM3_S :
2490 {
2491 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2492 if (length <= 0) break;
2493 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2494 if (length <= 0) break;
2495 {
2496 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2497 }
2498 }
2499 break;
2500 case M32C_OPERAND_LAB_16_8 :
2501 {
2502 long value;
2503 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2504 value = ((value) + (((pc) + (2))));
2505 fields->f_lab_16_8 = value;
2506 }
2507 break;
2508 case M32C_OPERAND_LAB_24_8 :
2509 {
2510 long value;
2511 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2512 value = ((value) + (((pc) + (2))));
2513 fields->f_lab_24_8 = value;
2514 }
2515 break;
2516 case M32C_OPERAND_LAB_32_8 :
2517 {
2518 long value;
2519 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2520 value = ((value) + (((pc) + (2))));
2521 fields->f_lab_32_8 = value;
2522 }
2523 break;
2524 case M32C_OPERAND_LAB_40_8 :
2525 {
2526 long value;
2527 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2528 value = ((value) + (((pc) + (2))));
2529 fields->f_lab_40_8 = value;
2530 }
2531 break;
2532 case M32C_OPERAND_LAB_5_3 :
2533 {
2534 long value;
2535 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2536 value = ((value) + (((pc) + (2))));
2537 fields->f_lab_5_3 = value;
2538 }
2539 break;
2540 case M32C_OPERAND_LAB_8_16 :
2541 {
2542 long value;
2543 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2544 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2545 fields->f_lab_8_16 = value;
2546 }
2547 break;
2548 case M32C_OPERAND_LAB_8_24 :
2549 {
2550 long value;
2551 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2552 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2553 fields->f_lab_8_24 = value;
2554 }
2555 break;
2556 case M32C_OPERAND_LAB_8_8 :
2557 {
2558 long value;
2559 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2560 value = ((value) + (((pc) + (1))));
2561 fields->f_lab_8_8 = value;
2562 }
2563 break;
2564 case M32C_OPERAND_LAB32_JMP_S :
2565 {
2566 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2567 if (length <= 0) break;
2568 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2569 if (length <= 0) break;
2570 {
2571 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2572 }
2573 }
2574 break;
2575 case M32C_OPERAND_Q :
2576 break;
2577 case M32C_OPERAND_R0 :
2578 break;
2579 case M32C_OPERAND_R0H :
2580 break;
2581 case M32C_OPERAND_R0L :
2582 break;
2583 case M32C_OPERAND_R1 :
2584 break;
2585 case M32C_OPERAND_R1R2R0 :
2586 break;
2587 case M32C_OPERAND_R2 :
2588 break;
2589 case M32C_OPERAND_R2R0 :
2590 break;
2591 case M32C_OPERAND_R3 :
2592 break;
2593 case M32C_OPERAND_R3R1 :
2594 break;
2595 case M32C_OPERAND_REGSETPOP :
2596 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2597 break;
2598 case M32C_OPERAND_REGSETPUSH :
2599 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2600 break;
2601 case M32C_OPERAND_RN16_PUSH_S :
2602 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2603 break;
2604 case M32C_OPERAND_S :
2605 break;
2606 case M32C_OPERAND_SRC16AN :
2607 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2608 break;
2609 case M32C_OPERAND_SRC16ANHI :
2610 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2611 break;
2612 case M32C_OPERAND_SRC16ANQI :
2613 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2614 break;
2615 case M32C_OPERAND_SRC16RNHI :
2616 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2617 break;
2618 case M32C_OPERAND_SRC16RNQI :
2619 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2620 break;
2621 case M32C_OPERAND_SRC32ANPREFIXED :
2622 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2623 break;
2624 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2625 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2626 break;
2627 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2628 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2629 break;
2630 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2631 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2632 break;
2633 case M32C_OPERAND_SRC32ANUNPREFIXED :
2634 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2635 break;
2636 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2637 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2638 break;
2639 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2640 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2641 break;
2642 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2643 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2644 break;
2645 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2646 {
2647 long value;
2648 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2649 value = ((((value) + (2))) % (4));
2650 fields->f_src32_rn_prefixed_HI = value;
2651 }
2652 break;
2653 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2654 {
2655 long value;
2656 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2657 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2658 fields->f_src32_rn_prefixed_QI = value;
2659 }
2660 break;
2661 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2662 {
2663 long value;
2664 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2665 value = ((value) - (2));
2666 fields->f_src32_rn_prefixed_SI = value;
2667 }
2668 break;
2669 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2670 {
2671 long value;
2672 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2673 value = ((((value) + (2))) % (4));
2674 fields->f_src32_rn_unprefixed_HI = value;
2675 }
2676 break;
2677 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2678 {
2679 long value;
2680 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2681 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2682 fields->f_src32_rn_unprefixed_QI = value;
2683 }
2684 break;
2685 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2686 {
2687 long value;
2688 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2689 value = ((value) - (2));
2690 fields->f_src32_rn_unprefixed_SI = value;
2691 }
2692 break;
2693 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2694 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2695 break;
2696 case M32C_OPERAND_X :
2697 break;
2698 case M32C_OPERAND_Z :
2699 break;
2700 case M32C_OPERAND_COND16_16 :
2701 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2702 break;
2703 case M32C_OPERAND_COND16_24 :
2704 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2705 break;
2706 case M32C_OPERAND_COND16_32 :
2707 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2708 break;
2709 case M32C_OPERAND_COND16C :
2710 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2711 break;
2712 case M32C_OPERAND_COND16J :
2713 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2714 break;
2715 case M32C_OPERAND_COND16J5 :
2716 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2717 break;
2718 case M32C_OPERAND_COND32 :
2719 {
2720 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2721 if (length <= 0) break;
2722 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2723 if (length <= 0) break;
2724 {
2725 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2726 }
2727 }
2728 break;
2729 case M32C_OPERAND_COND32_16 :
2730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2731 break;
2732 case M32C_OPERAND_COND32_24 :
2733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2734 break;
2735 case M32C_OPERAND_COND32_32 :
2736 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2737 break;
2738 case M32C_OPERAND_COND32_40 :
2739 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2740 break;
2741 case M32C_OPERAND_COND32J :
2742 {
2743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2744 if (length <= 0) break;
2745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2746 if (length <= 0) break;
2747 {
2748 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2749 }
2750 }
2751 break;
2752 case M32C_OPERAND_CR1_PREFIXED_32 :
2753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2754 break;
2755 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2756 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2757 break;
2758 case M32C_OPERAND_CR16 :
2759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2760 break;
2761 case M32C_OPERAND_CR2_32 :
2762 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2763 break;
2764 case M32C_OPERAND_CR3_PREFIXED_32 :
2765 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2766 break;
2767 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2769 break;
2770 case M32C_OPERAND_FLAGS16 :
2771 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2772 break;
2773 case M32C_OPERAND_FLAGS32 :
2774 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2775 break;
2776 case M32C_OPERAND_SCCOND32 :
2777 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2778 break;
2779 case M32C_OPERAND_SIZE :
2780 break;
2781
2782 default :
2783 /* xgettext:c-format */
2784 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2785 opindex);
2786 abort ();
2787 }
2788
2789 return length;
2790 }
2791
2792 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2793 {
2794 insert_insn_normal,
2795 };
2796
2797 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2798 {
2799 extract_insn_normal,
2800 };
2801
2802 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2803 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2804
2805 /* Getting values from cgen_fields is handled by a collection of functions.
2806 They are distinguished by the type of the VALUE argument they return.
2807 TODO: floating point, inlining support, remove cases where result type
2808 not appropriate. */
2809
2810 int
2811 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2812 int opindex,
2813 const CGEN_FIELDS * fields)
2814 {
2815 int value;
2816
2817 switch (opindex)
2818 {
2819 case M32C_OPERAND_A0 :
2820 value = 0;
2821 break;
2822 case M32C_OPERAND_A1 :
2823 value = 0;
2824 break;
2825 case M32C_OPERAND_A1A0 :
2826 value = 0;
2827 break;
2828 case M32C_OPERAND_AN16_PUSH_S :
2829 value = fields->f_4_1;
2830 break;
2831 case M32C_OPERAND_BIT16AN :
2832 value = fields->f_dst16_an;
2833 break;
2834 case M32C_OPERAND_BIT16RN :
2835 value = fields->f_dst16_rn;
2836 break;
2837 case M32C_OPERAND_BIT32ANPREFIXED :
2838 value = fields->f_dst32_an_prefixed;
2839 break;
2840 case M32C_OPERAND_BIT32ANUNPREFIXED :
2841 value = fields->f_dst32_an_unprefixed;
2842 break;
2843 case M32C_OPERAND_BIT32RNPREFIXED :
2844 value = fields->f_dst32_rn_prefixed_QI;
2845 break;
2846 case M32C_OPERAND_BIT32RNUNPREFIXED :
2847 value = fields->f_dst32_rn_unprefixed_QI;
2848 break;
2849 case M32C_OPERAND_BITBASE16_16_S8 :
2850 value = fields->f_dsp_16_s8;
2851 break;
2852 case M32C_OPERAND_BITBASE16_16_U16 :
2853 value = fields->f_dsp_16_u16;
2854 break;
2855 case M32C_OPERAND_BITBASE16_16_U8 :
2856 value = fields->f_dsp_16_u8;
2857 break;
2858 case M32C_OPERAND_BITBASE16_8_U11_S :
2859 value = fields->f_bitbase16_u11_S;
2860 break;
2861 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2862 value = fields->f_bitbase32_16_s11_unprefixed;
2863 break;
2864 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2865 value = fields->f_bitbase32_16_s19_unprefixed;
2866 break;
2867 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2868 value = fields->f_bitbase32_16_u11_unprefixed;
2869 break;
2870 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2871 value = fields->f_bitbase32_16_u19_unprefixed;
2872 break;
2873 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2874 value = fields->f_bitbase32_16_u27_unprefixed;
2875 break;
2876 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2877 value = fields->f_bitbase32_24_s11_prefixed;
2878 break;
2879 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2880 value = fields->f_bitbase32_24_s19_prefixed;
2881 break;
2882 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2883 value = fields->f_bitbase32_24_u11_prefixed;
2884 break;
2885 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2886 value = fields->f_bitbase32_24_u19_prefixed;
2887 break;
2888 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2889 value = fields->f_bitbase32_24_u27_prefixed;
2890 break;
2891 case M32C_OPERAND_BITNO16R :
2892 value = fields->f_dsp_16_u8;
2893 break;
2894 case M32C_OPERAND_BITNO32PREFIXED :
2895 value = fields->f_bitno32_prefixed;
2896 break;
2897 case M32C_OPERAND_BITNO32UNPREFIXED :
2898 value = fields->f_bitno32_unprefixed;
2899 break;
2900 case M32C_OPERAND_DSP_10_U6 :
2901 value = fields->f_dsp_10_u6;
2902 break;
2903 case M32C_OPERAND_DSP_16_S16 :
2904 value = fields->f_dsp_16_s16;
2905 break;
2906 case M32C_OPERAND_DSP_16_S8 :
2907 value = fields->f_dsp_16_s8;
2908 break;
2909 case M32C_OPERAND_DSP_16_U16 :
2910 value = fields->f_dsp_16_u16;
2911 break;
2912 case M32C_OPERAND_DSP_16_U20 :
2913 value = fields->f_dsp_16_u24;
2914 break;
2915 case M32C_OPERAND_DSP_16_U24 :
2916 value = fields->f_dsp_16_u24;
2917 break;
2918 case M32C_OPERAND_DSP_16_U8 :
2919 value = fields->f_dsp_16_u8;
2920 break;
2921 case M32C_OPERAND_DSP_24_S16 :
2922 value = fields->f_dsp_24_s16;
2923 break;
2924 case M32C_OPERAND_DSP_24_S8 :
2925 value = fields->f_dsp_24_s8;
2926 break;
2927 case M32C_OPERAND_DSP_24_U16 :
2928 value = fields->f_dsp_24_u16;
2929 break;
2930 case M32C_OPERAND_DSP_24_U20 :
2931 value = fields->f_dsp_24_u24;
2932 break;
2933 case M32C_OPERAND_DSP_24_U24 :
2934 value = fields->f_dsp_24_u24;
2935 break;
2936 case M32C_OPERAND_DSP_24_U8 :
2937 value = fields->f_dsp_24_u8;
2938 break;
2939 case M32C_OPERAND_DSP_32_S16 :
2940 value = fields->f_dsp_32_s16;
2941 break;
2942 case M32C_OPERAND_DSP_32_S8 :
2943 value = fields->f_dsp_32_s8;
2944 break;
2945 case M32C_OPERAND_DSP_32_U16 :
2946 value = fields->f_dsp_32_u16;
2947 break;
2948 case M32C_OPERAND_DSP_32_U20 :
2949 value = fields->f_dsp_32_u24;
2950 break;
2951 case M32C_OPERAND_DSP_32_U24 :
2952 value = fields->f_dsp_32_u24;
2953 break;
2954 case M32C_OPERAND_DSP_32_U8 :
2955 value = fields->f_dsp_32_u8;
2956 break;
2957 case M32C_OPERAND_DSP_40_S16 :
2958 value = fields->f_dsp_40_s16;
2959 break;
2960 case M32C_OPERAND_DSP_40_S8 :
2961 value = fields->f_dsp_40_s8;
2962 break;
2963 case M32C_OPERAND_DSP_40_U16 :
2964 value = fields->f_dsp_40_u16;
2965 break;
2966 case M32C_OPERAND_DSP_40_U24 :
2967 value = fields->f_dsp_40_u24;
2968 break;
2969 case M32C_OPERAND_DSP_40_U8 :
2970 value = fields->f_dsp_40_u8;
2971 break;
2972 case M32C_OPERAND_DSP_48_S16 :
2973 value = fields->f_dsp_48_s16;
2974 break;
2975 case M32C_OPERAND_DSP_48_S8 :
2976 value = fields->f_dsp_48_s8;
2977 break;
2978 case M32C_OPERAND_DSP_48_U16 :
2979 value = fields->f_dsp_48_u16;
2980 break;
2981 case M32C_OPERAND_DSP_48_U24 :
2982 value = fields->f_dsp_48_u24;
2983 break;
2984 case M32C_OPERAND_DSP_48_U8 :
2985 value = fields->f_dsp_48_u8;
2986 break;
2987 case M32C_OPERAND_DSP_8_S8 :
2988 value = fields->f_dsp_8_s8;
2989 break;
2990 case M32C_OPERAND_DSP_8_U16 :
2991 value = fields->f_dsp_8_u16;
2992 break;
2993 case M32C_OPERAND_DSP_8_U24 :
2994 value = fields->f_dsp_8_u24;
2995 break;
2996 case M32C_OPERAND_DSP_8_U6 :
2997 value = fields->f_dsp_8_u6;
2998 break;
2999 case M32C_OPERAND_DSP_8_U8 :
3000 value = fields->f_dsp_8_u8;
3001 break;
3002 case M32C_OPERAND_DST16AN :
3003 value = fields->f_dst16_an;
3004 break;
3005 case M32C_OPERAND_DST16AN_S :
3006 value = fields->f_dst16_an_s;
3007 break;
3008 case M32C_OPERAND_DST16ANHI :
3009 value = fields->f_dst16_an;
3010 break;
3011 case M32C_OPERAND_DST16ANQI :
3012 value = fields->f_dst16_an;
3013 break;
3014 case M32C_OPERAND_DST16ANQI_S :
3015 value = fields->f_dst16_rn_QI_s;
3016 break;
3017 case M32C_OPERAND_DST16ANSI :
3018 value = fields->f_dst16_an;
3019 break;
3020 case M32C_OPERAND_DST16RNEXTQI :
3021 value = fields->f_dst16_rn_ext;
3022 break;
3023 case M32C_OPERAND_DST16RNHI :
3024 value = fields->f_dst16_rn;
3025 break;
3026 case M32C_OPERAND_DST16RNQI :
3027 value = fields->f_dst16_rn;
3028 break;
3029 case M32C_OPERAND_DST16RNQI_S :
3030 value = fields->f_dst16_rn_QI_s;
3031 break;
3032 case M32C_OPERAND_DST16RNSI :
3033 value = fields->f_dst16_rn;
3034 break;
3035 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3036 value = fields->f_dst32_an_unprefixed;
3037 break;
3038 case M32C_OPERAND_DST32ANPREFIXED :
3039 value = fields->f_dst32_an_prefixed;
3040 break;
3041 case M32C_OPERAND_DST32ANPREFIXEDHI :
3042 value = fields->f_dst32_an_prefixed;
3043 break;
3044 case M32C_OPERAND_DST32ANPREFIXEDQI :
3045 value = fields->f_dst32_an_prefixed;
3046 break;
3047 case M32C_OPERAND_DST32ANPREFIXEDSI :
3048 value = fields->f_dst32_an_prefixed;
3049 break;
3050 case M32C_OPERAND_DST32ANUNPREFIXED :
3051 value = fields->f_dst32_an_unprefixed;
3052 break;
3053 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3054 value = fields->f_dst32_an_unprefixed;
3055 break;
3056 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3057 value = fields->f_dst32_an_unprefixed;
3058 break;
3059 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3060 value = fields->f_dst32_an_unprefixed;
3061 break;
3062 case M32C_OPERAND_DST32R0HI_S :
3063 value = 0;
3064 break;
3065 case M32C_OPERAND_DST32R0QI_S :
3066 value = 0;
3067 break;
3068 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3069 value = fields->f_dst32_rn_ext_unprefixed;
3070 break;
3071 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3072 value = fields->f_dst32_rn_ext_unprefixed;
3073 break;
3074 case M32C_OPERAND_DST32RNPREFIXEDHI :
3075 value = fields->f_dst32_rn_prefixed_HI;
3076 break;
3077 case M32C_OPERAND_DST32RNPREFIXEDQI :
3078 value = fields->f_dst32_rn_prefixed_QI;
3079 break;
3080 case M32C_OPERAND_DST32RNPREFIXEDSI :
3081 value = fields->f_dst32_rn_prefixed_SI;
3082 break;
3083 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3084 value = fields->f_dst32_rn_unprefixed_HI;
3085 break;
3086 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3087 value = fields->f_dst32_rn_unprefixed_QI;
3088 break;
3089 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3090 value = fields->f_dst32_rn_unprefixed_SI;
3091 break;
3092 case M32C_OPERAND_G :
3093 value = 0;
3094 break;
3095 case M32C_OPERAND_IMM_12_S4 :
3096 value = fields->f_imm_12_s4;
3097 break;
3098 case M32C_OPERAND_IMM_13_U3 :
3099 value = fields->f_imm_13_u3;
3100 break;
3101 case M32C_OPERAND_IMM_16_HI :
3102 value = fields->f_dsp_16_s16;
3103 break;
3104 case M32C_OPERAND_IMM_16_QI :
3105 value = fields->f_dsp_16_s8;
3106 break;
3107 case M32C_OPERAND_IMM_16_SI :
3108 value = fields->f_dsp_16_s32;
3109 break;
3110 case M32C_OPERAND_IMM_20_S4 :
3111 value = fields->f_imm_20_s4;
3112 break;
3113 case M32C_OPERAND_IMM_24_HI :
3114 value = fields->f_dsp_24_s16;
3115 break;
3116 case M32C_OPERAND_IMM_24_QI :
3117 value = fields->f_dsp_24_s8;
3118 break;
3119 case M32C_OPERAND_IMM_24_SI :
3120 value = fields->f_dsp_24_s32;
3121 break;
3122 case M32C_OPERAND_IMM_32_HI :
3123 value = fields->f_dsp_32_s16;
3124 break;
3125 case M32C_OPERAND_IMM_32_QI :
3126 value = fields->f_dsp_32_s8;
3127 break;
3128 case M32C_OPERAND_IMM_32_SI :
3129 value = fields->f_dsp_32_s32;
3130 break;
3131 case M32C_OPERAND_IMM_40_HI :
3132 value = fields->f_dsp_40_s16;
3133 break;
3134 case M32C_OPERAND_IMM_40_QI :
3135 value = fields->f_dsp_40_s8;
3136 break;
3137 case M32C_OPERAND_IMM_40_SI :
3138 value = fields->f_dsp_40_s32;
3139 break;
3140 case M32C_OPERAND_IMM_48_HI :
3141 value = fields->f_dsp_48_s16;
3142 break;
3143 case M32C_OPERAND_IMM_48_QI :
3144 value = fields->f_dsp_48_s8;
3145 break;
3146 case M32C_OPERAND_IMM_48_SI :
3147 value = fields->f_dsp_48_s32;
3148 break;
3149 case M32C_OPERAND_IMM_56_HI :
3150 value = fields->f_dsp_56_s16;
3151 break;
3152 case M32C_OPERAND_IMM_56_QI :
3153 value = fields->f_dsp_56_s8;
3154 break;
3155 case M32C_OPERAND_IMM_64_HI :
3156 value = fields->f_dsp_64_s16;
3157 break;
3158 case M32C_OPERAND_IMM_8_HI :
3159 value = fields->f_dsp_8_s16;
3160 break;
3161 case M32C_OPERAND_IMM_8_QI :
3162 value = fields->f_dsp_8_s8;
3163 break;
3164 case M32C_OPERAND_IMM_8_S4 :
3165 value = fields->f_imm_8_s4;
3166 break;
3167 case M32C_OPERAND_IMM_SH_12_S4 :
3168 value = fields->f_imm_12_s4;
3169 break;
3170 case M32C_OPERAND_IMM_SH_20_S4 :
3171 value = fields->f_imm_20_s4;
3172 break;
3173 case M32C_OPERAND_IMM_SH_8_S4 :
3174 value = fields->f_imm_8_s4;
3175 break;
3176 case M32C_OPERAND_IMM1_S :
3177 value = fields->f_imm1_S;
3178 break;
3179 case M32C_OPERAND_IMM3_S :
3180 value = fields->f_imm3_S;
3181 break;
3182 case M32C_OPERAND_LAB_16_8 :
3183 value = fields->f_lab_16_8;
3184 break;
3185 case M32C_OPERAND_LAB_24_8 :
3186 value = fields->f_lab_24_8;
3187 break;
3188 case M32C_OPERAND_LAB_32_8 :
3189 value = fields->f_lab_32_8;
3190 break;
3191 case M32C_OPERAND_LAB_40_8 :
3192 value = fields->f_lab_40_8;
3193 break;
3194 case M32C_OPERAND_LAB_5_3 :
3195 value = fields->f_lab_5_3;
3196 break;
3197 case M32C_OPERAND_LAB_8_16 :
3198 value = fields->f_lab_8_16;
3199 break;
3200 case M32C_OPERAND_LAB_8_24 :
3201 value = fields->f_lab_8_24;
3202 break;
3203 case M32C_OPERAND_LAB_8_8 :
3204 value = fields->f_lab_8_8;
3205 break;
3206 case M32C_OPERAND_LAB32_JMP_S :
3207 value = fields->f_lab32_jmp_s;
3208 break;
3209 case M32C_OPERAND_Q :
3210 value = 0;
3211 break;
3212 case M32C_OPERAND_R0 :
3213 value = 0;
3214 break;
3215 case M32C_OPERAND_R0H :
3216 value = 0;
3217 break;
3218 case M32C_OPERAND_R0L :
3219 value = 0;
3220 break;
3221 case M32C_OPERAND_R1 :
3222 value = 0;
3223 break;
3224 case M32C_OPERAND_R1R2R0 :
3225 value = 0;
3226 break;
3227 case M32C_OPERAND_R2 :
3228 value = 0;
3229 break;
3230 case M32C_OPERAND_R2R0 :
3231 value = 0;
3232 break;
3233 case M32C_OPERAND_R3 :
3234 value = 0;
3235 break;
3236 case M32C_OPERAND_R3R1 :
3237 value = 0;
3238 break;
3239 case M32C_OPERAND_REGSETPOP :
3240 value = fields->f_8_8;
3241 break;
3242 case M32C_OPERAND_REGSETPUSH :
3243 value = fields->f_8_8;
3244 break;
3245 case M32C_OPERAND_RN16_PUSH_S :
3246 value = fields->f_4_1;
3247 break;
3248 case M32C_OPERAND_S :
3249 value = 0;
3250 break;
3251 case M32C_OPERAND_SRC16AN :
3252 value = fields->f_src16_an;
3253 break;
3254 case M32C_OPERAND_SRC16ANHI :
3255 value = fields->f_src16_an;
3256 break;
3257 case M32C_OPERAND_SRC16ANQI :
3258 value = fields->f_src16_an;
3259 break;
3260 case M32C_OPERAND_SRC16RNHI :
3261 value = fields->f_src16_rn;
3262 break;
3263 case M32C_OPERAND_SRC16RNQI :
3264 value = fields->f_src16_rn;
3265 break;
3266 case M32C_OPERAND_SRC32ANPREFIXED :
3267 value = fields->f_src32_an_prefixed;
3268 break;
3269 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3270 value = fields->f_src32_an_prefixed;
3271 break;
3272 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3273 value = fields->f_src32_an_prefixed;
3274 break;
3275 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3276 value = fields->f_src32_an_prefixed;
3277 break;
3278 case M32C_OPERAND_SRC32ANUNPREFIXED :
3279 value = fields->f_src32_an_unprefixed;
3280 break;
3281 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3282 value = fields->f_src32_an_unprefixed;
3283 break;
3284 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3285 value = fields->f_src32_an_unprefixed;
3286 break;
3287 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3288 value = fields->f_src32_an_unprefixed;
3289 break;
3290 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3291 value = fields->f_src32_rn_prefixed_HI;
3292 break;
3293 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3294 value = fields->f_src32_rn_prefixed_QI;
3295 break;
3296 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3297 value = fields->f_src32_rn_prefixed_SI;
3298 break;
3299 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3300 value = fields->f_src32_rn_unprefixed_HI;
3301 break;
3302 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3303 value = fields->f_src32_rn_unprefixed_QI;
3304 break;
3305 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3306 value = fields->f_src32_rn_unprefixed_SI;
3307 break;
3308 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3309 value = fields->f_5_1;
3310 break;
3311 case M32C_OPERAND_X :
3312 value = 0;
3313 break;
3314 case M32C_OPERAND_Z :
3315 value = 0;
3316 break;
3317 case M32C_OPERAND_COND16_16 :
3318 value = fields->f_dsp_16_u8;
3319 break;
3320 case M32C_OPERAND_COND16_24 :
3321 value = fields->f_dsp_24_u8;
3322 break;
3323 case M32C_OPERAND_COND16_32 :
3324 value = fields->f_dsp_32_u8;
3325 break;
3326 case M32C_OPERAND_COND16C :
3327 value = fields->f_cond16;
3328 break;
3329 case M32C_OPERAND_COND16J :
3330 value = fields->f_cond16;
3331 break;
3332 case M32C_OPERAND_COND16J5 :
3333 value = fields->f_cond16j_5;
3334 break;
3335 case M32C_OPERAND_COND32 :
3336 value = fields->f_cond32;
3337 break;
3338 case M32C_OPERAND_COND32_16 :
3339 value = fields->f_dsp_16_u8;
3340 break;
3341 case M32C_OPERAND_COND32_24 :
3342 value = fields->f_dsp_24_u8;
3343 break;
3344 case M32C_OPERAND_COND32_32 :
3345 value = fields->f_dsp_32_u8;
3346 break;
3347 case M32C_OPERAND_COND32_40 :
3348 value = fields->f_dsp_40_u8;
3349 break;
3350 case M32C_OPERAND_COND32J :
3351 value = fields->f_cond32j;
3352 break;
3353 case M32C_OPERAND_CR1_PREFIXED_32 :
3354 value = fields->f_21_3;
3355 break;
3356 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3357 value = fields->f_13_3;
3358 break;
3359 case M32C_OPERAND_CR16 :
3360 value = fields->f_9_3;
3361 break;
3362 case M32C_OPERAND_CR2_32 :
3363 value = fields->f_13_3;
3364 break;
3365 case M32C_OPERAND_CR3_PREFIXED_32 :
3366 value = fields->f_21_3;
3367 break;
3368 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3369 value = fields->f_13_3;
3370 break;
3371 case M32C_OPERAND_FLAGS16 :
3372 value = fields->f_9_3;
3373 break;
3374 case M32C_OPERAND_FLAGS32 :
3375 value = fields->f_13_3;
3376 break;
3377 case M32C_OPERAND_SCCOND32 :
3378 value = fields->f_cond16;
3379 break;
3380 case M32C_OPERAND_SIZE :
3381 value = 0;
3382 break;
3383
3384 default :
3385 /* xgettext:c-format */
3386 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3387 opindex);
3388 abort ();
3389 }
3390
3391 return value;
3392 }
3393
3394 bfd_vma
3395 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3396 int opindex,
3397 const CGEN_FIELDS * fields)
3398 {
3399 bfd_vma value;
3400
3401 switch (opindex)
3402 {
3403 case M32C_OPERAND_A0 :
3404 value = 0;
3405 break;
3406 case M32C_OPERAND_A1 :
3407 value = 0;
3408 break;
3409 case M32C_OPERAND_A1A0 :
3410 value = 0;
3411 break;
3412 case M32C_OPERAND_AN16_PUSH_S :
3413 value = fields->f_4_1;
3414 break;
3415 case M32C_OPERAND_BIT16AN :
3416 value = fields->f_dst16_an;
3417 break;
3418 case M32C_OPERAND_BIT16RN :
3419 value = fields->f_dst16_rn;
3420 break;
3421 case M32C_OPERAND_BIT32ANPREFIXED :
3422 value = fields->f_dst32_an_prefixed;
3423 break;
3424 case M32C_OPERAND_BIT32ANUNPREFIXED :
3425 value = fields->f_dst32_an_unprefixed;
3426 break;
3427 case M32C_OPERAND_BIT32RNPREFIXED :
3428 value = fields->f_dst32_rn_prefixed_QI;
3429 break;
3430 case M32C_OPERAND_BIT32RNUNPREFIXED :
3431 value = fields->f_dst32_rn_unprefixed_QI;
3432 break;
3433 case M32C_OPERAND_BITBASE16_16_S8 :
3434 value = fields->f_dsp_16_s8;
3435 break;
3436 case M32C_OPERAND_BITBASE16_16_U16 :
3437 value = fields->f_dsp_16_u16;
3438 break;
3439 case M32C_OPERAND_BITBASE16_16_U8 :
3440 value = fields->f_dsp_16_u8;
3441 break;
3442 case M32C_OPERAND_BITBASE16_8_U11_S :
3443 value = fields->f_bitbase16_u11_S;
3444 break;
3445 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3446 value = fields->f_bitbase32_16_s11_unprefixed;
3447 break;
3448 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3449 value = fields->f_bitbase32_16_s19_unprefixed;
3450 break;
3451 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3452 value = fields->f_bitbase32_16_u11_unprefixed;
3453 break;
3454 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3455 value = fields->f_bitbase32_16_u19_unprefixed;
3456 break;
3457 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3458 value = fields->f_bitbase32_16_u27_unprefixed;
3459 break;
3460 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3461 value = fields->f_bitbase32_24_s11_prefixed;
3462 break;
3463 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3464 value = fields->f_bitbase32_24_s19_prefixed;
3465 break;
3466 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3467 value = fields->f_bitbase32_24_u11_prefixed;
3468 break;
3469 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3470 value = fields->f_bitbase32_24_u19_prefixed;
3471 break;
3472 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3473 value = fields->f_bitbase32_24_u27_prefixed;
3474 break;
3475 case M32C_OPERAND_BITNO16R :
3476 value = fields->f_dsp_16_u8;
3477 break;
3478 case M32C_OPERAND_BITNO32PREFIXED :
3479 value = fields->f_bitno32_prefixed;
3480 break;
3481 case M32C_OPERAND_BITNO32UNPREFIXED :
3482 value = fields->f_bitno32_unprefixed;
3483 break;
3484 case M32C_OPERAND_DSP_10_U6 :
3485 value = fields->f_dsp_10_u6;
3486 break;
3487 case M32C_OPERAND_DSP_16_S16 :
3488 value = fields->f_dsp_16_s16;
3489 break;
3490 case M32C_OPERAND_DSP_16_S8 :
3491 value = fields->f_dsp_16_s8;
3492 break;
3493 case M32C_OPERAND_DSP_16_U16 :
3494 value = fields->f_dsp_16_u16;
3495 break;
3496 case M32C_OPERAND_DSP_16_U20 :
3497 value = fields->f_dsp_16_u24;
3498 break;
3499 case M32C_OPERAND_DSP_16_U24 :
3500 value = fields->f_dsp_16_u24;
3501 break;
3502 case M32C_OPERAND_DSP_16_U8 :
3503 value = fields->f_dsp_16_u8;
3504 break;
3505 case M32C_OPERAND_DSP_24_S16 :
3506 value = fields->f_dsp_24_s16;
3507 break;
3508 case M32C_OPERAND_DSP_24_S8 :
3509 value = fields->f_dsp_24_s8;
3510 break;
3511 case M32C_OPERAND_DSP_24_U16 :
3512 value = fields->f_dsp_24_u16;
3513 break;
3514 case M32C_OPERAND_DSP_24_U20 :
3515 value = fields->f_dsp_24_u24;
3516 break;
3517 case M32C_OPERAND_DSP_24_U24 :
3518 value = fields->f_dsp_24_u24;
3519 break;
3520 case M32C_OPERAND_DSP_24_U8 :
3521 value = fields->f_dsp_24_u8;
3522 break;
3523 case M32C_OPERAND_DSP_32_S16 :
3524 value = fields->f_dsp_32_s16;
3525 break;
3526 case M32C_OPERAND_DSP_32_S8 :
3527 value = fields->f_dsp_32_s8;
3528 break;
3529 case M32C_OPERAND_DSP_32_U16 :
3530 value = fields->f_dsp_32_u16;
3531 break;
3532 case M32C_OPERAND_DSP_32_U20 :
3533 value = fields->f_dsp_32_u24;
3534 break;
3535 case M32C_OPERAND_DSP_32_U24 :
3536 value = fields->f_dsp_32_u24;
3537 break;
3538 case M32C_OPERAND_DSP_32_U8 :
3539 value = fields->f_dsp_32_u8;
3540 break;
3541 case M32C_OPERAND_DSP_40_S16 :
3542 value = fields->f_dsp_40_s16;
3543 break;
3544 case M32C_OPERAND_DSP_40_S8 :
3545 value = fields->f_dsp_40_s8;
3546 break;
3547 case M32C_OPERAND_DSP_40_U16 :
3548 value = fields->f_dsp_40_u16;
3549 break;
3550 case M32C_OPERAND_DSP_40_U24 :
3551 value = fields->f_dsp_40_u24;
3552 break;
3553 case M32C_OPERAND_DSP_40_U8 :
3554 value = fields->f_dsp_40_u8;
3555 break;
3556 case M32C_OPERAND_DSP_48_S16 :
3557 value = fields->f_dsp_48_s16;
3558 break;
3559 case M32C_OPERAND_DSP_48_S8 :
3560 value = fields->f_dsp_48_s8;
3561 break;
3562 case M32C_OPERAND_DSP_48_U16 :
3563 value = fields->f_dsp_48_u16;
3564 break;
3565 case M32C_OPERAND_DSP_48_U24 :
3566 value = fields->f_dsp_48_u24;
3567 break;
3568 case M32C_OPERAND_DSP_48_U8 :
3569 value = fields->f_dsp_48_u8;
3570 break;
3571 case M32C_OPERAND_DSP_8_S8 :
3572 value = fields->f_dsp_8_s8;
3573 break;
3574 case M32C_OPERAND_DSP_8_U16 :
3575 value = fields->f_dsp_8_u16;
3576 break;
3577 case M32C_OPERAND_DSP_8_U24 :
3578 value = fields->f_dsp_8_u24;
3579 break;
3580 case M32C_OPERAND_DSP_8_U6 :
3581 value = fields->f_dsp_8_u6;
3582 break;
3583 case M32C_OPERAND_DSP_8_U8 :
3584 value = fields->f_dsp_8_u8;
3585 break;
3586 case M32C_OPERAND_DST16AN :
3587 value = fields->f_dst16_an;
3588 break;
3589 case M32C_OPERAND_DST16AN_S :
3590 value = fields->f_dst16_an_s;
3591 break;
3592 case M32C_OPERAND_DST16ANHI :
3593 value = fields->f_dst16_an;
3594 break;
3595 case M32C_OPERAND_DST16ANQI :
3596 value = fields->f_dst16_an;
3597 break;
3598 case M32C_OPERAND_DST16ANQI_S :
3599 value = fields->f_dst16_rn_QI_s;
3600 break;
3601 case M32C_OPERAND_DST16ANSI :
3602 value = fields->f_dst16_an;
3603 break;
3604 case M32C_OPERAND_DST16RNEXTQI :
3605 value = fields->f_dst16_rn_ext;
3606 break;
3607 case M32C_OPERAND_DST16RNHI :
3608 value = fields->f_dst16_rn;
3609 break;
3610 case M32C_OPERAND_DST16RNQI :
3611 value = fields->f_dst16_rn;
3612 break;
3613 case M32C_OPERAND_DST16RNQI_S :
3614 value = fields->f_dst16_rn_QI_s;
3615 break;
3616 case M32C_OPERAND_DST16RNSI :
3617 value = fields->f_dst16_rn;
3618 break;
3619 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3620 value = fields->f_dst32_an_unprefixed;
3621 break;
3622 case M32C_OPERAND_DST32ANPREFIXED :
3623 value = fields->f_dst32_an_prefixed;
3624 break;
3625 case M32C_OPERAND_DST32ANPREFIXEDHI :
3626 value = fields->f_dst32_an_prefixed;
3627 break;
3628 case M32C_OPERAND_DST32ANPREFIXEDQI :
3629 value = fields->f_dst32_an_prefixed;
3630 break;
3631 case M32C_OPERAND_DST32ANPREFIXEDSI :
3632 value = fields->f_dst32_an_prefixed;
3633 break;
3634 case M32C_OPERAND_DST32ANUNPREFIXED :
3635 value = fields->f_dst32_an_unprefixed;
3636 break;
3637 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3638 value = fields->f_dst32_an_unprefixed;
3639 break;
3640 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3641 value = fields->f_dst32_an_unprefixed;
3642 break;
3643 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3644 value = fields->f_dst32_an_unprefixed;
3645 break;
3646 case M32C_OPERAND_DST32R0HI_S :
3647 value = 0;
3648 break;
3649 case M32C_OPERAND_DST32R0QI_S :
3650 value = 0;
3651 break;
3652 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3653 value = fields->f_dst32_rn_ext_unprefixed;
3654 break;
3655 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3656 value = fields->f_dst32_rn_ext_unprefixed;
3657 break;
3658 case M32C_OPERAND_DST32RNPREFIXEDHI :
3659 value = fields->f_dst32_rn_prefixed_HI;
3660 break;
3661 case M32C_OPERAND_DST32RNPREFIXEDQI :
3662 value = fields->f_dst32_rn_prefixed_QI;
3663 break;
3664 case M32C_OPERAND_DST32RNPREFIXEDSI :
3665 value = fields->f_dst32_rn_prefixed_SI;
3666 break;
3667 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3668 value = fields->f_dst32_rn_unprefixed_HI;
3669 break;
3670 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3671 value = fields->f_dst32_rn_unprefixed_QI;
3672 break;
3673 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3674 value = fields->f_dst32_rn_unprefixed_SI;
3675 break;
3676 case M32C_OPERAND_G :
3677 value = 0;
3678 break;
3679 case M32C_OPERAND_IMM_12_S4 :
3680 value = fields->f_imm_12_s4;
3681 break;
3682 case M32C_OPERAND_IMM_13_U3 :
3683 value = fields->f_imm_13_u3;
3684 break;
3685 case M32C_OPERAND_IMM_16_HI :
3686 value = fields->f_dsp_16_s16;
3687 break;
3688 case M32C_OPERAND_IMM_16_QI :
3689 value = fields->f_dsp_16_s8;
3690 break;
3691 case M32C_OPERAND_IMM_16_SI :
3692 value = fields->f_dsp_16_s32;
3693 break;
3694 case M32C_OPERAND_IMM_20_S4 :
3695 value = fields->f_imm_20_s4;
3696 break;
3697 case M32C_OPERAND_IMM_24_HI :
3698 value = fields->f_dsp_24_s16;
3699 break;
3700 case M32C_OPERAND_IMM_24_QI :
3701 value = fields->f_dsp_24_s8;
3702 break;
3703 case M32C_OPERAND_IMM_24_SI :
3704 value = fields->f_dsp_24_s32;
3705 break;
3706 case M32C_OPERAND_IMM_32_HI :
3707 value = fields->f_dsp_32_s16;
3708 break;
3709 case M32C_OPERAND_IMM_32_QI :
3710 value = fields->f_dsp_32_s8;
3711 break;
3712 case M32C_OPERAND_IMM_32_SI :
3713 value = fields->f_dsp_32_s32;
3714 break;
3715 case M32C_OPERAND_IMM_40_HI :
3716 value = fields->f_dsp_40_s16;
3717 break;
3718 case M32C_OPERAND_IMM_40_QI :
3719 value = fields->f_dsp_40_s8;
3720 break;
3721 case M32C_OPERAND_IMM_40_SI :
3722 value = fields->f_dsp_40_s32;
3723 break;
3724 case M32C_OPERAND_IMM_48_HI :
3725 value = fields->f_dsp_48_s16;
3726 break;
3727 case M32C_OPERAND_IMM_48_QI :
3728 value = fields->f_dsp_48_s8;
3729 break;
3730 case M32C_OPERAND_IMM_48_SI :
3731 value = fields->f_dsp_48_s32;
3732 break;
3733 case M32C_OPERAND_IMM_56_HI :
3734 value = fields->f_dsp_56_s16;
3735 break;
3736 case M32C_OPERAND_IMM_56_QI :
3737 value = fields->f_dsp_56_s8;
3738 break;
3739 case M32C_OPERAND_IMM_64_HI :
3740 value = fields->f_dsp_64_s16;
3741 break;
3742 case M32C_OPERAND_IMM_8_HI :
3743 value = fields->f_dsp_8_s16;
3744 break;
3745 case M32C_OPERAND_IMM_8_QI :
3746 value = fields->f_dsp_8_s8;
3747 break;
3748 case M32C_OPERAND_IMM_8_S4 :
3749 value = fields->f_imm_8_s4;
3750 break;
3751 case M32C_OPERAND_IMM_SH_12_S4 :
3752 value = fields->f_imm_12_s4;
3753 break;
3754 case M32C_OPERAND_IMM_SH_20_S4 :
3755 value = fields->f_imm_20_s4;
3756 break;
3757 case M32C_OPERAND_IMM_SH_8_S4 :
3758 value = fields->f_imm_8_s4;
3759 break;
3760 case M32C_OPERAND_IMM1_S :
3761 value = fields->f_imm1_S;
3762 break;
3763 case M32C_OPERAND_IMM3_S :
3764 value = fields->f_imm3_S;
3765 break;
3766 case M32C_OPERAND_LAB_16_8 :
3767 value = fields->f_lab_16_8;
3768 break;
3769 case M32C_OPERAND_LAB_24_8 :
3770 value = fields->f_lab_24_8;
3771 break;
3772 case M32C_OPERAND_LAB_32_8 :
3773 value = fields->f_lab_32_8;
3774 break;
3775 case M32C_OPERAND_LAB_40_8 :
3776 value = fields->f_lab_40_8;
3777 break;
3778 case M32C_OPERAND_LAB_5_3 :
3779 value = fields->f_lab_5_3;
3780 break;
3781 case M32C_OPERAND_LAB_8_16 :
3782 value = fields->f_lab_8_16;
3783 break;
3784 case M32C_OPERAND_LAB_8_24 :
3785 value = fields->f_lab_8_24;
3786 break;
3787 case M32C_OPERAND_LAB_8_8 :
3788 value = fields->f_lab_8_8;
3789 break;
3790 case M32C_OPERAND_LAB32_JMP_S :
3791 value = fields->f_lab32_jmp_s;
3792 break;
3793 case M32C_OPERAND_Q :
3794 value = 0;
3795 break;
3796 case M32C_OPERAND_R0 :
3797 value = 0;
3798 break;
3799 case M32C_OPERAND_R0H :
3800 value = 0;
3801 break;
3802 case M32C_OPERAND_R0L :
3803 value = 0;
3804 break;
3805 case M32C_OPERAND_R1 :
3806 value = 0;
3807 break;
3808 case M32C_OPERAND_R1R2R0 :
3809 value = 0;
3810 break;
3811 case M32C_OPERAND_R2 :
3812 value = 0;
3813 break;
3814 case M32C_OPERAND_R2R0 :
3815 value = 0;
3816 break;
3817 case M32C_OPERAND_R3 :
3818 value = 0;
3819 break;
3820 case M32C_OPERAND_R3R1 :
3821 value = 0;
3822 break;
3823 case M32C_OPERAND_REGSETPOP :
3824 value = fields->f_8_8;
3825 break;
3826 case M32C_OPERAND_REGSETPUSH :
3827 value = fields->f_8_8;
3828 break;
3829 case M32C_OPERAND_RN16_PUSH_S :
3830 value = fields->f_4_1;
3831 break;
3832 case M32C_OPERAND_S :
3833 value = 0;
3834 break;
3835 case M32C_OPERAND_SRC16AN :
3836 value = fields->f_src16_an;
3837 break;
3838 case M32C_OPERAND_SRC16ANHI :
3839 value = fields->f_src16_an;
3840 break;
3841 case M32C_OPERAND_SRC16ANQI :
3842 value = fields->f_src16_an;
3843 break;
3844 case M32C_OPERAND_SRC16RNHI :
3845 value = fields->f_src16_rn;
3846 break;
3847 case M32C_OPERAND_SRC16RNQI :
3848 value = fields->f_src16_rn;
3849 break;
3850 case M32C_OPERAND_SRC32ANPREFIXED :
3851 value = fields->f_src32_an_prefixed;
3852 break;
3853 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3854 value = fields->f_src32_an_prefixed;
3855 break;
3856 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3857 value = fields->f_src32_an_prefixed;
3858 break;
3859 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3860 value = fields->f_src32_an_prefixed;
3861 break;
3862 case M32C_OPERAND_SRC32ANUNPREFIXED :
3863 value = fields->f_src32_an_unprefixed;
3864 break;
3865 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3866 value = fields->f_src32_an_unprefixed;
3867 break;
3868 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3869 value = fields->f_src32_an_unprefixed;
3870 break;
3871 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3872 value = fields->f_src32_an_unprefixed;
3873 break;
3874 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3875 value = fields->f_src32_rn_prefixed_HI;
3876 break;
3877 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3878 value = fields->f_src32_rn_prefixed_QI;
3879 break;
3880 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3881 value = fields->f_src32_rn_prefixed_SI;
3882 break;
3883 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3884 value = fields->f_src32_rn_unprefixed_HI;
3885 break;
3886 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3887 value = fields->f_src32_rn_unprefixed_QI;
3888 break;
3889 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3890 value = fields->f_src32_rn_unprefixed_SI;
3891 break;
3892 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3893 value = fields->f_5_1;
3894 break;
3895 case M32C_OPERAND_X :
3896 value = 0;
3897 break;
3898 case M32C_OPERAND_Z :
3899 value = 0;
3900 break;
3901 case M32C_OPERAND_COND16_16 :
3902 value = fields->f_dsp_16_u8;
3903 break;
3904 case M32C_OPERAND_COND16_24 :
3905 value = fields->f_dsp_24_u8;
3906 break;
3907 case M32C_OPERAND_COND16_32 :
3908 value = fields->f_dsp_32_u8;
3909 break;
3910 case M32C_OPERAND_COND16C :
3911 value = fields->f_cond16;
3912 break;
3913 case M32C_OPERAND_COND16J :
3914 value = fields->f_cond16;
3915 break;
3916 case M32C_OPERAND_COND16J5 :
3917 value = fields->f_cond16j_5;
3918 break;
3919 case M32C_OPERAND_COND32 :
3920 value = fields->f_cond32;
3921 break;
3922 case M32C_OPERAND_COND32_16 :
3923 value = fields->f_dsp_16_u8;
3924 break;
3925 case M32C_OPERAND_COND32_24 :
3926 value = fields->f_dsp_24_u8;
3927 break;
3928 case M32C_OPERAND_COND32_32 :
3929 value = fields->f_dsp_32_u8;
3930 break;
3931 case M32C_OPERAND_COND32_40 :
3932 value = fields->f_dsp_40_u8;
3933 break;
3934 case M32C_OPERAND_COND32J :
3935 value = fields->f_cond32j;
3936 break;
3937 case M32C_OPERAND_CR1_PREFIXED_32 :
3938 value = fields->f_21_3;
3939 break;
3940 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3941 value = fields->f_13_3;
3942 break;
3943 case M32C_OPERAND_CR16 :
3944 value = fields->f_9_3;
3945 break;
3946 case M32C_OPERAND_CR2_32 :
3947 value = fields->f_13_3;
3948 break;
3949 case M32C_OPERAND_CR3_PREFIXED_32 :
3950 value = fields->f_21_3;
3951 break;
3952 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3953 value = fields->f_13_3;
3954 break;
3955 case M32C_OPERAND_FLAGS16 :
3956 value = fields->f_9_3;
3957 break;
3958 case M32C_OPERAND_FLAGS32 :
3959 value = fields->f_13_3;
3960 break;
3961 case M32C_OPERAND_SCCOND32 :
3962 value = fields->f_cond16;
3963 break;
3964 case M32C_OPERAND_SIZE :
3965 value = 0;
3966 break;
3967
3968 default :
3969 /* xgettext:c-format */
3970 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
3971 opindex);
3972 abort ();
3973 }
3974
3975 return value;
3976 }
3977
3978 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
3979 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
3980
3981 /* Stuffing values in cgen_fields is handled by a collection of functions.
3982 They are distinguished by the type of the VALUE argument they accept.
3983 TODO: floating point, inlining support, remove cases where argument type
3984 not appropriate. */
3985
3986 void
3987 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3988 int opindex,
3989 CGEN_FIELDS * fields,
3990 int value)
3991 {
3992 switch (opindex)
3993 {
3994 case M32C_OPERAND_A0 :
3995 break;
3996 case M32C_OPERAND_A1 :
3997 break;
3998 case M32C_OPERAND_A1A0 :
3999 break;
4000 case M32C_OPERAND_AN16_PUSH_S :
4001 fields->f_4_1 = value;
4002 break;
4003 case M32C_OPERAND_BIT16AN :
4004 fields->f_dst16_an = value;
4005 break;
4006 case M32C_OPERAND_BIT16RN :
4007 fields->f_dst16_rn = value;
4008 break;
4009 case M32C_OPERAND_BIT32ANPREFIXED :
4010 fields->f_dst32_an_prefixed = value;
4011 break;
4012 case M32C_OPERAND_BIT32ANUNPREFIXED :
4013 fields->f_dst32_an_unprefixed = value;
4014 break;
4015 case M32C_OPERAND_BIT32RNPREFIXED :
4016 fields->f_dst32_rn_prefixed_QI = value;
4017 break;
4018 case M32C_OPERAND_BIT32RNUNPREFIXED :
4019 fields->f_dst32_rn_unprefixed_QI = value;
4020 break;
4021 case M32C_OPERAND_BITBASE16_16_S8 :
4022 fields->f_dsp_16_s8 = value;
4023 break;
4024 case M32C_OPERAND_BITBASE16_16_U16 :
4025 fields->f_dsp_16_u16 = value;
4026 break;
4027 case M32C_OPERAND_BITBASE16_16_U8 :
4028 fields->f_dsp_16_u8 = value;
4029 break;
4030 case M32C_OPERAND_BITBASE16_8_U11_S :
4031 fields->f_bitbase16_u11_S = value;
4032 break;
4033 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4034 fields->f_bitbase32_16_s11_unprefixed = value;
4035 break;
4036 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4037 fields->f_bitbase32_16_s19_unprefixed = value;
4038 break;
4039 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4040 fields->f_bitbase32_16_u11_unprefixed = value;
4041 break;
4042 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4043 fields->f_bitbase32_16_u19_unprefixed = value;
4044 break;
4045 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4046 fields->f_bitbase32_16_u27_unprefixed = value;
4047 break;
4048 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4049 fields->f_bitbase32_24_s11_prefixed = value;
4050 break;
4051 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4052 fields->f_bitbase32_24_s19_prefixed = value;
4053 break;
4054 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4055 fields->f_bitbase32_24_u11_prefixed = value;
4056 break;
4057 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4058 fields->f_bitbase32_24_u19_prefixed = value;
4059 break;
4060 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4061 fields->f_bitbase32_24_u27_prefixed = value;
4062 break;
4063 case M32C_OPERAND_BITNO16R :
4064 fields->f_dsp_16_u8 = value;
4065 break;
4066 case M32C_OPERAND_BITNO32PREFIXED :
4067 fields->f_bitno32_prefixed = value;
4068 break;
4069 case M32C_OPERAND_BITNO32UNPREFIXED :
4070 fields->f_bitno32_unprefixed = value;
4071 break;
4072 case M32C_OPERAND_DSP_10_U6 :
4073 fields->f_dsp_10_u6 = value;
4074 break;
4075 case M32C_OPERAND_DSP_16_S16 :
4076 fields->f_dsp_16_s16 = value;
4077 break;
4078 case M32C_OPERAND_DSP_16_S8 :
4079 fields->f_dsp_16_s8 = value;
4080 break;
4081 case M32C_OPERAND_DSP_16_U16 :
4082 fields->f_dsp_16_u16 = value;
4083 break;
4084 case M32C_OPERAND_DSP_16_U20 :
4085 fields->f_dsp_16_u24 = value;
4086 break;
4087 case M32C_OPERAND_DSP_16_U24 :
4088 fields->f_dsp_16_u24 = value;
4089 break;
4090 case M32C_OPERAND_DSP_16_U8 :
4091 fields->f_dsp_16_u8 = value;
4092 break;
4093 case M32C_OPERAND_DSP_24_S16 :
4094 fields->f_dsp_24_s16 = value;
4095 break;
4096 case M32C_OPERAND_DSP_24_S8 :
4097 fields->f_dsp_24_s8 = value;
4098 break;
4099 case M32C_OPERAND_DSP_24_U16 :
4100 fields->f_dsp_24_u16 = value;
4101 break;
4102 case M32C_OPERAND_DSP_24_U20 :
4103 fields->f_dsp_24_u24 = value;
4104 break;
4105 case M32C_OPERAND_DSP_24_U24 :
4106 fields->f_dsp_24_u24 = value;
4107 break;
4108 case M32C_OPERAND_DSP_24_U8 :
4109 fields->f_dsp_24_u8 = value;
4110 break;
4111 case M32C_OPERAND_DSP_32_S16 :
4112 fields->f_dsp_32_s16 = value;
4113 break;
4114 case M32C_OPERAND_DSP_32_S8 :
4115 fields->f_dsp_32_s8 = value;
4116 break;
4117 case M32C_OPERAND_DSP_32_U16 :
4118 fields->f_dsp_32_u16 = value;
4119 break;
4120 case M32C_OPERAND_DSP_32_U20 :
4121 fields->f_dsp_32_u24 = value;
4122 break;
4123 case M32C_OPERAND_DSP_32_U24 :
4124 fields->f_dsp_32_u24 = value;
4125 break;
4126 case M32C_OPERAND_DSP_32_U8 :
4127 fields->f_dsp_32_u8 = value;
4128 break;
4129 case M32C_OPERAND_DSP_40_S16 :
4130 fields->f_dsp_40_s16 = value;
4131 break;
4132 case M32C_OPERAND_DSP_40_S8 :
4133 fields->f_dsp_40_s8 = value;
4134 break;
4135 case M32C_OPERAND_DSP_40_U16 :
4136 fields->f_dsp_40_u16 = value;
4137 break;
4138 case M32C_OPERAND_DSP_40_U24 :
4139 fields->f_dsp_40_u24 = value;
4140 break;
4141 case M32C_OPERAND_DSP_40_U8 :
4142 fields->f_dsp_40_u8 = value;
4143 break;
4144 case M32C_OPERAND_DSP_48_S16 :
4145 fields->f_dsp_48_s16 = value;
4146 break;
4147 case M32C_OPERAND_DSP_48_S8 :
4148 fields->f_dsp_48_s8 = value;
4149 break;
4150 case M32C_OPERAND_DSP_48_U16 :
4151 fields->f_dsp_48_u16 = value;
4152 break;
4153 case M32C_OPERAND_DSP_48_U24 :
4154 fields->f_dsp_48_u24 = value;
4155 break;
4156 case M32C_OPERAND_DSP_48_U8 :
4157 fields->f_dsp_48_u8 = value;
4158 break;
4159 case M32C_OPERAND_DSP_8_S8 :
4160 fields->f_dsp_8_s8 = value;
4161 break;
4162 case M32C_OPERAND_DSP_8_U16 :
4163 fields->f_dsp_8_u16 = value;
4164 break;
4165 case M32C_OPERAND_DSP_8_U24 :
4166 fields->f_dsp_8_u24 = value;
4167 break;
4168 case M32C_OPERAND_DSP_8_U6 :
4169 fields->f_dsp_8_u6 = value;
4170 break;
4171 case M32C_OPERAND_DSP_8_U8 :
4172 fields->f_dsp_8_u8 = value;
4173 break;
4174 case M32C_OPERAND_DST16AN :
4175 fields->f_dst16_an = value;
4176 break;
4177 case M32C_OPERAND_DST16AN_S :
4178 fields->f_dst16_an_s = value;
4179 break;
4180 case M32C_OPERAND_DST16ANHI :
4181 fields->f_dst16_an = value;
4182 break;
4183 case M32C_OPERAND_DST16ANQI :
4184 fields->f_dst16_an = value;
4185 break;
4186 case M32C_OPERAND_DST16ANQI_S :
4187 fields->f_dst16_rn_QI_s = value;
4188 break;
4189 case M32C_OPERAND_DST16ANSI :
4190 fields->f_dst16_an = value;
4191 break;
4192 case M32C_OPERAND_DST16RNEXTQI :
4193 fields->f_dst16_rn_ext = value;
4194 break;
4195 case M32C_OPERAND_DST16RNHI :
4196 fields->f_dst16_rn = value;
4197 break;
4198 case M32C_OPERAND_DST16RNQI :
4199 fields->f_dst16_rn = value;
4200 break;
4201 case M32C_OPERAND_DST16RNQI_S :
4202 fields->f_dst16_rn_QI_s = value;
4203 break;
4204 case M32C_OPERAND_DST16RNSI :
4205 fields->f_dst16_rn = value;
4206 break;
4207 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4208 fields->f_dst32_an_unprefixed = value;
4209 break;
4210 case M32C_OPERAND_DST32ANPREFIXED :
4211 fields->f_dst32_an_prefixed = value;
4212 break;
4213 case M32C_OPERAND_DST32ANPREFIXEDHI :
4214 fields->f_dst32_an_prefixed = value;
4215 break;
4216 case M32C_OPERAND_DST32ANPREFIXEDQI :
4217 fields->f_dst32_an_prefixed = value;
4218 break;
4219 case M32C_OPERAND_DST32ANPREFIXEDSI :
4220 fields->f_dst32_an_prefixed = value;
4221 break;
4222 case M32C_OPERAND_DST32ANUNPREFIXED :
4223 fields->f_dst32_an_unprefixed = value;
4224 break;
4225 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4226 fields->f_dst32_an_unprefixed = value;
4227 break;
4228 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4229 fields->f_dst32_an_unprefixed = value;
4230 break;
4231 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4232 fields->f_dst32_an_unprefixed = value;
4233 break;
4234 case M32C_OPERAND_DST32R0HI_S :
4235 break;
4236 case M32C_OPERAND_DST32R0QI_S :
4237 break;
4238 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4239 fields->f_dst32_rn_ext_unprefixed = value;
4240 break;
4241 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4242 fields->f_dst32_rn_ext_unprefixed = value;
4243 break;
4244 case M32C_OPERAND_DST32RNPREFIXEDHI :
4245 fields->f_dst32_rn_prefixed_HI = value;
4246 break;
4247 case M32C_OPERAND_DST32RNPREFIXEDQI :
4248 fields->f_dst32_rn_prefixed_QI = value;
4249 break;
4250 case M32C_OPERAND_DST32RNPREFIXEDSI :
4251 fields->f_dst32_rn_prefixed_SI = value;
4252 break;
4253 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4254 fields->f_dst32_rn_unprefixed_HI = value;
4255 break;
4256 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4257 fields->f_dst32_rn_unprefixed_QI = value;
4258 break;
4259 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4260 fields->f_dst32_rn_unprefixed_SI = value;
4261 break;
4262 case M32C_OPERAND_G :
4263 break;
4264 case M32C_OPERAND_IMM_12_S4 :
4265 fields->f_imm_12_s4 = value;
4266 break;
4267 case M32C_OPERAND_IMM_13_U3 :
4268 fields->f_imm_13_u3 = value;
4269 break;
4270 case M32C_OPERAND_IMM_16_HI :
4271 fields->f_dsp_16_s16 = value;
4272 break;
4273 case M32C_OPERAND_IMM_16_QI :
4274 fields->f_dsp_16_s8 = value;
4275 break;
4276 case M32C_OPERAND_IMM_16_SI :
4277 fields->f_dsp_16_s32 = value;
4278 break;
4279 case M32C_OPERAND_IMM_20_S4 :
4280 fields->f_imm_20_s4 = value;
4281 break;
4282 case M32C_OPERAND_IMM_24_HI :
4283 fields->f_dsp_24_s16 = value;
4284 break;
4285 case M32C_OPERAND_IMM_24_QI :
4286 fields->f_dsp_24_s8 = value;
4287 break;
4288 case M32C_OPERAND_IMM_24_SI :
4289 fields->f_dsp_24_s32 = value;
4290 break;
4291 case M32C_OPERAND_IMM_32_HI :
4292 fields->f_dsp_32_s16 = value;
4293 break;
4294 case M32C_OPERAND_IMM_32_QI :
4295 fields->f_dsp_32_s8 = value;
4296 break;
4297 case M32C_OPERAND_IMM_32_SI :
4298 fields->f_dsp_32_s32 = value;
4299 break;
4300 case M32C_OPERAND_IMM_40_HI :
4301 fields->f_dsp_40_s16 = value;
4302 break;
4303 case M32C_OPERAND_IMM_40_QI :
4304 fields->f_dsp_40_s8 = value;
4305 break;
4306 case M32C_OPERAND_IMM_40_SI :
4307 fields->f_dsp_40_s32 = value;
4308 break;
4309 case M32C_OPERAND_IMM_48_HI :
4310 fields->f_dsp_48_s16 = value;
4311 break;
4312 case M32C_OPERAND_IMM_48_QI :
4313 fields->f_dsp_48_s8 = value;
4314 break;
4315 case M32C_OPERAND_IMM_48_SI :
4316 fields->f_dsp_48_s32 = value;
4317 break;
4318 case M32C_OPERAND_IMM_56_HI :
4319 fields->f_dsp_56_s16 = value;
4320 break;
4321 case M32C_OPERAND_IMM_56_QI :
4322 fields->f_dsp_56_s8 = value;
4323 break;
4324 case M32C_OPERAND_IMM_64_HI :
4325 fields->f_dsp_64_s16 = value;
4326 break;
4327 case M32C_OPERAND_IMM_8_HI :
4328 fields->f_dsp_8_s16 = value;
4329 break;
4330 case M32C_OPERAND_IMM_8_QI :
4331 fields->f_dsp_8_s8 = value;
4332 break;
4333 case M32C_OPERAND_IMM_8_S4 :
4334 fields->f_imm_8_s4 = value;
4335 break;
4336 case M32C_OPERAND_IMM_SH_12_S4 :
4337 fields->f_imm_12_s4 = value;
4338 break;
4339 case M32C_OPERAND_IMM_SH_20_S4 :
4340 fields->f_imm_20_s4 = value;
4341 break;
4342 case M32C_OPERAND_IMM_SH_8_S4 :
4343 fields->f_imm_8_s4 = value;
4344 break;
4345 case M32C_OPERAND_IMM1_S :
4346 fields->f_imm1_S = value;
4347 break;
4348 case M32C_OPERAND_IMM3_S :
4349 fields->f_imm3_S = value;
4350 break;
4351 case M32C_OPERAND_LAB_16_8 :
4352 fields->f_lab_16_8 = value;
4353 break;
4354 case M32C_OPERAND_LAB_24_8 :
4355 fields->f_lab_24_8 = value;
4356 break;
4357 case M32C_OPERAND_LAB_32_8 :
4358 fields->f_lab_32_8 = value;
4359 break;
4360 case M32C_OPERAND_LAB_40_8 :
4361 fields->f_lab_40_8 = value;
4362 break;
4363 case M32C_OPERAND_LAB_5_3 :
4364 fields->f_lab_5_3 = value;
4365 break;
4366 case M32C_OPERAND_LAB_8_16 :
4367 fields->f_lab_8_16 = value;
4368 break;
4369 case M32C_OPERAND_LAB_8_24 :
4370 fields->f_lab_8_24 = value;
4371 break;
4372 case M32C_OPERAND_LAB_8_8 :
4373 fields->f_lab_8_8 = value;
4374 break;
4375 case M32C_OPERAND_LAB32_JMP_S :
4376 fields->f_lab32_jmp_s = value;
4377 break;
4378 case M32C_OPERAND_Q :
4379 break;
4380 case M32C_OPERAND_R0 :
4381 break;
4382 case M32C_OPERAND_R0H :
4383 break;
4384 case M32C_OPERAND_R0L :
4385 break;
4386 case M32C_OPERAND_R1 :
4387 break;
4388 case M32C_OPERAND_R1R2R0 :
4389 break;
4390 case M32C_OPERAND_R2 :
4391 break;
4392 case M32C_OPERAND_R2R0 :
4393 break;
4394 case M32C_OPERAND_R3 :
4395 break;
4396 case M32C_OPERAND_R3R1 :
4397 break;
4398 case M32C_OPERAND_REGSETPOP :
4399 fields->f_8_8 = value;
4400 break;
4401 case M32C_OPERAND_REGSETPUSH :
4402 fields->f_8_8 = value;
4403 break;
4404 case M32C_OPERAND_RN16_PUSH_S :
4405 fields->f_4_1 = value;
4406 break;
4407 case M32C_OPERAND_S :
4408 break;
4409 case M32C_OPERAND_SRC16AN :
4410 fields->f_src16_an = value;
4411 break;
4412 case M32C_OPERAND_SRC16ANHI :
4413 fields->f_src16_an = value;
4414 break;
4415 case M32C_OPERAND_SRC16ANQI :
4416 fields->f_src16_an = value;
4417 break;
4418 case M32C_OPERAND_SRC16RNHI :
4419 fields->f_src16_rn = value;
4420 break;
4421 case M32C_OPERAND_SRC16RNQI :
4422 fields->f_src16_rn = value;
4423 break;
4424 case M32C_OPERAND_SRC32ANPREFIXED :
4425 fields->f_src32_an_prefixed = value;
4426 break;
4427 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4428 fields->f_src32_an_prefixed = value;
4429 break;
4430 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4431 fields->f_src32_an_prefixed = value;
4432 break;
4433 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4434 fields->f_src32_an_prefixed = value;
4435 break;
4436 case M32C_OPERAND_SRC32ANUNPREFIXED :
4437 fields->f_src32_an_unprefixed = value;
4438 break;
4439 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4440 fields->f_src32_an_unprefixed = value;
4441 break;
4442 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4443 fields->f_src32_an_unprefixed = value;
4444 break;
4445 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4446 fields->f_src32_an_unprefixed = value;
4447 break;
4448 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4449 fields->f_src32_rn_prefixed_HI = value;
4450 break;
4451 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4452 fields->f_src32_rn_prefixed_QI = value;
4453 break;
4454 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4455 fields->f_src32_rn_prefixed_SI = value;
4456 break;
4457 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4458 fields->f_src32_rn_unprefixed_HI = value;
4459 break;
4460 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4461 fields->f_src32_rn_unprefixed_QI = value;
4462 break;
4463 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4464 fields->f_src32_rn_unprefixed_SI = value;
4465 break;
4466 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4467 fields->f_5_1 = value;
4468 break;
4469 case M32C_OPERAND_X :
4470 break;
4471 case M32C_OPERAND_Z :
4472 break;
4473 case M32C_OPERAND_COND16_16 :
4474 fields->f_dsp_16_u8 = value;
4475 break;
4476 case M32C_OPERAND_COND16_24 :
4477 fields->f_dsp_24_u8 = value;
4478 break;
4479 case M32C_OPERAND_COND16_32 :
4480 fields->f_dsp_32_u8 = value;
4481 break;
4482 case M32C_OPERAND_COND16C :
4483 fields->f_cond16 = value;
4484 break;
4485 case M32C_OPERAND_COND16J :
4486 fields->f_cond16 = value;
4487 break;
4488 case M32C_OPERAND_COND16J5 :
4489 fields->f_cond16j_5 = value;
4490 break;
4491 case M32C_OPERAND_COND32 :
4492 fields->f_cond32 = value;
4493 break;
4494 case M32C_OPERAND_COND32_16 :
4495 fields->f_dsp_16_u8 = value;
4496 break;
4497 case M32C_OPERAND_COND32_24 :
4498 fields->f_dsp_24_u8 = value;
4499 break;
4500 case M32C_OPERAND_COND32_32 :
4501 fields->f_dsp_32_u8 = value;
4502 break;
4503 case M32C_OPERAND_COND32_40 :
4504 fields->f_dsp_40_u8 = value;
4505 break;
4506 case M32C_OPERAND_COND32J :
4507 fields->f_cond32j = value;
4508 break;
4509 case M32C_OPERAND_CR1_PREFIXED_32 :
4510 fields->f_21_3 = value;
4511 break;
4512 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4513 fields->f_13_3 = value;
4514 break;
4515 case M32C_OPERAND_CR16 :
4516 fields->f_9_3 = value;
4517 break;
4518 case M32C_OPERAND_CR2_32 :
4519 fields->f_13_3 = value;
4520 break;
4521 case M32C_OPERAND_CR3_PREFIXED_32 :
4522 fields->f_21_3 = value;
4523 break;
4524 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4525 fields->f_13_3 = value;
4526 break;
4527 case M32C_OPERAND_FLAGS16 :
4528 fields->f_9_3 = value;
4529 break;
4530 case M32C_OPERAND_FLAGS32 :
4531 fields->f_13_3 = value;
4532 break;
4533 case M32C_OPERAND_SCCOND32 :
4534 fields->f_cond16 = value;
4535 break;
4536 case M32C_OPERAND_SIZE :
4537 break;
4538
4539 default :
4540 /* xgettext:c-format */
4541 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4542 opindex);
4543 abort ();
4544 }
4545 }
4546
4547 void
4548 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4549 int opindex,
4550 CGEN_FIELDS * fields,
4551 bfd_vma value)
4552 {
4553 switch (opindex)
4554 {
4555 case M32C_OPERAND_A0 :
4556 break;
4557 case M32C_OPERAND_A1 :
4558 break;
4559 case M32C_OPERAND_A1A0 :
4560 break;
4561 case M32C_OPERAND_AN16_PUSH_S :
4562 fields->f_4_1 = value;
4563 break;
4564 case M32C_OPERAND_BIT16AN :
4565 fields->f_dst16_an = value;
4566 break;
4567 case M32C_OPERAND_BIT16RN :
4568 fields->f_dst16_rn = value;
4569 break;
4570 case M32C_OPERAND_BIT32ANPREFIXED :
4571 fields->f_dst32_an_prefixed = value;
4572 break;
4573 case M32C_OPERAND_BIT32ANUNPREFIXED :
4574 fields->f_dst32_an_unprefixed = value;
4575 break;
4576 case M32C_OPERAND_BIT32RNPREFIXED :
4577 fields->f_dst32_rn_prefixed_QI = value;
4578 break;
4579 case M32C_OPERAND_BIT32RNUNPREFIXED :
4580 fields->f_dst32_rn_unprefixed_QI = value;
4581 break;
4582 case M32C_OPERAND_BITBASE16_16_S8 :
4583 fields->f_dsp_16_s8 = value;
4584 break;
4585 case M32C_OPERAND_BITBASE16_16_U16 :
4586 fields->f_dsp_16_u16 = value;
4587 break;
4588 case M32C_OPERAND_BITBASE16_16_U8 :
4589 fields->f_dsp_16_u8 = value;
4590 break;
4591 case M32C_OPERAND_BITBASE16_8_U11_S :
4592 fields->f_bitbase16_u11_S = value;
4593 break;
4594 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4595 fields->f_bitbase32_16_s11_unprefixed = value;
4596 break;
4597 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4598 fields->f_bitbase32_16_s19_unprefixed = value;
4599 break;
4600 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4601 fields->f_bitbase32_16_u11_unprefixed = value;
4602 break;
4603 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4604 fields->f_bitbase32_16_u19_unprefixed = value;
4605 break;
4606 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4607 fields->f_bitbase32_16_u27_unprefixed = value;
4608 break;
4609 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4610 fields->f_bitbase32_24_s11_prefixed = value;
4611 break;
4612 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4613 fields->f_bitbase32_24_s19_prefixed = value;
4614 break;
4615 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4616 fields->f_bitbase32_24_u11_prefixed = value;
4617 break;
4618 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4619 fields->f_bitbase32_24_u19_prefixed = value;
4620 break;
4621 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4622 fields->f_bitbase32_24_u27_prefixed = value;
4623 break;
4624 case M32C_OPERAND_BITNO16R :
4625 fields->f_dsp_16_u8 = value;
4626 break;
4627 case M32C_OPERAND_BITNO32PREFIXED :
4628 fields->f_bitno32_prefixed = value;
4629 break;
4630 case M32C_OPERAND_BITNO32UNPREFIXED :
4631 fields->f_bitno32_unprefixed = value;
4632 break;
4633 case M32C_OPERAND_DSP_10_U6 :
4634 fields->f_dsp_10_u6 = value;
4635 break;
4636 case M32C_OPERAND_DSP_16_S16 :
4637 fields->f_dsp_16_s16 = value;
4638 break;
4639 case M32C_OPERAND_DSP_16_S8 :
4640 fields->f_dsp_16_s8 = value;
4641 break;
4642 case M32C_OPERAND_DSP_16_U16 :
4643 fields->f_dsp_16_u16 = value;
4644 break;
4645 case M32C_OPERAND_DSP_16_U20 :
4646 fields->f_dsp_16_u24 = value;
4647 break;
4648 case M32C_OPERAND_DSP_16_U24 :
4649 fields->f_dsp_16_u24 = value;
4650 break;
4651 case M32C_OPERAND_DSP_16_U8 :
4652 fields->f_dsp_16_u8 = value;
4653 break;
4654 case M32C_OPERAND_DSP_24_S16 :
4655 fields->f_dsp_24_s16 = value;
4656 break;
4657 case M32C_OPERAND_DSP_24_S8 :
4658 fields->f_dsp_24_s8 = value;
4659 break;
4660 case M32C_OPERAND_DSP_24_U16 :
4661 fields->f_dsp_24_u16 = value;
4662 break;
4663 case M32C_OPERAND_DSP_24_U20 :
4664 fields->f_dsp_24_u24 = value;
4665 break;
4666 case M32C_OPERAND_DSP_24_U24 :
4667 fields->f_dsp_24_u24 = value;
4668 break;
4669 case M32C_OPERAND_DSP_24_U8 :
4670 fields->f_dsp_24_u8 = value;
4671 break;
4672 case M32C_OPERAND_DSP_32_S16 :
4673 fields->f_dsp_32_s16 = value;
4674 break;
4675 case M32C_OPERAND_DSP_32_S8 :
4676 fields->f_dsp_32_s8 = value;
4677 break;
4678 case M32C_OPERAND_DSP_32_U16 :
4679 fields->f_dsp_32_u16 = value;
4680 break;
4681 case M32C_OPERAND_DSP_32_U20 :
4682 fields->f_dsp_32_u24 = value;
4683 break;
4684 case M32C_OPERAND_DSP_32_U24 :
4685 fields->f_dsp_32_u24 = value;
4686 break;
4687 case M32C_OPERAND_DSP_32_U8 :
4688 fields->f_dsp_32_u8 = value;
4689 break;
4690 case M32C_OPERAND_DSP_40_S16 :
4691 fields->f_dsp_40_s16 = value;
4692 break;
4693 case M32C_OPERAND_DSP_40_S8 :
4694 fields->f_dsp_40_s8 = value;
4695 break;
4696 case M32C_OPERAND_DSP_40_U16 :
4697 fields->f_dsp_40_u16 = value;
4698 break;
4699 case M32C_OPERAND_DSP_40_U24 :
4700 fields->f_dsp_40_u24 = value;
4701 break;
4702 case M32C_OPERAND_DSP_40_U8 :
4703 fields->f_dsp_40_u8 = value;
4704 break;
4705 case M32C_OPERAND_DSP_48_S16 :
4706 fields->f_dsp_48_s16 = value;
4707 break;
4708 case M32C_OPERAND_DSP_48_S8 :
4709 fields->f_dsp_48_s8 = value;
4710 break;
4711 case M32C_OPERAND_DSP_48_U16 :
4712 fields->f_dsp_48_u16 = value;
4713 break;
4714 case M32C_OPERAND_DSP_48_U24 :
4715 fields->f_dsp_48_u24 = value;
4716 break;
4717 case M32C_OPERAND_DSP_48_U8 :
4718 fields->f_dsp_48_u8 = value;
4719 break;
4720 case M32C_OPERAND_DSP_8_S8 :
4721 fields->f_dsp_8_s8 = value;
4722 break;
4723 case M32C_OPERAND_DSP_8_U16 :
4724 fields->f_dsp_8_u16 = value;
4725 break;
4726 case M32C_OPERAND_DSP_8_U24 :
4727 fields->f_dsp_8_u24 = value;
4728 break;
4729 case M32C_OPERAND_DSP_8_U6 :
4730 fields->f_dsp_8_u6 = value;
4731 break;
4732 case M32C_OPERAND_DSP_8_U8 :
4733 fields->f_dsp_8_u8 = value;
4734 break;
4735 case M32C_OPERAND_DST16AN :
4736 fields->f_dst16_an = value;
4737 break;
4738 case M32C_OPERAND_DST16AN_S :
4739 fields->f_dst16_an_s = value;
4740 break;
4741 case M32C_OPERAND_DST16ANHI :
4742 fields->f_dst16_an = value;
4743 break;
4744 case M32C_OPERAND_DST16ANQI :
4745 fields->f_dst16_an = value;
4746 break;
4747 case M32C_OPERAND_DST16ANQI_S :
4748 fields->f_dst16_rn_QI_s = value;
4749 break;
4750 case M32C_OPERAND_DST16ANSI :
4751 fields->f_dst16_an = value;
4752 break;
4753 case M32C_OPERAND_DST16RNEXTQI :
4754 fields->f_dst16_rn_ext = value;
4755 break;
4756 case M32C_OPERAND_DST16RNHI :
4757 fields->f_dst16_rn = value;
4758 break;
4759 case M32C_OPERAND_DST16RNQI :
4760 fields->f_dst16_rn = value;
4761 break;
4762 case M32C_OPERAND_DST16RNQI_S :
4763 fields->f_dst16_rn_QI_s = value;
4764 break;
4765 case M32C_OPERAND_DST16RNSI :
4766 fields->f_dst16_rn = value;
4767 break;
4768 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4769 fields->f_dst32_an_unprefixed = value;
4770 break;
4771 case M32C_OPERAND_DST32ANPREFIXED :
4772 fields->f_dst32_an_prefixed = value;
4773 break;
4774 case M32C_OPERAND_DST32ANPREFIXEDHI :
4775 fields->f_dst32_an_prefixed = value;
4776 break;
4777 case M32C_OPERAND_DST32ANPREFIXEDQI :
4778 fields->f_dst32_an_prefixed = value;
4779 break;
4780 case M32C_OPERAND_DST32ANPREFIXEDSI :
4781 fields->f_dst32_an_prefixed = value;
4782 break;
4783 case M32C_OPERAND_DST32ANUNPREFIXED :
4784 fields->f_dst32_an_unprefixed = value;
4785 break;
4786 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4787 fields->f_dst32_an_unprefixed = value;
4788 break;
4789 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4790 fields->f_dst32_an_unprefixed = value;
4791 break;
4792 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4793 fields->f_dst32_an_unprefixed = value;
4794 break;
4795 case M32C_OPERAND_DST32R0HI_S :
4796 break;
4797 case M32C_OPERAND_DST32R0QI_S :
4798 break;
4799 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4800 fields->f_dst32_rn_ext_unprefixed = value;
4801 break;
4802 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4803 fields->f_dst32_rn_ext_unprefixed = value;
4804 break;
4805 case M32C_OPERAND_DST32RNPREFIXEDHI :
4806 fields->f_dst32_rn_prefixed_HI = value;
4807 break;
4808 case M32C_OPERAND_DST32RNPREFIXEDQI :
4809 fields->f_dst32_rn_prefixed_QI = value;
4810 break;
4811 case M32C_OPERAND_DST32RNPREFIXEDSI :
4812 fields->f_dst32_rn_prefixed_SI = value;
4813 break;
4814 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4815 fields->f_dst32_rn_unprefixed_HI = value;
4816 break;
4817 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4818 fields->f_dst32_rn_unprefixed_QI = value;
4819 break;
4820 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4821 fields->f_dst32_rn_unprefixed_SI = value;
4822 break;
4823 case M32C_OPERAND_G :
4824 break;
4825 case M32C_OPERAND_IMM_12_S4 :
4826 fields->f_imm_12_s4 = value;
4827 break;
4828 case M32C_OPERAND_IMM_13_U3 :
4829 fields->f_imm_13_u3 = value;
4830 break;
4831 case M32C_OPERAND_IMM_16_HI :
4832 fields->f_dsp_16_s16 = value;
4833 break;
4834 case M32C_OPERAND_IMM_16_QI :
4835 fields->f_dsp_16_s8 = value;
4836 break;
4837 case M32C_OPERAND_IMM_16_SI :
4838 fields->f_dsp_16_s32 = value;
4839 break;
4840 case M32C_OPERAND_IMM_20_S4 :
4841 fields->f_imm_20_s4 = value;
4842 break;
4843 case M32C_OPERAND_IMM_24_HI :
4844 fields->f_dsp_24_s16 = value;
4845 break;
4846 case M32C_OPERAND_IMM_24_QI :
4847 fields->f_dsp_24_s8 = value;
4848 break;
4849 case M32C_OPERAND_IMM_24_SI :
4850 fields->f_dsp_24_s32 = value;
4851 break;
4852 case M32C_OPERAND_IMM_32_HI :
4853 fields->f_dsp_32_s16 = value;
4854 break;
4855 case M32C_OPERAND_IMM_32_QI :
4856 fields->f_dsp_32_s8 = value;
4857 break;
4858 case M32C_OPERAND_IMM_32_SI :
4859 fields->f_dsp_32_s32 = value;
4860 break;
4861 case M32C_OPERAND_IMM_40_HI :
4862 fields->f_dsp_40_s16 = value;
4863 break;
4864 case M32C_OPERAND_IMM_40_QI :
4865 fields->f_dsp_40_s8 = value;
4866 break;
4867 case M32C_OPERAND_IMM_40_SI :
4868 fields->f_dsp_40_s32 = value;
4869 break;
4870 case M32C_OPERAND_IMM_48_HI :
4871 fields->f_dsp_48_s16 = value;
4872 break;
4873 case M32C_OPERAND_IMM_48_QI :
4874 fields->f_dsp_48_s8 = value;
4875 break;
4876 case M32C_OPERAND_IMM_48_SI :
4877 fields->f_dsp_48_s32 = value;
4878 break;
4879 case M32C_OPERAND_IMM_56_HI :
4880 fields->f_dsp_56_s16 = value;
4881 break;
4882 case M32C_OPERAND_IMM_56_QI :
4883 fields->f_dsp_56_s8 = value;
4884 break;
4885 case M32C_OPERAND_IMM_64_HI :
4886 fields->f_dsp_64_s16 = value;
4887 break;
4888 case M32C_OPERAND_IMM_8_HI :
4889 fields->f_dsp_8_s16 = value;
4890 break;
4891 case M32C_OPERAND_IMM_8_QI :
4892 fields->f_dsp_8_s8 = value;
4893 break;
4894 case M32C_OPERAND_IMM_8_S4 :
4895 fields->f_imm_8_s4 = value;
4896 break;
4897 case M32C_OPERAND_IMM_SH_12_S4 :
4898 fields->f_imm_12_s4 = value;
4899 break;
4900 case M32C_OPERAND_IMM_SH_20_S4 :
4901 fields->f_imm_20_s4 = value;
4902 break;
4903 case M32C_OPERAND_IMM_SH_8_S4 :
4904 fields->f_imm_8_s4 = value;
4905 break;
4906 case M32C_OPERAND_IMM1_S :
4907 fields->f_imm1_S = value;
4908 break;
4909 case M32C_OPERAND_IMM3_S :
4910 fields->f_imm3_S = value;
4911 break;
4912 case M32C_OPERAND_LAB_16_8 :
4913 fields->f_lab_16_8 = value;
4914 break;
4915 case M32C_OPERAND_LAB_24_8 :
4916 fields->f_lab_24_8 = value;
4917 break;
4918 case M32C_OPERAND_LAB_32_8 :
4919 fields->f_lab_32_8 = value;
4920 break;
4921 case M32C_OPERAND_LAB_40_8 :
4922 fields->f_lab_40_8 = value;
4923 break;
4924 case M32C_OPERAND_LAB_5_3 :
4925 fields->f_lab_5_3 = value;
4926 break;
4927 case M32C_OPERAND_LAB_8_16 :
4928 fields->f_lab_8_16 = value;
4929 break;
4930 case M32C_OPERAND_LAB_8_24 :
4931 fields->f_lab_8_24 = value;
4932 break;
4933 case M32C_OPERAND_LAB_8_8 :
4934 fields->f_lab_8_8 = value;
4935 break;
4936 case M32C_OPERAND_LAB32_JMP_S :
4937 fields->f_lab32_jmp_s = value;
4938 break;
4939 case M32C_OPERAND_Q :
4940 break;
4941 case M32C_OPERAND_R0 :
4942 break;
4943 case M32C_OPERAND_R0H :
4944 break;
4945 case M32C_OPERAND_R0L :
4946 break;
4947 case M32C_OPERAND_R1 :
4948 break;
4949 case M32C_OPERAND_R1R2R0 :
4950 break;
4951 case M32C_OPERAND_R2 :
4952 break;
4953 case M32C_OPERAND_R2R0 :
4954 break;
4955 case M32C_OPERAND_R3 :
4956 break;
4957 case M32C_OPERAND_R3R1 :
4958 break;
4959 case M32C_OPERAND_REGSETPOP :
4960 fields->f_8_8 = value;
4961 break;
4962 case M32C_OPERAND_REGSETPUSH :
4963 fields->f_8_8 = value;
4964 break;
4965 case M32C_OPERAND_RN16_PUSH_S :
4966 fields->f_4_1 = value;
4967 break;
4968 case M32C_OPERAND_S :
4969 break;
4970 case M32C_OPERAND_SRC16AN :
4971 fields->f_src16_an = value;
4972 break;
4973 case M32C_OPERAND_SRC16ANHI :
4974 fields->f_src16_an = value;
4975 break;
4976 case M32C_OPERAND_SRC16ANQI :
4977 fields->f_src16_an = value;
4978 break;
4979 case M32C_OPERAND_SRC16RNHI :
4980 fields->f_src16_rn = value;
4981 break;
4982 case M32C_OPERAND_SRC16RNQI :
4983 fields->f_src16_rn = value;
4984 break;
4985 case M32C_OPERAND_SRC32ANPREFIXED :
4986 fields->f_src32_an_prefixed = value;
4987 break;
4988 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4989 fields->f_src32_an_prefixed = value;
4990 break;
4991 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4992 fields->f_src32_an_prefixed = value;
4993 break;
4994 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4995 fields->f_src32_an_prefixed = value;
4996 break;
4997 case M32C_OPERAND_SRC32ANUNPREFIXED :
4998 fields->f_src32_an_unprefixed = value;
4999 break;
5000 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5001 fields->f_src32_an_unprefixed = value;
5002 break;
5003 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5004 fields->f_src32_an_unprefixed = value;
5005 break;
5006 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5007 fields->f_src32_an_unprefixed = value;
5008 break;
5009 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5010 fields->f_src32_rn_prefixed_HI = value;
5011 break;
5012 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5013 fields->f_src32_rn_prefixed_QI = value;
5014 break;
5015 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5016 fields->f_src32_rn_prefixed_SI = value;
5017 break;
5018 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5019 fields->f_src32_rn_unprefixed_HI = value;
5020 break;
5021 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5022 fields->f_src32_rn_unprefixed_QI = value;
5023 break;
5024 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5025 fields->f_src32_rn_unprefixed_SI = value;
5026 break;
5027 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5028 fields->f_5_1 = value;
5029 break;
5030 case M32C_OPERAND_X :
5031 break;
5032 case M32C_OPERAND_Z :
5033 break;
5034 case M32C_OPERAND_COND16_16 :
5035 fields->f_dsp_16_u8 = value;
5036 break;
5037 case M32C_OPERAND_COND16_24 :
5038 fields->f_dsp_24_u8 = value;
5039 break;
5040 case M32C_OPERAND_COND16_32 :
5041 fields->f_dsp_32_u8 = value;
5042 break;
5043 case M32C_OPERAND_COND16C :
5044 fields->f_cond16 = value;
5045 break;
5046 case M32C_OPERAND_COND16J :
5047 fields->f_cond16 = value;
5048 break;
5049 case M32C_OPERAND_COND16J5 :
5050 fields->f_cond16j_5 = value;
5051 break;
5052 case M32C_OPERAND_COND32 :
5053 fields->f_cond32 = value;
5054 break;
5055 case M32C_OPERAND_COND32_16 :
5056 fields->f_dsp_16_u8 = value;
5057 break;
5058 case M32C_OPERAND_COND32_24 :
5059 fields->f_dsp_24_u8 = value;
5060 break;
5061 case M32C_OPERAND_COND32_32 :
5062 fields->f_dsp_32_u8 = value;
5063 break;
5064 case M32C_OPERAND_COND32_40 :
5065 fields->f_dsp_40_u8 = value;
5066 break;
5067 case M32C_OPERAND_COND32J :
5068 fields->f_cond32j = value;
5069 break;
5070 case M32C_OPERAND_CR1_PREFIXED_32 :
5071 fields->f_21_3 = value;
5072 break;
5073 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5074 fields->f_13_3 = value;
5075 break;
5076 case M32C_OPERAND_CR16 :
5077 fields->f_9_3 = value;
5078 break;
5079 case M32C_OPERAND_CR2_32 :
5080 fields->f_13_3 = value;
5081 break;
5082 case M32C_OPERAND_CR3_PREFIXED_32 :
5083 fields->f_21_3 = value;
5084 break;
5085 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5086 fields->f_13_3 = value;
5087 break;
5088 case M32C_OPERAND_FLAGS16 :
5089 fields->f_9_3 = value;
5090 break;
5091 case M32C_OPERAND_FLAGS32 :
5092 fields->f_13_3 = value;
5093 break;
5094 case M32C_OPERAND_SCCOND32 :
5095 fields->f_cond16 = value;
5096 break;
5097 case M32C_OPERAND_SIZE :
5098 break;
5099
5100 default :
5101 /* xgettext:c-format */
5102 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5103 opindex);
5104 abort ();
5105 }
5106 }
5107
5108 /* Function to call before using the instruction builder tables. */
5109
5110 void
5111 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5112 {
5113 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5114 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5115
5116 cd->insert_operand = m32c_cgen_insert_operand;
5117 cd->extract_operand = m32c_cgen_extract_operand;
5118
5119 cd->get_int_operand = m32c_cgen_get_int_operand;
5120 cd->set_int_operand = m32c_cgen_set_int_operand;
5121 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5122 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5123 }
git-cvsimport of binutils cvsroot