opcodes/xc16x-ibld.c

   1 /* Instruction building/extraction support for xc16x. -*- C -*-
   2
   3    THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
   4    - the resultant file is machine generated, cgen-ibld.in isn't
   5
   6    Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
   7    Free Software Foundation, Inc.
   8
   9    This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11    This program is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 2, or (at your option)
  14    any later version.
  15
  16    This program is distributed in the hope that it will be useful,
  17    but WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19    GNU General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software Foundation, Inc.,
  23    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "xc16x-desc.h"
  35 #include "xc16x-opc.h"
  36 #include "opintl.h"
  37 #include "safe-ctype.h"
  38
  39 #undef  min
  40 #define min(a,b) ((a) < (b) ? (a) : (b))
  41 #undef  max
  42 #define max(a,b) ((a) > (b) ? (a) : (b))
  43
  44 /* Used by the ifield rtx function.  */
  45 #define FLD(f) (fields->f)
  46
  47 static const char * insert_normal
  48   (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
  49    unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
  50 static const char * insert_insn_normal
  51   (CGEN_CPU_DESC, const CGEN_INSN *,
  52    CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
  53 static int extract_normal
  54   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
  55    unsigned int, unsigned int, unsigned int, unsigned int,
  56    unsigned int, unsigned int, bfd_vma, long *);
  57 static int extract_insn_normal
  58   (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
  59    CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
  60 #if CGEN_INT_INSN_P
  61 static void put_insn_int_value
  62   (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
  63 #endif
  64 #if ! CGEN_INT_INSN_P
  65 static CGEN_INLINE void insert_1
  66   (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
  67 static CGEN_INLINE int fill_cache
  68   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
  69 static CGEN_INLINE long extract_1
  70   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
  71 #endif
  72 \f
  73 /* Operand insertion.  */
  74
  75 #if ! CGEN_INT_INSN_P
  76
  77 /* Subroutine of insert_normal.  */
  78
  79 static CGEN_INLINE void
  80 insert_1 (CGEN_CPU_DESC cd,
  81           unsigned long value,
  82           int start,
  83           int length,
  84           int word_length,
  85           unsigned char *bufp)
  86 {
  87   unsigned long x,mask;
  88   int shift;
  89
  90   x = cgen_get_insn_value (cd, bufp, word_length);
  91
  92   /* Written this way to avoid undefined behaviour.  */
  93   mask = (((1L << (length - 1)) - 1) << 1) | 1;
  94   if (CGEN_INSN_LSB0_P)
  95     shift = (start + 1) - length;
  96   else
  97     shift = (word_length - (start + length));
  98   x = (x & ~(mask << shift)) | ((value & mask) << shift);
  99
 100   cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
 101 }
 102
 103 #endif /* ! CGEN_INT_INSN_P */
 104
 105 /* Default insertion routine.
 106
 107    ATTRS is a mask of the boolean attributes.
 108    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 109    WORD_LENGTH is the length of the word in bits in which the value resides.
 110    START is the starting bit number in the word, architecture origin.
 111    LENGTH is the length of VALUE in bits.
 112    TOTAL_LENGTH is the total length of the insn in bits.
 113
 114    The result is an error message or NULL if success.  */
 115
 116 /* ??? This duplicates functionality with bfd's howto table and
 117    bfd_install_relocation.  */
 118 /* ??? This doesn't handle bfd_vma's.  Create another function when
 119    necessary.  */
 120
 121 static const char *
 122 insert_normal (CGEN_CPU_DESC cd,
 123                long value,
 124                unsigned int attrs,
 125                unsigned int word_offset,
 126                unsigned int start,
 127                unsigned int length,
 128                unsigned int word_length,
 129                unsigned int total_length,
 130                CGEN_INSN_BYTES_PTR buffer)
 131 {
 132   static char errbuf[100];
 133   /* Written this way to avoid undefined behaviour.  */
 134   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
 135
 136   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
 137   if (length == 0)
 138     return NULL;
 139
 140   if (word_length > 32)
 141     abort ();
 142
 143   /* For architectures with insns smaller than the base-insn-bitsize,
 144      word_length may be too big.  */
 145   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 146     {
 147       if (word_offset == 0
 148           && word_length > total_length)
 149         word_length = total_length;
 150     }
 151
 152   /* Ensure VALUE will fit.  */
 153   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
 154     {
 155       long minval = - (1L << (length - 1));
 156       unsigned long maxval = mask;
 157
 158       if ((value > 0 && (unsigned long) value > maxval)
 159           || value < minval)
 160         {
 161           /* xgettext:c-format */
 162           sprintf (errbuf,
 163                    _("operand out of range (%ld not between %ld and %lu)"),
 164                    value, minval, maxval);
 165           return errbuf;
 166         }
 167     }
 168   else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
 169     {
 170       unsigned long maxval = mask;
 171
 172       if ((unsigned long) value > maxval)
 173         {
 174           /* xgettext:c-format */
 175           sprintf (errbuf,
 176                    _("operand out of range (%lu not between 0 and %lu)"),
 177                    value, maxval);
 178           return errbuf;
 179         }
 180     }
 181   else
 182     {
 183       if (! cgen_signed_overflow_ok_p (cd))
 184         {
 185           long minval = - (1L << (length - 1));
 186           long maxval =   (1L << (length - 1)) - 1;
 187
 188           if (value < minval || value > maxval)
 189             {
 190               sprintf
 191                 /* xgettext:c-format */
 192                 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
 193                  value, minval, maxval);
 194               return errbuf;
 195             }
 196         }
 197     }
 198
 199 #if CGEN_INT_INSN_P
 200
 201   {
 202     int shift;
 203
 204     if (CGEN_INSN_LSB0_P)
 205       shift = (word_offset + start + 1) - length;
 206     else
 207       shift = total_length - (word_offset + start + length);
 208     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
 209   }
 210
 211 #else /* ! CGEN_INT_INSN_P */
 212
 213   {
 214     unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
 215
 216     insert_1 (cd, value, start, length, word_length, bufp);
 217   }
 218
 219 #endif /* ! CGEN_INT_INSN_P */
 220
 221   return NULL;
 222 }
 223
 224 /* Default insn builder (insert handler).
 225    The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
 226    that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
 227    recorded in host byte order, otherwise BUFFER is an array of bytes
 228    and the value is recorded in target byte order).
 229    The result is an error message or NULL if success.  */
 230
 231 static const char *
 232 insert_insn_normal (CGEN_CPU_DESC cd,
 233                     const CGEN_INSN * insn,
 234                     CGEN_FIELDS * fields,
 235                     CGEN_INSN_BYTES_PTR buffer,
 236                     bfd_vma pc)
 237 {
 238   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 239   unsigned long value;
 240   const CGEN_SYNTAX_CHAR_TYPE * syn;
 241
 242   CGEN_INIT_INSERT (cd);
 243   value = CGEN_INSN_BASE_VALUE (insn);
 244
 245   /* If we're recording insns as numbers (rather than a string of bytes),
 246      target byte order handling is deferred until later.  */
 247
 248 #if CGEN_INT_INSN_P
 249
 250   put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
 251                       CGEN_FIELDS_BITSIZE (fields), value);
 252
 253 #else
 254
 255   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
 256                                         (unsigned) CGEN_FIELDS_BITSIZE (fields)),
 257                        value);
 258
 259 #endif /* ! CGEN_INT_INSN_P */
 260
 261   /* ??? It would be better to scan the format's fields.
 262      Still need to be able to insert a value based on the operand though;
 263      e.g. storing a branch displacement that got resolved later.
 264      Needs more thought first.  */
 265
 266   for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
 267     {
 268       const char *errmsg;
 269
 270       if (CGEN_SYNTAX_CHAR_P (* syn))
 271         continue;
 272
 273       errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 274                                        fields, buffer, pc);
 275       if (errmsg)
 276         return errmsg;
 277     }
 278
 279   return NULL;
 280 }
 281
 282 #if CGEN_INT_INSN_P
 283 /* Cover function to store an insn value into an integral insn.  Must go here
 284    because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
 285
 286 static void
 287 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 288                     CGEN_INSN_BYTES_PTR buf,
 289                     int length,
 290                     int insn_length,
 291                     CGEN_INSN_INT value)
 292 {
 293   /* For architectures with insns smaller than the base-insn-bitsize,
 294      length may be too big.  */
 295   if (length > insn_length)
 296     *buf = value;
 297   else
 298     {
 299       int shift = insn_length - length;
 300       /* Written this way to avoid undefined behaviour.  */
 301       CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
 302
 303       *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
 304     }
 305 }
 306 #endif
 307 \f
 308 /* Operand extraction.  */
 309
 310 #if ! CGEN_INT_INSN_P
 311
 312 /* Subroutine of extract_normal.
 313    Ensure sufficient bytes are cached in EX_INFO.
 314    OFFSET is the offset in bytes from the start of the insn of the value.
 315    BYTES is the length of the needed value.
 316    Returns 1 for success, 0 for failure.  */
 317
 318 static CGEN_INLINE int
 319 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 320             CGEN_EXTRACT_INFO *ex_info,
 321             int offset,
 322             int bytes,
 323             bfd_vma pc)
 324 {
 325   /* It's doubtful that the middle part has already been fetched so
 326      we don't optimize that case.  kiss.  */
 327   unsigned int mask;
 328   disassemble_info *info = (disassemble_info *) ex_info->dis_info;
 329
 330   /* First do a quick check.  */
 331   mask = (1 << bytes) - 1;
 332   if (((ex_info->valid >> offset) & mask) == mask)
 333     return 1;
 334
 335   /* Search for the first byte we need to read.  */
 336   for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
 337     if (! (mask & ex_info->valid))
 338       break;
 339
 340   if (bytes)
 341     {
 342       int status;
 343
 344       pc += offset;
 345       status = (*info->read_memory_func)
 346         (pc, ex_info->insn_bytes + offset, bytes, info);
 347
 348       if (status != 0)
 349         {
 350           (*info->memory_error_func) (status, pc, info);
 351           return 0;
 352         }
 353
 354       ex_info->valid |= ((1 << bytes) - 1) << offset;
 355     }
 356
 357   return 1;
 358 }
 359
 360 /* Subroutine of extract_normal.  */
 361
 362 static CGEN_INLINE long
 363 extract_1 (CGEN_CPU_DESC cd,
 364            CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
 365            int start,
 366            int length,
 367            int word_length,
 368            unsigned char *bufp,
 369            bfd_vma pc ATTRIBUTE_UNUSED)
 370 {
 371   unsigned long x;
 372   int shift;
 373
 374   x = cgen_get_insn_value (cd, bufp, word_length);
 375
 376   if (CGEN_INSN_LSB0_P)
 377     shift = (start + 1) - length;
 378   else
 379     shift = (word_length - (start + length));
 380   return x >> shift;
 381 }
 382
 383 #endif /* ! CGEN_INT_INSN_P */
 384
 385 /* Default extraction routine.
 386
 387    INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
 388    or sometimes less for cases like the m32r where the base insn size is 32
 389    but some insns are 16 bits.
 390    ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
 391    but for generality we take a bitmask of all of them.
 392    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 393    WORD_LENGTH is the length of the word in bits in which the value resides.
 394    START is the starting bit number in the word, architecture origin.
 395    LENGTH is the length of VALUE in bits.
 396    TOTAL_LENGTH is the total length of the insn in bits.
 397
 398    Returns 1 for success, 0 for failure.  */
 399
 400 /* ??? The return code isn't properly used.  wip.  */
 401
 402 /* ??? This doesn't handle bfd_vma's.  Create another function when
 403    necessary.  */
 404
 405 static int
 406 extract_normal (CGEN_CPU_DESC cd,
 407 #if ! CGEN_INT_INSN_P
 408                 CGEN_EXTRACT_INFO *ex_info,
 409 #else
 410                 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
 411 #endif
 412                 CGEN_INSN_INT insn_value,
 413                 unsigned int attrs,
 414                 unsigned int word_offset,
 415                 unsigned int start,
 416                 unsigned int length,
 417                 unsigned int word_length,
 418                 unsigned int total_length,
 419 #if ! CGEN_INT_INSN_P
 420                 bfd_vma pc,
 421 #else
 422                 bfd_vma pc ATTRIBUTE_UNUSED,
 423 #endif
 424                 long *valuep)
 425 {
 426   long value, mask;
 427
 428   /* If LENGTH is zero, this operand doesn't contribute to the value
 429      so give it a standard value of zero.  */
 430   if (length == 0)
 431     {
 432       *valuep = 0;
 433       return 1;
 434     }
 435
 436   if (word_length > 32)
 437     abort ();
 438
 439   /* For architectures with insns smaller than the insn-base-bitsize,
 440      word_length may be too big.  */
 441   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 442     {
 443       if (word_offset + word_length > total_length)
 444         word_length = total_length - word_offset;
 445     }
 446
 447   /* Does the value reside in INSN_VALUE, and at the right alignment?  */
 448
 449   if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
 450     {
 451       if (CGEN_INSN_LSB0_P)
 452         value = insn_value >> ((word_offset + start + 1) - length);
 453       else
 454         value = insn_value >> (total_length - ( word_offset + start + length));
 455     }
 456
 457 #if ! CGEN_INT_INSN_P
 458
 459   else
 460     {
 461       unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
 462
 463       if (word_length > 32)
 464         abort ();
 465
 466       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
 467         return 0;
 468
 469       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
 470     }
 471
 472 #endif /* ! CGEN_INT_INSN_P */
 473
 474   /* Written this way to avoid undefined behaviour.  */
 475   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 476
 477   value &= mask;
 478   /* sign extend? */
 479   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
 480       && (value & (1L << (length - 1))))
 481     value |= ~mask;
 482
 483   *valuep = value;
 484
 485   return 1;
 486 }
 487
 488 /* Default insn extractor.
 489
 490    INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
 491    The extracted fields are stored in FIELDS.
 492    EX_INFO is used to handle reading variable length insns.
 493    Return the length of the insn in bits, or 0 if no match,
 494    or -1 if an error occurs fetching data (memory_error_func will have
 495    been called).  */
 496
 497 static int
 498 extract_insn_normal (CGEN_CPU_DESC cd,
 499                      const CGEN_INSN *insn,
 500                      CGEN_EXTRACT_INFO *ex_info,
 501                      CGEN_INSN_INT insn_value,
 502                      CGEN_FIELDS *fields,
 503                      bfd_vma pc)
 504 {
 505   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 506   const CGEN_SYNTAX_CHAR_TYPE *syn;
 507
 508   CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 509
 510   CGEN_INIT_EXTRACT (cd);
 511
 512   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 513     {
 514       int length;
 515
 516       if (CGEN_SYNTAX_CHAR_P (*syn))
 517         continue;
 518
 519       length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 520                                         ex_info, insn_value, fields, pc);
 521       if (length <= 0)
 522         return length;
 523     }
 524
 525   /* We recognized and successfully extracted this insn.  */
 526   return CGEN_INSN_BITSIZE (insn);
 527 }
 528 \f
 529 /* Machine generated code added here.  */
 530
 531 const char * xc16x_cgen_insert_operand
 532   (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
 533
 534 /* Main entry point for operand insertion.
 535
 536    This function is basically just a big switch statement.  Earlier versions
 537    used tables to look up the function to use, but
 538    - if the table contains both assembler and disassembler functions then
 539      the disassembler contains much of the assembler and vice-versa,
 540    - there's a lot of inlining possibilities as things grow,
 541    - using a switch statement avoids the function call overhead.
 542
 543    This function could be moved into `parse_insn_normal', but keeping it
 544    separate makes clear the interface between `parse_insn_normal' and each of
 545    the handlers.  It's also needed by GAS to insert operands that couldn't be
 546    resolved during parsing.  */
 547
 548 const char *
 549 xc16x_cgen_insert_operand (CGEN_CPU_DESC cd,
 550                              int opindex,
 551                              CGEN_FIELDS * fields,
 552                              CGEN_INSN_BYTES_PTR buffer,
 553                              bfd_vma pc ATTRIBUTE_UNUSED)
 554 {
 555   const char * errmsg = NULL;
 556   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 557
 558   switch (opindex)
 559     {
 560     case XC16X_OPERAND_REGNAM :
 561       errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
 562       break;
 563     case XC16X_OPERAND_BIT01 :
 564       errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer);
 565       break;
 566     case XC16X_OPERAND_BIT1 :
 567       errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer);
 568       break;
 569     case XC16X_OPERAND_BIT2 :
 570       errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer);
 571       break;
 572     case XC16X_OPERAND_BIT4 :
 573       errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer);
 574       break;
 575     case XC16X_OPERAND_BIT8 :
 576       errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer);
 577       break;
 578     case XC16X_OPERAND_BITONE :
 579       errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer);
 580       break;
 581     case XC16X_OPERAND_CADDR :
 582       errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
 583       break;
 584     case XC16X_OPERAND_COND :
 585       errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer);
 586       break;
 587     case XC16X_OPERAND_DATA8 :
 588       errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer);
 589       break;
 590     case XC16X_OPERAND_DATAHI8 :
 591       errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
 592       break;
 593     case XC16X_OPERAND_DOT :
 594       break;
 595     case XC16X_OPERAND_DR :
 596       errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
 597       break;
 598     case XC16X_OPERAND_DRB :
 599       errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
 600       break;
 601     case XC16X_OPERAND_DRI :
 602       errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer);
 603       break;
 604     case XC16X_OPERAND_EXTCOND :
 605       errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer);
 606       break;
 607     case XC16X_OPERAND_GENREG :
 608       errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
 609       break;
 610     case XC16X_OPERAND_HASH :
 611       break;
 612     case XC16X_OPERAND_ICOND :
 613       errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer);
 614       break;
 615     case XC16X_OPERAND_LBIT2 :
 616       errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer);
 617       break;
 618     case XC16X_OPERAND_LBIT4 :
 619       errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer);
 620       break;
 621     case XC16X_OPERAND_MASK8 :
 622       errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer);
 623       break;
 624     case XC16X_OPERAND_MASKLO8 :
 625       errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
 626       break;
 627     case XC16X_OPERAND_MEMGR8 :
 628       errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer);
 629       break;
 630     case XC16X_OPERAND_MEMORY :
 631       errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
 632       break;
 633     case XC16X_OPERAND_PAG :
 634       break;
 635     case XC16X_OPERAND_PAGENUM :
 636       errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer);
 637       break;
 638     case XC16X_OPERAND_POF :
 639       break;
 640     case XC16X_OPERAND_QBIT :
 641       errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer);
 642       break;
 643     case XC16X_OPERAND_QHIBIT :
 644       errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer);
 645       break;
 646     case XC16X_OPERAND_QLOBIT :
 647       errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer);
 648       break;
 649     case XC16X_OPERAND_REG8 :
 650       errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
 651       break;
 652     case XC16X_OPERAND_REGB8 :
 653       errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
 654       break;
 655     case XC16X_OPERAND_REGBMEM8 :
 656       errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
 657       break;
 658     case XC16X_OPERAND_REGHI8 :
 659       errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer);
 660       break;
 661     case XC16X_OPERAND_REGMEM8 :
 662       errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
 663       break;
 664     case XC16X_OPERAND_REGOFF8 :
 665       errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer);
 666       break;
 667     case XC16X_OPERAND_REL :
 668       errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer);
 669       break;
 670     case XC16X_OPERAND_RELHI :
 671       errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer);
 672       break;
 673     case XC16X_OPERAND_SEG :
 674       errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
 675       break;
 676     case XC16X_OPERAND_SEGHI8 :
 677       errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer);
 678       break;
 679     case XC16X_OPERAND_SEGM :
 680       break;
 681     case XC16X_OPERAND_SOF :
 682       break;
 683     case XC16X_OPERAND_SR :
 684       errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
 685       break;
 686     case XC16X_OPERAND_SR2 :
 687       errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer);
 688       break;
 689     case XC16X_OPERAND_SRB :
 690       errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
 691       break;
 692     case XC16X_OPERAND_SRC1 :
 693       errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
 694       break;
 695     case XC16X_OPERAND_SRC2 :
 696       errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
 697       break;
 698     case XC16X_OPERAND_SRDIV :
 699       errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
 700       break;
 701     case XC16X_OPERAND_U4 :
 702       errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
 703       break;
 704     case XC16X_OPERAND_UIMM16 :
 705       errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
 706       break;
 707     case XC16X_OPERAND_UIMM2 :
 708       errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer);
 709       break;
 710     case XC16X_OPERAND_UIMM3 :
 711       errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer);
 712       break;
 713     case XC16X_OPERAND_UIMM4 :
 714       errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
 715       break;
 716     case XC16X_OPERAND_UIMM7 :
 717       errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer);
 718       break;
 719     case XC16X_OPERAND_UIMM8 :
 720       errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer);
 721       break;
 722     case XC16X_OPERAND_UPAG16 :
 723       errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
 724       break;
 725     case XC16X_OPERAND_UPOF16 :
 726       errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
 727       break;
 728     case XC16X_OPERAND_USEG16 :
 729       errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
 730       break;
 731     case XC16X_OPERAND_USEG8 :
 732       errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
 733       break;
 734     case XC16X_OPERAND_USOF16 :
 735       errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
 736       break;
 737
 738     default :
 739       /* xgettext:c-format */
 740       fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
 741                opindex);
 742       abort ();
 743   }
 744
 745   return errmsg;
 746 }
 747
 748 int xc16x_cgen_extract_operand
 749   (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
 750
 751 /* Main entry point for operand extraction.
 752    The result is <= 0 for error, >0 for success.
 753    ??? Actual values aren't well defined right now.
 754
 755    This function is basically just a big switch statement.  Earlier versions
 756    used tables to look up the function to use, but
 757    - if the table contains both assembler and disassembler functions then
 758      the disassembler contains much of the assembler and vice-versa,
 759    - there's a lot of inlining possibilities as things grow,
 760    - using a switch statement avoids the function call overhead.
 761
 762    This function could be moved into `print_insn_normal', but keeping it
 763    separate makes clear the interface between `print_insn_normal' and each of
 764    the handlers.  */
 765
 766 int
 767 xc16x_cgen_extract_operand (CGEN_CPU_DESC cd,
 768                              int opindex,
 769                              CGEN_EXTRACT_INFO *ex_info,
 770                              CGEN_INSN_INT insn_value,
 771                              CGEN_FIELDS * fields,
 772                              bfd_vma pc)
 773 {
 774   /* Assume success (for those operands that are nops).  */
 775   int length = 1;
 776   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 777
 778   switch (opindex)
 779     {
 780     case XC16X_OPERAND_REGNAM :
 781       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
 782       break;
 783     case XC16X_OPERAND_BIT01 :
 784       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit);
 785       break;
 786     case XC16X_OPERAND_BIT1 :
 787       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1);
 788       break;
 789     case XC16X_OPERAND_BIT2 :
 790       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2);
 791       break;
 792     case XC16X_OPERAND_BIT4 :
 793       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4);
 794       break;
 795     case XC16X_OPERAND_BIT8 :
 796       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8);
 797       break;
 798     case XC16X_OPERAND_BITONE :
 799       length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit);
 800       break;
 801     case XC16X_OPERAND_CADDR :
 802       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
 803       break;
 804     case XC16X_OPERAND_COND :
 805       length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode);
 806       break;
 807     case XC16X_OPERAND_DATA8 :
 808       length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8);
 809       break;
 810     case XC16X_OPERAND_DATAHI8 :
 811       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
 812       break;
 813     case XC16X_OPERAND_DOT :
 814       break;
 815     case XC16X_OPERAND_DR :
 816       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
 817       break;
 818     case XC16X_OPERAND_DRB :
 819       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
 820       break;
 821     case XC16X_OPERAND_DRI :
 822       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4);
 823       break;
 824     case XC16X_OPERAND_EXTCOND :
 825       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode);
 826       break;
 827     case XC16X_OPERAND_GENREG :
 828       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
 829       break;
 830     case XC16X_OPERAND_HASH :
 831       break;
 832     case XC16X_OPERAND_ICOND :
 833       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode);
 834       break;
 835     case XC16X_OPERAND_LBIT2 :
 836       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2);
 837       break;
 838     case XC16X_OPERAND_LBIT4 :
 839       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4);
 840       break;
 841     case XC16X_OPERAND_MASK8 :
 842       length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8);
 843       break;
 844     case XC16X_OPERAND_MASKLO8 :
 845       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
 846       break;
 847     case XC16X_OPERAND_MEMGR8 :
 848       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8);
 849       break;
 850     case XC16X_OPERAND_MEMORY :
 851       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
 852       break;
 853     case XC16X_OPERAND_PAG :
 854       break;
 855     case XC16X_OPERAND_PAGENUM :
 856       length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum);
 857       break;
 858     case XC16X_OPERAND_POF :
 859       break;
 860     case XC16X_OPERAND_QBIT :
 861       length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit);
 862       break;
 863     case XC16X_OPERAND_QHIBIT :
 864       length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit);
 865       break;
 866     case XC16X_OPERAND_QLOBIT :
 867       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit);
 868       break;
 869     case XC16X_OPERAND_REG8 :
 870       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
 871       break;
 872     case XC16X_OPERAND_REGB8 :
 873       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
 874       break;
 875     case XC16X_OPERAND_REGBMEM8 :
 876       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
 877       break;
 878     case XC16X_OPERAND_REGHI8 :
 879       length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8);
 880       break;
 881     case XC16X_OPERAND_REGMEM8 :
 882       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
 883       break;
 884     case XC16X_OPERAND_REGOFF8 :
 885       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8);
 886       break;
 887     case XC16X_OPERAND_REL :
 888       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8);
 889       break;
 890     case XC16X_OPERAND_RELHI :
 891       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8);
 892       break;
 893     case XC16X_OPERAND_SEG :
 894       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
 895       break;
 896     case XC16X_OPERAND_SEGHI8 :
 897       length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8);
 898       break;
 899     case XC16X_OPERAND_SEGM :
 900       break;
 901     case XC16X_OPERAND_SOF :
 902       break;
 903     case XC16X_OPERAND_SR :
 904       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
 905       break;
 906     case XC16X_OPERAND_SR2 :
 907       length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0);
 908       break;
 909     case XC16X_OPERAND_SRB :
 910       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
 911       break;
 912     case XC16X_OPERAND_SRC1 :
 913       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
 914       break;
 915     case XC16X_OPERAND_SRC2 :
 916       length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
 917       break;
 918     case XC16X_OPERAND_SRDIV :
 919       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
 920       break;
 921     case XC16X_OPERAND_U4 :
 922       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
 923       break;
 924     case XC16X_OPERAND_UIMM16 :
 925       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
 926       break;
 927     case XC16X_OPERAND_UIMM2 :
 928       length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2);
 929       break;
 930     case XC16X_OPERAND_UIMM3 :
 931       length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3);
 932       break;
 933     case XC16X_OPERAND_UIMM4 :
 934       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
 935       break;
 936     case XC16X_OPERAND_UIMM7 :
 937       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7);
 938       break;
 939     case XC16X_OPERAND_UIMM8 :
 940       length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8);
 941       break;
 942     case XC16X_OPERAND_UPAG16 :
 943       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
 944       break;
 945     case XC16X_OPERAND_UPOF16 :
 946       length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
 947       break;
 948     case XC16X_OPERAND_USEG16 :
 949       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
 950       break;
 951     case XC16X_OPERAND_USEG8 :
 952       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
 953       break;
 954     case XC16X_OPERAND_USOF16 :
 955       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
 956       break;
 957
 958     default :
 959       /* xgettext:c-format */
 960       fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
 961                opindex);
 962       abort ();
 963     }
 964
 965   return length;
 966 }
 967
 968 cgen_insert_fn * const xc16x_cgen_insert_handlers[] =
 969 {
 970   insert_insn_normal,
 971 };
 972
 973 cgen_extract_fn * const xc16x_cgen_extract_handlers[] =
 974 {
 975   extract_insn_normal,
 976 };
 977
 978 int xc16x_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
 979 bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
 980
 981 /* Getting values from cgen_fields is handled by a collection of functions.
 982    They are distinguished by the type of the VALUE argument they return.
 983    TODO: floating point, inlining support, remove cases where result type
 984    not appropriate.  */
 985
 986 int
 987 xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 988                              int opindex,
 989                              const CGEN_FIELDS * fields)
 990 {
 991   int value;
 992
 993   switch (opindex)
 994     {
 995     case XC16X_OPERAND_REGNAM :
 996       value = fields->f_reg8;
 997       break;
 998     case XC16X_OPERAND_BIT01 :
 999       value = fields->f_op_1bit;
1000       break;
1001     case XC16X_OPERAND_BIT1 :
1002       value = fields->f_op_bit1;
1003       break;
1004     case XC16X_OPERAND_BIT2 :
1005       value = fields->f_op_bit2;
1006       break;
1007     case XC16X_OPERAND_BIT4 :
1008       value = fields->f_op_bit4;
1009       break;
1010     case XC16X_OPERAND_BIT8 :
1011       value = fields->f_op_bit8;
1012       break;
1013     case XC16X_OPERAND_BITONE :
1014       value = fields->f_op_onebit;
1015       break;
1016     case XC16X_OPERAND_CADDR :
1017       value = fields->f_offset16;
1018       break;
1019     case XC16X_OPERAND_COND :
1020       value = fields->f_condcode;
1021       break;
1022     case XC16X_OPERAND_DATA8 :
1023       value = fields->f_data8;
1024       break;
1025     case XC16X_OPERAND_DATAHI8 :
1026       value = fields->f_datahi8;
1027       break;
1028     case XC16X_OPERAND_DOT :
1029       value = 0;
1030       break;
1031     case XC16X_OPERAND_DR :
1032       value = fields->f_r1;
1033       break;
1034     case XC16X_OPERAND_DRB :
1035       value = fields->f_r1;
1036       break;
1037     case XC16X_OPERAND_DRI :
1038       value = fields->f_r4;
1039       break;
1040     case XC16X_OPERAND_EXTCOND :
1041       value = fields->f_extccode;
1042       break;
1043     case XC16X_OPERAND_GENREG :
1044       value = fields->f_regb8;
1045       break;
1046     case XC16X_OPERAND_HASH :
1047       value = 0;
1048       break;
1049     case XC16X_OPERAND_ICOND :
1050       value = fields->f_icondcode;
1051       break;
1052     case XC16X_OPERAND_LBIT2 :
1053       value = fields->f_op_lbit2;
1054       break;
1055     case XC16X_OPERAND_LBIT4 :
1056       value = fields->f_op_lbit4;
1057       break;
1058     case XC16X_OPERAND_MASK8 :
1059       value = fields->f_mask8;
1060       break;
1061     case XC16X_OPERAND_MASKLO8 :
1062       value = fields->f_datahi8;
1063       break;
1064     case XC16X_OPERAND_MEMGR8 :
1065       value = fields->f_memgr8;
1066       break;
1067     case XC16X_OPERAND_MEMORY :
1068       value = fields->f_memory;
1069       break;
1070     case XC16X_OPERAND_PAG :
1071       value = 0;
1072       break;
1073     case XC16X_OPERAND_PAGENUM :
1074       value = fields->f_pagenum;
1075       break;
1076     case XC16X_OPERAND_POF :
1077       value = 0;
1078       break;
1079     case XC16X_OPERAND_QBIT :
1080       value = fields->f_qbit;
1081       break;
1082     case XC16X_OPERAND_QHIBIT :
1083       value = fields->f_qhibit;
1084       break;
1085     case XC16X_OPERAND_QLOBIT :
1086       value = fields->f_qlobit;
1087       break;
1088     case XC16X_OPERAND_REG8 :
1089       value = fields->f_reg8;
1090       break;
1091     case XC16X_OPERAND_REGB8 :
1092       value = fields->f_regb8;
1093       break;
1094     case XC16X_OPERAND_REGBMEM8 :
1095       value = fields->f_regmem8;
1096       break;
1097     case XC16X_OPERAND_REGHI8 :
1098       value = fields->f_reghi8;
1099       break;
1100     case XC16X_OPERAND_REGMEM8 :
1101       value = fields->f_regmem8;
1102       break;
1103     case XC16X_OPERAND_REGOFF8 :
1104       value = fields->f_regoff8;
1105       break;
1106     case XC16X_OPERAND_REL :
1107       value = fields->f_rel8;
1108       break;
1109     case XC16X_OPERAND_RELHI :
1110       value = fields->f_relhi8;
1111       break;
1112     case XC16X_OPERAND_SEG :
1113       value = fields->f_seg8;
1114       break;
1115     case XC16X_OPERAND_SEGHI8 :
1116       value = fields->f_segnum8;
1117       break;
1118     case XC16X_OPERAND_SEGM :
1119       value = 0;
1120       break;
1121     case XC16X_OPERAND_SOF :
1122       value = 0;
1123       break;
1124     case XC16X_OPERAND_SR :
1125       value = fields->f_r2;
1126       break;
1127     case XC16X_OPERAND_SR2 :
1128       value = fields->f_r0;
1129       break;
1130     case XC16X_OPERAND_SRB :
1131       value = fields->f_r2;
1132       break;
1133     case XC16X_OPERAND_SRC1 :
1134       value = fields->f_r1;
1135       break;
1136     case XC16X_OPERAND_SRC2 :
1137       value = fields->f_r2;
1138       break;
1139     case XC16X_OPERAND_SRDIV :
1140       value = fields->f_reg8;
1141       break;
1142     case XC16X_OPERAND_U4 :
1143       value = fields->f_uimm4;
1144       break;
1145     case XC16X_OPERAND_UIMM16 :
1146       value = fields->f_uimm16;
1147       break;
1148     case XC16X_OPERAND_UIMM2 :
1149       value = fields->f_uimm2;
1150       break;
1151     case XC16X_OPERAND_UIMM3 :
1152       value = fields->f_uimm3;
1153       break;
1154     case XC16X_OPERAND_UIMM4 :
1155       value = fields->f_uimm4;
1156       break;
1157     case XC16X_OPERAND_UIMM7 :
1158       value = fields->f_uimm7;
1159       break;
1160     case XC16X_OPERAND_UIMM8 :
1161       value = fields->f_uimm8;
1162       break;
1163     case XC16X_OPERAND_UPAG16 :
1164       value = fields->f_uimm16;
1165       break;
1166     case XC16X_OPERAND_UPOF16 :
1167       value = fields->f_memory;
1168       break;
1169     case XC16X_OPERAND_USEG16 :
1170       value = fields->f_offset16;
1171       break;
1172     case XC16X_OPERAND_USEG8 :
1173       value = fields->f_seg8;
1174       break;
1175     case XC16X_OPERAND_USOF16 :
1176       value = fields->f_offset16;
1177       break;
1178
1179     default :
1180       /* xgettext:c-format */
1181       fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1182                        opindex);
1183       abort ();
1184   }
1185
1186   return value;
1187 }
1188
1189 bfd_vma
1190 xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1191                              int opindex,
1192                              const CGEN_FIELDS * fields)
1193 {
1194   bfd_vma value;
1195
1196   switch (opindex)
1197     {
1198     case XC16X_OPERAND_REGNAM :
1199       value = fields->f_reg8;
1200       break;
1201     case XC16X_OPERAND_BIT01 :
1202       value = fields->f_op_1bit;
1203       break;
1204     case XC16X_OPERAND_BIT1 :
1205       value = fields->f_op_bit1;
1206       break;
1207     case XC16X_OPERAND_BIT2 :
1208       value = fields->f_op_bit2;
1209       break;
1210     case XC16X_OPERAND_BIT4 :
1211       value = fields->f_op_bit4;
1212       break;
1213     case XC16X_OPERAND_BIT8 :
1214       value = fields->f_op_bit8;
1215       break;
1216     case XC16X_OPERAND_BITONE :
1217       value = fields->f_op_onebit;
1218       break;
1219     case XC16X_OPERAND_CADDR :
1220       value = fields->f_offset16;
1221       break;
1222     case XC16X_OPERAND_COND :
1223       value = fields->f_condcode;
1224       break;
1225     case XC16X_OPERAND_DATA8 :
1226       value = fields->f_data8;
1227       break;
1228     case XC16X_OPERAND_DATAHI8 :
1229       value = fields->f_datahi8;
1230       break;
1231     case XC16X_OPERAND_DOT :
1232       value = 0;
1233       break;
1234     case XC16X_OPERAND_DR :
1235       value = fields->f_r1;
1236       break;
1237     case XC16X_OPERAND_DRB :
1238       value = fields->f_r1;
1239       break;
1240     case XC16X_OPERAND_DRI :
1241       value = fields->f_r4;
1242       break;
1243     case XC16X_OPERAND_EXTCOND :
1244       value = fields->f_extccode;
1245       break;
1246     case XC16X_OPERAND_GENREG :
1247       value = fields->f_regb8;
1248       break;
1249     case XC16X_OPERAND_HASH :
1250       value = 0;
1251       break;
1252     case XC16X_OPERAND_ICOND :
1253       value = fields->f_icondcode;
1254       break;
1255     case XC16X_OPERAND_LBIT2 :
1256       value = fields->f_op_lbit2;
1257       break;
1258     case XC16X_OPERAND_LBIT4 :
1259       value = fields->f_op_lbit4;
1260       break;
1261     case XC16X_OPERAND_MASK8 :
1262       value = fields->f_mask8;
1263       break;
1264     case XC16X_OPERAND_MASKLO8 :
1265       value = fields->f_datahi8;
1266       break;
1267     case XC16X_OPERAND_MEMGR8 :
1268       value = fields->f_memgr8;
1269       break;
1270     case XC16X_OPERAND_MEMORY :
1271       value = fields->f_memory;
1272       break;
1273     case XC16X_OPERAND_PAG :
1274       value = 0;
1275       break;
1276     case XC16X_OPERAND_PAGENUM :
1277       value = fields->f_pagenum;
1278       break;
1279     case XC16X_OPERAND_POF :
1280       value = 0;
1281       break;
1282     case XC16X_OPERAND_QBIT :
1283       value = fields->f_qbit;
1284       break;
1285     case XC16X_OPERAND_QHIBIT :
1286       value = fields->f_qhibit;
1287       break;
1288     case XC16X_OPERAND_QLOBIT :
1289       value = fields->f_qlobit;
1290       break;
1291     case XC16X_OPERAND_REG8 :
1292       value = fields->f_reg8;
1293       break;
1294     case XC16X_OPERAND_REGB8 :
1295       value = fields->f_regb8;
1296       break;
1297     case XC16X_OPERAND_REGBMEM8 :
1298       value = fields->f_regmem8;
1299       break;
1300     case XC16X_OPERAND_REGHI8 :
1301       value = fields->f_reghi8;
1302       break;
1303     case XC16X_OPERAND_REGMEM8 :
1304       value = fields->f_regmem8;
1305       break;
1306     case XC16X_OPERAND_REGOFF8 :
1307       value = fields->f_regoff8;
1308       break;
1309     case XC16X_OPERAND_REL :
1310       value = fields->f_rel8;
1311       break;
1312     case XC16X_OPERAND_RELHI :
1313       value = fields->f_relhi8;
1314       break;
1315     case XC16X_OPERAND_SEG :
1316       value = fields->f_seg8;
1317       break;
1318     case XC16X_OPERAND_SEGHI8 :
1319       value = fields->f_segnum8;
1320       break;
1321     case XC16X_OPERAND_SEGM :
1322       value = 0;
1323       break;
1324     case XC16X_OPERAND_SOF :
1325       value = 0;
1326       break;
1327     case XC16X_OPERAND_SR :
1328       value = fields->f_r2;
1329       break;
1330     case XC16X_OPERAND_SR2 :
1331       value = fields->f_r0;
1332       break;
1333     case XC16X_OPERAND_SRB :
1334       value = fields->f_r2;
1335       break;
1336     case XC16X_OPERAND_SRC1 :
1337       value = fields->f_r1;
1338       break;
1339     case XC16X_OPERAND_SRC2 :
1340       value = fields->f_r2;
1341       break;
1342     case XC16X_OPERAND_SRDIV :
1343       value = fields->f_reg8;
1344       break;
1345     case XC16X_OPERAND_U4 :
1346       value = fields->f_uimm4;
1347       break;
1348     case XC16X_OPERAND_UIMM16 :
1349       value = fields->f_uimm16;
1350       break;
1351     case XC16X_OPERAND_UIMM2 :
1352       value = fields->f_uimm2;
1353       break;
1354     case XC16X_OPERAND_UIMM3 :
1355       value = fields->f_uimm3;
1356       break;
1357     case XC16X_OPERAND_UIMM4 :
1358       value = fields->f_uimm4;
1359       break;
1360     case XC16X_OPERAND_UIMM7 :
1361       value = fields->f_uimm7;
1362       break;
1363     case XC16X_OPERAND_UIMM8 :
1364       value = fields->f_uimm8;
1365       break;
1366     case XC16X_OPERAND_UPAG16 :
1367       value = fields->f_uimm16;
1368       break;
1369     case XC16X_OPERAND_UPOF16 :
1370       value = fields->f_memory;
1371       break;
1372     case XC16X_OPERAND_USEG16 :
1373       value = fields->f_offset16;
1374       break;
1375     case XC16X_OPERAND_USEG8 :
1376       value = fields->f_seg8;
1377       break;
1378     case XC16X_OPERAND_USOF16 :
1379       value = fields->f_offset16;
1380       break;
1381
1382     default :
1383       /* xgettext:c-format */
1384       fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1385                        opindex);
1386       abort ();
1387   }
1388
1389   return value;
1390 }
1391
1392 void xc16x_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1393 void xc16x_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1394
1395 /* Stuffing values in cgen_fields is handled by a collection of functions.
1396    They are distinguished by the type of the VALUE argument they accept.
1397    TODO: floating point, inlining support, remove cases where argument type
1398    not appropriate.  */
1399
1400 void
1401 xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1402                              int opindex,
1403                              CGEN_FIELDS * fields,
1404                              int value)
1405 {
1406   switch (opindex)
1407     {
1408     case XC16X_OPERAND_REGNAM :
1409       fields->f_reg8 = value;
1410       break;
1411     case XC16X_OPERAND_BIT01 :
1412       fields->f_op_1bit = value;
1413       break;
1414     case XC16X_OPERAND_BIT1 :
1415       fields->f_op_bit1 = value;
1416       break;
1417     case XC16X_OPERAND_BIT2 :
1418       fields->f_op_bit2 = value;
1419       break;
1420     case XC16X_OPERAND_BIT4 :
1421       fields->f_op_bit4 = value;
1422       break;
1423     case XC16X_OPERAND_BIT8 :
1424       fields->f_op_bit8 = value;
1425       break;
1426     case XC16X_OPERAND_BITONE :
1427       fields->f_op_onebit = value;
1428       break;
1429     case XC16X_OPERAND_CADDR :
1430       fields->f_offset16 = value;
1431       break;
1432     case XC16X_OPERAND_COND :
1433       fields->f_condcode = value;
1434       break;
1435     case XC16X_OPERAND_DATA8 :
1436       fields->f_data8 = value;
1437       break;
1438     case XC16X_OPERAND_DATAHI8 :
1439       fields->f_datahi8 = value;
1440       break;
1441     case XC16X_OPERAND_DOT :
1442       break;
1443     case XC16X_OPERAND_DR :
1444       fields->f_r1 = value;
1445       break;
1446     case XC16X_OPERAND_DRB :
1447       fields->f_r1 = value;
1448       break;
1449     case XC16X_OPERAND_DRI :
1450       fields->f_r4 = value;
1451       break;
1452     case XC16X_OPERAND_EXTCOND :
1453       fields->f_extccode = value;
1454       break;
1455     case XC16X_OPERAND_GENREG :
1456       fields->f_regb8 = value;
1457       break;
1458     case XC16X_OPERAND_HASH :
1459       break;
1460     case XC16X_OPERAND_ICOND :
1461       fields->f_icondcode = value;
1462       break;
1463     case XC16X_OPERAND_LBIT2 :
1464       fields->f_op_lbit2 = value;
1465       break;
1466     case XC16X_OPERAND_LBIT4 :
1467       fields->f_op_lbit4 = value;
1468       break;
1469     case XC16X_OPERAND_MASK8 :
1470       fields->f_mask8 = value;
1471       break;
1472     case XC16X_OPERAND_MASKLO8 :
1473       fields->f_datahi8 = value;
1474       break;
1475     case XC16X_OPERAND_MEMGR8 :
1476       fields->f_memgr8 = value;
1477       break;
1478     case XC16X_OPERAND_MEMORY :
1479       fields->f_memory = value;
1480       break;
1481     case XC16X_OPERAND_PAG :
1482       break;
1483     case XC16X_OPERAND_PAGENUM :
1484       fields->f_pagenum = value;
1485       break;
1486     case XC16X_OPERAND_POF :
1487       break;
1488     case XC16X_OPERAND_QBIT :
1489       fields->f_qbit = value;
1490       break;
1491     case XC16X_OPERAND_QHIBIT :
1492       fields->f_qhibit = value;
1493       break;
1494     case XC16X_OPERAND_QLOBIT :
1495       fields->f_qlobit = value;
1496       break;
1497     case XC16X_OPERAND_REG8 :
1498       fields->f_reg8 = value;
1499       break;
1500     case XC16X_OPERAND_REGB8 :
1501       fields->f_regb8 = value;
1502       break;
1503     case XC16X_OPERAND_REGBMEM8 :
1504       fields->f_regmem8 = value;
1505       break;
1506     case XC16X_OPERAND_REGHI8 :
1507       fields->f_reghi8 = value;
1508       break;
1509     case XC16X_OPERAND_REGMEM8 :
1510       fields->f_regmem8 = value;
1511       break;
1512     case XC16X_OPERAND_REGOFF8 :
1513       fields->f_regoff8 = value;
1514       break;
1515     case XC16X_OPERAND_REL :
1516       fields->f_rel8 = value;
1517       break;
1518     case XC16X_OPERAND_RELHI :
1519       fields->f_relhi8 = value;
1520       break;
1521     case XC16X_OPERAND_SEG :
1522       fields->f_seg8 = value;
1523       break;
1524     case XC16X_OPERAND_SEGHI8 :
1525       fields->f_segnum8 = value;
1526       break;
1527     case XC16X_OPERAND_SEGM :
1528       break;
1529     case XC16X_OPERAND_SOF :
1530       break;
1531     case XC16X_OPERAND_SR :
1532       fields->f_r2 = value;
1533       break;
1534     case XC16X_OPERAND_SR2 :
1535       fields->f_r0 = value;
1536       break;
1537     case XC16X_OPERAND_SRB :
1538       fields->f_r2 = value;
1539       break;
1540     case XC16X_OPERAND_SRC1 :
1541       fields->f_r1 = value;
1542       break;
1543     case XC16X_OPERAND_SRC2 :
1544       fields->f_r2 = value;
1545       break;
1546     case XC16X_OPERAND_SRDIV :
1547       fields->f_reg8 = value;
1548       break;
1549     case XC16X_OPERAND_U4 :
1550       fields->f_uimm4 = value;
1551       break;
1552     case XC16X_OPERAND_UIMM16 :
1553       fields->f_uimm16 = value;
1554       break;
1555     case XC16X_OPERAND_UIMM2 :
1556       fields->f_uimm2 = value;
1557       break;
1558     case XC16X_OPERAND_UIMM3 :
1559       fields->f_uimm3 = value;
1560       break;
1561     case XC16X_OPERAND_UIMM4 :
1562       fields->f_uimm4 = value;
1563       break;
1564     case XC16X_OPERAND_UIMM7 :
1565       fields->f_uimm7 = value;
1566       break;
1567     case XC16X_OPERAND_UIMM8 :
1568       fields->f_uimm8 = value;
1569       break;
1570     case XC16X_OPERAND_UPAG16 :
1571       fields->f_uimm16 = value;
1572       break;
1573     case XC16X_OPERAND_UPOF16 :
1574       fields->f_memory = value;
1575       break;
1576     case XC16X_OPERAND_USEG16 :
1577       fields->f_offset16 = value;
1578       break;
1579     case XC16X_OPERAND_USEG8 :
1580       fields->f_seg8 = value;
1581       break;
1582     case XC16X_OPERAND_USOF16 :
1583       fields->f_offset16 = value;
1584       break;
1585
1586     default :
1587       /* xgettext:c-format */
1588       fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1589                        opindex);
1590       abort ();
1591   }
1592 }
1593
1594 void
1595 xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1596                              int opindex,
1597                              CGEN_FIELDS * fields,
1598                              bfd_vma value)
1599 {
1600   switch (opindex)
1601     {
1602     case XC16X_OPERAND_REGNAM :
1603       fields->f_reg8 = value;
1604       break;
1605     case XC16X_OPERAND_BIT01 :
1606       fields->f_op_1bit = value;
1607       break;
1608     case XC16X_OPERAND_BIT1 :
1609       fields->f_op_bit1 = value;
1610       break;
1611     case XC16X_OPERAND_BIT2 :
1612       fields->f_op_bit2 = value;
1613       break;
1614     case XC16X_OPERAND_BIT4 :
1615       fields->f_op_bit4 = value;
1616       break;
1617     case XC16X_OPERAND_BIT8 :
1618       fields->f_op_bit8 = value;
1619       break;
1620     case XC16X_OPERAND_BITONE :
1621       fields->f_op_onebit = value;
1622       break;
1623     case XC16X_OPERAND_CADDR :
1624       fields->f_offset16 = value;
1625       break;
1626     case XC16X_OPERAND_COND :
1627       fields->f_condcode = value;
1628       break;
1629     case XC16X_OPERAND_DATA8 :
1630       fields->f_data8 = value;
1631       break;
1632     case XC16X_OPERAND_DATAHI8 :
1633       fields->f_datahi8 = value;
1634       break;
1635     case XC16X_OPERAND_DOT :
1636       break;
1637     case XC16X_OPERAND_DR :
1638       fields->f_r1 = value;
1639       break;
1640     case XC16X_OPERAND_DRB :
1641       fields->f_r1 = value;
1642       break;
1643     case XC16X_OPERAND_DRI :
1644       fields->f_r4 = value;
1645       break;
1646     case XC16X_OPERAND_EXTCOND :
1647       fields->f_extccode = value;
1648       break;
1649     case XC16X_OPERAND_GENREG :
1650       fields->f_regb8 = value;
1651       break;
1652     case XC16X_OPERAND_HASH :
1653       break;
1654     case XC16X_OPERAND_ICOND :
1655       fields->f_icondcode = value;
1656       break;
1657     case XC16X_OPERAND_LBIT2 :
1658       fields->f_op_lbit2 = value;
1659       break;
1660     case XC16X_OPERAND_LBIT4 :
1661       fields->f_op_lbit4 = value;
1662       break;
1663     case XC16X_OPERAND_MASK8 :
1664       fields->f_mask8 = value;
1665       break;
1666     case XC16X_OPERAND_MASKLO8 :
1667       fields->f_datahi8 = value;
1668       break;
1669     case XC16X_OPERAND_MEMGR8 :
1670       fields->f_memgr8 = value;
1671       break;
1672     case XC16X_OPERAND_MEMORY :
1673       fields->f_memory = value;
1674       break;
1675     case XC16X_OPERAND_PAG :
1676       break;
1677     case XC16X_OPERAND_PAGENUM :
1678       fields->f_pagenum = value;
1679       break;
1680     case XC16X_OPERAND_POF :
1681       break;
1682     case XC16X_OPERAND_QBIT :
1683       fields->f_qbit = value;
1684       break;
1685     case XC16X_OPERAND_QHIBIT :
1686       fields->f_qhibit = value;
1687       break;
1688     case XC16X_OPERAND_QLOBIT :
1689       fields->f_qlobit = value;
1690       break;
1691     case XC16X_OPERAND_REG8 :
1692       fields->f_reg8 = value;
1693       break;
1694     case XC16X_OPERAND_REGB8 :
1695       fields->f_regb8 = value;
1696       break;
1697     case XC16X_OPERAND_REGBMEM8 :
1698       fields->f_regmem8 = value;
1699       break;
1700     case XC16X_OPERAND_REGHI8 :
1701       fields->f_reghi8 = value;
1702       break;
1703     case XC16X_OPERAND_REGMEM8 :
1704       fields->f_regmem8 = value;
1705       break;
1706     case XC16X_OPERAND_REGOFF8 :
1707       fields->f_regoff8 = value;
1708       break;
1709     case XC16X_OPERAND_REL :
1710       fields->f_rel8 = value;
1711       break;
1712     case XC16X_OPERAND_RELHI :
1713       fields->f_relhi8 = value;
1714       break;
1715     case XC16X_OPERAND_SEG :
1716       fields->f_seg8 = value;
1717       break;
1718     case XC16X_OPERAND_SEGHI8 :
1719       fields->f_segnum8 = value;
1720       break;
1721     case XC16X_OPERAND_SEGM :
1722       break;
1723     case XC16X_OPERAND_SOF :
1724       break;
1725     case XC16X_OPERAND_SR :
1726       fields->f_r2 = value;
1727       break;
1728     case XC16X_OPERAND_SR2 :
1729       fields->f_r0 = value;
1730       break;
1731     case XC16X_OPERAND_SRB :
1732       fields->f_r2 = value;
1733       break;
1734     case XC16X_OPERAND_SRC1 :
1735       fields->f_r1 = value;
1736       break;
1737     case XC16X_OPERAND_SRC2 :
1738       fields->f_r2 = value;
1739       break;
1740     case XC16X_OPERAND_SRDIV :
1741       fields->f_reg8 = value;
1742       break;
1743     case XC16X_OPERAND_U4 :
1744       fields->f_uimm4 = value;
1745       break;
1746     case XC16X_OPERAND_UIMM16 :
1747       fields->f_uimm16 = value;
1748       break;
1749     case XC16X_OPERAND_UIMM2 :
1750       fields->f_uimm2 = value;
1751       break;
1752     case XC16X_OPERAND_UIMM3 :
1753       fields->f_uimm3 = value;
1754       break;
1755     case XC16X_OPERAND_UIMM4 :
1756       fields->f_uimm4 = value;
1757       break;
1758     case XC16X_OPERAND_UIMM7 :
1759       fields->f_uimm7 = value;
1760       break;
1761     case XC16X_OPERAND_UIMM8 :
1762       fields->f_uimm8 = value;
1763       break;
1764     case XC16X_OPERAND_UPAG16 :
1765       fields->f_uimm16 = value;
1766       break;
1767     case XC16X_OPERAND_UPOF16 :
1768       fields->f_memory = value;
1769       break;
1770     case XC16X_OPERAND_USEG16 :
1771       fields->f_offset16 = value;
1772       break;
1773     case XC16X_OPERAND_USEG8 :
1774       fields->f_seg8 = value;
1775       break;
1776     case XC16X_OPERAND_USOF16 :
1777       fields->f_offset16 = value;
1778       break;
1779
1780     default :
1781       /* xgettext:c-format */
1782       fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1783                        opindex);
1784       abort ();
1785   }
1786 }
1787
1788 /* Function to call before using the instruction builder tables.  */
1789
1790 void
1791 xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1792 {
1793   cd->insert_handlers = & xc16x_cgen_insert_handlers[0];
1794   cd->extract_handlers = & xc16x_cgen_extract_handlers[0];
1795
1796   cd->insert_operand = xc16x_cgen_insert_operand;
1797   cd->extract_operand = xc16x_cgen_extract_operand;
1798
1799   cd->get_int_operand = xc16x_cgen_get_int_operand;
1800   cd->set_int_operand = xc16x_cgen_set_int_operand;
1801   cd->get_vma_operand = xc16x_cgen_get_vma_operand;
1802   cd->set_vma_operand = xc16x_cgen_set_vma_operand;
1803 }