1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995, 2003
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
7 @chapter H8/500 Dependent Features
11 * H8/500 Options:: Options
12 * H8/500 Syntax:: Syntax
13 * H8/500 Floating Point:: Floating Point
14 * H8/500 Directives:: H8/500 Machine Directives
15 * H8/500 Opcodes:: Opcodes
21 @cindex H8/500 options (none)
22 @cindex options, H8/500 (none)
23 @code{@value{AS}} has no additional command-line options for the
24 Renesas (formerly Hitachi) H8/500 family.
30 * H8/500-Chars:: Special Characters
31 * H8/500-Regs:: Register Names
32 * H8/500-Addressing:: Addressing Modes
36 @subsection Special Characters
38 @cindex line comment character, H8/500
39 @cindex H8/500 line comment character
40 @samp{!} is the line comment character.
42 @cindex line separator, H8/500
43 @cindex statement separator, H8/500
44 @cindex H8/500 line separator
45 @samp{;} can be used instead of a newline to separate statements.
47 @cindex symbol names, @samp{$} in
48 @cindex @code{$} in symbol names
49 Since @samp{$} has no special meaning, you may use it in symbol names.
52 @subsection Register Names
54 @cindex H8/500 registers
55 @cindex registers, H8/500
56 You can use the predefined symbols @samp{r0}, @samp{r1}, @samp{r2},
57 @samp{r3}, @samp{r4}, @samp{r5}, @samp{r6}, and @samp{r7} to refer to
60 The H8/500 also has these control registers:
82 condition code register
85 All registers are 16 bits long. To represent 32 bit numbers, use two
86 adjacent registers; for distant memory addresses, use one of the segment
87 pointers (@code{cp} for the program counter; @code{dp} for
88 @code{r0}--@code{r3}; @code{ep} for @code{r4} and @code{r5}; and
89 @code{tp} for @code{r6} and @code{r7}.
91 @node H8/500-Addressing
92 @subsection Addressing Modes
94 @cindex addressing modes, H8/500
95 @cindex H8/500 addressing modes
96 @value{AS} understands the following addressing modes for the H8/500:
104 @item @@(d:8, R@var{n})
105 Register indirect with 8 bit signed displacement
107 @item @@(d:16, R@var{n})
108 Register indirect with 16 bit signed displacement
111 Register indirect with pre-decrement
114 Register indirect with post-increment
117 8 bit absolute address
120 16 bit absolute address
129 @node H8/500 Floating Point
130 @section Floating Point
132 @cindex floating point, H8/500 (@sc{ieee})
133 @cindex H8/500 floating point (@sc{ieee})
134 The H8/500 family has no hardware floating point, but the @code{.float}
135 directive generates @sc{ieee} floating-point numbers for compatibility
136 with other development tools.
138 @node H8/500 Directives
139 @section H8/500 Machine Directives
141 @cindex H8/500 machine directives (none)
142 @cindex machine directives, H8/500 (none)
143 @cindex @code{word} directive, H8/500
144 @cindex @code{int} directive, H8/500
145 @code{@value{AS}} has no machine-dependent directives for the H8/500.
146 However, on this platform the @samp{.int} and @samp{.word} directives
147 generate 16-bit numbers.
152 @cindex H8/500 opcode summary
153 @cindex opcode summary, H8/500
154 @cindex mnemonics, H8/500
155 @cindex instruction summary, H8/500
156 For detailed information on the H8/500 machine instruction set, see
157 @cite{H8/500 Series Programming Manual} (Renesas M21T001).
159 @code{@value{AS}} implements all the standard H8/500 opcodes. No additional
160 pseudo-instructions are needed on this family.
163 @c this table, due to the multi-col faking and hardcoded order, looks silly
164 @c except in smallbook. See comments below "@set SMALL" near top of this file.
166 The following table summarizes H8/500 opcodes and their operands:
168 @c Use @group if it ever works, instead of @page
172 abs8 @r{8-bit absolute address}
173 abs16 @r{16-bit absolute address}
174 abs24 @r{24-bit absolute address}
175 crb @r{@code{ccr}, @code{br}, @code{ep}, @code{dp}, @code{tp}, @code{dp}}
176 disp8 @r{8-bit displacement}
177 ea @r{@code{rn}, @code{@@rn}, @code{@@(d:8, rn)}, @code{@@(d:16, rn)},}
178 @r{@code{@@-rn}, @code{@@rn+}, @code{@@aa:8}, @code{@@aa:16},}
179 @r{@code{#xx:8}, @code{#xx:16}}
180 ea_mem @r{@code{@@rn}, @code{@@(d:8, rn)}, @code{@@(d:16, rn)},}
181 @r{@code{@@-rn}, @code{@@rn+}, @code{@@aa:8}, @code{@@aa:16}}
182 ea_noimm @r{@code{rn}, @code{@@rn}, @code{@@(d:8, rn)}, @code{@@(d:16, rn)},}
183 @r{@code{@@-rn}, @code{@@rn+}, @code{@@aa:8}, @code{@@aa:16}}
185 imm4 @r{4-bit immediate data}
186 imm8 @r{8-bit immediate data}
187 imm16 @r{16-bit immediate data}
188 pcrel8 @r{8-bit offset from program counter}
189 pcrel16 @r{16-bit offset from program counter}
190 qim @r{@code{-2}, @code{-1}, @code{1}, @code{2}}
192 rs @r{a register distinct from rd}
193 rlist @r{comma-separated list of registers in parentheses;}
194 @r{register ranges @code{rd-rs} are allowed}
195 sp @r{stack pointer (@code{r7})}
196 sr @r{status register}
197 sz @r{size; @samp{.b} or @samp{.w}. If omitted, default @samp{.w}}
199 ldc[.b] ea,crb bcc[.w] pcrel16
200 ldc[.w] ea,sr bcc[.b] pcrel8
201 add[:q] sz qim,ea_noimm bhs[.w] pcrel16
202 add[:g] sz ea,rd bhs[.b] pcrel8
203 adds sz ea,rd bcs[.w] pcrel16
204 addx sz ea,rd bcs[.b] pcrel8
205 and sz ea,rd blo[.w] pcrel16
206 andc[.b] imm8,crb blo[.b] pcrel8
207 andc[.w] imm16,sr bne[.w] pcrel16
209 bra[.w] pcrel16 beq[.w] pcrel16
210 bra[.b] pcrel8 beq[.b] pcrel8
211 bt[.w] pcrel16 bvc[.w] pcrel16
212 bt[.b] pcrel8 bvc[.b] pcrel8
213 brn[.w] pcrel16 bvs[.w] pcrel16
214 brn[.b] pcrel8 bvs[.b] pcrel8
215 bf[.w] pcrel16 bpl[.w] pcrel16
216 bf[.b] pcrel8 bpl[.b] pcrel8
217 bhi[.w] pcrel16 bmi[.w] pcrel16
218 bhi[.b] pcrel8 bmi[.b] pcrel8
219 bls[.w] pcrel16 bge[.w] pcrel16
220 bls[.b] pcrel8 bge[.b] pcrel8
222 blt[.w] pcrel16 mov[:g][.b] imm8,ea_mem
223 blt[.b] pcrel8 mov[:g][.w] imm16,ea_mem
224 bgt[.w] pcrel16 movfpe[.b] ea,rd
225 bgt[.b] pcrel8 movtpe[.b] rs,ea_noimm
226 ble[.w] pcrel16 mulxu sz ea,rd
227 ble[.b] pcrel8 neg sz ea
228 bclr sz imm4,ea_noimm nop
229 bclr sz rs,ea_noimm not sz ea
230 bnot sz imm4,ea_noimm or sz ea,rd
231 bnot sz rs,ea_noimm orc[.b] imm8,crb
232 bset sz imm4,ea_noimm orc[.w] imm16,sr
233 bset sz rs,ea_noimm pjmp abs24
234 bsr[.b] pcrel8 pjmp @@rd
235 bsr[.w] pcrel16 pjsr abs24
236 btst sz imm4,ea_noimm pjsr @@rd
237 btst sz rs,ea_noimm prtd imm8
239 cmp[:e][.b] imm8,rd prts
240 cmp[:i][.w] imm16,rd rotl sz ea
241 cmp[:g].b imm8,ea_noimm rotr sz ea
242 cmp[:g][.w] imm16,ea_noimm rotxl sz ea
243 Cmp[:g] sz ea,rd rotxr sz ea
245 divxu sz ea,rd rtd imm16
247 exts[.b] rd scb/f rs,pcrel8
248 extu[.b] rd scb/ne rs,pcrel8
249 jmp @@rd scb/eq rs,pcrel8
250 jmp @@(imm8,rd) shal sz ea
251 jmp @@(imm16,rd) shar sz ea
254 jsr @@(imm8,rd) sleep
255 jsr @@(imm16,rd) stc[.b] crb,ea_noimm
256 jsr abs16 stc[.w] sr,ea_noimm
257 ldm @@sp+,(rlist) stm (rlist),@@-sp
258 link fp,imm8 sub sz ea,rd
259 link fp,imm16 subs sz ea,rd
260 mov[:e][.b] imm8,rd subx sz ea,rd
261 mov[:i][.w] imm16,rd swap[.b] rd
262 mov[:l][.w] abs8,rd tas[.b] ea
263 mov[:l].b abs8,rd trapa imm4
264 mov[:s][.w] rs,abs8 trap/vs
265 mov[:s].b rs,abs8 tst sz ea
266 mov[:f][.w] @@(disp8,fp),rd unlk fp
267 mov[:f][.w] rs,@@(disp8,fp) xch[.w] rs,rd
268 mov[:f].b @@(disp8,fp),rd xor sz ea,rd
269 mov[:f].b rs,@@(disp8,fp) xorc.b imm8,crb
270 mov[:g] sz rs,ea_mem xorc.w imm16,sr