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2006-03-07 Paul Brook <paul@codesourcery.com>
[binutils.git] / opcodes / m32c-ibld.c
blob62c753b93452651f667a9d93b69f123611ed3b58
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
7 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171
172 if ((unsigned long) value > maxval)
173 {
174 /* xgettext:c-format */
175 sprintf (errbuf,
176 _("operand out of range (%lu not between 0 and %lu)"),
177 value, maxval);
178 return errbuf;
179 }
180 }
181 else
182 {
183 if (! cgen_signed_overflow_ok_p (cd))
184 {
185 long minval = - (1L << (length - 1));
186 long maxval = (1L << (length - 1)) - 1;
187
188 if (value < minval || value > maxval)
189 {
190 sprintf
191 /* xgettext:c-format */
192 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
193 value, minval, maxval);
194 return errbuf;
195 }
196 }
197 }
198
199 #if CGEN_INT_INSN_P
200
201 {
202 int shift;
203
204 if (CGEN_INSN_LSB0_P)
205 shift = (word_offset + start + 1) - length;
206 else
207 shift = total_length - (word_offset + start + length);
208 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
209 }
210
211 #else /* ! CGEN_INT_INSN_P */
212
213 {
214 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
215
216 insert_1 (cd, value, start, length, word_length, bufp);
217 }
218
219 #endif /* ! CGEN_INT_INSN_P */
220
221 return NULL;
222 }
223
224 /* Default insn builder (insert handler).
225 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
226 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
227 recorded in host byte order, otherwise BUFFER is an array of bytes
228 and the value is recorded in target byte order).
229 The result is an error message or NULL if success. */
230
231 static const char *
232 insert_insn_normal (CGEN_CPU_DESC cd,
233 const CGEN_INSN * insn,
234 CGEN_FIELDS * fields,
235 CGEN_INSN_BYTES_PTR buffer,
236 bfd_vma pc)
237 {
238 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
239 unsigned long value;
240 const CGEN_SYNTAX_CHAR_TYPE * syn;
241
242 CGEN_INIT_INSERT (cd);
243 value = CGEN_INSN_BASE_VALUE (insn);
244
245 /* If we're recording insns as numbers (rather than a string of bytes),
246 target byte order handling is deferred until later. */
247
248 #if CGEN_INT_INSN_P
249
250 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
251 CGEN_FIELDS_BITSIZE (fields), value);
252
253 #else
254
255 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
256 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
257 value);
258
259 #endif /* ! CGEN_INT_INSN_P */
260
261 /* ??? It would be better to scan the format's fields.
262 Still need to be able to insert a value based on the operand though;
263 e.g. storing a branch displacement that got resolved later.
264 Needs more thought first. */
265
266 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
267 {
268 const char *errmsg;
269
270 if (CGEN_SYNTAX_CHAR_P (* syn))
271 continue;
272
273 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
274 fields, buffer, pc);
275 if (errmsg)
276 return errmsg;
277 }
278
279 return NULL;
280 }
281
282 #if CGEN_INT_INSN_P
283 /* Cover function to store an insn value into an integral insn. Must go here
284 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
285
286 static void
287 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
288 CGEN_INSN_BYTES_PTR buf,
289 int length,
290 int insn_length,
291 CGEN_INSN_INT value)
292 {
293 /* For architectures with insns smaller than the base-insn-bitsize,
294 length may be too big. */
295 if (length > insn_length)
296 *buf = value;
297 else
298 {
299 int shift = insn_length - length;
300 /* Written this way to avoid undefined behaviour. */
301 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
302
303 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
304 }
305 }
306 #endif
307 \f
308 /* Operand extraction. */
309
310 #if ! CGEN_INT_INSN_P
311
312 /* Subroutine of extract_normal.
313 Ensure sufficient bytes are cached in EX_INFO.
314 OFFSET is the offset in bytes from the start of the insn of the value.
315 BYTES is the length of the needed value.
316 Returns 1 for success, 0 for failure. */
317
318 static CGEN_INLINE int
319 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
320 CGEN_EXTRACT_INFO *ex_info,
321 int offset,
322 int bytes,
323 bfd_vma pc)
324 {
325 /* It's doubtful that the middle part has already been fetched so
326 we don't optimize that case. kiss. */
327 unsigned int mask;
328 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
329
330 /* First do a quick check. */
331 mask = (1 << bytes) - 1;
332 if (((ex_info->valid >> offset) & mask) == mask)
333 return 1;
334
335 /* Search for the first byte we need to read. */
336 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
337 if (! (mask & ex_info->valid))
338 break;
339
340 if (bytes)
341 {
342 int status;
343
344 pc += offset;
345 status = (*info->read_memory_func)
346 (pc, ex_info->insn_bytes + offset, bytes, info);
347
348 if (status != 0)
349 {
350 (*info->memory_error_func) (status, pc, info);
351 return 0;
352 }
353
354 ex_info->valid |= ((1 << bytes) - 1) << offset;
355 }
356
357 return 1;
358 }
359
360 /* Subroutine of extract_normal. */
361
362 static CGEN_INLINE long
363 extract_1 (CGEN_CPU_DESC cd,
364 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
365 int start,
366 int length,
367 int word_length,
368 unsigned char *bufp,
369 bfd_vma pc ATTRIBUTE_UNUSED)
370 {
371 unsigned long x;
372 int shift;
373
374 x = cgen_get_insn_value (cd, bufp, word_length);
375
376 if (CGEN_INSN_LSB0_P)
377 shift = (start + 1) - length;
378 else
379 shift = (word_length - (start + length));
380 return x >> shift;
381 }
382
383 #endif /* ! CGEN_INT_INSN_P */
384
385 /* Default extraction routine.
386
387 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
388 or sometimes less for cases like the m32r where the base insn size is 32
389 but some insns are 16 bits.
390 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
391 but for generality we take a bitmask of all of them.
392 WORD_OFFSET is the offset in bits from the start of the insn of the value.
393 WORD_LENGTH is the length of the word in bits in which the value resides.
394 START is the starting bit number in the word, architecture origin.
395 LENGTH is the length of VALUE in bits.
396 TOTAL_LENGTH is the total length of the insn in bits.
397
398 Returns 1 for success, 0 for failure. */
399
400 /* ??? The return code isn't properly used. wip. */
401
402 /* ??? This doesn't handle bfd_vma's. Create another function when
403 necessary. */
404
405 static int
406 extract_normal (CGEN_CPU_DESC cd,
407 #if ! CGEN_INT_INSN_P
408 CGEN_EXTRACT_INFO *ex_info,
409 #else
410 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
411 #endif
412 CGEN_INSN_INT insn_value,
413 unsigned int attrs,
414 unsigned int word_offset,
415 unsigned int start,
416 unsigned int length,
417 unsigned int word_length,
418 unsigned int total_length,
419 #if ! CGEN_INT_INSN_P
420 bfd_vma pc,
421 #else
422 bfd_vma pc ATTRIBUTE_UNUSED,
423 #endif
424 long *valuep)
425 {
426 long value, mask;
427
428 /* If LENGTH is zero, this operand doesn't contribute to the value
429 so give it a standard value of zero. */
430 if (length == 0)
431 {
432 *valuep = 0;
433 return 1;
434 }
435
436 if (word_length > 32)
437 abort ();
438
439 /* For architectures with insns smaller than the insn-base-bitsize,
440 word_length may be too big. */
441 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
442 {
443 if (word_offset + word_length > total_length)
444 word_length = total_length - word_offset;
445 }
446
447 /* Does the value reside in INSN_VALUE, and at the right alignment? */
448
449 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
450 {
451 if (CGEN_INSN_LSB0_P)
452 value = insn_value >> ((word_offset + start + 1) - length);
453 else
454 value = insn_value >> (total_length - ( word_offset + start + length));
455 }
456
457 #if ! CGEN_INT_INSN_P
458
459 else
460 {
461 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
462
463 if (word_length > 32)
464 abort ();
465
466 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
467 return 0;
468
469 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
470 }
471
472 #endif /* ! CGEN_INT_INSN_P */
473
474 /* Written this way to avoid undefined behaviour. */
475 mask = (((1L << (length - 1)) - 1) << 1) | 1;
476
477 value &= mask;
478 /* sign extend? */
479 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
480 && (value & (1L << (length - 1))))
481 value |= ~mask;
482
483 *valuep = value;
484
485 return 1;
486 }
487
488 /* Default insn extractor.
489
490 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
491 The extracted fields are stored in FIELDS.
492 EX_INFO is used to handle reading variable length insns.
493 Return the length of the insn in bits, or 0 if no match,
494 or -1 if an error occurs fetching data (memory_error_func will have
495 been called). */
496
497 static int
498 extract_insn_normal (CGEN_CPU_DESC cd,
499 const CGEN_INSN *insn,
500 CGEN_EXTRACT_INFO *ex_info,
501 CGEN_INSN_INT insn_value,
502 CGEN_FIELDS *fields,
503 bfd_vma pc)
504 {
505 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
506 const CGEN_SYNTAX_CHAR_TYPE *syn;
507
508 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
509
510 CGEN_INIT_EXTRACT (cd);
511
512 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
513 {
514 int length;
515
516 if (CGEN_SYNTAX_CHAR_P (*syn))
517 continue;
518
519 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
520 ex_info, insn_value, fields, pc);
521 if (length <= 0)
522 return length;
523 }
524
525 /* We recognized and successfully extracted this insn. */
526 return CGEN_INSN_BITSIZE (insn);
527 }
528 \f
529 /* Machine generated code added here. */
530
531 const char * m32c_cgen_insert_operand
532 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
533
534 /* Main entry point for operand insertion.
535
536 This function is basically just a big switch statement. Earlier versions
537 used tables to look up the function to use, but
538 - if the table contains both assembler and disassembler functions then
539 the disassembler contains much of the assembler and vice-versa,
540 - there's a lot of inlining possibilities as things grow,
541 - using a switch statement avoids the function call overhead.
542
543 This function could be moved into `parse_insn_normal', but keeping it
544 separate makes clear the interface between `parse_insn_normal' and each of
545 the handlers. It's also needed by GAS to insert operands that couldn't be
546 resolved during parsing. */
547
548 const char *
549 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
550 int opindex,
551 CGEN_FIELDS * fields,
552 CGEN_INSN_BYTES_PTR buffer,
553 bfd_vma pc ATTRIBUTE_UNUSED)
554 {
555 const char * errmsg = NULL;
556 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
557
558 switch (opindex)
559 {
560 case M32C_OPERAND_A0 :
561 break;
562 case M32C_OPERAND_A1 :
563 break;
564 case M32C_OPERAND_AN16_PUSH_S :
565 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
566 break;
567 case M32C_OPERAND_BIT16AN :
568 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
569 break;
570 case M32C_OPERAND_BIT16RN :
571 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
572 break;
573 case M32C_OPERAND_BIT32ANPREFIXED :
574 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
575 break;
576 case M32C_OPERAND_BIT32ANUNPREFIXED :
577 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
578 break;
579 case M32C_OPERAND_BIT32RNPREFIXED :
580 {
581 long value = fields->f_dst32_rn_prefixed_QI;
582 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
583 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
584 }
585 break;
586 case M32C_OPERAND_BIT32RNUNPREFIXED :
587 {
588 long value = fields->f_dst32_rn_unprefixed_QI;
589 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
590 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
591 }
592 break;
593 case M32C_OPERAND_BITBASE16_16_S8 :
594 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
595 break;
596 case M32C_OPERAND_BITBASE16_16_U16 :
597 {
598 long value = fields->f_dsp_16_u16;
599 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
600 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
601 }
602 break;
603 case M32C_OPERAND_BITBASE16_16_U8 :
604 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
605 break;
606 case M32C_OPERAND_BITBASE16_8_U11_S :
607 {
608 {
609 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
610 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
611 }
612 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
613 if (errmsg)
614 break;
615 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
616 if (errmsg)
617 break;
618 }
619 break;
620 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
621 {
622 {
623 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
624 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
625 }
626 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
627 if (errmsg)
628 break;
629 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
630 if (errmsg)
631 break;
632 }
633 break;
634 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
635 {
636 {
637 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
638 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
639 }
640 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
641 if (errmsg)
642 break;
643 {
644 long value = fields->f_dsp_16_s16;
645 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
646 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
647 }
648 if (errmsg)
649 break;
650 }
651 break;
652 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
653 {
654 {
655 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
656 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
657 }
658 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
659 if (errmsg)
660 break;
661 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
662 if (errmsg)
663 break;
664 }
665 break;
666 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
667 {
668 {
669 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
670 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
671 }
672 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
673 if (errmsg)
674 break;
675 {
676 long value = fields->f_dsp_16_u16;
677 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
678 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
679 }
680 if (errmsg)
681 break;
682 }
683 break;
684 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
685 {
686 {
687 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
688 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
689 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
690 }
691 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
692 if (errmsg)
693 break;
694 {
695 long value = fields->f_dsp_16_u16;
696 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
697 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
698 }
699 if (errmsg)
700 break;
701 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
702 if (errmsg)
703 break;
704 }
705 break;
706 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
707 {
708 {
709 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
710 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
711 }
712 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
713 if (errmsg)
714 break;
715 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
716 if (errmsg)
717 break;
718 }
719 break;
720 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
721 {
722 {
723 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
724 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
725 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
726 }
727 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
728 if (errmsg)
729 break;
730 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
731 if (errmsg)
732 break;
733 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
734 if (errmsg)
735 break;
736 }
737 break;
738 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
739 {
740 {
741 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
742 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
743 }
744 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
745 if (errmsg)
746 break;
747 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
748 if (errmsg)
749 break;
750 }
751 break;
752 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
753 {
754 {
755 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
756 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
757 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
758 }
759 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
760 if (errmsg)
761 break;
762 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
763 if (errmsg)
764 break;
765 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
766 if (errmsg)
767 break;
768 }
769 break;
770 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
771 {
772 {
773 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
774 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
775 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
776 }
777 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
778 if (errmsg)
779 break;
780 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
781 if (errmsg)
782 break;
783 {
784 long value = fields->f_dsp_32_u16;
785 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
786 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
787 }
788 if (errmsg)
789 break;
790 }
791 break;
792 case M32C_OPERAND_BITNO16R :
793 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
794 break;
795 case M32C_OPERAND_BITNO32PREFIXED :
796 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
797 break;
798 case M32C_OPERAND_BITNO32UNPREFIXED :
799 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
800 break;
801 case M32C_OPERAND_DSP_10_U6 :
802 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
803 break;
804 case M32C_OPERAND_DSP_16_S16 :
805 {
806 long value = fields->f_dsp_16_s16;
807 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
808 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
809 }
810 break;
811 case M32C_OPERAND_DSP_16_S8 :
812 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
813 break;
814 case M32C_OPERAND_DSP_16_U16 :
815 {
816 long value = fields->f_dsp_16_u16;
817 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
818 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
819 }
820 break;
821 case M32C_OPERAND_DSP_16_U20 :
822 {
823 {
824 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
825 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
826 }
827 {
828 long value = fields->f_dsp_16_u16;
829 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
830 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
831 }
832 if (errmsg)
833 break;
834 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
835 if (errmsg)
836 break;
837 }
838 break;
839 case M32C_OPERAND_DSP_16_U24 :
840 {
841 {
842 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
843 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
844 }
845 {
846 long value = fields->f_dsp_16_u16;
847 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
848 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
849 }
850 if (errmsg)
851 break;
852 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
853 if (errmsg)
854 break;
855 }
856 break;
857 case M32C_OPERAND_DSP_16_U8 :
858 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
859 break;
860 case M32C_OPERAND_DSP_24_S16 :
861 {
862 {
863 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
864 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
865 }
866 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
867 if (errmsg)
868 break;
869 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
870 if (errmsg)
871 break;
872 }
873 break;
874 case M32C_OPERAND_DSP_24_S8 :
875 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
876 break;
877 case M32C_OPERAND_DSP_24_U16 :
878 {
879 {
880 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
881 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
882 }
883 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
884 if (errmsg)
885 break;
886 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
887 if (errmsg)
888 break;
889 }
890 break;
891 case M32C_OPERAND_DSP_24_U20 :
892 {
893 {
894 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
895 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
896 }
897 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
898 if (errmsg)
899 break;
900 {
901 long value = fields->f_dsp_32_u16;
902 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
903 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
904 }
905 if (errmsg)
906 break;
907 }
908 break;
909 case M32C_OPERAND_DSP_24_U24 :
910 {
911 {
912 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
913 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
914 }
915 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
916 if (errmsg)
917 break;
918 {
919 long value = fields->f_dsp_32_u16;
920 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
921 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
922 }
923 if (errmsg)
924 break;
925 }
926 break;
927 case M32C_OPERAND_DSP_24_U8 :
928 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
929 break;
930 case M32C_OPERAND_DSP_32_S16 :
931 {
932 long value = fields->f_dsp_32_s16;
933 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
934 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
935 }
936 break;
937 case M32C_OPERAND_DSP_32_S8 :
938 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
939 break;
940 case M32C_OPERAND_DSP_32_U16 :
941 {
942 long value = fields->f_dsp_32_u16;
943 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
944 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
945 }
946 break;
947 case M32C_OPERAND_DSP_32_U20 :
948 {
949 long value = fields->f_dsp_32_u24;
950 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
951 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
952 }
953 break;
954 case M32C_OPERAND_DSP_32_U24 :
955 {
956 long value = fields->f_dsp_32_u24;
957 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
958 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
959 }
960 break;
961 case M32C_OPERAND_DSP_32_U8 :
962 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
963 break;
964 case M32C_OPERAND_DSP_40_S16 :
965 {
966 long value = fields->f_dsp_40_s16;
967 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
968 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
969 }
970 break;
971 case M32C_OPERAND_DSP_40_S8 :
972 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
973 break;
974 case M32C_OPERAND_DSP_40_U16 :
975 {
976 long value = fields->f_dsp_40_u16;
977 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
978 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
979 }
980 break;
981 case M32C_OPERAND_DSP_40_U24 :
982 {
983 long value = fields->f_dsp_40_u24;
984 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
985 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
986 }
987 break;
988 case M32C_OPERAND_DSP_40_U8 :
989 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
990 break;
991 case M32C_OPERAND_DSP_48_S16 :
992 {
993 long value = fields->f_dsp_48_s16;
994 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
995 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
996 }
997 break;
998 case M32C_OPERAND_DSP_48_S8 :
999 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1000 break;
1001 case M32C_OPERAND_DSP_48_U16 :
1002 {
1003 long value = fields->f_dsp_48_u16;
1004 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1005 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1006 }
1007 break;
1008 case M32C_OPERAND_DSP_48_U24 :
1009 {
1010 {
1011 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1012 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1013 }
1014 {
1015 long value = fields->f_dsp_48_u16;
1016 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1017 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1018 }
1019 if (errmsg)
1020 break;
1021 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1022 if (errmsg)
1023 break;
1024 }
1025 break;
1026 case M32C_OPERAND_DSP_48_U8 :
1027 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1028 break;
1029 case M32C_OPERAND_DSP_8_S24 :
1030 {
1031 long value = fields->f_dsp_8_s24;
1032 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1033 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1034 }
1035 break;
1036 case M32C_OPERAND_DSP_8_S8 :
1037 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1038 break;
1039 case M32C_OPERAND_DSP_8_U16 :
1040 {
1041 long value = fields->f_dsp_8_u16;
1042 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1043 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1044 }
1045 break;
1046 case M32C_OPERAND_DSP_8_U24 :
1047 {
1048 long value = fields->f_dsp_8_u24;
1049 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1050 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1051 }
1052 break;
1053 case M32C_OPERAND_DSP_8_U6 :
1054 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1055 break;
1056 case M32C_OPERAND_DSP_8_U8 :
1057 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1058 break;
1059 case M32C_OPERAND_DST16AN :
1060 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1061 break;
1062 case M32C_OPERAND_DST16AN_S :
1063 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1064 break;
1065 case M32C_OPERAND_DST16ANHI :
1066 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1067 break;
1068 case M32C_OPERAND_DST16ANQI :
1069 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1070 break;
1071 case M32C_OPERAND_DST16ANQI_S :
1072 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1073 break;
1074 case M32C_OPERAND_DST16ANSI :
1075 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1076 break;
1077 case M32C_OPERAND_DST16RNEXTQI :
1078 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1079 break;
1080 case M32C_OPERAND_DST16RNHI :
1081 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1082 break;
1083 case M32C_OPERAND_DST16RNQI :
1084 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1085 break;
1086 case M32C_OPERAND_DST16RNQI_S :
1087 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1088 break;
1089 case M32C_OPERAND_DST16RNSI :
1090 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1091 break;
1092 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1093 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1094 break;
1095 case M32C_OPERAND_DST32ANPREFIXED :
1096 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1097 break;
1098 case M32C_OPERAND_DST32ANPREFIXEDHI :
1099 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1100 break;
1101 case M32C_OPERAND_DST32ANPREFIXEDQI :
1102 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1103 break;
1104 case M32C_OPERAND_DST32ANPREFIXEDSI :
1105 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1106 break;
1107 case M32C_OPERAND_DST32ANUNPREFIXED :
1108 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1109 break;
1110 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1111 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1112 break;
1113 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1114 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1115 break;
1116 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1117 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1118 break;
1119 case M32C_OPERAND_DST32R0HI_S :
1120 break;
1121 case M32C_OPERAND_DST32R0QI_S :
1122 break;
1123 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1124 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1125 break;
1126 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1127 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1128 break;
1129 case M32C_OPERAND_DST32RNPREFIXEDHI :
1130 {
1131 long value = fields->f_dst32_rn_prefixed_HI;
1132 value = ((((value) + (2))) % (4));
1133 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1134 }
1135 break;
1136 case M32C_OPERAND_DST32RNPREFIXEDQI :
1137 {
1138 long value = fields->f_dst32_rn_prefixed_QI;
1139 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1140 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1141 }
1142 break;
1143 case M32C_OPERAND_DST32RNPREFIXEDSI :
1144 {
1145 long value = fields->f_dst32_rn_prefixed_SI;
1146 value = ((value) + (2));
1147 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1148 }
1149 break;
1150 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1151 {
1152 long value = fields->f_dst32_rn_unprefixed_HI;
1153 value = ((((value) + (2))) % (4));
1154 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1155 }
1156 break;
1157 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1158 {
1159 long value = fields->f_dst32_rn_unprefixed_QI;
1160 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1161 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1162 }
1163 break;
1164 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1165 {
1166 long value = fields->f_dst32_rn_unprefixed_SI;
1167 value = ((value) + (2));
1168 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1169 }
1170 break;
1171 case M32C_OPERAND_G :
1172 break;
1173 case M32C_OPERAND_IMM_12_S4 :
1174 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1175 break;
1176 case M32C_OPERAND_IMM_12_S4N :
1177 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1178 break;
1179 case M32C_OPERAND_IMM_13_U3 :
1180 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1181 break;
1182 case M32C_OPERAND_IMM_16_HI :
1183 {
1184 long value = fields->f_dsp_16_s16;
1185 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1186 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1187 }
1188 break;
1189 case M32C_OPERAND_IMM_16_QI :
1190 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1191 break;
1192 case M32C_OPERAND_IMM_16_SI :
1193 {
1194 {
1195 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1196 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1197 }
1198 {
1199 long value = fields->f_dsp_16_u16;
1200 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1201 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1202 }
1203 if (errmsg)
1204 break;
1205 {
1206 long value = fields->f_dsp_32_u16;
1207 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1208 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1209 }
1210 if (errmsg)
1211 break;
1212 }
1213 break;
1214 case M32C_OPERAND_IMM_20_S4 :
1215 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1216 break;
1217 case M32C_OPERAND_IMM_24_HI :
1218 {
1219 {
1220 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1221 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1222 }
1223 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1224 if (errmsg)
1225 break;
1226 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1227 if (errmsg)
1228 break;
1229 }
1230 break;
1231 case M32C_OPERAND_IMM_24_QI :
1232 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1233 break;
1234 case M32C_OPERAND_IMM_24_SI :
1235 {
1236 {
1237 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1238 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1239 }
1240 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1241 if (errmsg)
1242 break;
1243 {
1244 long value = fields->f_dsp_32_u24;
1245 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1246 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1247 }
1248 if (errmsg)
1249 break;
1250 }
1251 break;
1252 case M32C_OPERAND_IMM_32_HI :
1253 {
1254 long value = fields->f_dsp_32_s16;
1255 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1256 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1257 }
1258 break;
1259 case M32C_OPERAND_IMM_32_QI :
1260 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1261 break;
1262 case M32C_OPERAND_IMM_32_SI :
1263 {
1264 long value = fields->f_dsp_32_s32;
1265 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1266 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1267 }
1268 break;
1269 case M32C_OPERAND_IMM_40_HI :
1270 {
1271 long value = fields->f_dsp_40_s16;
1272 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1273 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1274 }
1275 break;
1276 case M32C_OPERAND_IMM_40_QI :
1277 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1278 break;
1279 case M32C_OPERAND_IMM_40_SI :
1280 {
1281 {
1282 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1283 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1284 }
1285 {
1286 long value = fields->f_dsp_40_u24;
1287 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1288 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1289 }
1290 if (errmsg)
1291 break;
1292 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1293 if (errmsg)
1294 break;
1295 }
1296 break;
1297 case M32C_OPERAND_IMM_48_HI :
1298 {
1299 long value = fields->f_dsp_48_s16;
1300 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1301 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1302 }
1303 break;
1304 case M32C_OPERAND_IMM_48_QI :
1305 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1306 break;
1307 case M32C_OPERAND_IMM_48_SI :
1308 {
1309 {
1310 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1311 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1312 }
1313 {
1314 long value = fields->f_dsp_48_u16;
1315 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1316 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1317 }
1318 if (errmsg)
1319 break;
1320 {
1321 long value = fields->f_dsp_64_u16;
1322 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1323 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1324 }
1325 if (errmsg)
1326 break;
1327 }
1328 break;
1329 case M32C_OPERAND_IMM_56_HI :
1330 {
1331 {
1332 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1333 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1334 }
1335 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1336 if (errmsg)
1337 break;
1338 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1339 if (errmsg)
1340 break;
1341 }
1342 break;
1343 case M32C_OPERAND_IMM_56_QI :
1344 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1345 break;
1346 case M32C_OPERAND_IMM_64_HI :
1347 {
1348 long value = fields->f_dsp_64_s16;
1349 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1350 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1351 }
1352 break;
1353 case M32C_OPERAND_IMM_8_HI :
1354 {
1355 long value = fields->f_dsp_8_s16;
1356 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1357 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1358 }
1359 break;
1360 case M32C_OPERAND_IMM_8_QI :
1361 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1362 break;
1363 case M32C_OPERAND_IMM_8_S4 :
1364 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1365 break;
1366 case M32C_OPERAND_IMM_8_S4N :
1367 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1368 break;
1369 case M32C_OPERAND_IMM_SH_12_S4 :
1370 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1371 break;
1372 case M32C_OPERAND_IMM_SH_20_S4 :
1373 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1374 break;
1375 case M32C_OPERAND_IMM_SH_8_S4 :
1376 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1377 break;
1378 case M32C_OPERAND_IMM1_S :
1379 {
1380 long value = fields->f_imm1_S;
1381 value = ((value) - (1));
1382 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1383 }
1384 break;
1385 case M32C_OPERAND_IMM3_S :
1386 {
1387 {
1388 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1389 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1390 }
1391 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1392 if (errmsg)
1393 break;
1394 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1395 if (errmsg)
1396 break;
1397 }
1398 break;
1399 case M32C_OPERAND_LAB_16_8 :
1400 {
1401 long value = fields->f_lab_16_8;
1402 value = ((value) - (((pc) + (2))));
1403 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1404 }
1405 break;
1406 case M32C_OPERAND_LAB_24_8 :
1407 {
1408 long value = fields->f_lab_24_8;
1409 value = ((value) - (((pc) + (2))));
1410 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1411 }
1412 break;
1413 case M32C_OPERAND_LAB_32_8 :
1414 {
1415 long value = fields->f_lab_32_8;
1416 value = ((value) - (((pc) + (2))));
1417 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1418 }
1419 break;
1420 case M32C_OPERAND_LAB_40_8 :
1421 {
1422 long value = fields->f_lab_40_8;
1423 value = ((value) - (((pc) + (2))));
1424 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1425 }
1426 break;
1427 case M32C_OPERAND_LAB_5_3 :
1428 {
1429 long value = fields->f_lab_5_3;
1430 value = ((value) - (((pc) + (2))));
1431 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1432 }
1433 break;
1434 case M32C_OPERAND_LAB_8_16 :
1435 {
1436 long value = fields->f_lab_8_16;
1437 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1438 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1439 }
1440 break;
1441 case M32C_OPERAND_LAB_8_24 :
1442 {
1443 long value = fields->f_lab_8_24;
1444 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1445 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1446 }
1447 break;
1448 case M32C_OPERAND_LAB_8_8 :
1449 {
1450 long value = fields->f_lab_8_8;
1451 value = ((value) - (((pc) + (1))));
1452 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1453 }
1454 break;
1455 case M32C_OPERAND_LAB32_JMP_S :
1456 {
1457 {
1458 SI tmp_val;
1459 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1460 FLD (f_7_1) = ((tmp_val) & (1));
1461 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
1462 }
1463 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1464 if (errmsg)
1465 break;
1466 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1467 if (errmsg)
1468 break;
1469 }
1470 break;
1471 case M32C_OPERAND_Q :
1472 break;
1473 case M32C_OPERAND_R0 :
1474 break;
1475 case M32C_OPERAND_R0H :
1476 break;
1477 case M32C_OPERAND_R0L :
1478 break;
1479 case M32C_OPERAND_R1 :
1480 break;
1481 case M32C_OPERAND_R1R2R0 :
1482 break;
1483 case M32C_OPERAND_R2 :
1484 break;
1485 case M32C_OPERAND_R2R0 :
1486 break;
1487 case M32C_OPERAND_R3 :
1488 break;
1489 case M32C_OPERAND_R3R1 :
1490 break;
1491 case M32C_OPERAND_REGSETPOP :
1492 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1493 break;
1494 case M32C_OPERAND_REGSETPUSH :
1495 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1496 break;
1497 case M32C_OPERAND_RN16_PUSH_S :
1498 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1499 break;
1500 case M32C_OPERAND_S :
1501 break;
1502 case M32C_OPERAND_SRC16AN :
1503 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1504 break;
1505 case M32C_OPERAND_SRC16ANHI :
1506 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1507 break;
1508 case M32C_OPERAND_SRC16ANQI :
1509 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1510 break;
1511 case M32C_OPERAND_SRC16RNHI :
1512 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1513 break;
1514 case M32C_OPERAND_SRC16RNQI :
1515 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1516 break;
1517 case M32C_OPERAND_SRC32ANPREFIXED :
1518 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1519 break;
1520 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1521 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1522 break;
1523 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1524 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1525 break;
1526 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1527 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1528 break;
1529 case M32C_OPERAND_SRC32ANUNPREFIXED :
1530 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1531 break;
1532 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1533 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1534 break;
1535 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1536 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1537 break;
1538 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1539 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1540 break;
1541 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1542 {
1543 long value = fields->f_src32_rn_prefixed_HI;
1544 value = ((((value) + (2))) % (4));
1545 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1546 }
1547 break;
1548 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1549 {
1550 long value = fields->f_src32_rn_prefixed_QI;
1551 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1552 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1553 }
1554 break;
1555 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1556 {
1557 long value = fields->f_src32_rn_prefixed_SI;
1558 value = ((value) + (2));
1559 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1560 }
1561 break;
1562 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1563 {
1564 long value = fields->f_src32_rn_unprefixed_HI;
1565 value = ((((value) + (2))) % (4));
1566 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1567 }
1568 break;
1569 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1570 {
1571 long value = fields->f_src32_rn_unprefixed_QI;
1572 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1573 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1574 }
1575 break;
1576 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1577 {
1578 long value = fields->f_src32_rn_unprefixed_SI;
1579 value = ((value) + (2));
1580 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1581 }
1582 break;
1583 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1584 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1585 break;
1586 case M32C_OPERAND_X :
1587 break;
1588 case M32C_OPERAND_Z :
1589 break;
1590 case M32C_OPERAND_COND16_16 :
1591 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1592 break;
1593 case M32C_OPERAND_COND16_24 :
1594 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1595 break;
1596 case M32C_OPERAND_COND16_32 :
1597 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1598 break;
1599 case M32C_OPERAND_COND16C :
1600 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1601 break;
1602 case M32C_OPERAND_COND16J :
1603 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1604 break;
1605 case M32C_OPERAND_COND16J5 :
1606 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1607 break;
1608 case M32C_OPERAND_COND32 :
1609 {
1610 {
1611 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1612 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1613 }
1614 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1615 if (errmsg)
1616 break;
1617 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1618 if (errmsg)
1619 break;
1620 }
1621 break;
1622 case M32C_OPERAND_COND32_16 :
1623 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1624 break;
1625 case M32C_OPERAND_COND32_24 :
1626 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1627 break;
1628 case M32C_OPERAND_COND32_32 :
1629 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1630 break;
1631 case M32C_OPERAND_COND32_40 :
1632 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1633 break;
1634 case M32C_OPERAND_COND32J :
1635 {
1636 {
1637 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1638 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1639 }
1640 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1641 if (errmsg)
1642 break;
1643 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1644 if (errmsg)
1645 break;
1646 }
1647 break;
1648 case M32C_OPERAND_CR1_PREFIXED_32 :
1649 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1650 break;
1651 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1652 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1653 break;
1654 case M32C_OPERAND_CR16 :
1655 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1656 break;
1657 case M32C_OPERAND_CR2_32 :
1658 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1659 break;
1660 case M32C_OPERAND_CR3_PREFIXED_32 :
1661 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1662 break;
1663 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1664 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1665 break;
1666 case M32C_OPERAND_FLAGS16 :
1667 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1668 break;
1669 case M32C_OPERAND_FLAGS32 :
1670 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1671 break;
1672 case M32C_OPERAND_SCCOND32 :
1673 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1674 break;
1675 case M32C_OPERAND_SIZE :
1676 break;
1677
1678 default :
1679 /* xgettext:c-format */
1680 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1681 opindex);
1682 abort ();
1683 }
1684
1685 return errmsg;
1686 }
1687
1688 int m32c_cgen_extract_operand
1689 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1690
1691 /* Main entry point for operand extraction.
1692 The result is <= 0 for error, >0 for success.
1693 ??? Actual values aren't well defined right now.
1694
1695 This function is basically just a big switch statement. Earlier versions
1696 used tables to look up the function to use, but
1697 - if the table contains both assembler and disassembler functions then
1698 the disassembler contains much of the assembler and vice-versa,
1699 - there's a lot of inlining possibilities as things grow,
1700 - using a switch statement avoids the function call overhead.
1701
1702 This function could be moved into `print_insn_normal', but keeping it
1703 separate makes clear the interface between `print_insn_normal' and each of
1704 the handlers. */
1705
1706 int
1707 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1708 int opindex,
1709 CGEN_EXTRACT_INFO *ex_info,
1710 CGEN_INSN_INT insn_value,
1711 CGEN_FIELDS * fields,
1712 bfd_vma pc)
1713 {
1714 /* Assume success (for those operands that are nops). */
1715 int length = 1;
1716 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1717
1718 switch (opindex)
1719 {
1720 case M32C_OPERAND_A0 :
1721 break;
1722 case M32C_OPERAND_A1 :
1723 break;
1724 case M32C_OPERAND_AN16_PUSH_S :
1725 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1726 break;
1727 case M32C_OPERAND_BIT16AN :
1728 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1729 break;
1730 case M32C_OPERAND_BIT16RN :
1731 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1732 break;
1733 case M32C_OPERAND_BIT32ANPREFIXED :
1734 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1735 break;
1736 case M32C_OPERAND_BIT32ANUNPREFIXED :
1737 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1738 break;
1739 case M32C_OPERAND_BIT32RNPREFIXED :
1740 {
1741 long value;
1742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1743 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1744 fields->f_dst32_rn_prefixed_QI = value;
1745 }
1746 break;
1747 case M32C_OPERAND_BIT32RNUNPREFIXED :
1748 {
1749 long value;
1750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1751 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1752 fields->f_dst32_rn_unprefixed_QI = value;
1753 }
1754 break;
1755 case M32C_OPERAND_BITBASE16_16_S8 :
1756 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1757 break;
1758 case M32C_OPERAND_BITBASE16_16_U16 :
1759 {
1760 long value;
1761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1762 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1763 fields->f_dsp_16_u16 = value;
1764 }
1765 break;
1766 case M32C_OPERAND_BITBASE16_16_U8 :
1767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1768 break;
1769 case M32C_OPERAND_BITBASE16_8_U11_S :
1770 {
1771 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1772 if (length <= 0) break;
1773 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1774 if (length <= 0) break;
1775 {
1776 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1777 }
1778 }
1779 break;
1780 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1781 {
1782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1783 if (length <= 0) break;
1784 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1785 if (length <= 0) break;
1786 {
1787 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1788 }
1789 }
1790 break;
1791 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1792 {
1793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1794 if (length <= 0) break;
1795 {
1796 long value;
1797 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1798 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1799 fields->f_dsp_16_s16 = value;
1800 }
1801 if (length <= 0) break;
1802 {
1803 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1804 }
1805 }
1806 break;
1807 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1808 {
1809 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1810 if (length <= 0) break;
1811 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1812 if (length <= 0) break;
1813 {
1814 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1815 }
1816 }
1817 break;
1818 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1819 {
1820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1821 if (length <= 0) break;
1822 {
1823 long value;
1824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1825 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1826 fields->f_dsp_16_u16 = value;
1827 }
1828 if (length <= 0) break;
1829 {
1830 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1831 }
1832 }
1833 break;
1834 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1835 {
1836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1837 if (length <= 0) break;
1838 {
1839 long value;
1840 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1841 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1842 fields->f_dsp_16_u16 = value;
1843 }
1844 if (length <= 0) break;
1845 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1846 if (length <= 0) break;
1847 {
1848 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1849 }
1850 }
1851 break;
1852 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1853 {
1854 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1855 if (length <= 0) break;
1856 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1857 if (length <= 0) break;
1858 {
1859 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1860 }
1861 }
1862 break;
1863 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1864 {
1865 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1866 if (length <= 0) break;
1867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1868 if (length <= 0) break;
1869 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1870 if (length <= 0) break;
1871 {
1872 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1873 }
1874 }
1875 break;
1876 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1877 {
1878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1879 if (length <= 0) break;
1880 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1881 if (length <= 0) break;
1882 {
1883 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1884 }
1885 }
1886 break;
1887 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1888 {
1889 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1890 if (length <= 0) break;
1891 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1892 if (length <= 0) break;
1893 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1894 if (length <= 0) break;
1895 {
1896 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1897 }
1898 }
1899 break;
1900 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1901 {
1902 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1903 if (length <= 0) break;
1904 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1905 if (length <= 0) break;
1906 {
1907 long value;
1908 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1909 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1910 fields->f_dsp_32_u16 = value;
1911 }
1912 if (length <= 0) break;
1913 {
1914 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1915 }
1916 }
1917 break;
1918 case M32C_OPERAND_BITNO16R :
1919 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1920 break;
1921 case M32C_OPERAND_BITNO32PREFIXED :
1922 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1923 break;
1924 case M32C_OPERAND_BITNO32UNPREFIXED :
1925 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1926 break;
1927 case M32C_OPERAND_DSP_10_U6 :
1928 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1929 break;
1930 case M32C_OPERAND_DSP_16_S16 :
1931 {
1932 long value;
1933 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1934 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1935 fields->f_dsp_16_s16 = value;
1936 }
1937 break;
1938 case M32C_OPERAND_DSP_16_S8 :
1939 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1940 break;
1941 case M32C_OPERAND_DSP_16_U16 :
1942 {
1943 long value;
1944 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1945 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1946 fields->f_dsp_16_u16 = value;
1947 }
1948 break;
1949 case M32C_OPERAND_DSP_16_U20 :
1950 {
1951 {
1952 long value;
1953 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1954 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1955 fields->f_dsp_16_u16 = value;
1956 }
1957 if (length <= 0) break;
1958 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1959 if (length <= 0) break;
1960 {
1961 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1962 }
1963 }
1964 break;
1965 case M32C_OPERAND_DSP_16_U24 :
1966 {
1967 {
1968 long value;
1969 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1970 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1971 fields->f_dsp_16_u16 = value;
1972 }
1973 if (length <= 0) break;
1974 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1975 if (length <= 0) break;
1976 {
1977 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1978 }
1979 }
1980 break;
1981 case M32C_OPERAND_DSP_16_U8 :
1982 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1983 break;
1984 case M32C_OPERAND_DSP_24_S16 :
1985 {
1986 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1987 if (length <= 0) break;
1988 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1989 if (length <= 0) break;
1990 {
1991 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
1992 }
1993 }
1994 break;
1995 case M32C_OPERAND_DSP_24_S8 :
1996 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1997 break;
1998 case M32C_OPERAND_DSP_24_U16 :
1999 {
2000 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2001 if (length <= 0) break;
2002 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2003 if (length <= 0) break;
2004 {
2005 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2006 }
2007 }
2008 break;
2009 case M32C_OPERAND_DSP_24_U20 :
2010 {
2011 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2012 if (length <= 0) break;
2013 {
2014 long value;
2015 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2016 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2017 fields->f_dsp_32_u16 = value;
2018 }
2019 if (length <= 0) break;
2020 {
2021 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2022 }
2023 }
2024 break;
2025 case M32C_OPERAND_DSP_24_U24 :
2026 {
2027 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2028 if (length <= 0) break;
2029 {
2030 long value;
2031 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2032 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2033 fields->f_dsp_32_u16 = value;
2034 }
2035 if (length <= 0) break;
2036 {
2037 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2038 }
2039 }
2040 break;
2041 case M32C_OPERAND_DSP_24_U8 :
2042 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2043 break;
2044 case M32C_OPERAND_DSP_32_S16 :
2045 {
2046 long value;
2047 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2048 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2049 fields->f_dsp_32_s16 = value;
2050 }
2051 break;
2052 case M32C_OPERAND_DSP_32_S8 :
2053 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2054 break;
2055 case M32C_OPERAND_DSP_32_U16 :
2056 {
2057 long value;
2058 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2059 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2060 fields->f_dsp_32_u16 = value;
2061 }
2062 break;
2063 case M32C_OPERAND_DSP_32_U20 :
2064 {
2065 long value;
2066 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2067 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2068 fields->f_dsp_32_u24 = value;
2069 }
2070 break;
2071 case M32C_OPERAND_DSP_32_U24 :
2072 {
2073 long value;
2074 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2075 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2076 fields->f_dsp_32_u24 = value;
2077 }
2078 break;
2079 case M32C_OPERAND_DSP_32_U8 :
2080 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2081 break;
2082 case M32C_OPERAND_DSP_40_S16 :
2083 {
2084 long value;
2085 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2086 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2087 fields->f_dsp_40_s16 = value;
2088 }
2089 break;
2090 case M32C_OPERAND_DSP_40_S8 :
2091 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2092 break;
2093 case M32C_OPERAND_DSP_40_U16 :
2094 {
2095 long value;
2096 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2097 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2098 fields->f_dsp_40_u16 = value;
2099 }
2100 break;
2101 case M32C_OPERAND_DSP_40_U24 :
2102 {
2103 long value;
2104 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2105 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2106 fields->f_dsp_40_u24 = value;
2107 }
2108 break;
2109 case M32C_OPERAND_DSP_40_U8 :
2110 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2111 break;
2112 case M32C_OPERAND_DSP_48_S16 :
2113 {
2114 long value;
2115 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2116 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2117 fields->f_dsp_48_s16 = value;
2118 }
2119 break;
2120 case M32C_OPERAND_DSP_48_S8 :
2121 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2122 break;
2123 case M32C_OPERAND_DSP_48_U16 :
2124 {
2125 long value;
2126 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2127 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2128 fields->f_dsp_48_u16 = value;
2129 }
2130 break;
2131 case M32C_OPERAND_DSP_48_U24 :
2132 {
2133 {
2134 long value;
2135 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2136 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2137 fields->f_dsp_48_u16 = value;
2138 }
2139 if (length <= 0) break;
2140 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2141 if (length <= 0) break;
2142 {
2143 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2144 }
2145 }
2146 break;
2147 case M32C_OPERAND_DSP_48_U8 :
2148 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2149 break;
2150 case M32C_OPERAND_DSP_8_S24 :
2151 {
2152 long value;
2153 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2154 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2155 fields->f_dsp_8_s24 = value;
2156 }
2157 break;
2158 case M32C_OPERAND_DSP_8_S8 :
2159 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2160 break;
2161 case M32C_OPERAND_DSP_8_U16 :
2162 {
2163 long value;
2164 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2165 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2166 fields->f_dsp_8_u16 = value;
2167 }
2168 break;
2169 case M32C_OPERAND_DSP_8_U24 :
2170 {
2171 long value;
2172 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2173 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2174 fields->f_dsp_8_u24 = value;
2175 }
2176 break;
2177 case M32C_OPERAND_DSP_8_U6 :
2178 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2179 break;
2180 case M32C_OPERAND_DSP_8_U8 :
2181 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2182 break;
2183 case M32C_OPERAND_DST16AN :
2184 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2185 break;
2186 case M32C_OPERAND_DST16AN_S :
2187 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2188 break;
2189 case M32C_OPERAND_DST16ANHI :
2190 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2191 break;
2192 case M32C_OPERAND_DST16ANQI :
2193 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2194 break;
2195 case M32C_OPERAND_DST16ANQI_S :
2196 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2197 break;
2198 case M32C_OPERAND_DST16ANSI :
2199 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2200 break;
2201 case M32C_OPERAND_DST16RNEXTQI :
2202 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2203 break;
2204 case M32C_OPERAND_DST16RNHI :
2205 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2206 break;
2207 case M32C_OPERAND_DST16RNQI :
2208 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2209 break;
2210 case M32C_OPERAND_DST16RNQI_S :
2211 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2212 break;
2213 case M32C_OPERAND_DST16RNSI :
2214 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2215 break;
2216 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2217 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2218 break;
2219 case M32C_OPERAND_DST32ANPREFIXED :
2220 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2221 break;
2222 case M32C_OPERAND_DST32ANPREFIXEDHI :
2223 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2224 break;
2225 case M32C_OPERAND_DST32ANPREFIXEDQI :
2226 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2227 break;
2228 case M32C_OPERAND_DST32ANPREFIXEDSI :
2229 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2230 break;
2231 case M32C_OPERAND_DST32ANUNPREFIXED :
2232 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2233 break;
2234 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2235 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2236 break;
2237 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2238 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2239 break;
2240 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2241 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2242 break;
2243 case M32C_OPERAND_DST32R0HI_S :
2244 break;
2245 case M32C_OPERAND_DST32R0QI_S :
2246 break;
2247 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2248 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2249 break;
2250 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2251 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2252 break;
2253 case M32C_OPERAND_DST32RNPREFIXEDHI :
2254 {
2255 long value;
2256 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2257 value = ((((value) + (2))) % (4));
2258 fields->f_dst32_rn_prefixed_HI = value;
2259 }
2260 break;
2261 case M32C_OPERAND_DST32RNPREFIXEDQI :
2262 {
2263 long value;
2264 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2265 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2266 fields->f_dst32_rn_prefixed_QI = value;
2267 }
2268 break;
2269 case M32C_OPERAND_DST32RNPREFIXEDSI :
2270 {
2271 long value;
2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2273 value = ((value) - (2));
2274 fields->f_dst32_rn_prefixed_SI = value;
2275 }
2276 break;
2277 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2278 {
2279 long value;
2280 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2281 value = ((((value) + (2))) % (4));
2282 fields->f_dst32_rn_unprefixed_HI = value;
2283 }
2284 break;
2285 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2286 {
2287 long value;
2288 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2289 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2290 fields->f_dst32_rn_unprefixed_QI = value;
2291 }
2292 break;
2293 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2294 {
2295 long value;
2296 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2297 value = ((value) - (2));
2298 fields->f_dst32_rn_unprefixed_SI = value;
2299 }
2300 break;
2301 case M32C_OPERAND_G :
2302 break;
2303 case M32C_OPERAND_IMM_12_S4 :
2304 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2305 break;
2306 case M32C_OPERAND_IMM_12_S4N :
2307 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2308 break;
2309 case M32C_OPERAND_IMM_13_U3 :
2310 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2311 break;
2312 case M32C_OPERAND_IMM_16_HI :
2313 {
2314 long value;
2315 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2316 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2317 fields->f_dsp_16_s16 = value;
2318 }
2319 break;
2320 case M32C_OPERAND_IMM_16_QI :
2321 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2322 break;
2323 case M32C_OPERAND_IMM_16_SI :
2324 {
2325 {
2326 long value;
2327 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2328 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2329 fields->f_dsp_16_u16 = value;
2330 }
2331 if (length <= 0) break;
2332 {
2333 long value;
2334 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2335 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2336 fields->f_dsp_32_u16 = value;
2337 }
2338 if (length <= 0) break;
2339 {
2340 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2341 }
2342 }
2343 break;
2344 case M32C_OPERAND_IMM_20_S4 :
2345 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2346 break;
2347 case M32C_OPERAND_IMM_24_HI :
2348 {
2349 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2350 if (length <= 0) break;
2351 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2352 if (length <= 0) break;
2353 {
2354 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2355 }
2356 }
2357 break;
2358 case M32C_OPERAND_IMM_24_QI :
2359 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2360 break;
2361 case M32C_OPERAND_IMM_24_SI :
2362 {
2363 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2364 if (length <= 0) break;
2365 {
2366 long value;
2367 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2368 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2369 fields->f_dsp_32_u24 = value;
2370 }
2371 if (length <= 0) break;
2372 {
2373 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2374 }
2375 }
2376 break;
2377 case M32C_OPERAND_IMM_32_HI :
2378 {
2379 long value;
2380 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2381 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2382 fields->f_dsp_32_s16 = value;
2383 }
2384 break;
2385 case M32C_OPERAND_IMM_32_QI :
2386 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2387 break;
2388 case M32C_OPERAND_IMM_32_SI :
2389 {
2390 long value;
2391 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2392 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2393 fields->f_dsp_32_s32 = value;
2394 }
2395 break;
2396 case M32C_OPERAND_IMM_40_HI :
2397 {
2398 long value;
2399 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2400 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2401 fields->f_dsp_40_s16 = value;
2402 }
2403 break;
2404 case M32C_OPERAND_IMM_40_QI :
2405 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2406 break;
2407 case M32C_OPERAND_IMM_40_SI :
2408 {
2409 {
2410 long value;
2411 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2412 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2413 fields->f_dsp_40_u24 = value;
2414 }
2415 if (length <= 0) break;
2416 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2417 if (length <= 0) break;
2418 {
2419 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2420 }
2421 }
2422 break;
2423 case M32C_OPERAND_IMM_48_HI :
2424 {
2425 long value;
2426 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2427 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2428 fields->f_dsp_48_s16 = value;
2429 }
2430 break;
2431 case M32C_OPERAND_IMM_48_QI :
2432 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2433 break;
2434 case M32C_OPERAND_IMM_48_SI :
2435 {
2436 {
2437 long value;
2438 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2439 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2440 fields->f_dsp_48_u16 = value;
2441 }
2442 if (length <= 0) break;
2443 {
2444 long value;
2445 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2446 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2447 fields->f_dsp_64_u16 = value;
2448 }
2449 if (length <= 0) break;
2450 {
2451 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2452 }
2453 }
2454 break;
2455 case M32C_OPERAND_IMM_56_HI :
2456 {
2457 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2458 if (length <= 0) break;
2459 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2460 if (length <= 0) break;
2461 {
2462 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2463 }
2464 }
2465 break;
2466 case M32C_OPERAND_IMM_56_QI :
2467 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2468 break;
2469 case M32C_OPERAND_IMM_64_HI :
2470 {
2471 long value;
2472 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2473 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2474 fields->f_dsp_64_s16 = value;
2475 }
2476 break;
2477 case M32C_OPERAND_IMM_8_HI :
2478 {
2479 long value;
2480 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2481 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2482 fields->f_dsp_8_s16 = value;
2483 }
2484 break;
2485 case M32C_OPERAND_IMM_8_QI :
2486 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2487 break;
2488 case M32C_OPERAND_IMM_8_S4 :
2489 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2490 break;
2491 case M32C_OPERAND_IMM_8_S4N :
2492 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2493 break;
2494 case M32C_OPERAND_IMM_SH_12_S4 :
2495 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2496 break;
2497 case M32C_OPERAND_IMM_SH_20_S4 :
2498 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2499 break;
2500 case M32C_OPERAND_IMM_SH_8_S4 :
2501 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2502 break;
2503 case M32C_OPERAND_IMM1_S :
2504 {
2505 long value;
2506 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2507 value = ((value) + (1));
2508 fields->f_imm1_S = value;
2509 }
2510 break;
2511 case M32C_OPERAND_IMM3_S :
2512 {
2513 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2514 if (length <= 0) break;
2515 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2516 if (length <= 0) break;
2517 {
2518 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2519 }
2520 }
2521 break;
2522 case M32C_OPERAND_LAB_16_8 :
2523 {
2524 long value;
2525 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2526 value = ((value) + (((pc) + (2))));
2527 fields->f_lab_16_8 = value;
2528 }
2529 break;
2530 case M32C_OPERAND_LAB_24_8 :
2531 {
2532 long value;
2533 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2534 value = ((value) + (((pc) + (2))));
2535 fields->f_lab_24_8 = value;
2536 }
2537 break;
2538 case M32C_OPERAND_LAB_32_8 :
2539 {
2540 long value;
2541 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2542 value = ((value) + (((pc) + (2))));
2543 fields->f_lab_32_8 = value;
2544 }
2545 break;
2546 case M32C_OPERAND_LAB_40_8 :
2547 {
2548 long value;
2549 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2550 value = ((value) + (((pc) + (2))));
2551 fields->f_lab_40_8 = value;
2552 }
2553 break;
2554 case M32C_OPERAND_LAB_5_3 :
2555 {
2556 long value;
2557 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2558 value = ((value) + (((pc) + (2))));
2559 fields->f_lab_5_3 = value;
2560 }
2561 break;
2562 case M32C_OPERAND_LAB_8_16 :
2563 {
2564 long value;
2565 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2566 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2567 fields->f_lab_8_16 = value;
2568 }
2569 break;
2570 case M32C_OPERAND_LAB_8_24 :
2571 {
2572 long value;
2573 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2574 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2575 fields->f_lab_8_24 = value;
2576 }
2577 break;
2578 case M32C_OPERAND_LAB_8_8 :
2579 {
2580 long value;
2581 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2582 value = ((value) + (((pc) + (1))));
2583 fields->f_lab_8_8 = value;
2584 }
2585 break;
2586 case M32C_OPERAND_LAB32_JMP_S :
2587 {
2588 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2589 if (length <= 0) break;
2590 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2591 if (length <= 0) break;
2592 {
2593 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2594 }
2595 }
2596 break;
2597 case M32C_OPERAND_Q :
2598 break;
2599 case M32C_OPERAND_R0 :
2600 break;
2601 case M32C_OPERAND_R0H :
2602 break;
2603 case M32C_OPERAND_R0L :
2604 break;
2605 case M32C_OPERAND_R1 :
2606 break;
2607 case M32C_OPERAND_R1R2R0 :
2608 break;
2609 case M32C_OPERAND_R2 :
2610 break;
2611 case M32C_OPERAND_R2R0 :
2612 break;
2613 case M32C_OPERAND_R3 :
2614 break;
2615 case M32C_OPERAND_R3R1 :
2616 break;
2617 case M32C_OPERAND_REGSETPOP :
2618 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2619 break;
2620 case M32C_OPERAND_REGSETPUSH :
2621 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2622 break;
2623 case M32C_OPERAND_RN16_PUSH_S :
2624 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2625 break;
2626 case M32C_OPERAND_S :
2627 break;
2628 case M32C_OPERAND_SRC16AN :
2629 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2630 break;
2631 case M32C_OPERAND_SRC16ANHI :
2632 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2633 break;
2634 case M32C_OPERAND_SRC16ANQI :
2635 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2636 break;
2637 case M32C_OPERAND_SRC16RNHI :
2638 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2639 break;
2640 case M32C_OPERAND_SRC16RNQI :
2641 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2642 break;
2643 case M32C_OPERAND_SRC32ANPREFIXED :
2644 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2645 break;
2646 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2647 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2648 break;
2649 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2650 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2651 break;
2652 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2653 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2654 break;
2655 case M32C_OPERAND_SRC32ANUNPREFIXED :
2656 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2657 break;
2658 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2659 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2660 break;
2661 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2662 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2663 break;
2664 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2665 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2666 break;
2667 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2668 {
2669 long value;
2670 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2671 value = ((((value) + (2))) % (4));
2672 fields->f_src32_rn_prefixed_HI = value;
2673 }
2674 break;
2675 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2676 {
2677 long value;
2678 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2679 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2680 fields->f_src32_rn_prefixed_QI = value;
2681 }
2682 break;
2683 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2684 {
2685 long value;
2686 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2687 value = ((value) - (2));
2688 fields->f_src32_rn_prefixed_SI = value;
2689 }
2690 break;
2691 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2692 {
2693 long value;
2694 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2695 value = ((((value) + (2))) % (4));
2696 fields->f_src32_rn_unprefixed_HI = value;
2697 }
2698 break;
2699 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2700 {
2701 long value;
2702 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2703 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2704 fields->f_src32_rn_unprefixed_QI = value;
2705 }
2706 break;
2707 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2708 {
2709 long value;
2710 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2711 value = ((value) - (2));
2712 fields->f_src32_rn_unprefixed_SI = value;
2713 }
2714 break;
2715 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2716 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2717 break;
2718 case M32C_OPERAND_X :
2719 break;
2720 case M32C_OPERAND_Z :
2721 break;
2722 case M32C_OPERAND_COND16_16 :
2723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2724 break;
2725 case M32C_OPERAND_COND16_24 :
2726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2727 break;
2728 case M32C_OPERAND_COND16_32 :
2729 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2730 break;
2731 case M32C_OPERAND_COND16C :
2732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2733 break;
2734 case M32C_OPERAND_COND16J :
2735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2736 break;
2737 case M32C_OPERAND_COND16J5 :
2738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2739 break;
2740 case M32C_OPERAND_COND32 :
2741 {
2742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2743 if (length <= 0) break;
2744 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2745 if (length <= 0) break;
2746 {
2747 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2748 }
2749 }
2750 break;
2751 case M32C_OPERAND_COND32_16 :
2752 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2753 break;
2754 case M32C_OPERAND_COND32_24 :
2755 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2756 break;
2757 case M32C_OPERAND_COND32_32 :
2758 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2759 break;
2760 case M32C_OPERAND_COND32_40 :
2761 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2762 break;
2763 case M32C_OPERAND_COND32J :
2764 {
2765 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2766 if (length <= 0) break;
2767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2768 if (length <= 0) break;
2769 {
2770 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2771 }
2772 }
2773 break;
2774 case M32C_OPERAND_CR1_PREFIXED_32 :
2775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2776 break;
2777 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2778 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2779 break;
2780 case M32C_OPERAND_CR16 :
2781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2782 break;
2783 case M32C_OPERAND_CR2_32 :
2784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2785 break;
2786 case M32C_OPERAND_CR3_PREFIXED_32 :
2787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2788 break;
2789 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2790 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2791 break;
2792 case M32C_OPERAND_FLAGS16 :
2793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2794 break;
2795 case M32C_OPERAND_FLAGS32 :
2796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2797 break;
2798 case M32C_OPERAND_SCCOND32 :
2799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2800 break;
2801 case M32C_OPERAND_SIZE :
2802 break;
2803
2804 default :
2805 /* xgettext:c-format */
2806 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2807 opindex);
2808 abort ();
2809 }
2810
2811 return length;
2812 }
2813
2814 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2815 {
2816 insert_insn_normal,
2817 };
2818
2819 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2820 {
2821 extract_insn_normal,
2822 };
2823
2824 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2825 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2826
2827 /* Getting values from cgen_fields is handled by a collection of functions.
2828 They are distinguished by the type of the VALUE argument they return.
2829 TODO: floating point, inlining support, remove cases where result type
2830 not appropriate. */
2831
2832 int
2833 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2834 int opindex,
2835 const CGEN_FIELDS * fields)
2836 {
2837 int value;
2838
2839 switch (opindex)
2840 {
2841 case M32C_OPERAND_A0 :
2842 value = 0;
2843 break;
2844 case M32C_OPERAND_A1 :
2845 value = 0;
2846 break;
2847 case M32C_OPERAND_AN16_PUSH_S :
2848 value = fields->f_4_1;
2849 break;
2850 case M32C_OPERAND_BIT16AN :
2851 value = fields->f_dst16_an;
2852 break;
2853 case M32C_OPERAND_BIT16RN :
2854 value = fields->f_dst16_rn;
2855 break;
2856 case M32C_OPERAND_BIT32ANPREFIXED :
2857 value = fields->f_dst32_an_prefixed;
2858 break;
2859 case M32C_OPERAND_BIT32ANUNPREFIXED :
2860 value = fields->f_dst32_an_unprefixed;
2861 break;
2862 case M32C_OPERAND_BIT32RNPREFIXED :
2863 value = fields->f_dst32_rn_prefixed_QI;
2864 break;
2865 case M32C_OPERAND_BIT32RNUNPREFIXED :
2866 value = fields->f_dst32_rn_unprefixed_QI;
2867 break;
2868 case M32C_OPERAND_BITBASE16_16_S8 :
2869 value = fields->f_dsp_16_s8;
2870 break;
2871 case M32C_OPERAND_BITBASE16_16_U16 :
2872 value = fields->f_dsp_16_u16;
2873 break;
2874 case M32C_OPERAND_BITBASE16_16_U8 :
2875 value = fields->f_dsp_16_u8;
2876 break;
2877 case M32C_OPERAND_BITBASE16_8_U11_S :
2878 value = fields->f_bitbase16_u11_S;
2879 break;
2880 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2881 value = fields->f_bitbase32_16_s11_unprefixed;
2882 break;
2883 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2884 value = fields->f_bitbase32_16_s19_unprefixed;
2885 break;
2886 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2887 value = fields->f_bitbase32_16_u11_unprefixed;
2888 break;
2889 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2890 value = fields->f_bitbase32_16_u19_unprefixed;
2891 break;
2892 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2893 value = fields->f_bitbase32_16_u27_unprefixed;
2894 break;
2895 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2896 value = fields->f_bitbase32_24_s11_prefixed;
2897 break;
2898 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2899 value = fields->f_bitbase32_24_s19_prefixed;
2900 break;
2901 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2902 value = fields->f_bitbase32_24_u11_prefixed;
2903 break;
2904 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2905 value = fields->f_bitbase32_24_u19_prefixed;
2906 break;
2907 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2908 value = fields->f_bitbase32_24_u27_prefixed;
2909 break;
2910 case M32C_OPERAND_BITNO16R :
2911 value = fields->f_dsp_16_u8;
2912 break;
2913 case M32C_OPERAND_BITNO32PREFIXED :
2914 value = fields->f_bitno32_prefixed;
2915 break;
2916 case M32C_OPERAND_BITNO32UNPREFIXED :
2917 value = fields->f_bitno32_unprefixed;
2918 break;
2919 case M32C_OPERAND_DSP_10_U6 :
2920 value = fields->f_dsp_10_u6;
2921 break;
2922 case M32C_OPERAND_DSP_16_S16 :
2923 value = fields->f_dsp_16_s16;
2924 break;
2925 case M32C_OPERAND_DSP_16_S8 :
2926 value = fields->f_dsp_16_s8;
2927 break;
2928 case M32C_OPERAND_DSP_16_U16 :
2929 value = fields->f_dsp_16_u16;
2930 break;
2931 case M32C_OPERAND_DSP_16_U20 :
2932 value = fields->f_dsp_16_u24;
2933 break;
2934 case M32C_OPERAND_DSP_16_U24 :
2935 value = fields->f_dsp_16_u24;
2936 break;
2937 case M32C_OPERAND_DSP_16_U8 :
2938 value = fields->f_dsp_16_u8;
2939 break;
2940 case M32C_OPERAND_DSP_24_S16 :
2941 value = fields->f_dsp_24_s16;
2942 break;
2943 case M32C_OPERAND_DSP_24_S8 :
2944 value = fields->f_dsp_24_s8;
2945 break;
2946 case M32C_OPERAND_DSP_24_U16 :
2947 value = fields->f_dsp_24_u16;
2948 break;
2949 case M32C_OPERAND_DSP_24_U20 :
2950 value = fields->f_dsp_24_u24;
2951 break;
2952 case M32C_OPERAND_DSP_24_U24 :
2953 value = fields->f_dsp_24_u24;
2954 break;
2955 case M32C_OPERAND_DSP_24_U8 :
2956 value = fields->f_dsp_24_u8;
2957 break;
2958 case M32C_OPERAND_DSP_32_S16 :
2959 value = fields->f_dsp_32_s16;
2960 break;
2961 case M32C_OPERAND_DSP_32_S8 :
2962 value = fields->f_dsp_32_s8;
2963 break;
2964 case M32C_OPERAND_DSP_32_U16 :
2965 value = fields->f_dsp_32_u16;
2966 break;
2967 case M32C_OPERAND_DSP_32_U20 :
2968 value = fields->f_dsp_32_u24;
2969 break;
2970 case M32C_OPERAND_DSP_32_U24 :
2971 value = fields->f_dsp_32_u24;
2972 break;
2973 case M32C_OPERAND_DSP_32_U8 :
2974 value = fields->f_dsp_32_u8;
2975 break;
2976 case M32C_OPERAND_DSP_40_S16 :
2977 value = fields->f_dsp_40_s16;
2978 break;
2979 case M32C_OPERAND_DSP_40_S8 :
2980 value = fields->f_dsp_40_s8;
2981 break;
2982 case M32C_OPERAND_DSP_40_U16 :
2983 value = fields->f_dsp_40_u16;
2984 break;
2985 case M32C_OPERAND_DSP_40_U24 :
2986 value = fields->f_dsp_40_u24;
2987 break;
2988 case M32C_OPERAND_DSP_40_U8 :
2989 value = fields->f_dsp_40_u8;
2990 break;
2991 case M32C_OPERAND_DSP_48_S16 :
2992 value = fields->f_dsp_48_s16;
2993 break;
2994 case M32C_OPERAND_DSP_48_S8 :
2995 value = fields->f_dsp_48_s8;
2996 break;
2997 case M32C_OPERAND_DSP_48_U16 :
2998 value = fields->f_dsp_48_u16;
2999 break;
3000 case M32C_OPERAND_DSP_48_U24 :
3001 value = fields->f_dsp_48_u24;
3002 break;
3003 case M32C_OPERAND_DSP_48_U8 :
3004 value = fields->f_dsp_48_u8;
3005 break;
3006 case M32C_OPERAND_DSP_8_S24 :
3007 value = fields->f_dsp_8_s24;
3008 break;
3009 case M32C_OPERAND_DSP_8_S8 :
3010 value = fields->f_dsp_8_s8;
3011 break;
3012 case M32C_OPERAND_DSP_8_U16 :
3013 value = fields->f_dsp_8_u16;
3014 break;
3015 case M32C_OPERAND_DSP_8_U24 :
3016 value = fields->f_dsp_8_u24;
3017 break;
3018 case M32C_OPERAND_DSP_8_U6 :
3019 value = fields->f_dsp_8_u6;
3020 break;
3021 case M32C_OPERAND_DSP_8_U8 :
3022 value = fields->f_dsp_8_u8;
3023 break;
3024 case M32C_OPERAND_DST16AN :
3025 value = fields->f_dst16_an;
3026 break;
3027 case M32C_OPERAND_DST16AN_S :
3028 value = fields->f_dst16_an_s;
3029 break;
3030 case M32C_OPERAND_DST16ANHI :
3031 value = fields->f_dst16_an;
3032 break;
3033 case M32C_OPERAND_DST16ANQI :
3034 value = fields->f_dst16_an;
3035 break;
3036 case M32C_OPERAND_DST16ANQI_S :
3037 value = fields->f_dst16_rn_QI_s;
3038 break;
3039 case M32C_OPERAND_DST16ANSI :
3040 value = fields->f_dst16_an;
3041 break;
3042 case M32C_OPERAND_DST16RNEXTQI :
3043 value = fields->f_dst16_rn_ext;
3044 break;
3045 case M32C_OPERAND_DST16RNHI :
3046 value = fields->f_dst16_rn;
3047 break;
3048 case M32C_OPERAND_DST16RNQI :
3049 value = fields->f_dst16_rn;
3050 break;
3051 case M32C_OPERAND_DST16RNQI_S :
3052 value = fields->f_dst16_rn_QI_s;
3053 break;
3054 case M32C_OPERAND_DST16RNSI :
3055 value = fields->f_dst16_rn;
3056 break;
3057 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3058 value = fields->f_dst32_an_unprefixed;
3059 break;
3060 case M32C_OPERAND_DST32ANPREFIXED :
3061 value = fields->f_dst32_an_prefixed;
3062 break;
3063 case M32C_OPERAND_DST32ANPREFIXEDHI :
3064 value = fields->f_dst32_an_prefixed;
3065 break;
3066 case M32C_OPERAND_DST32ANPREFIXEDQI :
3067 value = fields->f_dst32_an_prefixed;
3068 break;
3069 case M32C_OPERAND_DST32ANPREFIXEDSI :
3070 value = fields->f_dst32_an_prefixed;
3071 break;
3072 case M32C_OPERAND_DST32ANUNPREFIXED :
3073 value = fields->f_dst32_an_unprefixed;
3074 break;
3075 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3076 value = fields->f_dst32_an_unprefixed;
3077 break;
3078 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3079 value = fields->f_dst32_an_unprefixed;
3080 break;
3081 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3082 value = fields->f_dst32_an_unprefixed;
3083 break;
3084 case M32C_OPERAND_DST32R0HI_S :
3085 value = 0;
3086 break;
3087 case M32C_OPERAND_DST32R0QI_S :
3088 value = 0;
3089 break;
3090 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3091 value = fields->f_dst32_rn_ext_unprefixed;
3092 break;
3093 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3094 value = fields->f_dst32_rn_ext_unprefixed;
3095 break;
3096 case M32C_OPERAND_DST32RNPREFIXEDHI :
3097 value = fields->f_dst32_rn_prefixed_HI;
3098 break;
3099 case M32C_OPERAND_DST32RNPREFIXEDQI :
3100 value = fields->f_dst32_rn_prefixed_QI;
3101 break;
3102 case M32C_OPERAND_DST32RNPREFIXEDSI :
3103 value = fields->f_dst32_rn_prefixed_SI;
3104 break;
3105 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3106 value = fields->f_dst32_rn_unprefixed_HI;
3107 break;
3108 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3109 value = fields->f_dst32_rn_unprefixed_QI;
3110 break;
3111 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3112 value = fields->f_dst32_rn_unprefixed_SI;
3113 break;
3114 case M32C_OPERAND_G :
3115 value = 0;
3116 break;
3117 case M32C_OPERAND_IMM_12_S4 :
3118 value = fields->f_imm_12_s4;
3119 break;
3120 case M32C_OPERAND_IMM_12_S4N :
3121 value = fields->f_imm_12_s4;
3122 break;
3123 case M32C_OPERAND_IMM_13_U3 :
3124 value = fields->f_imm_13_u3;
3125 break;
3126 case M32C_OPERAND_IMM_16_HI :
3127 value = fields->f_dsp_16_s16;
3128 break;
3129 case M32C_OPERAND_IMM_16_QI :
3130 value = fields->f_dsp_16_s8;
3131 break;
3132 case M32C_OPERAND_IMM_16_SI :
3133 value = fields->f_dsp_16_s32;
3134 break;
3135 case M32C_OPERAND_IMM_20_S4 :
3136 value = fields->f_imm_20_s4;
3137 break;
3138 case M32C_OPERAND_IMM_24_HI :
3139 value = fields->f_dsp_24_s16;
3140 break;
3141 case M32C_OPERAND_IMM_24_QI :
3142 value = fields->f_dsp_24_s8;
3143 break;
3144 case M32C_OPERAND_IMM_24_SI :
3145 value = fields->f_dsp_24_s32;
3146 break;
3147 case M32C_OPERAND_IMM_32_HI :
3148 value = fields->f_dsp_32_s16;
3149 break;
3150 case M32C_OPERAND_IMM_32_QI :
3151 value = fields->f_dsp_32_s8;
3152 break;
3153 case M32C_OPERAND_IMM_32_SI :
3154 value = fields->f_dsp_32_s32;
3155 break;
3156 case M32C_OPERAND_IMM_40_HI :
3157 value = fields->f_dsp_40_s16;
3158 break;
3159 case M32C_OPERAND_IMM_40_QI :
3160 value = fields->f_dsp_40_s8;
3161 break;
3162 case M32C_OPERAND_IMM_40_SI :
3163 value = fields->f_dsp_40_s32;
3164 break;
3165 case M32C_OPERAND_IMM_48_HI :
3166 value = fields->f_dsp_48_s16;
3167 break;
3168 case M32C_OPERAND_IMM_48_QI :
3169 value = fields->f_dsp_48_s8;
3170 break;
3171 case M32C_OPERAND_IMM_48_SI :
3172 value = fields->f_dsp_48_s32;
3173 break;
3174 case M32C_OPERAND_IMM_56_HI :
3175 value = fields->f_dsp_56_s16;
3176 break;
3177 case M32C_OPERAND_IMM_56_QI :
3178 value = fields->f_dsp_56_s8;
3179 break;
3180 case M32C_OPERAND_IMM_64_HI :
3181 value = fields->f_dsp_64_s16;
3182 break;
3183 case M32C_OPERAND_IMM_8_HI :
3184 value = fields->f_dsp_8_s16;
3185 break;
3186 case M32C_OPERAND_IMM_8_QI :
3187 value = fields->f_dsp_8_s8;
3188 break;
3189 case M32C_OPERAND_IMM_8_S4 :
3190 value = fields->f_imm_8_s4;
3191 break;
3192 case M32C_OPERAND_IMM_8_S4N :
3193 value = fields->f_imm_8_s4;
3194 break;
3195 case M32C_OPERAND_IMM_SH_12_S4 :
3196 value = fields->f_imm_12_s4;
3197 break;
3198 case M32C_OPERAND_IMM_SH_20_S4 :
3199 value = fields->f_imm_20_s4;
3200 break;
3201 case M32C_OPERAND_IMM_SH_8_S4 :
3202 value = fields->f_imm_8_s4;
3203 break;
3204 case M32C_OPERAND_IMM1_S :
3205 value = fields->f_imm1_S;
3206 break;
3207 case M32C_OPERAND_IMM3_S :
3208 value = fields->f_imm3_S;
3209 break;
3210 case M32C_OPERAND_LAB_16_8 :
3211 value = fields->f_lab_16_8;
3212 break;
3213 case M32C_OPERAND_LAB_24_8 :
3214 value = fields->f_lab_24_8;
3215 break;
3216 case M32C_OPERAND_LAB_32_8 :
3217 value = fields->f_lab_32_8;
3218 break;
3219 case M32C_OPERAND_LAB_40_8 :
3220 value = fields->f_lab_40_8;
3221 break;
3222 case M32C_OPERAND_LAB_5_3 :
3223 value = fields->f_lab_5_3;
3224 break;
3225 case M32C_OPERAND_LAB_8_16 :
3226 value = fields->f_lab_8_16;
3227 break;
3228 case M32C_OPERAND_LAB_8_24 :
3229 value = fields->f_lab_8_24;
3230 break;
3231 case M32C_OPERAND_LAB_8_8 :
3232 value = fields->f_lab_8_8;
3233 break;
3234 case M32C_OPERAND_LAB32_JMP_S :
3235 value = fields->f_lab32_jmp_s;
3236 break;
3237 case M32C_OPERAND_Q :
3238 value = 0;
3239 break;
3240 case M32C_OPERAND_R0 :
3241 value = 0;
3242 break;
3243 case M32C_OPERAND_R0H :
3244 value = 0;
3245 break;
3246 case M32C_OPERAND_R0L :
3247 value = 0;
3248 break;
3249 case M32C_OPERAND_R1 :
3250 value = 0;
3251 break;
3252 case M32C_OPERAND_R1R2R0 :
3253 value = 0;
3254 break;
3255 case M32C_OPERAND_R2 :
3256 value = 0;
3257 break;
3258 case M32C_OPERAND_R2R0 :
3259 value = 0;
3260 break;
3261 case M32C_OPERAND_R3 :
3262 value = 0;
3263 break;
3264 case M32C_OPERAND_R3R1 :
3265 value = 0;
3266 break;
3267 case M32C_OPERAND_REGSETPOP :
3268 value = fields->f_8_8;
3269 break;
3270 case M32C_OPERAND_REGSETPUSH :
3271 value = fields->f_8_8;
3272 break;
3273 case M32C_OPERAND_RN16_PUSH_S :
3274 value = fields->f_4_1;
3275 break;
3276 case M32C_OPERAND_S :
3277 value = 0;
3278 break;
3279 case M32C_OPERAND_SRC16AN :
3280 value = fields->f_src16_an;
3281 break;
3282 case M32C_OPERAND_SRC16ANHI :
3283 value = fields->f_src16_an;
3284 break;
3285 case M32C_OPERAND_SRC16ANQI :
3286 value = fields->f_src16_an;
3287 break;
3288 case M32C_OPERAND_SRC16RNHI :
3289 value = fields->f_src16_rn;
3290 break;
3291 case M32C_OPERAND_SRC16RNQI :
3292 value = fields->f_src16_rn;
3293 break;
3294 case M32C_OPERAND_SRC32ANPREFIXED :
3295 value = fields->f_src32_an_prefixed;
3296 break;
3297 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3298 value = fields->f_src32_an_prefixed;
3299 break;
3300 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3301 value = fields->f_src32_an_prefixed;
3302 break;
3303 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3304 value = fields->f_src32_an_prefixed;
3305 break;
3306 case M32C_OPERAND_SRC32ANUNPREFIXED :
3307 value = fields->f_src32_an_unprefixed;
3308 break;
3309 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3310 value = fields->f_src32_an_unprefixed;
3311 break;
3312 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3313 value = fields->f_src32_an_unprefixed;
3314 break;
3315 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3316 value = fields->f_src32_an_unprefixed;
3317 break;
3318 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3319 value = fields->f_src32_rn_prefixed_HI;
3320 break;
3321 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3322 value = fields->f_src32_rn_prefixed_QI;
3323 break;
3324 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3325 value = fields->f_src32_rn_prefixed_SI;
3326 break;
3327 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3328 value = fields->f_src32_rn_unprefixed_HI;
3329 break;
3330 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3331 value = fields->f_src32_rn_unprefixed_QI;
3332 break;
3333 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3334 value = fields->f_src32_rn_unprefixed_SI;
3335 break;
3336 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3337 value = fields->f_5_1;
3338 break;
3339 case M32C_OPERAND_X :
3340 value = 0;
3341 break;
3342 case M32C_OPERAND_Z :
3343 value = 0;
3344 break;
3345 case M32C_OPERAND_COND16_16 :
3346 value = fields->f_dsp_16_u8;
3347 break;
3348 case M32C_OPERAND_COND16_24 :
3349 value = fields->f_dsp_24_u8;
3350 break;
3351 case M32C_OPERAND_COND16_32 :
3352 value = fields->f_dsp_32_u8;
3353 break;
3354 case M32C_OPERAND_COND16C :
3355 value = fields->f_cond16;
3356 break;
3357 case M32C_OPERAND_COND16J :
3358 value = fields->f_cond16;
3359 break;
3360 case M32C_OPERAND_COND16J5 :
3361 value = fields->f_cond16j_5;
3362 break;
3363 case M32C_OPERAND_COND32 :
3364 value = fields->f_cond32;
3365 break;
3366 case M32C_OPERAND_COND32_16 :
3367 value = fields->f_dsp_16_u8;
3368 break;
3369 case M32C_OPERAND_COND32_24 :
3370 value = fields->f_dsp_24_u8;
3371 break;
3372 case M32C_OPERAND_COND32_32 :
3373 value = fields->f_dsp_32_u8;
3374 break;
3375 case M32C_OPERAND_COND32_40 :
3376 value = fields->f_dsp_40_u8;
3377 break;
3378 case M32C_OPERAND_COND32J :
3379 value = fields->f_cond32j;
3380 break;
3381 case M32C_OPERAND_CR1_PREFIXED_32 :
3382 value = fields->f_21_3;
3383 break;
3384 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3385 value = fields->f_13_3;
3386 break;
3387 case M32C_OPERAND_CR16 :
3388 value = fields->f_9_3;
3389 break;
3390 case M32C_OPERAND_CR2_32 :
3391 value = fields->f_13_3;
3392 break;
3393 case M32C_OPERAND_CR3_PREFIXED_32 :
3394 value = fields->f_21_3;
3395 break;
3396 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3397 value = fields->f_13_3;
3398 break;
3399 case M32C_OPERAND_FLAGS16 :
3400 value = fields->f_9_3;
3401 break;
3402 case M32C_OPERAND_FLAGS32 :
3403 value = fields->f_13_3;
3404 break;
3405 case M32C_OPERAND_SCCOND32 :
3406 value = fields->f_cond16;
3407 break;
3408 case M32C_OPERAND_SIZE :
3409 value = 0;
3410 break;
3411
3412 default :
3413 /* xgettext:c-format */
3414 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3415 opindex);
3416 abort ();
3417 }
3418
3419 return value;
3420 }
3421
3422 bfd_vma
3423 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3424 int opindex,
3425 const CGEN_FIELDS * fields)
3426 {
3427 bfd_vma value;
3428
3429 switch (opindex)
3430 {
3431 case M32C_OPERAND_A0 :
3432 value = 0;
3433 break;
3434 case M32C_OPERAND_A1 :
3435 value = 0;
3436 break;
3437 case M32C_OPERAND_AN16_PUSH_S :
3438 value = fields->f_4_1;
3439 break;
3440 case M32C_OPERAND_BIT16AN :
3441 value = fields->f_dst16_an;
3442 break;
3443 case M32C_OPERAND_BIT16RN :
3444 value = fields->f_dst16_rn;
3445 break;
3446 case M32C_OPERAND_BIT32ANPREFIXED :
3447 value = fields->f_dst32_an_prefixed;
3448 break;
3449 case M32C_OPERAND_BIT32ANUNPREFIXED :
3450 value = fields->f_dst32_an_unprefixed;
3451 break;
3452 case M32C_OPERAND_BIT32RNPREFIXED :
3453 value = fields->f_dst32_rn_prefixed_QI;
3454 break;
3455 case M32C_OPERAND_BIT32RNUNPREFIXED :
3456 value = fields->f_dst32_rn_unprefixed_QI;
3457 break;
3458 case M32C_OPERAND_BITBASE16_16_S8 :
3459 value = fields->f_dsp_16_s8;
3460 break;
3461 case M32C_OPERAND_BITBASE16_16_U16 :
3462 value = fields->f_dsp_16_u16;
3463 break;
3464 case M32C_OPERAND_BITBASE16_16_U8 :
3465 value = fields->f_dsp_16_u8;
3466 break;
3467 case M32C_OPERAND_BITBASE16_8_U11_S :
3468 value = fields->f_bitbase16_u11_S;
3469 break;
3470 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3471 value = fields->f_bitbase32_16_s11_unprefixed;
3472 break;
3473 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3474 value = fields->f_bitbase32_16_s19_unprefixed;
3475 break;
3476 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3477 value = fields->f_bitbase32_16_u11_unprefixed;
3478 break;
3479 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3480 value = fields->f_bitbase32_16_u19_unprefixed;
3481 break;
3482 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3483 value = fields->f_bitbase32_16_u27_unprefixed;
3484 break;
3485 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3486 value = fields->f_bitbase32_24_s11_prefixed;
3487 break;
3488 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3489 value = fields->f_bitbase32_24_s19_prefixed;
3490 break;
3491 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3492 value = fields->f_bitbase32_24_u11_prefixed;
3493 break;
3494 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3495 value = fields->f_bitbase32_24_u19_prefixed;
3496 break;
3497 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3498 value = fields->f_bitbase32_24_u27_prefixed;
3499 break;
3500 case M32C_OPERAND_BITNO16R :
3501 value = fields->f_dsp_16_u8;
3502 break;
3503 case M32C_OPERAND_BITNO32PREFIXED :
3504 value = fields->f_bitno32_prefixed;
3505 break;
3506 case M32C_OPERAND_BITNO32UNPREFIXED :
3507 value = fields->f_bitno32_unprefixed;
3508 break;
3509 case M32C_OPERAND_DSP_10_U6 :
3510 value = fields->f_dsp_10_u6;
3511 break;
3512 case M32C_OPERAND_DSP_16_S16 :
3513 value = fields->f_dsp_16_s16;
3514 break;
3515 case M32C_OPERAND_DSP_16_S8 :
3516 value = fields->f_dsp_16_s8;
3517 break;
3518 case M32C_OPERAND_DSP_16_U16 :
3519 value = fields->f_dsp_16_u16;
3520 break;
3521 case M32C_OPERAND_DSP_16_U20 :
3522 value = fields->f_dsp_16_u24;
3523 break;
3524 case M32C_OPERAND_DSP_16_U24 :
3525 value = fields->f_dsp_16_u24;
3526 break;
3527 case M32C_OPERAND_DSP_16_U8 :
3528 value = fields->f_dsp_16_u8;
3529 break;
3530 case M32C_OPERAND_DSP_24_S16 :
3531 value = fields->f_dsp_24_s16;
3532 break;
3533 case M32C_OPERAND_DSP_24_S8 :
3534 value = fields->f_dsp_24_s8;
3535 break;
3536 case M32C_OPERAND_DSP_24_U16 :
3537 value = fields->f_dsp_24_u16;
3538 break;
3539 case M32C_OPERAND_DSP_24_U20 :
3540 value = fields->f_dsp_24_u24;
3541 break;
3542 case M32C_OPERAND_DSP_24_U24 :
3543 value = fields->f_dsp_24_u24;
3544 break;
3545 case M32C_OPERAND_DSP_24_U8 :
3546 value = fields->f_dsp_24_u8;
3547 break;
3548 case M32C_OPERAND_DSP_32_S16 :
3549 value = fields->f_dsp_32_s16;
3550 break;
3551 case M32C_OPERAND_DSP_32_S8 :
3552 value = fields->f_dsp_32_s8;
3553 break;
3554 case M32C_OPERAND_DSP_32_U16 :
3555 value = fields->f_dsp_32_u16;
3556 break;
3557 case M32C_OPERAND_DSP_32_U20 :
3558 value = fields->f_dsp_32_u24;
3559 break;
3560 case M32C_OPERAND_DSP_32_U24 :
3561 value = fields->f_dsp_32_u24;
3562 break;
3563 case M32C_OPERAND_DSP_32_U8 :
3564 value = fields->f_dsp_32_u8;
3565 break;
3566 case M32C_OPERAND_DSP_40_S16 :
3567 value = fields->f_dsp_40_s16;
3568 break;
3569 case M32C_OPERAND_DSP_40_S8 :
3570 value = fields->f_dsp_40_s8;
3571 break;
3572 case M32C_OPERAND_DSP_40_U16 :
3573 value = fields->f_dsp_40_u16;
3574 break;
3575 case M32C_OPERAND_DSP_40_U24 :
3576 value = fields->f_dsp_40_u24;
3577 break;
3578 case M32C_OPERAND_DSP_40_U8 :
3579 value = fields->f_dsp_40_u8;
3580 break;
3581 case M32C_OPERAND_DSP_48_S16 :
3582 value = fields->f_dsp_48_s16;
3583 break;
3584 case M32C_OPERAND_DSP_48_S8 :
3585 value = fields->f_dsp_48_s8;
3586 break;
3587 case M32C_OPERAND_DSP_48_U16 :
3588 value = fields->f_dsp_48_u16;
3589 break;
3590 case M32C_OPERAND_DSP_48_U24 :
3591 value = fields->f_dsp_48_u24;
3592 break;
3593 case M32C_OPERAND_DSP_48_U8 :
3594 value = fields->f_dsp_48_u8;
3595 break;
3596 case M32C_OPERAND_DSP_8_S24 :
3597 value = fields->f_dsp_8_s24;
3598 break;
3599 case M32C_OPERAND_DSP_8_S8 :
3600 value = fields->f_dsp_8_s8;
3601 break;
3602 case M32C_OPERAND_DSP_8_U16 :
3603 value = fields->f_dsp_8_u16;
3604 break;
3605 case M32C_OPERAND_DSP_8_U24 :
3606 value = fields->f_dsp_8_u24;
3607 break;
3608 case M32C_OPERAND_DSP_8_U6 :
3609 value = fields->f_dsp_8_u6;
3610 break;
3611 case M32C_OPERAND_DSP_8_U8 :
3612 value = fields->f_dsp_8_u8;
3613 break;
3614 case M32C_OPERAND_DST16AN :
3615 value = fields->f_dst16_an;
3616 break;
3617 case M32C_OPERAND_DST16AN_S :
3618 value = fields->f_dst16_an_s;
3619 break;
3620 case M32C_OPERAND_DST16ANHI :
3621 value = fields->f_dst16_an;
3622 break;
3623 case M32C_OPERAND_DST16ANQI :
3624 value = fields->f_dst16_an;
3625 break;
3626 case M32C_OPERAND_DST16ANQI_S :
3627 value = fields->f_dst16_rn_QI_s;
3628 break;
3629 case M32C_OPERAND_DST16ANSI :
3630 value = fields->f_dst16_an;
3631 break;
3632 case M32C_OPERAND_DST16RNEXTQI :
3633 value = fields->f_dst16_rn_ext;
3634 break;
3635 case M32C_OPERAND_DST16RNHI :
3636 value = fields->f_dst16_rn;
3637 break;
3638 case M32C_OPERAND_DST16RNQI :
3639 value = fields->f_dst16_rn;
3640 break;
3641 case M32C_OPERAND_DST16RNQI_S :
3642 value = fields->f_dst16_rn_QI_s;
3643 break;
3644 case M32C_OPERAND_DST16RNSI :
3645 value = fields->f_dst16_rn;
3646 break;
3647 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3648 value = fields->f_dst32_an_unprefixed;
3649 break;
3650 case M32C_OPERAND_DST32ANPREFIXED :
3651 value = fields->f_dst32_an_prefixed;
3652 break;
3653 case M32C_OPERAND_DST32ANPREFIXEDHI :
3654 value = fields->f_dst32_an_prefixed;
3655 break;
3656 case M32C_OPERAND_DST32ANPREFIXEDQI :
3657 value = fields->f_dst32_an_prefixed;
3658 break;
3659 case M32C_OPERAND_DST32ANPREFIXEDSI :
3660 value = fields->f_dst32_an_prefixed;
3661 break;
3662 case M32C_OPERAND_DST32ANUNPREFIXED :
3663 value = fields->f_dst32_an_unprefixed;
3664 break;
3665 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3666 value = fields->f_dst32_an_unprefixed;
3667 break;
3668 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3669 value = fields->f_dst32_an_unprefixed;
3670 break;
3671 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3672 value = fields->f_dst32_an_unprefixed;
3673 break;
3674 case M32C_OPERAND_DST32R0HI_S :
3675 value = 0;
3676 break;
3677 case M32C_OPERAND_DST32R0QI_S :
3678 value = 0;
3679 break;
3680 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3681 value = fields->f_dst32_rn_ext_unprefixed;
3682 break;
3683 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3684 value = fields->f_dst32_rn_ext_unprefixed;
3685 break;
3686 case M32C_OPERAND_DST32RNPREFIXEDHI :
3687 value = fields->f_dst32_rn_prefixed_HI;
3688 break;
3689 case M32C_OPERAND_DST32RNPREFIXEDQI :
3690 value = fields->f_dst32_rn_prefixed_QI;
3691 break;
3692 case M32C_OPERAND_DST32RNPREFIXEDSI :
3693 value = fields->f_dst32_rn_prefixed_SI;
3694 break;
3695 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3696 value = fields->f_dst32_rn_unprefixed_HI;
3697 break;
3698 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3699 value = fields->f_dst32_rn_unprefixed_QI;
3700 break;
3701 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3702 value = fields->f_dst32_rn_unprefixed_SI;
3703 break;
3704 case M32C_OPERAND_G :
3705 value = 0;
3706 break;
3707 case M32C_OPERAND_IMM_12_S4 :
3708 value = fields->f_imm_12_s4;
3709 break;
3710 case M32C_OPERAND_IMM_12_S4N :
3711 value = fields->f_imm_12_s4;
3712 break;
3713 case M32C_OPERAND_IMM_13_U3 :
3714 value = fields->f_imm_13_u3;
3715 break;
3716 case M32C_OPERAND_IMM_16_HI :
3717 value = fields->f_dsp_16_s16;
3718 break;
3719 case M32C_OPERAND_IMM_16_QI :
3720 value = fields->f_dsp_16_s8;
3721 break;
3722 case M32C_OPERAND_IMM_16_SI :
3723 value = fields->f_dsp_16_s32;
3724 break;
3725 case M32C_OPERAND_IMM_20_S4 :
3726 value = fields->f_imm_20_s4;
3727 break;
3728 case M32C_OPERAND_IMM_24_HI :
3729 value = fields->f_dsp_24_s16;
3730 break;
3731 case M32C_OPERAND_IMM_24_QI :
3732 value = fields->f_dsp_24_s8;
3733 break;
3734 case M32C_OPERAND_IMM_24_SI :
3735 value = fields->f_dsp_24_s32;
3736 break;
3737 case M32C_OPERAND_IMM_32_HI :
3738 value = fields->f_dsp_32_s16;
3739 break;
3740 case M32C_OPERAND_IMM_32_QI :
3741 value = fields->f_dsp_32_s8;
3742 break;
3743 case M32C_OPERAND_IMM_32_SI :
3744 value = fields->f_dsp_32_s32;
3745 break;
3746 case M32C_OPERAND_IMM_40_HI :
3747 value = fields->f_dsp_40_s16;
3748 break;
3749 case M32C_OPERAND_IMM_40_QI :
3750 value = fields->f_dsp_40_s8;
3751 break;
3752 case M32C_OPERAND_IMM_40_SI :
3753 value = fields->f_dsp_40_s32;
3754 break;
3755 case M32C_OPERAND_IMM_48_HI :
3756 value = fields->f_dsp_48_s16;
3757 break;
3758 case M32C_OPERAND_IMM_48_QI :
3759 value = fields->f_dsp_48_s8;
3760 break;
3761 case M32C_OPERAND_IMM_48_SI :
3762 value = fields->f_dsp_48_s32;
3763 break;
3764 case M32C_OPERAND_IMM_56_HI :
3765 value = fields->f_dsp_56_s16;
3766 break;
3767 case M32C_OPERAND_IMM_56_QI :
3768 value = fields->f_dsp_56_s8;
3769 break;
3770 case M32C_OPERAND_IMM_64_HI :
3771 value = fields->f_dsp_64_s16;
3772 break;
3773 case M32C_OPERAND_IMM_8_HI :
3774 value = fields->f_dsp_8_s16;
3775 break;
3776 case M32C_OPERAND_IMM_8_QI :
3777 value = fields->f_dsp_8_s8;
3778 break;
3779 case M32C_OPERAND_IMM_8_S4 :
3780 value = fields->f_imm_8_s4;
3781 break;
3782 case M32C_OPERAND_IMM_8_S4N :
3783 value = fields->f_imm_8_s4;
3784 break;
3785 case M32C_OPERAND_IMM_SH_12_S4 :
3786 value = fields->f_imm_12_s4;
3787 break;
3788 case M32C_OPERAND_IMM_SH_20_S4 :
3789 value = fields->f_imm_20_s4;
3790 break;
3791 case M32C_OPERAND_IMM_SH_8_S4 :
3792 value = fields->f_imm_8_s4;
3793 break;
3794 case M32C_OPERAND_IMM1_S :
3795 value = fields->f_imm1_S;
3796 break;
3797 case M32C_OPERAND_IMM3_S :
3798 value = fields->f_imm3_S;
3799 break;
3800 case M32C_OPERAND_LAB_16_8 :
3801 value = fields->f_lab_16_8;
3802 break;
3803 case M32C_OPERAND_LAB_24_8 :
3804 value = fields->f_lab_24_8;
3805 break;
3806 case M32C_OPERAND_LAB_32_8 :
3807 value = fields->f_lab_32_8;
3808 break;
3809 case M32C_OPERAND_LAB_40_8 :
3810 value = fields->f_lab_40_8;
3811 break;
3812 case M32C_OPERAND_LAB_5_3 :
3813 value = fields->f_lab_5_3;
3814 break;
3815 case M32C_OPERAND_LAB_8_16 :
3816 value = fields->f_lab_8_16;
3817 break;
3818 case M32C_OPERAND_LAB_8_24 :
3819 value = fields->f_lab_8_24;
3820 break;
3821 case M32C_OPERAND_LAB_8_8 :
3822 value = fields->f_lab_8_8;
3823 break;
3824 case M32C_OPERAND_LAB32_JMP_S :
3825 value = fields->f_lab32_jmp_s;
3826 break;
3827 case M32C_OPERAND_Q :
3828 value = 0;
3829 break;
3830 case M32C_OPERAND_R0 :
3831 value = 0;
3832 break;
3833 case M32C_OPERAND_R0H :
3834 value = 0;
3835 break;
3836 case M32C_OPERAND_R0L :
3837 value = 0;
3838 break;
3839 case M32C_OPERAND_R1 :
3840 value = 0;
3841 break;
3842 case M32C_OPERAND_R1R2R0 :
3843 value = 0;
3844 break;
3845 case M32C_OPERAND_R2 :
3846 value = 0;
3847 break;
3848 case M32C_OPERAND_R2R0 :
3849 value = 0;
3850 break;
3851 case M32C_OPERAND_R3 :
3852 value = 0;
3853 break;
3854 case M32C_OPERAND_R3R1 :
3855 value = 0;
3856 break;
3857 case M32C_OPERAND_REGSETPOP :
3858 value = fields->f_8_8;
3859 break;
3860 case M32C_OPERAND_REGSETPUSH :
3861 value = fields->f_8_8;
3862 break;
3863 case M32C_OPERAND_RN16_PUSH_S :
3864 value = fields->f_4_1;
3865 break;
3866 case M32C_OPERAND_S :
3867 value = 0;
3868 break;
3869 case M32C_OPERAND_SRC16AN :
3870 value = fields->f_src16_an;
3871 break;
3872 case M32C_OPERAND_SRC16ANHI :
3873 value = fields->f_src16_an;
3874 break;
3875 case M32C_OPERAND_SRC16ANQI :
3876 value = fields->f_src16_an;
3877 break;
3878 case M32C_OPERAND_SRC16RNHI :
3879 value = fields->f_src16_rn;
3880 break;
3881 case M32C_OPERAND_SRC16RNQI :
3882 value = fields->f_src16_rn;
3883 break;
3884 case M32C_OPERAND_SRC32ANPREFIXED :
3885 value = fields->f_src32_an_prefixed;
3886 break;
3887 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3888 value = fields->f_src32_an_prefixed;
3889 break;
3890 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3891 value = fields->f_src32_an_prefixed;
3892 break;
3893 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3894 value = fields->f_src32_an_prefixed;
3895 break;
3896 case M32C_OPERAND_SRC32ANUNPREFIXED :
3897 value = fields->f_src32_an_unprefixed;
3898 break;
3899 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3900 value = fields->f_src32_an_unprefixed;
3901 break;
3902 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3903 value = fields->f_src32_an_unprefixed;
3904 break;
3905 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3906 value = fields->f_src32_an_unprefixed;
3907 break;
3908 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3909 value = fields->f_src32_rn_prefixed_HI;
3910 break;
3911 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3912 value = fields->f_src32_rn_prefixed_QI;
3913 break;
3914 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3915 value = fields->f_src32_rn_prefixed_SI;
3916 break;
3917 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3918 value = fields->f_src32_rn_unprefixed_HI;
3919 break;
3920 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3921 value = fields->f_src32_rn_unprefixed_QI;
3922 break;
3923 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3924 value = fields->f_src32_rn_unprefixed_SI;
3925 break;
3926 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3927 value = fields->f_5_1;
3928 break;
3929 case M32C_OPERAND_X :
3930 value = 0;
3931 break;
3932 case M32C_OPERAND_Z :
3933 value = 0;
3934 break;
3935 case M32C_OPERAND_COND16_16 :
3936 value = fields->f_dsp_16_u8;
3937 break;
3938 case M32C_OPERAND_COND16_24 :
3939 value = fields->f_dsp_24_u8;
3940 break;
3941 case M32C_OPERAND_COND16_32 :
3942 value = fields->f_dsp_32_u8;
3943 break;
3944 case M32C_OPERAND_COND16C :
3945 value = fields->f_cond16;
3946 break;
3947 case M32C_OPERAND_COND16J :
3948 value = fields->f_cond16;
3949 break;
3950 case M32C_OPERAND_COND16J5 :
3951 value = fields->f_cond16j_5;
3952 break;
3953 case M32C_OPERAND_COND32 :
3954 value = fields->f_cond32;
3955 break;
3956 case M32C_OPERAND_COND32_16 :
3957 value = fields->f_dsp_16_u8;
3958 break;
3959 case M32C_OPERAND_COND32_24 :
3960 value = fields->f_dsp_24_u8;
3961 break;
3962 case M32C_OPERAND_COND32_32 :
3963 value = fields->f_dsp_32_u8;
3964 break;
3965 case M32C_OPERAND_COND32_40 :
3966 value = fields->f_dsp_40_u8;
3967 break;
3968 case M32C_OPERAND_COND32J :
3969 value = fields->f_cond32j;
3970 break;
3971 case M32C_OPERAND_CR1_PREFIXED_32 :
3972 value = fields->f_21_3;
3973 break;
3974 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3975 value = fields->f_13_3;
3976 break;
3977 case M32C_OPERAND_CR16 :
3978 value = fields->f_9_3;
3979 break;
3980 case M32C_OPERAND_CR2_32 :
3981 value = fields->f_13_3;
3982 break;
3983 case M32C_OPERAND_CR3_PREFIXED_32 :
3984 value = fields->f_21_3;
3985 break;
3986 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3987 value = fields->f_13_3;
3988 break;
3989 case M32C_OPERAND_FLAGS16 :
3990 value = fields->f_9_3;
3991 break;
3992 case M32C_OPERAND_FLAGS32 :
3993 value = fields->f_13_3;
3994 break;
3995 case M32C_OPERAND_SCCOND32 :
3996 value = fields->f_cond16;
3997 break;
3998 case M32C_OPERAND_SIZE :
3999 value = 0;
4000 break;
4001
4002 default :
4003 /* xgettext:c-format */
4004 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4005 opindex);
4006 abort ();
4007 }
4008
4009 return value;
4010 }
4011
4012 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4013 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4014
4015 /* Stuffing values in cgen_fields is handled by a collection of functions.
4016 They are distinguished by the type of the VALUE argument they accept.
4017 TODO: floating point, inlining support, remove cases where argument type
4018 not appropriate. */
4019
4020 void
4021 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4022 int opindex,
4023 CGEN_FIELDS * fields,
4024 int value)
4025 {
4026 switch (opindex)
4027 {
4028 case M32C_OPERAND_A0 :
4029 break;
4030 case M32C_OPERAND_A1 :
4031 break;
4032 case M32C_OPERAND_AN16_PUSH_S :
4033 fields->f_4_1 = value;
4034 break;
4035 case M32C_OPERAND_BIT16AN :
4036 fields->f_dst16_an = value;
4037 break;
4038 case M32C_OPERAND_BIT16RN :
4039 fields->f_dst16_rn = value;
4040 break;
4041 case M32C_OPERAND_BIT32ANPREFIXED :
4042 fields->f_dst32_an_prefixed = value;
4043 break;
4044 case M32C_OPERAND_BIT32ANUNPREFIXED :
4045 fields->f_dst32_an_unprefixed = value;
4046 break;
4047 case M32C_OPERAND_BIT32RNPREFIXED :
4048 fields->f_dst32_rn_prefixed_QI = value;
4049 break;
4050 case M32C_OPERAND_BIT32RNUNPREFIXED :
4051 fields->f_dst32_rn_unprefixed_QI = value;
4052 break;
4053 case M32C_OPERAND_BITBASE16_16_S8 :
4054 fields->f_dsp_16_s8 = value;
4055 break;
4056 case M32C_OPERAND_BITBASE16_16_U16 :
4057 fields->f_dsp_16_u16 = value;
4058 break;
4059 case M32C_OPERAND_BITBASE16_16_U8 :
4060 fields->f_dsp_16_u8 = value;
4061 break;
4062 case M32C_OPERAND_BITBASE16_8_U11_S :
4063 fields->f_bitbase16_u11_S = value;
4064 break;
4065 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4066 fields->f_bitbase32_16_s11_unprefixed = value;
4067 break;
4068 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4069 fields->f_bitbase32_16_s19_unprefixed = value;
4070 break;
4071 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4072 fields->f_bitbase32_16_u11_unprefixed = value;
4073 break;
4074 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4075 fields->f_bitbase32_16_u19_unprefixed = value;
4076 break;
4077 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4078 fields->f_bitbase32_16_u27_unprefixed = value;
4079 break;
4080 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4081 fields->f_bitbase32_24_s11_prefixed = value;
4082 break;
4083 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4084 fields->f_bitbase32_24_s19_prefixed = value;
4085 break;
4086 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4087 fields->f_bitbase32_24_u11_prefixed = value;
4088 break;
4089 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4090 fields->f_bitbase32_24_u19_prefixed = value;
4091 break;
4092 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4093 fields->f_bitbase32_24_u27_prefixed = value;
4094 break;
4095 case M32C_OPERAND_BITNO16R :
4096 fields->f_dsp_16_u8 = value;
4097 break;
4098 case M32C_OPERAND_BITNO32PREFIXED :
4099 fields->f_bitno32_prefixed = value;
4100 break;
4101 case M32C_OPERAND_BITNO32UNPREFIXED :
4102 fields->f_bitno32_unprefixed = value;
4103 break;
4104 case M32C_OPERAND_DSP_10_U6 :
4105 fields->f_dsp_10_u6 = value;
4106 break;
4107 case M32C_OPERAND_DSP_16_S16 :
4108 fields->f_dsp_16_s16 = value;
4109 break;
4110 case M32C_OPERAND_DSP_16_S8 :
4111 fields->f_dsp_16_s8 = value;
4112 break;
4113 case M32C_OPERAND_DSP_16_U16 :
4114 fields->f_dsp_16_u16 = value;
4115 break;
4116 case M32C_OPERAND_DSP_16_U20 :
4117 fields->f_dsp_16_u24 = value;
4118 break;
4119 case M32C_OPERAND_DSP_16_U24 :
4120 fields->f_dsp_16_u24 = value;
4121 break;
4122 case M32C_OPERAND_DSP_16_U8 :
4123 fields->f_dsp_16_u8 = value;
4124 break;
4125 case M32C_OPERAND_DSP_24_S16 :
4126 fields->f_dsp_24_s16 = value;
4127 break;
4128 case M32C_OPERAND_DSP_24_S8 :
4129 fields->f_dsp_24_s8 = value;
4130 break;
4131 case M32C_OPERAND_DSP_24_U16 :
4132 fields->f_dsp_24_u16 = value;
4133 break;
4134 case M32C_OPERAND_DSP_24_U20 :
4135 fields->f_dsp_24_u24 = value;
4136 break;
4137 case M32C_OPERAND_DSP_24_U24 :
4138 fields->f_dsp_24_u24 = value;
4139 break;
4140 case M32C_OPERAND_DSP_24_U8 :
4141 fields->f_dsp_24_u8 = value;
4142 break;
4143 case M32C_OPERAND_DSP_32_S16 :
4144 fields->f_dsp_32_s16 = value;
4145 break;
4146 case M32C_OPERAND_DSP_32_S8 :
4147 fields->f_dsp_32_s8 = value;
4148 break;
4149 case M32C_OPERAND_DSP_32_U16 :
4150 fields->f_dsp_32_u16 = value;
4151 break;
4152 case M32C_OPERAND_DSP_32_U20 :
4153 fields->f_dsp_32_u24 = value;
4154 break;
4155 case M32C_OPERAND_DSP_32_U24 :
4156 fields->f_dsp_32_u24 = value;
4157 break;
4158 case M32C_OPERAND_DSP_32_U8 :
4159 fields->f_dsp_32_u8 = value;
4160 break;
4161 case M32C_OPERAND_DSP_40_S16 :
4162 fields->f_dsp_40_s16 = value;
4163 break;
4164 case M32C_OPERAND_DSP_40_S8 :
4165 fields->f_dsp_40_s8 = value;
4166 break;
4167 case M32C_OPERAND_DSP_40_U16 :
4168 fields->f_dsp_40_u16 = value;
4169 break;
4170 case M32C_OPERAND_DSP_40_U24 :
4171 fields->f_dsp_40_u24 = value;
4172 break;
4173 case M32C_OPERAND_DSP_40_U8 :
4174 fields->f_dsp_40_u8 = value;
4175 break;
4176 case M32C_OPERAND_DSP_48_S16 :
4177 fields->f_dsp_48_s16 = value;
4178 break;
4179 case M32C_OPERAND_DSP_48_S8 :
4180 fields->f_dsp_48_s8 = value;
4181 break;
4182 case M32C_OPERAND_DSP_48_U16 :
4183 fields->f_dsp_48_u16 = value;
4184 break;
4185 case M32C_OPERAND_DSP_48_U24 :
4186 fields->f_dsp_48_u24 = value;
4187 break;
4188 case M32C_OPERAND_DSP_48_U8 :
4189 fields->f_dsp_48_u8 = value;
4190 break;
4191 case M32C_OPERAND_DSP_8_S24 :
4192 fields->f_dsp_8_s24 = value;
4193 break;
4194 case M32C_OPERAND_DSP_8_S8 :
4195 fields->f_dsp_8_s8 = value;
4196 break;
4197 case M32C_OPERAND_DSP_8_U16 :
4198 fields->f_dsp_8_u16 = value;
4199 break;
4200 case M32C_OPERAND_DSP_8_U24 :
4201 fields->f_dsp_8_u24 = value;
4202 break;
4203 case M32C_OPERAND_DSP_8_U6 :
4204 fields->f_dsp_8_u6 = value;
4205 break;
4206 case M32C_OPERAND_DSP_8_U8 :
4207 fields->f_dsp_8_u8 = value;
4208 break;
4209 case M32C_OPERAND_DST16AN :
4210 fields->f_dst16_an = value;
4211 break;
4212 case M32C_OPERAND_DST16AN_S :
4213 fields->f_dst16_an_s = value;
4214 break;
4215 case M32C_OPERAND_DST16ANHI :
4216 fields->f_dst16_an = value;
4217 break;
4218 case M32C_OPERAND_DST16ANQI :
4219 fields->f_dst16_an = value;
4220 break;
4221 case M32C_OPERAND_DST16ANQI_S :
4222 fields->f_dst16_rn_QI_s = value;
4223 break;
4224 case M32C_OPERAND_DST16ANSI :
4225 fields->f_dst16_an = value;
4226 break;
4227 case M32C_OPERAND_DST16RNEXTQI :
4228 fields->f_dst16_rn_ext = value;
4229 break;
4230 case M32C_OPERAND_DST16RNHI :
4231 fields->f_dst16_rn = value;
4232 break;
4233 case M32C_OPERAND_DST16RNQI :
4234 fields->f_dst16_rn = value;
4235 break;
4236 case M32C_OPERAND_DST16RNQI_S :
4237 fields->f_dst16_rn_QI_s = value;
4238 break;
4239 case M32C_OPERAND_DST16RNSI :
4240 fields->f_dst16_rn = value;
4241 break;
4242 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4243 fields->f_dst32_an_unprefixed = value;
4244 break;
4245 case M32C_OPERAND_DST32ANPREFIXED :
4246 fields->f_dst32_an_prefixed = value;
4247 break;
4248 case M32C_OPERAND_DST32ANPREFIXEDHI :
4249 fields->f_dst32_an_prefixed = value;
4250 break;
4251 case M32C_OPERAND_DST32ANPREFIXEDQI :
4252 fields->f_dst32_an_prefixed = value;
4253 break;
4254 case M32C_OPERAND_DST32ANPREFIXEDSI :
4255 fields->f_dst32_an_prefixed = value;
4256 break;
4257 case M32C_OPERAND_DST32ANUNPREFIXED :
4258 fields->f_dst32_an_unprefixed = value;
4259 break;
4260 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4261 fields->f_dst32_an_unprefixed = value;
4262 break;
4263 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4264 fields->f_dst32_an_unprefixed = value;
4265 break;
4266 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4267 fields->f_dst32_an_unprefixed = value;
4268 break;
4269 case M32C_OPERAND_DST32R0HI_S :
4270 break;
4271 case M32C_OPERAND_DST32R0QI_S :
4272 break;
4273 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4274 fields->f_dst32_rn_ext_unprefixed = value;
4275 break;
4276 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4277 fields->f_dst32_rn_ext_unprefixed = value;
4278 break;
4279 case M32C_OPERAND_DST32RNPREFIXEDHI :
4280 fields->f_dst32_rn_prefixed_HI = value;
4281 break;
4282 case M32C_OPERAND_DST32RNPREFIXEDQI :
4283 fields->f_dst32_rn_prefixed_QI = value;
4284 break;
4285 case M32C_OPERAND_DST32RNPREFIXEDSI :
4286 fields->f_dst32_rn_prefixed_SI = value;
4287 break;
4288 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4289 fields->f_dst32_rn_unprefixed_HI = value;
4290 break;
4291 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4292 fields->f_dst32_rn_unprefixed_QI = value;
4293 break;
4294 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4295 fields->f_dst32_rn_unprefixed_SI = value;
4296 break;
4297 case M32C_OPERAND_G :
4298 break;
4299 case M32C_OPERAND_IMM_12_S4 :
4300 fields->f_imm_12_s4 = value;
4301 break;
4302 case M32C_OPERAND_IMM_12_S4N :
4303 fields->f_imm_12_s4 = value;
4304 break;
4305 case M32C_OPERAND_IMM_13_U3 :
4306 fields->f_imm_13_u3 = value;
4307 break;
4308 case M32C_OPERAND_IMM_16_HI :
4309 fields->f_dsp_16_s16 = value;
4310 break;
4311 case M32C_OPERAND_IMM_16_QI :
4312 fields->f_dsp_16_s8 = value;
4313 break;
4314 case M32C_OPERAND_IMM_16_SI :
4315 fields->f_dsp_16_s32 = value;
4316 break;
4317 case M32C_OPERAND_IMM_20_S4 :
4318 fields->f_imm_20_s4 = value;
4319 break;
4320 case M32C_OPERAND_IMM_24_HI :
4321 fields->f_dsp_24_s16 = value;
4322 break;
4323 case M32C_OPERAND_IMM_24_QI :
4324 fields->f_dsp_24_s8 = value;
4325 break;
4326 case M32C_OPERAND_IMM_24_SI :
4327 fields->f_dsp_24_s32 = value;
4328 break;
4329 case M32C_OPERAND_IMM_32_HI :
4330 fields->f_dsp_32_s16 = value;
4331 break;
4332 case M32C_OPERAND_IMM_32_QI :
4333 fields->f_dsp_32_s8 = value;
4334 break;
4335 case M32C_OPERAND_IMM_32_SI :
4336 fields->f_dsp_32_s32 = value;
4337 break;
4338 case M32C_OPERAND_IMM_40_HI :
4339 fields->f_dsp_40_s16 = value;
4340 break;
4341 case M32C_OPERAND_IMM_40_QI :
4342 fields->f_dsp_40_s8 = value;
4343 break;
4344 case M32C_OPERAND_IMM_40_SI :
4345 fields->f_dsp_40_s32 = value;
4346 break;
4347 case M32C_OPERAND_IMM_48_HI :
4348 fields->f_dsp_48_s16 = value;
4349 break;
4350 case M32C_OPERAND_IMM_48_QI :
4351 fields->f_dsp_48_s8 = value;
4352 break;
4353 case M32C_OPERAND_IMM_48_SI :
4354 fields->f_dsp_48_s32 = value;
4355 break;
4356 case M32C_OPERAND_IMM_56_HI :
4357 fields->f_dsp_56_s16 = value;
4358 break;
4359 case M32C_OPERAND_IMM_56_QI :
4360 fields->f_dsp_56_s8 = value;
4361 break;
4362 case M32C_OPERAND_IMM_64_HI :
4363 fields->f_dsp_64_s16 = value;
4364 break;
4365 case M32C_OPERAND_IMM_8_HI :
4366 fields->f_dsp_8_s16 = value;
4367 break;
4368 case M32C_OPERAND_IMM_8_QI :
4369 fields->f_dsp_8_s8 = value;
4370 break;
4371 case M32C_OPERAND_IMM_8_S4 :
4372 fields->f_imm_8_s4 = value;
4373 break;
4374 case M32C_OPERAND_IMM_8_S4N :
4375 fields->f_imm_8_s4 = value;
4376 break;
4377 case M32C_OPERAND_IMM_SH_12_S4 :
4378 fields->f_imm_12_s4 = value;
4379 break;
4380 case M32C_OPERAND_IMM_SH_20_S4 :
4381 fields->f_imm_20_s4 = value;
4382 break;
4383 case M32C_OPERAND_IMM_SH_8_S4 :
4384 fields->f_imm_8_s4 = value;
4385 break;
4386 case M32C_OPERAND_IMM1_S :
4387 fields->f_imm1_S = value;
4388 break;
4389 case M32C_OPERAND_IMM3_S :
4390 fields->f_imm3_S = value;
4391 break;
4392 case M32C_OPERAND_LAB_16_8 :
4393 fields->f_lab_16_8 = value;
4394 break;
4395 case M32C_OPERAND_LAB_24_8 :
4396 fields->f_lab_24_8 = value;
4397 break;
4398 case M32C_OPERAND_LAB_32_8 :
4399 fields->f_lab_32_8 = value;
4400 break;
4401 case M32C_OPERAND_LAB_40_8 :
4402 fields->f_lab_40_8 = value;
4403 break;
4404 case M32C_OPERAND_LAB_5_3 :
4405 fields->f_lab_5_3 = value;
4406 break;
4407 case M32C_OPERAND_LAB_8_16 :
4408 fields->f_lab_8_16 = value;
4409 break;
4410 case M32C_OPERAND_LAB_8_24 :
4411 fields->f_lab_8_24 = value;
4412 break;
4413 case M32C_OPERAND_LAB_8_8 :
4414 fields->f_lab_8_8 = value;
4415 break;
4416 case M32C_OPERAND_LAB32_JMP_S :
4417 fields->f_lab32_jmp_s = value;
4418 break;
4419 case M32C_OPERAND_Q :
4420 break;
4421 case M32C_OPERAND_R0 :
4422 break;
4423 case M32C_OPERAND_R0H :
4424 break;
4425 case M32C_OPERAND_R0L :
4426 break;
4427 case M32C_OPERAND_R1 :
4428 break;
4429 case M32C_OPERAND_R1R2R0 :
4430 break;
4431 case M32C_OPERAND_R2 :
4432 break;
4433 case M32C_OPERAND_R2R0 :
4434 break;
4435 case M32C_OPERAND_R3 :
4436 break;
4437 case M32C_OPERAND_R3R1 :
4438 break;
4439 case M32C_OPERAND_REGSETPOP :
4440 fields->f_8_8 = value;
4441 break;
4442 case M32C_OPERAND_REGSETPUSH :
4443 fields->f_8_8 = value;
4444 break;
4445 case M32C_OPERAND_RN16_PUSH_S :
4446 fields->f_4_1 = value;
4447 break;
4448 case M32C_OPERAND_S :
4449 break;
4450 case M32C_OPERAND_SRC16AN :
4451 fields->f_src16_an = value;
4452 break;
4453 case M32C_OPERAND_SRC16ANHI :
4454 fields->f_src16_an = value;
4455 break;
4456 case M32C_OPERAND_SRC16ANQI :
4457 fields->f_src16_an = value;
4458 break;
4459 case M32C_OPERAND_SRC16RNHI :
4460 fields->f_src16_rn = value;
4461 break;
4462 case M32C_OPERAND_SRC16RNQI :
4463 fields->f_src16_rn = value;
4464 break;
4465 case M32C_OPERAND_SRC32ANPREFIXED :
4466 fields->f_src32_an_prefixed = value;
4467 break;
4468 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4469 fields->f_src32_an_prefixed = value;
4470 break;
4471 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4472 fields->f_src32_an_prefixed = value;
4473 break;
4474 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4475 fields->f_src32_an_prefixed = value;
4476 break;
4477 case M32C_OPERAND_SRC32ANUNPREFIXED :
4478 fields->f_src32_an_unprefixed = value;
4479 break;
4480 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4481 fields->f_src32_an_unprefixed = value;
4482 break;
4483 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4484 fields->f_src32_an_unprefixed = value;
4485 break;
4486 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4487 fields->f_src32_an_unprefixed = value;
4488 break;
4489 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4490 fields->f_src32_rn_prefixed_HI = value;
4491 break;
4492 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4493 fields->f_src32_rn_prefixed_QI = value;
4494 break;
4495 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4496 fields->f_src32_rn_prefixed_SI = value;
4497 break;
4498 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4499 fields->f_src32_rn_unprefixed_HI = value;
4500 break;
4501 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4502 fields->f_src32_rn_unprefixed_QI = value;
4503 break;
4504 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4505 fields->f_src32_rn_unprefixed_SI = value;
4506 break;
4507 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4508 fields->f_5_1 = value;
4509 break;
4510 case M32C_OPERAND_X :
4511 break;
4512 case M32C_OPERAND_Z :
4513 break;
4514 case M32C_OPERAND_COND16_16 :
4515 fields->f_dsp_16_u8 = value;
4516 break;
4517 case M32C_OPERAND_COND16_24 :
4518 fields->f_dsp_24_u8 = value;
4519 break;
4520 case M32C_OPERAND_COND16_32 :
4521 fields->f_dsp_32_u8 = value;
4522 break;
4523 case M32C_OPERAND_COND16C :
4524 fields->f_cond16 = value;
4525 break;
4526 case M32C_OPERAND_COND16J :
4527 fields->f_cond16 = value;
4528 break;
4529 case M32C_OPERAND_COND16J5 :
4530 fields->f_cond16j_5 = value;
4531 break;
4532 case M32C_OPERAND_COND32 :
4533 fields->f_cond32 = value;
4534 break;
4535 case M32C_OPERAND_COND32_16 :
4536 fields->f_dsp_16_u8 = value;
4537 break;
4538 case M32C_OPERAND_COND32_24 :
4539 fields->f_dsp_24_u8 = value;
4540 break;
4541 case M32C_OPERAND_COND32_32 :
4542 fields->f_dsp_32_u8 = value;
4543 break;
4544 case M32C_OPERAND_COND32_40 :
4545 fields->f_dsp_40_u8 = value;
4546 break;
4547 case M32C_OPERAND_COND32J :
4548 fields->f_cond32j = value;
4549 break;
4550 case M32C_OPERAND_CR1_PREFIXED_32 :
4551 fields->f_21_3 = value;
4552 break;
4553 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4554 fields->f_13_3 = value;
4555 break;
4556 case M32C_OPERAND_CR16 :
4557 fields->f_9_3 = value;
4558 break;
4559 case M32C_OPERAND_CR2_32 :
4560 fields->f_13_3 = value;
4561 break;
4562 case M32C_OPERAND_CR3_PREFIXED_32 :
4563 fields->f_21_3 = value;
4564 break;
4565 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4566 fields->f_13_3 = value;
4567 break;
4568 case M32C_OPERAND_FLAGS16 :
4569 fields->f_9_3 = value;
4570 break;
4571 case M32C_OPERAND_FLAGS32 :
4572 fields->f_13_3 = value;
4573 break;
4574 case M32C_OPERAND_SCCOND32 :
4575 fields->f_cond16 = value;
4576 break;
4577 case M32C_OPERAND_SIZE :
4578 break;
4579
4580 default :
4581 /* xgettext:c-format */
4582 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4583 opindex);
4584 abort ();
4585 }
4586 }
4587
4588 void
4589 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4590 int opindex,
4591 CGEN_FIELDS * fields,
4592 bfd_vma value)
4593 {
4594 switch (opindex)
4595 {
4596 case M32C_OPERAND_A0 :
4597 break;
4598 case M32C_OPERAND_A1 :
4599 break;
4600 case M32C_OPERAND_AN16_PUSH_S :
4601 fields->f_4_1 = value;
4602 break;
4603 case M32C_OPERAND_BIT16AN :
4604 fields->f_dst16_an = value;
4605 break;
4606 case M32C_OPERAND_BIT16RN :
4607 fields->f_dst16_rn = value;
4608 break;
4609 case M32C_OPERAND_BIT32ANPREFIXED :
4610 fields->f_dst32_an_prefixed = value;
4611 break;
4612 case M32C_OPERAND_BIT32ANUNPREFIXED :
4613 fields->f_dst32_an_unprefixed = value;
4614 break;
4615 case M32C_OPERAND_BIT32RNPREFIXED :
4616 fields->f_dst32_rn_prefixed_QI = value;
4617 break;
4618 case M32C_OPERAND_BIT32RNUNPREFIXED :
4619 fields->f_dst32_rn_unprefixed_QI = value;
4620 break;
4621 case M32C_OPERAND_BITBASE16_16_S8 :
4622 fields->f_dsp_16_s8 = value;
4623 break;
4624 case M32C_OPERAND_BITBASE16_16_U16 :
4625 fields->f_dsp_16_u16 = value;
4626 break;
4627 case M32C_OPERAND_BITBASE16_16_U8 :
4628 fields->f_dsp_16_u8 = value;
4629 break;
4630 case M32C_OPERAND_BITBASE16_8_U11_S :
4631 fields->f_bitbase16_u11_S = value;
4632 break;
4633 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4634 fields->f_bitbase32_16_s11_unprefixed = value;
4635 break;
4636 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4637 fields->f_bitbase32_16_s19_unprefixed = value;
4638 break;
4639 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4640 fields->f_bitbase32_16_u11_unprefixed = value;
4641 break;
4642 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4643 fields->f_bitbase32_16_u19_unprefixed = value;
4644 break;
4645 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4646 fields->f_bitbase32_16_u27_unprefixed = value;
4647 break;
4648 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4649 fields->f_bitbase32_24_s11_prefixed = value;
4650 break;
4651 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4652 fields->f_bitbase32_24_s19_prefixed = value;
4653 break;
4654 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4655 fields->f_bitbase32_24_u11_prefixed = value;
4656 break;
4657 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4658 fields->f_bitbase32_24_u19_prefixed = value;
4659 break;
4660 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4661 fields->f_bitbase32_24_u27_prefixed = value;
4662 break;
4663 case M32C_OPERAND_BITNO16R :
4664 fields->f_dsp_16_u8 = value;
4665 break;
4666 case M32C_OPERAND_BITNO32PREFIXED :
4667 fields->f_bitno32_prefixed = value;
4668 break;
4669 case M32C_OPERAND_BITNO32UNPREFIXED :
4670 fields->f_bitno32_unprefixed = value;
4671 break;
4672 case M32C_OPERAND_DSP_10_U6 :
4673 fields->f_dsp_10_u6 = value;
4674 break;
4675 case M32C_OPERAND_DSP_16_S16 :
4676 fields->f_dsp_16_s16 = value;
4677 break;
4678 case M32C_OPERAND_DSP_16_S8 :
4679 fields->f_dsp_16_s8 = value;
4680 break;
4681 case M32C_OPERAND_DSP_16_U16 :
4682 fields->f_dsp_16_u16 = value;
4683 break;
4684 case M32C_OPERAND_DSP_16_U20 :
4685 fields->f_dsp_16_u24 = value;
4686 break;
4687 case M32C_OPERAND_DSP_16_U24 :
4688 fields->f_dsp_16_u24 = value;
4689 break;
4690 case M32C_OPERAND_DSP_16_U8 :
4691 fields->f_dsp_16_u8 = value;
4692 break;
4693 case M32C_OPERAND_DSP_24_S16 :
4694 fields->f_dsp_24_s16 = value;
4695 break;
4696 case M32C_OPERAND_DSP_24_S8 :
4697 fields->f_dsp_24_s8 = value;
4698 break;
4699 case M32C_OPERAND_DSP_24_U16 :
4700 fields->f_dsp_24_u16 = value;
4701 break;
4702 case M32C_OPERAND_DSP_24_U20 :
4703 fields->f_dsp_24_u24 = value;
4704 break;
4705 case M32C_OPERAND_DSP_24_U24 :
4706 fields->f_dsp_24_u24 = value;
4707 break;
4708 case M32C_OPERAND_DSP_24_U8 :
4709 fields->f_dsp_24_u8 = value;
4710 break;
4711 case M32C_OPERAND_DSP_32_S16 :
4712 fields->f_dsp_32_s16 = value;
4713 break;
4714 case M32C_OPERAND_DSP_32_S8 :
4715 fields->f_dsp_32_s8 = value;
4716 break;
4717 case M32C_OPERAND_DSP_32_U16 :
4718 fields->f_dsp_32_u16 = value;
4719 break;
4720 case M32C_OPERAND_DSP_32_U20 :
4721 fields->f_dsp_32_u24 = value;
4722 break;
4723 case M32C_OPERAND_DSP_32_U24 :
4724 fields->f_dsp_32_u24 = value;
4725 break;
4726 case M32C_OPERAND_DSP_32_U8 :
4727 fields->f_dsp_32_u8 = value;
4728 break;
4729 case M32C_OPERAND_DSP_40_S16 :
4730 fields->f_dsp_40_s16 = value;
4731 break;
4732 case M32C_OPERAND_DSP_40_S8 :
4733 fields->f_dsp_40_s8 = value;
4734 break;
4735 case M32C_OPERAND_DSP_40_U16 :
4736 fields->f_dsp_40_u16 = value;
4737 break;
4738 case M32C_OPERAND_DSP_40_U24 :
4739 fields->f_dsp_40_u24 = value;
4740 break;
4741 case M32C_OPERAND_DSP_40_U8 :
4742 fields->f_dsp_40_u8 = value;
4743 break;
4744 case M32C_OPERAND_DSP_48_S16 :
4745 fields->f_dsp_48_s16 = value;
4746 break;
4747 case M32C_OPERAND_DSP_48_S8 :
4748 fields->f_dsp_48_s8 = value;
4749 break;
4750 case M32C_OPERAND_DSP_48_U16 :
4751 fields->f_dsp_48_u16 = value;
4752 break;
4753 case M32C_OPERAND_DSP_48_U24 :
4754 fields->f_dsp_48_u24 = value;
4755 break;
4756 case M32C_OPERAND_DSP_48_U8 :
4757 fields->f_dsp_48_u8 = value;
4758 break;
4759 case M32C_OPERAND_DSP_8_S24 :
4760 fields->f_dsp_8_s24 = value;
4761 break;
4762 case M32C_OPERAND_DSP_8_S8 :
4763 fields->f_dsp_8_s8 = value;
4764 break;
4765 case M32C_OPERAND_DSP_8_U16 :
4766 fields->f_dsp_8_u16 = value;
4767 break;
4768 case M32C_OPERAND_DSP_8_U24 :
4769 fields->f_dsp_8_u24 = value;
4770 break;
4771 case M32C_OPERAND_DSP_8_U6 :
4772 fields->f_dsp_8_u6 = value;
4773 break;
4774 case M32C_OPERAND_DSP_8_U8 :
4775 fields->f_dsp_8_u8 = value;
4776 break;
4777 case M32C_OPERAND_DST16AN :
4778 fields->f_dst16_an = value;
4779 break;
4780 case M32C_OPERAND_DST16AN_S :
4781 fields->f_dst16_an_s = value;
4782 break;
4783 case M32C_OPERAND_DST16ANHI :
4784 fields->f_dst16_an = value;
4785 break;
4786 case M32C_OPERAND_DST16ANQI :
4787 fields->f_dst16_an = value;
4788 break;
4789 case M32C_OPERAND_DST16ANQI_S :
4790 fields->f_dst16_rn_QI_s = value;
4791 break;
4792 case M32C_OPERAND_DST16ANSI :
4793 fields->f_dst16_an = value;
4794 break;
4795 case M32C_OPERAND_DST16RNEXTQI :
4796 fields->f_dst16_rn_ext = value;
4797 break;
4798 case M32C_OPERAND_DST16RNHI :
4799 fields->f_dst16_rn = value;
4800 break;
4801 case M32C_OPERAND_DST16RNQI :
4802 fields->f_dst16_rn = value;
4803 break;
4804 case M32C_OPERAND_DST16RNQI_S :
4805 fields->f_dst16_rn_QI_s = value;
4806 break;
4807 case M32C_OPERAND_DST16RNSI :
4808 fields->f_dst16_rn = value;
4809 break;
4810 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4811 fields->f_dst32_an_unprefixed = value;
4812 break;
4813 case M32C_OPERAND_DST32ANPREFIXED :
4814 fields->f_dst32_an_prefixed = value;
4815 break;
4816 case M32C_OPERAND_DST32ANPREFIXEDHI :
4817 fields->f_dst32_an_prefixed = value;
4818 break;
4819 case M32C_OPERAND_DST32ANPREFIXEDQI :
4820 fields->f_dst32_an_prefixed = value;
4821 break;
4822 case M32C_OPERAND_DST32ANPREFIXEDSI :
4823 fields->f_dst32_an_prefixed = value;
4824 break;
4825 case M32C_OPERAND_DST32ANUNPREFIXED :
4826 fields->f_dst32_an_unprefixed = value;
4827 break;
4828 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4829 fields->f_dst32_an_unprefixed = value;
4830 break;
4831 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4832 fields->f_dst32_an_unprefixed = value;
4833 break;
4834 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4835 fields->f_dst32_an_unprefixed = value;
4836 break;
4837 case M32C_OPERAND_DST32R0HI_S :
4838 break;
4839 case M32C_OPERAND_DST32R0QI_S :
4840 break;
4841 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4842 fields->f_dst32_rn_ext_unprefixed = value;
4843 break;
4844 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4845 fields->f_dst32_rn_ext_unprefixed = value;
4846 break;
4847 case M32C_OPERAND_DST32RNPREFIXEDHI :
4848 fields->f_dst32_rn_prefixed_HI = value;
4849 break;
4850 case M32C_OPERAND_DST32RNPREFIXEDQI :
4851 fields->f_dst32_rn_prefixed_QI = value;
4852 break;
4853 case M32C_OPERAND_DST32RNPREFIXEDSI :
4854 fields->f_dst32_rn_prefixed_SI = value;
4855 break;
4856 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4857 fields->f_dst32_rn_unprefixed_HI = value;
4858 break;
4859 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4860 fields->f_dst32_rn_unprefixed_QI = value;
4861 break;
4862 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4863 fields->f_dst32_rn_unprefixed_SI = value;
4864 break;
4865 case M32C_OPERAND_G :
4866 break;
4867 case M32C_OPERAND_IMM_12_S4 :
4868 fields->f_imm_12_s4 = value;
4869 break;
4870 case M32C_OPERAND_IMM_12_S4N :
4871 fields->f_imm_12_s4 = value;
4872 break;
4873 case M32C_OPERAND_IMM_13_U3 :
4874 fields->f_imm_13_u3 = value;
4875 break;
4876 case M32C_OPERAND_IMM_16_HI :
4877 fields->f_dsp_16_s16 = value;
4878 break;
4879 case M32C_OPERAND_IMM_16_QI :
4880 fields->f_dsp_16_s8 = value;
4881 break;
4882 case M32C_OPERAND_IMM_16_SI :
4883 fields->f_dsp_16_s32 = value;
4884 break;
4885 case M32C_OPERAND_IMM_20_S4 :
4886 fields->f_imm_20_s4 = value;
4887 break;
4888 case M32C_OPERAND_IMM_24_HI :
4889 fields->f_dsp_24_s16 = value;
4890 break;
4891 case M32C_OPERAND_IMM_24_QI :
4892 fields->f_dsp_24_s8 = value;
4893 break;
4894 case M32C_OPERAND_IMM_24_SI :
4895 fields->f_dsp_24_s32 = value;
4896 break;
4897 case M32C_OPERAND_IMM_32_HI :
4898 fields->f_dsp_32_s16 = value;
4899 break;
4900 case M32C_OPERAND_IMM_32_QI :
4901 fields->f_dsp_32_s8 = value;
4902 break;
4903 case M32C_OPERAND_IMM_32_SI :
4904 fields->f_dsp_32_s32 = value;
4905 break;
4906 case M32C_OPERAND_IMM_40_HI :
4907 fields->f_dsp_40_s16 = value;
4908 break;
4909 case M32C_OPERAND_IMM_40_QI :
4910 fields->f_dsp_40_s8 = value;
4911 break;
4912 case M32C_OPERAND_IMM_40_SI :
4913 fields->f_dsp_40_s32 = value;
4914 break;
4915 case M32C_OPERAND_IMM_48_HI :
4916 fields->f_dsp_48_s16 = value;
4917 break;
4918 case M32C_OPERAND_IMM_48_QI :
4919 fields->f_dsp_48_s8 = value;
4920 break;
4921 case M32C_OPERAND_IMM_48_SI :
4922 fields->f_dsp_48_s32 = value;
4923 break;
4924 case M32C_OPERAND_IMM_56_HI :
4925 fields->f_dsp_56_s16 = value;
4926 break;
4927 case M32C_OPERAND_IMM_56_QI :
4928 fields->f_dsp_56_s8 = value;
4929 break;
4930 case M32C_OPERAND_IMM_64_HI :
4931 fields->f_dsp_64_s16 = value;
4932 break;
4933 case M32C_OPERAND_IMM_8_HI :
4934 fields->f_dsp_8_s16 = value;
4935 break;
4936 case M32C_OPERAND_IMM_8_QI :
4937 fields->f_dsp_8_s8 = value;
4938 break;
4939 case M32C_OPERAND_IMM_8_S4 :
4940 fields->f_imm_8_s4 = value;
4941 break;
4942 case M32C_OPERAND_IMM_8_S4N :
4943 fields->f_imm_8_s4 = value;
4944 break;
4945 case M32C_OPERAND_IMM_SH_12_S4 :
4946 fields->f_imm_12_s4 = value;
4947 break;
4948 case M32C_OPERAND_IMM_SH_20_S4 :
4949 fields->f_imm_20_s4 = value;
4950 break;
4951 case M32C_OPERAND_IMM_SH_8_S4 :
4952 fields->f_imm_8_s4 = value;
4953 break;
4954 case M32C_OPERAND_IMM1_S :
4955 fields->f_imm1_S = value;
4956 break;
4957 case M32C_OPERAND_IMM3_S :
4958 fields->f_imm3_S = value;
4959 break;
4960 case M32C_OPERAND_LAB_16_8 :
4961 fields->f_lab_16_8 = value;
4962 break;
4963 case M32C_OPERAND_LAB_24_8 :
4964 fields->f_lab_24_8 = value;
4965 break;
4966 case M32C_OPERAND_LAB_32_8 :
4967 fields->f_lab_32_8 = value;
4968 break;
4969 case M32C_OPERAND_LAB_40_8 :
4970 fields->f_lab_40_8 = value;
4971 break;
4972 case M32C_OPERAND_LAB_5_3 :
4973 fields->f_lab_5_3 = value;
4974 break;
4975 case M32C_OPERAND_LAB_8_16 :
4976 fields->f_lab_8_16 = value;
4977 break;
4978 case M32C_OPERAND_LAB_8_24 :
4979 fields->f_lab_8_24 = value;
4980 break;
4981 case M32C_OPERAND_LAB_8_8 :
4982 fields->f_lab_8_8 = value;
4983 break;
4984 case M32C_OPERAND_LAB32_JMP_S :
4985 fields->f_lab32_jmp_s = value;
4986 break;
4987 case M32C_OPERAND_Q :
4988 break;
4989 case M32C_OPERAND_R0 :
4990 break;
4991 case M32C_OPERAND_R0H :
4992 break;
4993 case M32C_OPERAND_R0L :
4994 break;
4995 case M32C_OPERAND_R1 :
4996 break;
4997 case M32C_OPERAND_R1R2R0 :
4998 break;
4999 case M32C_OPERAND_R2 :
5000 break;
5001 case M32C_OPERAND_R2R0 :
5002 break;
5003 case M32C_OPERAND_R3 :
5004 break;
5005 case M32C_OPERAND_R3R1 :
5006 break;
5007 case M32C_OPERAND_REGSETPOP :
5008 fields->f_8_8 = value;
5009 break;
5010 case M32C_OPERAND_REGSETPUSH :
5011 fields->f_8_8 = value;
5012 break;
5013 case M32C_OPERAND_RN16_PUSH_S :
5014 fields->f_4_1 = value;
5015 break;
5016 case M32C_OPERAND_S :
5017 break;
5018 case M32C_OPERAND_SRC16AN :
5019 fields->f_src16_an = value;
5020 break;
5021 case M32C_OPERAND_SRC16ANHI :
5022 fields->f_src16_an = value;
5023 break;
5024 case M32C_OPERAND_SRC16ANQI :
5025 fields->f_src16_an = value;
5026 break;
5027 case M32C_OPERAND_SRC16RNHI :
5028 fields->f_src16_rn = value;
5029 break;
5030 case M32C_OPERAND_SRC16RNQI :
5031 fields->f_src16_rn = value;
5032 break;
5033 case M32C_OPERAND_SRC32ANPREFIXED :
5034 fields->f_src32_an_prefixed = value;
5035 break;
5036 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5037 fields->f_src32_an_prefixed = value;
5038 break;
5039 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5040 fields->f_src32_an_prefixed = value;
5041 break;
5042 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5043 fields->f_src32_an_prefixed = value;
5044 break;
5045 case M32C_OPERAND_SRC32ANUNPREFIXED :
5046 fields->f_src32_an_unprefixed = value;
5047 break;
5048 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5049 fields->f_src32_an_unprefixed = value;
5050 break;
5051 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5052 fields->f_src32_an_unprefixed = value;
5053 break;
5054 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5055 fields->f_src32_an_unprefixed = value;
5056 break;
5057 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5058 fields->f_src32_rn_prefixed_HI = value;
5059 break;
5060 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5061 fields->f_src32_rn_prefixed_QI = value;
5062 break;
5063 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5064 fields->f_src32_rn_prefixed_SI = value;
5065 break;
5066 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5067 fields->f_src32_rn_unprefixed_HI = value;
5068 break;
5069 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5070 fields->f_src32_rn_unprefixed_QI = value;
5071 break;
5072 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5073 fields->f_src32_rn_unprefixed_SI = value;
5074 break;
5075 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5076 fields->f_5_1 = value;
5077 break;
5078 case M32C_OPERAND_X :
5079 break;
5080 case M32C_OPERAND_Z :
5081 break;
5082 case M32C_OPERAND_COND16_16 :
5083 fields->f_dsp_16_u8 = value;
5084 break;
5085 case M32C_OPERAND_COND16_24 :
5086 fields->f_dsp_24_u8 = value;
5087 break;
5088 case M32C_OPERAND_COND16_32 :
5089 fields->f_dsp_32_u8 = value;
5090 break;
5091 case M32C_OPERAND_COND16C :
5092 fields->f_cond16 = value;
5093 break;
5094 case M32C_OPERAND_COND16J :
5095 fields->f_cond16 = value;
5096 break;
5097 case M32C_OPERAND_COND16J5 :
5098 fields->f_cond16j_5 = value;
5099 break;
5100 case M32C_OPERAND_COND32 :
5101 fields->f_cond32 = value;
5102 break;
5103 case M32C_OPERAND_COND32_16 :
5104 fields->f_dsp_16_u8 = value;
5105 break;
5106 case M32C_OPERAND_COND32_24 :
5107 fields->f_dsp_24_u8 = value;
5108 break;
5109 case M32C_OPERAND_COND32_32 :
5110 fields->f_dsp_32_u8 = value;
5111 break;
5112 case M32C_OPERAND_COND32_40 :
5113 fields->f_dsp_40_u8 = value;
5114 break;
5115 case M32C_OPERAND_COND32J :
5116 fields->f_cond32j = value;
5117 break;
5118 case M32C_OPERAND_CR1_PREFIXED_32 :
5119 fields->f_21_3 = value;
5120 break;
5121 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5122 fields->f_13_3 = value;
5123 break;
5124 case M32C_OPERAND_CR16 :
5125 fields->f_9_3 = value;
5126 break;
5127 case M32C_OPERAND_CR2_32 :
5128 fields->f_13_3 = value;
5129 break;
5130 case M32C_OPERAND_CR3_PREFIXED_32 :
5131 fields->f_21_3 = value;
5132 break;
5133 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5134 fields->f_13_3 = value;
5135 break;
5136 case M32C_OPERAND_FLAGS16 :
5137 fields->f_9_3 = value;
5138 break;
5139 case M32C_OPERAND_FLAGS32 :
5140 fields->f_13_3 = value;
5141 break;
5142 case M32C_OPERAND_SCCOND32 :
5143 fields->f_cond16 = value;
5144 break;
5145 case M32C_OPERAND_SIZE :
5146 break;
5147
5148 default :
5149 /* xgettext:c-format */
5150 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5151 opindex);
5152 abort ();
5153 }
5154 }
5155
5156 /* Function to call before using the instruction builder tables. */
5157
5158 void
5159 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5160 {
5161 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5162 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5163
5164 cd->insert_operand = m32c_cgen_insert_operand;
5165 cd->extract_operand = m32c_cgen_extract_operand;
5166
5167 cd->get_int_operand = m32c_cgen_get_int_operand;
5168 cd->set_int_operand = m32c_cgen_set_int_operand;
5169 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5170 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5171 }
git-cvsimport of binutils cvsroot