| blob | 3ef40aba499a206296e3f7ae16ccd0efec721d3f |
1 2006-05-01 Ben Elliston <bje@au.ibm.com>
3 * listing.c (listing_listing): Remove useless loop.
4 * macro.c (macro_expand): Remove is_positional local variable.
5 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
6 and simplify surrounding expressions, where possible.
7 (assign_symbol): Likewise.
8 (s_weakref): Likewise.
9 * symbols.c (colon): Likewise.
11 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
13 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
15 2006-04-30 Thiemo Seufer <ths@mips.com>
16 David Ung <davidu@mips.com>
18 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
19 (mips_immed): New table that records various handling of udi
20 instruction patterns.
21 (mips_ip): Adds udi handling.
23 2006-04-28 Alan Modra <amodra@bigpond.net.au>
25 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
26 of list rather than beginning.
28 2006-04-26 Julian Brown <julian@codesourcery.com>
30 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
31 (is_quarter_float): Rename from above. Simplify slightly.
32 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
33 number.
34 (parse_neon_mov): Parse floating-point constants.
35 (neon_qfloat_bits): Fix encoding.
36 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
37 preference to integer encoding when using the F32 type.
39 2006-04-26 Julian Brown <julian@codesourcery.com>
41 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
42 zero-initialising structures containing it will lead to invalid types).
43 (arm_it): Add vectype to each operand.
44 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
45 defined field.
46 (neon_typed_alias): New structure. Extra information for typed
47 register aliases.
48 (reg_entry): Add neon type info field.
49 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
50 Break out alternative syntax for coprocessor registers, etc. into...
51 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
52 out from arm_reg_parse.
53 (parse_neon_type): Move. Return SUCCESS/FAIL.
54 (first_error): New function. Call to ensure first error which occurs is
55 reported.
56 (parse_neon_operand_type): Parse exactly one type.
57 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
58 (parse_typed_reg_or_scalar): New function. Handle core of both
59 arm_typed_reg_parse and parse_scalar.
60 (arm_typed_reg_parse): Parse a register with an optional type.
61 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
62 result.
63 (parse_scalar): Parse a Neon scalar with optional type.
64 (parse_reg_list): Use first_error.
65 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
66 (neon_alias_types_same): New function. Return true if two (alias) types
67 are the same.
68 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
69 of elements.
70 (insert_reg_alias): Return new reg_entry not void.
71 (insert_neon_reg_alias): New function. Insert type/index information as
72 well as register for alias.
73 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
74 make typed register aliases accordingly.
75 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
76 of line.
77 (s_unreq): Delete type information if present.
78 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
79 (s_arm_unwind_save_mmxwcg): Likewise.
80 (s_arm_unwind_movsp): Likewise.
81 (s_arm_unwind_setfp): Likewise.
82 (parse_shift): Likewise.
83 (parse_shifter_operand): Likewise.
84 (parse_address): Likewise.
85 (parse_tb): Likewise.
86 (tc_arm_regname_to_dw2regnum): Likewise.
87 (md_pseudo_table): Add dn, qn.
88 (parse_neon_mov): Handle typed operands.
89 (parse_operands): Likewise.
90 (neon_type_mask): Add N_SIZ.
91 (N_ALLMODS): New macro.
92 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
93 (el_type_of_type_chk): Add some safeguards.
94 (modify_types_allowed): Fix logic bug.
95 (neon_check_type): Handle operands with types.
96 (neon_three_same): Remove redundant optional arg handling.
97 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
98 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
99 (do_neon_step): Adjust accordingly.
100 (neon_cmode_for_logic_imm): Use first_error.
101 (do_neon_bitfield): Call neon_check_type.
102 (neon_dyadic): Rename to...
103 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
104 to allow modification of type of the destination.
105 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
106 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
107 (do_neon_compare): Make destination be an untyped bitfield.
108 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
109 (neon_mul_mac): Return early in case of errors.
110 (neon_move_immediate): Use first_error.
111 (neon_mac_reg_scalar_long): Fix type to include scalar.
112 (do_neon_dup): Likewise.
113 (do_neon_mov): Likewise (in several places).
114 (do_neon_tbl_tbx): Fix type.
115 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
116 (do_neon_ld_dup): Exit early in case of errors and/or use
117 first_error.
118 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
119 Handle .dn/.qn directives.
120 (REGDEF): Add zero for reg_entry neon field.
122 2006-04-26 Julian Brown <julian@codesourcery.com>
124 * config/tc-arm.c (limits.h): Include.
125 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
126 (fpu_vfp_v3_or_neon_ext): Declare constants.
127 (neon_el_type): New enumeration of types for Neon vector elements.
128 (neon_type_el): New struct. Define type and size of a vector element.
129 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
130 instruction.
131 (neon_type): Define struct. The type of an instruction.
132 (arm_it): Add 'vectype' for the current instruction.
133 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
134 (vfp_sp_reg_pos): Rename to...
135 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
136 tags.
137 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
138 (Neon D or Q register).
139 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
140 register.
141 (GE_OPT_PREFIX_BIG): Define constant, for use in...
142 (my_get_expression): Allow above constant as argument to accept
143 64-bit constants with optional prefix.
144 (arm_reg_parse): Add extra argument to return the specific type of
145 register in when either a D or Q register (REG_TYPE_NDQ) is
146 requested. Can be NULL.
147 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
148 (parse_reg_list): Update for new arm_reg_parse args.
149 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
150 (parse_neon_el_struct_list): New function. Parse element/structure
151 register lists for VLD<n>/VST<n> instructions.
152 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
153 (s_arm_unwind_save_mmxwr): Likewise.
154 (s_arm_unwind_save_mmxwcg): Likewise.
155 (s_arm_unwind_movsp): Likewise.
156 (s_arm_unwind_setfp): Likewise.
157 (parse_big_immediate): New function. Parse an immediate, which may be
158 64 bits wide. Put results in inst.operands[i].
159 (parse_shift): Update for new arm_reg_parse args.
160 (parse_address): Likewise. Add parsing of alignment specifiers.
161 (parse_neon_mov): Parse the operands of a VMOV instruction.
162 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
163 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
164 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
165 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
166 (parse_operands): Handle new codes above.
167 (encode_arm_vfp_sp_reg): Rename to...
168 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
169 selected VFP version only supports D0-D15.
170 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
171 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
172 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
173 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
174 encode_arm_vfp_reg name, and allow 32 D regs.
175 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
176 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
177 regs.
178 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
179 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
180 constant-load and conversion insns introduced with VFPv3.
181 (neon_tab_entry): New struct.
182 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
183 those which are the targets of pseudo-instructions.
184 (neon_opc): Enumerate opcodes, use as indices into...
185 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
186 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
187 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
188 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
189 neon_enc_tab.
190 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
191 Neon instructions.
192 (neon_type_mask): New. Compact type representation for type checking.
193 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
194 permitted type combinations.
195 (N_IGNORE_TYPE): New macro.
196 (neon_check_shape): New function. Check an instruction shape for
197 multiple alternatives. Return the specific shape for the current
198 instruction.
199 (neon_modify_type_size): New function. Modify a vector type and size,
200 depending on the bit mask in argument 1.
201 (neon_type_promote): New function. Convert a given "key" type (of an
202 operand) into the correct type for a different operand, based on a bit
203 mask.
204 (type_chk_of_el_type): New function. Convert a type and size into the
205 compact representation used for type checking.
206 (el_type_of_type_ckh): New function. Reverse of above (only when a
207 single bit is set in the bit mask).
208 (modify_types_allowed): New function. Alter a mask of allowed types
209 based on a bit mask of modifications.
210 (neon_check_type): New function. Check the type of the current
211 instruction against the variable argument list. The "key" type of the
212 instruction is returned.
213 (neon_dp_fixup): New function. Fill in and modify instruction bits for
214 a Neon data-processing instruction depending on whether we're in ARM
215 mode or Thumb-2 mode.
216 (neon_logbits): New function.
217 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
218 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
219 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
220 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
221 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
222 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
223 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
224 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
225 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
226 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
227 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
228 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
229 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
230 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
231 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
232 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
233 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
234 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
235 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
236 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
237 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
238 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
239 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
240 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
241 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
242 helpers.
243 (parse_neon_type): New function. Parse Neon type specifier.
244 (opcode_lookup): Allow parsing of Neon type specifiers.
245 (REGNUM2, REGSETH, REGSET2): New macros.
246 (reg_names): Add new VFPv3 and Neon registers.
247 (NUF, nUF, NCE, nCE): New macros for opcode table.
248 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
249 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
250 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
251 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
252 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
253 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
254 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
255 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
256 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
257 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
258 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
259 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
260 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
261 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
262 fto[us][lh][sd].
263 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
264 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
265 (arm_option_cpu_value): Add vfp3 and neon.
266 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
267 VFPv1 attribute.
269 2006-04-25 Bob Wilson <bob.wilson@acm.org>
271 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
272 syntax instead of hardcoded opcodes with ".w18" suffixes.
273 (wide_branch_opcode): New.
274 (build_transition): Use it to check for wide branch opcodes with
275 either ".w18" or ".w15" suffixes.
277 2006-04-25 Bob Wilson <bob.wilson@acm.org>
279 * config/tc-xtensa.c (xtensa_create_literal_symbol,
280 xg_assemble_literal, xg_assemble_literal_space): Do not set the
281 frag's is_literal flag.
283 2006-04-25 Bob Wilson <bob.wilson@acm.org>
285 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
287 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
289 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
290 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
291 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
292 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
293 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
295 2005-04-20 Paul Brook <paul@codesourcery.com>
297 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
298 all targets.
299 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
301 2006-04-19 Alan Modra <amodra@bigpond.net.au>
303 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
304 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
305 Make some cpus unsupported on ELF. Run "make dep-am".
306 * Makefile.in: Regenerate.
308 2006-04-19 Alan Modra <amodra@bigpond.net.au>
310 * configure.in (--enable-targets): Indent help message.
311 * configure: Regenerate.
313 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
315 PR gas/2533
316 * config/tc-i386.c (i386_immediate): Check illegal immediate
317 register operand.
319 2006-04-18 Alan Modra <amodra@bigpond.net.au>
321 * config/tc-i386.c: Formatting.
322 (output_disp, output_imm): ISO C90 params.
324 * frags.c (frag_offset_fixed_p): Constify args.
325 * frags.h (frag_offset_fixed_p): Ditto.
327 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
328 (COFF_MAGIC): Delete.
330 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
332 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
334 * po/POTFILES.in: Regenerated.
336 2006-04-16 Mark Mitchell <mark@codesourcery.com>
338 * doc/as.texinfo: Mention that some .type syntaxes are not
339 supported on all architectures.
341 2006-04-14 Sterling Augustine <sterling@tensilica.com>
343 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
344 instructions when such transformations have been disabled.
346 2006-04-10 Sterling Augustine <sterling@tensilica.com>
348 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
349 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
350 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
351 decoding the loop instructions. Remove current_offset variable.
352 (xtensa_fix_short_loop_frags): Likewise.
353 (min_bytes_to_other_loop_end): Remove current_offset argument.
355 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
357 * config/tc-z80.c (z80_optimize_expr): Removed.
358 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
360 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
362 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
363 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
364 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
365 atmega644, atmega329, atmega3290, atmega649, atmega6490,
366 atmega406, atmega640, atmega1280, atmega1281, at90can32,
367 at90can64, at90usb646, at90usb647, at90usb1286 and
368 at90usb1287.
369 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
371 2006-04-07 Paul Brook <paul@codesourcery.com>
373 * config/tc-arm.c (parse_operands): Set default error message.
375 2006-04-07 Paul Brook <paul@codesourcery.com>
377 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
379 2006-04-07 Paul Brook <paul@codesourcery.com>
381 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
383 2006-04-07 Paul Brook <paul@codesourcery.com>
385 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
386 (move_or_literal_pool): Handle Thumb-2 instructions.
387 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
389 2006-04-07 Alan Modra <amodra@bigpond.net.au>
391 PR 2512.
392 * config/tc-i386.c (match_template): Move 64-bit operand tests
393 inside loop.
395 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
397 * po/Make-in: Add install-html target.
398 * Makefile.am: Add install-html and install-html-recursive targets.
399 * Makefile.in: Regenerate.
400 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
401 * configure: Regenerate.
402 * doc/Makefile.am: Add install-html and install-html-am targets.
403 * doc/Makefile.in: Regenerate.
405 2006-04-06 Alan Modra <amodra@bigpond.net.au>
407 * frags.c (frag_offset_fixed_p): Reinitialise offset before
408 second scan.
410 2006-04-05 Richard Sandiford <richard@codesourcery.com>
411 Daniel Jacobowitz <dan@codesourcery.com>
413 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
414 (GOTT_BASE, GOTT_INDEX): New.
415 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
416 GOTT_INDEX when generating VxWorks PIC.
417 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
418 use the generic *-*-vxworks* stanza instead.
420 2006-04-04 Alan Modra <amodra@bigpond.net.au>
422 PR 997
423 * frags.c (frag_offset_fixed_p): New function.
424 * frags.h (frag_offset_fixed_p): Declare.
425 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
426 (resolve_expression): Likewise.
428 2006-04-03 Sterling Augustine <sterling@tensilica.com>
430 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
431 of the same length but different numbers of slots.
433 2006-03-30 Andreas Schwab <schwab@suse.de>
435 * configure.in: Fix help string for --enable-targets option.
436 * configure: Regenerate.
438 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
440 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
441 (m68k_ip): ... here. Use for all chips. Protect against buffer
442 overrun and avoid excessive copying.
444 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
445 m68020_control_regs, m68040_control_regs, m68060_control_regs,
446 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
447 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
448 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
449 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
450 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
451 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
452 mcf5282_ctrl, mcfv4e_ctrl): ... these.
453 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
454 (struct m68k_cpu): Change chip field to control_regs.
455 (current_chip): Remove.
456 (control_regs): New.
457 (m68k_archs, m68k_extensions): Adjust.
458 (m68k_cpus): Reorder to be in cpu number order. Adjust.
459 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
460 (find_cf_chip): Reimplement for new organization of cpu table.
461 (select_control_regs): Remove.
462 (mri_chip): Adjust.
463 (struct save_opts): Save control regs, not chip.
464 (s_save, s_restore): Adjust.
465 (m68k_lookup_cpu): Give deprecated warning when necessary.
466 (m68k_init_arch): Adjust.
467 (md_show_usage): Adjust for new cpu table organization.
469 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
471 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
472 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
473 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
474 "elf/bfin.h".
475 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
476 (any_gotrel): New rule.
477 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
478 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
479 "elf/bfin.h".
480 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
481 (bfin_pic_ptr): New function.
482 (md_pseudo_table): Add it for ".picptr".
483 (OPTION_FDPIC): New macro.
484 (md_longopts): Add -mfdpic.
485 (md_parse_option): Handle it.
486 (md_begin): Set BFD flags.
487 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
488 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
489 us for GOT relocs.
490 * Makefile.am (bfin-parse.o): Update dependencies.
491 (DEPTC_bfin_elf): Likewise.
492 * Makefile.in: Regenerate.
494 2006-03-25 Richard Sandiford <richard@codesourcery.com>
496 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
497 mcfemac instead of mcfmac.
499 2006-03-23 Michael Matz <matz@suse.de>
501 * config/tc-i386.c (type_names): Correct placement of 'static'.
502 (reloc): Map some more relocs to their 64 bit counterpart when
503 size is 8.
504 (output_insn): Work around breakage if DEBUG386 is defined.
505 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
506 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
507 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
508 different from i386.
509 (output_imm): Ditto.
510 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
511 Imm64.
512 (md_convert_frag): Jumps can now be larger than 2GB away, error
513 out in that case.
514 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
515 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
517 2006-03-22 Richard Sandiford <richard@codesourcery.com>
518 Daniel Jacobowitz <dan@codesourcery.com>
519 Phil Edwards <phil@codesourcery.com>
520 Zack Weinberg <zack@codesourcery.com>
521 Mark Mitchell <mark@codesourcery.com>
522 Nathan Sidwell <nathan@codesourcery.com>
524 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
525 (md_begin): Complain about -G being used for PIC. Don't change
526 the text, data and bss alignments on VxWorks.
527 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
528 generating VxWorks PIC.
529 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
530 (macro): Likewise, but do not treat la $25 specially for
531 VxWorks PIC, and do not handle jal.
532 (OPTION_MVXWORKS_PIC): New macro.
533 (md_longopts): Add -mvxworks-pic.
534 (md_parse_option): Don't complain about using PIC and -G together here.
535 Handle OPTION_MVXWORKS_PIC.
536 (md_estimate_size_before_relax): Always use the first relaxation
537 sequence on VxWorks.
538 * config/tc-mips.h (VXWORKS_PIC): New.
540 2006-03-21 Paul Brook <paul@codesourcery.com>
542 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
544 2006-03-21 Sterling Augustine <sterling@tensilica.com>
546 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
547 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
548 (get_loop_align_size): New.
549 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
550 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
551 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
552 (get_noop_aligned_address): Use get_loop_align_size.
553 (get_aligned_diff): Likewise.
555 2006-03-21 Paul Brook <paul@codesourcery.com>
557 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
559 2006-03-20 Paul Brook <paul@codesourcery.com>
561 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
562 (do_t_branch): Encode branches inside IT blocks as unconditional.
563 (do_t_cps): New function.
564 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
565 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
566 (opcode_lookup): Allow conditional suffixes on all instructions in
567 Thumb mode.
568 (md_assemble): Advance condexec state before checking for errors.
569 (insns): Use do_t_cps.
571 2006-03-20 Paul Brook <paul@codesourcery.com>
573 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
574 outputting the insn.
576 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
578 * config/tc-vax.c: Update copyright year.
579 * config/tc-vax.h: Likewise.
581 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
583 * config/tc-vax.c (md_chars_to_number): Used only locally, so
584 make it static.
585 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
587 2006-03-17 Paul Brook <paul@codesourcery.com>
589 * config/tc-arm.c (insns): Add ldm and stm.
591 2006-03-17 Ben Elliston <bje@au.ibm.com>
593 PR gas/2446
594 * doc/as.texinfo (Ident): Document this directive more thoroughly.
596 2006-03-16 Paul Brook <paul@codesourcery.com>
598 * config/tc-arm.c (insns): Add "svc".
600 2006-03-13 Bob Wilson <bob.wilson@acm.org>
602 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
603 flag and avoid double underscore prefixes.
605 2006-03-10 Paul Brook <paul@codesourcery.com>
607 * config/tc-arm.c (md_begin): Handle EABIv5.
608 (arm_eabis): Add EF_ARM_EABI_VER5.
609 * doc/c-arm.texi: Document -meabi=5.
611 2006-03-10 Ben Elliston <bje@au.ibm.com>
613 * app.c (do_scrub_chars): Simplify string handling.
615 2006-03-07 Richard Sandiford <richard@codesourcery.com>
616 Daniel Jacobowitz <dan@codesourcery.com>
617 Zack Weinberg <zack@codesourcery.com>
618 Nathan Sidwell <nathan@codesourcery.com>
619 Paul Brook <paul@codesourcery.com>
620 Ricardo Anguiano <anguiano@codesourcery.com>
621 Phil Edwards <phil@codesourcery.com>
623 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
624 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
625 R_ARM_ABS12 reloc.
626 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
627 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
628 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
630 2006-03-06 Bob Wilson <bob.wilson@acm.org>
632 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
633 even when using the text-section-literals option.
635 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
637 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
638 and cf.
639 (m68k_ip): <case 'J'> Check we have some control regs.
640 (md_parse_option): Allow raw arch switch.
641 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
642 whether 68881 or cfloat was meant by -mfloat.
643 (md_show_usage): Adjust extension display.
644 (m68k_elf_final_processing): Adjust.
646 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
648 * config/tc-avr.c (avr_mod_hash_value): New function.
649 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
650 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
651 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
652 instead of int avr_ldi_expression: use avr_mod_hash_value instead
653 of (int).
654 (tc_gen_reloc): Handle substractions of symbols, if possible do
655 fixups, abort otherwise.
656 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
657 tc_fix_adjustable): Define.
659 2006-03-02 James E Wilson <wilson@specifix.com>
661 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
662 change the template, then clear md.slot[curr].end_of_insn_group.
664 2006-02-28 Jan Beulich <jbeulich@novell.com>
666 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
668 2006-02-28 Jan Beulich <jbeulich@novell.com>
670 PR/1070
671 * macro.c (getstring): Don't treat parentheses special anymore.
672 (get_any_string): Don't consider '(' and ')' as quoting anymore.
673 Special-case '(', ')', '[', and ']' when dealing with non-quoting
674 characters.
676 2006-02-28 Mat <mat@csail.mit.edu>
678 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
680 2006-02-27 Jakub Jelinek <jakub@redhat.com>
682 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
683 field.
684 (CFI_signal_frame): Define.
685 (cfi_pseudo_table): Add .cfi_signal_frame.
686 (dot_cfi): Handle CFI_signal_frame.
687 (output_cie): Handle cie->signal_frame.
688 (select_cie_for_fde): Don't share CIE if signal_frame flag is
689 different. Copy signal_frame from FDE to newly created CIE.
690 * doc/as.texinfo: Document .cfi_signal_frame.
692 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
694 * doc/Makefile.am: Add html target.
695 * doc/Makefile.in: Regenerate.
696 * po/Make-in: Add html target.
698 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
700 * config/tc-i386.c (output_insn): Support Intel Merom New
701 Instructions.
703 * config/tc-i386.h (CpuMNI): New.
704 (CpuUnknownFlags): Add CpuMNI.
706 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
708 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
709 (hpriv_reg_table): New table for hyperprivileged registers.
710 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
711 register encoding.
713 2006-02-24 DJ Delorie <dj@redhat.com>
715 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
716 (tc_gen_reloc): Don't define.
717 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
718 (OPTION_LINKRELAX): New.
719 (md_longopts): Add it.
720 (m32c_relax): New.
721 (md_parse_options): Set it.
722 (md_assemble): Emit relaxation relocs as needed.
723 (md_convert_frag): Emit relaxation relocs as needed.
724 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
725 (m32c_apply_fix): New.
726 (tc_gen_reloc): New.
727 (m32c_force_relocation): Force out jump relocs when relaxing.
728 (m32c_fix_adjustable): Return false if relaxing.
730 2006-02-24 Paul Brook <paul@codesourcery.com>
732 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
733 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
734 (struct asm_barrier_opt): Define.
735 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
736 (parse_psr): Accept V7M psr names.
737 (parse_barrier): New function.
738 (enum operand_parse_code): Add OP_oBARRIER.
739 (parse_operands): Implement OP_oBARRIER.
740 (do_barrier): New function.
741 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
742 (do_t_cpsi): Add V7M restrictions.
743 (do_t_mrs, do_t_msr): Validate V7M variants.
744 (md_assemble): Check for NULL variants.
745 (v7m_psrs, barrier_opt_names): New tables.
746 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
747 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
748 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
749 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
750 (struct cpu_arch_ver_table): Define.
751 (cpu_arch_ver): New.
752 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
753 Tag_CPU_arch_profile.
754 * doc/c-arm.texi: Document new cpu and arch options.
756 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
758 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
760 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
762 * config/tc-ia64.c: Update copyright years.
764 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
766 * config/tc-ia64.c (specify_resource): Add the rule 17 from
767 SDM 2.2.
769 2005-02-22 Paul Brook <paul@codesourcery.com>
771 * config/tc-arm.c (do_pld): Remove incorrect write to
772 inst.instruction.
773 (encode_thumb32_addr_mode): Use correct operand.
775 2006-02-21 Paul Brook <paul@codesourcery.com>
777 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
779 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
780 Anil Paranjape <anilp1@kpitcummins.com>
781 Shilin Shakti <shilins@kpitcummins.com>
783 * Makefile.am: Add xc16x related entry.
784 * Makefile.in: Regenerate.
785 * configure.in: Added xc16x related entry.
786 * configure: Regenerate.
787 * config/tc-xc16x.h: New file
788 * config/tc-xc16x.c: New file
789 * doc/c-xc16x.texi: New file for xc16x
790 * doc/all.texi: Entry for xc16x
791 * doc/Makefile.texi: Added c-xc16x.texi
792 * NEWS: Announce the support for the new target.
794 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
796 * configure.tgt: set emulation for mips-*-netbsd*
798 2006-02-14 Jakub Jelinek <jakub@redhat.com>
800 * config.in: Rebuilt.
802 2006-02-13 Bob Wilson <bob.wilson@acm.org>
804 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
805 from 1, not 0, in error messages.
806 (md_assemble): Simplify special-case check for ENTRY instructions.
807 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
808 operand in error message.
810 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
812 * configure.tgt (arm-*-linux-gnueabi*): Change to
813 arm-*-linux-*eabi*.
815 2006-02-10 Nick Clifton <nickc@redhat.com>
817 * config/tc-crx.c (check_range): Ensure that the sign bit of a
818 32-bit value is propagated into the upper bits of a 64-bit long.
820 * config/tc-arc.c (init_opcode_tables): Fix cast.
821 (arc_extoper, md_operand): Likewise.
823 2006-02-09 David Heine <dlheine@tensilica.com>
825 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
826 each relaxation step.
828 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
830 * configure.in (CHECK_DECLS): Add vsnprintf.
831 * configure: Regenerate.
832 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
833 include/declare here, but...
834 * as.h: Move code detecting VARARGS idiom to the top.
835 (errno.h, stdarg.h, varargs.h, va_list): ...here.
836 (vsnprintf): Declare if not already declared.
838 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
840 * as.c (close_output_file): New.
841 (main): Register close_output_file with xatexit before
842 dump_statistics. Don't call output_file_close.
844 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
846 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
847 mcf5329_control_regs): New.
848 (not_current_architecture, selected_arch, selected_cpu): New.
849 (m68k_archs, m68k_extensions): New.
850 (archs): Renamed to ...
851 (m68k_cpus): ... here. Adjust.
852 (n_arches): Remove.
853 (md_pseudo_table): Add arch and cpu directives.
854 (find_cf_chip, m68k_ip): Adjust table scanning.
855 (no_68851, no_68881): Remove.
856 (md_assemble): Lazily initialize.
857 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
858 (md_init_after_args): Move functionality to m68k_init_arch.
859 (mri_chip): Adjust table scanning.
860 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
861 options with saner parsing.
862 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
863 m68k_init_arch): New.
864 (s_m68k_cpu, s_m68k_arch): New.
865 (md_show_usage): Adjust.
866 (m68k_elf_final_processing): Set CF EF flags.
867 * config/tc-m68k.h (m68k_init_after_args): Remove.
868 (tc_init_after_args): Remove.
869 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
870 (M68k-Directives): Document .arch and .cpu directives.
872 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
874 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
875 synonyms for equ and defl.
876 (z80_cons_fix_new): New function.
877 (emit_byte): Disallow relative jumps to absolute locations.
878 (emit_data): Only handle defb, prototype changed, because defb is
879 now handled as pseudo-op rather than an instruction.
880 (instab): Entries for defb,defw,db,dw moved from here...
881 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
882 Add entries for def24,def32,d24,d32.
883 (md_assemble): Improved error handling.
884 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
885 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
886 (z80_cons_fix_new): Declare.
887 * doc/c-z80.texi (defb, db): Mention warning on overflow.
888 (def24,d24,def32,d32): New pseudo-ops.
890 2006-02-02 Paul Brook <paul@codesourcery.com>
892 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
894 2005-02-02 Paul Brook <paul@codesourcery.com>
896 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
897 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
898 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
899 T2_OPCODE_RSB): Define.
900 (thumb32_negate_data_op): New function.
901 (md_apply_fix): Use it.
903 2006-01-31 Bob Wilson <bob.wilson@acm.org>
905 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
906 fields.
907 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
908 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
909 subtracted symbols.
910 (relaxation_requirements): Add pfinish_frag argument and use it to
911 replace setting tinsn->record_fix fields.
912 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
913 and vinsn_to_insnbuf. Remove references to record_fix and
914 slot_sub_symbols fields.
915 (xtensa_mark_narrow_branches): Delete unused code.
916 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
917 a symbol.
918 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
919 record_fix fields.
920 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
921 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
922 of the record_fix field. Simplify error messages for unexpected
923 symbolic operands.
924 (set_expr_symbol_offset_diff): Delete.
926 2006-01-31 Paul Brook <paul@codesourcery.com>
928 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
930 2006-01-31 Paul Brook <paul@codesourcery.com>
931 Richard Earnshaw <rearnsha@arm.com>
933 * config/tc-arm.c: Use arm_feature_set.
934 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
935 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
936 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
937 New variables.
938 (insns): Use them.
939 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
940 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
941 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
942 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
943 feature flags.
944 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
945 (arm_opts): Move old cpu/arch options from here...
946 (arm_legacy_opts): ... to here.
947 (md_parse_option): Search arm_legacy_opts.
948 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
949 (arm_float_abis, arm_eabis): Make const.
951 2006-01-25 Bob Wilson <bob.wilson@acm.org>
953 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
955 2006-01-21 Jie Zhang <jie.zhang@analog.com>
957 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
958 in load immediate intruction.
960 2006-01-21 Jie Zhang <jie.zhang@analog.com>
962 * config/bfin-parse.y (value_match): Use correct conversion
963 specifications in template string for __FILE__ and __LINE__.
964 (binary): Ditto.
965 (unary): Ditto.
967 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
969 Introduce TLS descriptors for i386 and x86_64.
970 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
971 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
972 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
973 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
974 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
975 displacement bits.
976 (build_modrm_byte): Set up zero modrm for TLS desc calls.
977 (lex_got): Handle @tlsdesc and @tlscall.
978 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
980 2006-01-11 Nick Clifton <nickc@redhat.com>
982 Fixes for building on 64-bit hosts:
983 * config/tc-avr.c (mod_index): New union to allow conversion
984 between pointers and integers.
985 (md_begin, avr_ldi_expression): Use it.
986 * config/tc-i370.c (md_assemble): Add cast for argument to print
987 statement.
988 * config/tc-tic54x.c (subsym_substitute): Likewise.
989 * config/tc-mn10200.c (md_assemble): Use a union to convert the
990 opindex field of fr_cgen structure into a pointer so that it can
991 be stored in a frag.
992 * config/tc-mn10300.c (md_assemble): Likewise.
993 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
994 types.
995 * config/tc-v850.c: Replace uses of (int) casts with correct
996 types.
998 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1000 PR gas/2117
1001 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1003 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1005 PR gas/2101
1006 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1007 a local-label reference.
1009 For older changes see ChangeLog-2005
1010 \f
1011 Local Variables:
1012 mode: change-log
1013 left-margin: 8
1014 fill-column: 74
1015 version-control: never
1016 End: