2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
9 @chapter AVR Dependent Features
13 @node Machine Dependencies
14 @chapter AVR Dependent Features
19 * AVR Options:: Options
21 * AVR Opcodes:: Opcodes
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
31 @cindex @code{-mmcu=} command line option, AVR
33 Specify ATMEL AVR instruction set or MCU type.
35 Instruction set avr1 is for the minimal AVR core, not supported by the C
36 compiler, only for assembler programs (MCU types: at90s1200, attiny10,
37 attiny11, attiny12, attiny15, attiny28).
39 Instruction set avr2 (default) is for the classic AVR core with up to
40 8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
41 attiny26, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434,
42 at90s8515, at90c8534, at90s8535, at86rf401, attiny13, attiny2313,
43 attiny261, attiny461, attiny861, attiny24, attiny44, attiny84, attiny25,
46 Instruction set avr3 is for the classic AVR core with up to 128K program
47 memory space (MCU types: atmega103, atmega603, at43usb320, at43usb355,
50 Instruction set avr4 is for the enhanced AVR core with up to 8K program
51 memory space (MCU types: atmega48, atmega8, atmega83, atmega85, atmega88,
52 atmega8515, atmega8535, at90pwm2, at90pwm3).
54 Instruction set avr5 is for the enhanced AVR core with up to 128K program
55 memory space (MCU types: atmega16, atmega161, atmega162, atmega163,
56 atmega164p, atmega165, atmega165p, atmega168, atmega169, atmega169p,
57 atmega32, atmega323, atmega324p, atmega325, atmega329, atmega3250,
58 atmega3290, atmega406, atmega64, atmega640, atmega644, atmega644p,
59 atmega128, atmega1280, atmega1281, atmega645, atmega649, atmega6450,
60 atmega6490, at90can32, at90can64, at90can128, at90usb646, at90usb647,
61 at90usb1286, at90usb1287, at94k).
63 Instruction set avr6 is for the enhanced AVR core with 256K program
64 memory space (MCU types: atmega2560, atmega2561).
66 @cindex @code{-mall-opcodes} command line option, AVR
68 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
70 @cindex @code{-mno-skip-bug} command line option, AVR
72 This option disable warnings for skipping two-word instructions.
74 @cindex @code{-mno-wrap} command line option, AVR
76 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
84 * AVR-Chars:: Special Characters
85 * AVR-Regs:: Register Names
86 * AVR-Modifiers:: Relocatable Expression Modifiers
90 @subsection Special Characters
92 @cindex line comment character, AVR
93 @cindex AVR line comment character
95 The presence of a @samp{;} on a line indicates the start of a comment
96 that extends to the end of the current line. If a @samp{#} appears as
97 the first character of a line, the whole line is treated as a comment.
99 @cindex line separator, AVR
100 @cindex statement separator, AVR
101 @cindex AVR line separator
103 The @samp{$} character can be used instead of a newline to separate
107 @subsection Register Names
109 @cindex AVR register names
110 @cindex register names, AVR
112 The AVR has 32 x 8-bit general purpouse working registers @samp{r0},
113 @samp{r1}, ... @samp{r31}.
114 Six of the 32 registers can be used as three 16-bit indirect address
115 register pointers for Data Space addressing. One of the these address
116 pointers can also be used as an address pointer for look up tables in
117 Flash program memory. These added function registers are the 16-bit
118 @samp{X}, @samp{Y} and @samp{Z} - registers.
127 @subsection Relocatable Expression Modifiers
129 @cindex AVR modifiers
132 The assembler supports several modifiers when using relocatable addresses
133 in AVR instruction operands. The general syntax is the following:
136 modifier(relocatable-expression)
140 @cindex symbol modifiers
144 This modifier allows you to use bits 0 through 7 of
145 an address expression as 8 bit relocatable expression.
149 This modifier allows you to use bits 7 through 15 of an address expression
150 as 8 bit relocatable expression. This is useful with, for example, the
151 AVR @samp{ldi} instruction and @samp{lo8} modifier.
162 This modifier allows you to use bits 16 through 23 of
163 an address expression as 8 bit relocatable expression.
164 Also, can be useful for loading 32 bit constants.
168 Synonym of @samp{hh8}.
172 This modifier allows you to use bits 24 through 31 of
173 an expression as 8 bit expression. This is useful with, for example, the
174 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
175 @samp{hhi8}, modifier.
180 ldi r26, lo8(285774925)
181 ldi r27, hi8(285774925)
182 ldi r28, hlo8(285774925)
183 ldi r29, hhi8(285774925)
184 ; r29,r28,r27,r26 = 285774925
189 This modifier allows you to use bits 0 through 7 of
190 an address expression as 8 bit relocatable expression.
191 This modifier useful for addressing data or code from
192 Flash/Program memory. The using of @samp{pm_lo8} similar
197 This modifier allows you to use bits 8 through 15 of
198 an address expression as 8 bit relocatable expression.
199 This modifier useful for addressing data or code from
200 Flash/Program memory.
204 This modifier allows you to use bits 15 through 23 of
205 an address expression as 8 bit relocatable expression.
206 This modifier useful for addressing data or code from
207 Flash/Program memory.
214 @cindex AVR opcode summary
215 @cindex opcode summary, AVR
216 @cindex mnemonics, AVR
217 @cindex instruction summary, AVR
218 For detailed information on the AVR machine instruction set, see
219 @url{www.atmel.com/products/AVR}.
221 @code{@value{AS}} implements all the standard AVR opcodes.
222 The following table summarizes the AVR opcodes, and their arguments.
227 d @r{`ldi' register (r16-r31)}
228 v @r{`movw' even register (r0, r2, ..., r28, r30)}
229 a @r{`fmul' register (r16-r23)}
230 w @r{`adiw' register (r24,r26,r28,r30)}
231 e @r{pointer registers (X,Y,Z)}
232 b @r{base pointer register and displacement ([YZ]+disp)}
233 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
234 M @r{immediate value from 0 to 255}
235 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
236 s @r{immediate value from 0 to 7}
237 P @r{Port address value from 0 to 63. (in, out)}
238 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
239 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
240 i @r{immediate value}
241 l @r{signed pc relative offset from -64 to 63}
242 L @r{signed pc relative offset from -2048 to 2047}
243 h @r{absolute code address (call, jmp)}
244 S @r{immediate value from 0 to 7 (S = s << 4)}
245 ? @r{use this opcode entry if no parameters, else use next opcode entry}
263 100101001SSS1000 bclr S
264 100101000SSS1000 bset S
265 1001010100001001 icall
266 1001010000001001 ijmp
267 1001010111001000 lpm ?
268 1001000ddddd010+ lpm r,z
269 1001010111011000 elpm ?
270 1001000ddddd011+ elpm r,z
273 1001010100011000 reti
274 1001010110001000 sleep
275 1001010110011000 break
278 000111rdddddrrrr adc r,r
279 000011rdddddrrrr add r,r
280 001000rdddddrrrr and r,r
281 000101rdddddrrrr cp r,r
282 000001rdddddrrrr cpc r,r
283 000100rdddddrrrr cpse r,r
284 001001rdddddrrrr eor r,r
285 001011rdddddrrrr mov r,r
286 100111rdddddrrrr mul r,r
287 001010rdddddrrrr or r,r
288 000010rdddddrrrr sbc r,r
289 000110rdddddrrrr sub r,r
290 001001rdddddrrrr clr r
291 000011rdddddrrrr lsl r
292 000111rdddddrrrr rol r
293 001000rdddddrrrr tst r
294 0111KKKKddddKKKK andi d,M
295 0111KKKKddddKKKK cbr d,n
296 1110KKKKddddKKKK ldi d,M
297 11101111dddd1111 ser d
298 0110KKKKddddKKKK ori d,M
299 0110KKKKddddKKKK sbr d,M
300 0011KKKKddddKKKK cpi d,M
301 0100KKKKddddKKKK sbci d,M
302 0101KKKKddddKKKK subi d,M
303 1111110rrrrr0sss sbrc r,s
304 1111111rrrrr0sss sbrs r,s
305 1111100ddddd0sss bld r,s
306 1111101ddddd0sss bst r,s
307 10110PPdddddPPPP in r,P
308 10111PPrrrrrPPPP out P,r
309 10010110KKddKKKK adiw w,K
310 10010111KKddKKKK sbiw w,K
311 10011000pppppsss cbi p,s
312 10011010pppppsss sbi p,s
313 10011001pppppsss sbic p,s
314 10011011pppppsss sbis p,s
315 111101lllllll000 brcc l
316 111100lllllll000 brcs l
317 111100lllllll001 breq l
318 111101lllllll100 brge l
319 111101lllllll101 brhc l
320 111100lllllll101 brhs l
321 111101lllllll111 brid l
322 111100lllllll111 brie l
323 111100lllllll000 brlo l
324 111100lllllll100 brlt l
325 111100lllllll010 brmi l
326 111101lllllll001 brne l
327 111101lllllll010 brpl l
328 111101lllllll000 brsh l
329 111101lllllll110 brtc l
330 111100lllllll110 brts l
331 111101lllllll011 brvc l
332 111100lllllll011 brvs l
333 111101lllllllsss brbc s,l
334 111100lllllllsss brbs s,l
335 1101LLLLLLLLLLLL rcall L
336 1100LLLLLLLLLLLL rjmp L
337 1001010hhhhh111h call h
338 1001010hhhhh110h jmp h
339 1001010rrrrr0101 asr r
340 1001010rrrrr0000 com r
341 1001010rrrrr1010 dec r
342 1001010rrrrr0011 inc r
343 1001010rrrrr0110 lsr r
344 1001010rrrrr0001 neg r
345 1001000rrrrr1111 pop r
346 1001001rrrrr1111 push r
347 1001010rrrrr0111 ror r
348 1001010rrrrr0010 swap r
349 00000001ddddrrrr movw v,v
350 00000010ddddrrrr muls d,d
351 000000110ddd0rrr mulsu a,a
352 000000110ddd1rrr fmul a,a
353 000000111ddd0rrr fmuls a,a
354 000000111ddd1rrr fmulsu a,a
355 1001001ddddd0000 sts i,r
356 1001000ddddd0000 lds r,i
357 10o0oo0dddddbooo ldd r,b
358 100!000dddddee-+ ld r,e
359 10o0oo1rrrrrbooo std b,r
360 100!001rrrrree-+ st e,r
361 1001010100011001 eicall
362 1001010000011001 eijmp