opcodes/a29k-dis.c

   1 /* Instruction printing code for the AMD 29000
   2    Copyright (C) 1990, 93, 94, 95, 1998 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.  Written by Jim Kingdon.
   4
   5 This file is part of GDB.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program; if not, write to the Free Software
  19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #include "sysdep.h"
  22 #include "dis-asm.h"
  23 #include "opcode/a29k.h"
  24
  25 /* Print a symbolic representation of a general-purpose
  26    register number NUM on STREAM.
  27    NUM is a number as found in the instruction, not as found in
  28    debugging symbols; it must be in the range 0-255.  */
  29 static void
  30 print_general (num, info)
  31      int num;
  32      struct disassemble_info *info;
  33 {
  34   if (num < 128)
  35     (*info->fprintf_func) (info->stream, "gr%d", num);
  36   else
  37     (*info->fprintf_func) (info->stream, "lr%d", num - 128);
  38 }
  39
  40 /* Like print_general but a special-purpose register.
  41
  42    The mnemonics used by the AMD assembler are not quite the same
  43    as the ones in the User's Manual.  We use the ones that the
  44    assembler uses.  */
  45 static void
  46 print_special (num, info)
  47      unsigned int num;
  48      struct disassemble_info *info;
  49 {
  50   /* Register names of registers 0-SPEC0_NUM-1.  */
  51   static char *spec0_names[] = {
  52     "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr",
  53     "pc0", "pc1", "pc2", "mmu", "lru", "rsn", "rma0", "rmc0", "rma1", "rmc1",
  54     "spc0", "spc1", "spc2", "iba0", "ibc0", "iba1", "ibc1", "dba", "dbc",
  55     "cir", "cdr"
  56     };
  57 #define SPEC0_NUM ((sizeof spec0_names) / (sizeof spec0_names[0]))
  58
  59   /* Register names of registers 128-128+SPEC128_NUM-1.  */
  60   static char *spec128_names[] = {
  61     "ipc", "ipa", "ipb", "q", "alu", "bp", "fc", "cr"
  62     };
  63 #define SPEC128_NUM ((sizeof spec128_names) / (sizeof spec128_names[0]))
  64
  65   /* Register names of registers 160-160+SPEC160_NUM-1.  */
  66   static char *spec160_names[] = {
  67     "fpe", "inte", "fps", "sr163", "exop"
  68     };
  69 #define SPEC160_NUM ((sizeof spec160_names) / (sizeof spec160_names[0]))
  70
  71   if (num < SPEC0_NUM)
  72     (*info->fprintf_func) (info->stream, spec0_names[num]);
  73   else if (num >= 128 && num < 128 + SPEC128_NUM)
  74     (*info->fprintf_func) (info->stream, spec128_names[num-128]);
  75   else if (num >= 160 && num < 160 + SPEC160_NUM)
  76     (*info->fprintf_func) (info->stream, spec160_names[num-160]);
  77   else
  78     (*info->fprintf_func) (info->stream, "sr%d", num);
  79 }
  80
  81 /* Is an instruction with OPCODE a delayed branch?  */
  82 static int
  83 is_delayed_branch (opcode)
  84      int opcode;
  85 {
  86   return (opcode == 0xa8 || opcode == 0xa9 || opcode == 0xa0 || opcode == 0xa1
  87           || opcode == 0xa4 || opcode == 0xa5
  88           || opcode == 0xb4 || opcode == 0xb5
  89           || opcode == 0xc4 || opcode == 0xc0
  90           || opcode == 0xac || opcode == 0xad
  91           || opcode == 0xcc);
  92 }
  93
  94 /* Now find the four bytes of INSN and put them in *INSN{0,8,16,24}.  */
  95 static void
  96 find_bytes_big (insn, insn0, insn8, insn16, insn24)
  97      char *insn;
  98      unsigned char *insn0;
  99      unsigned char *insn8;
 100      unsigned char *insn16;
 101      unsigned char *insn24;
 102 {
 103   *insn24 = insn[0];
 104   *insn16 = insn[1];
 105   *insn8  = insn[2];
 106   *insn0  = insn[3];
 107 }
 108
 109 static void
 110 find_bytes_little (insn, insn0, insn8, insn16, insn24)
 111      char *insn;
 112      unsigned char *insn0;
 113      unsigned char *insn8;
 114      unsigned char *insn16;
 115      unsigned char *insn24;
 116 {
 117   *insn24 = insn[3];
 118   *insn16 = insn[2];
 119   *insn8 = insn[1];
 120   *insn0 = insn[0];
 121 }
 122
 123 typedef void (*find_byte_func_type)
 124      PARAMS ((char *, unsigned char *, unsigned char *,
 125               unsigned char *, unsigned char *));
 126
 127 /* Print one instruction from MEMADDR on INFO->STREAM.
 128    Return the size of the instruction (always 4 on a29k).  */
 129
 130 static int
 131 print_insn (memaddr, info)
 132      bfd_vma memaddr;
 133      struct disassemble_info *info;
 134 {
 135   /* The raw instruction.  */
 136   char insn[4];
 137
 138   /* The four bytes of the instruction.  */
 139   unsigned char insn24, insn16, insn8, insn0;
 140
 141   find_byte_func_type find_byte_func = (find_byte_func_type)info->private_data;
 142
 143   struct a29k_opcode CONST * opcode;
 144
 145   {
 146     int status =
 147       (*info->read_memory_func) (memaddr, (bfd_byte *) &insn[0], 4, info);
 148     if (status != 0)
 149       {
 150         (*info->memory_error_func) (status, memaddr, info);
 151         return -1;
 152       }
 153   }
 154
 155   (*find_byte_func) (insn, &insn0, &insn8, &insn16, &insn24);
 156
 157   printf ("%02x%02x%02x%02x ", insn24, insn16, insn8, insn0);
 158
 159   /* Handle the nop (aseq 0x40,gr1,gr1) specially */
 160   if ((insn24==0x70) && (insn16==0x40) && (insn8==0x01) && (insn0==0x01)) {
 161     (*info->fprintf_func) (info->stream,"nop");
 162     return 4;
 163   }
 164
 165   /* The opcode is always in insn24.  */
 166   for (opcode = &a29k_opcodes[0];
 167        opcode < &a29k_opcodes[num_opcodes];
 168        ++opcode)
 169     {
 170       if (((unsigned long) insn24 << 24) == opcode->opcode)
 171         {
 172           char *s;
 173
 174           (*info->fprintf_func) (info->stream, "%s ", opcode->name);
 175           for (s = opcode->args; *s != '\0'; ++s)
 176             {
 177               switch (*s)
 178                 {
 179                 case 'a':
 180                   print_general (insn8, info);
 181                   break;
 182
 183                 case 'b':
 184                   print_general (insn0, info);
 185                   break;
 186
 187                 case 'c':
 188                   print_general (insn16, info);
 189                   break;
 190
 191                 case 'i':
 192                   (*info->fprintf_func) (info->stream, "%d", insn0);
 193                   break;
 194
 195                 case 'x':
 196                   (*info->fprintf_func) (info->stream, "0x%x", (insn16 << 8) + insn0);
 197                   break;
 198
 199                 case 'h':
 200                   /* This used to be %x for binutils.  */
 201                   (*info->fprintf_func) (info->stream, "0x%x",
 202                                     (insn16 << 24) + (insn0 << 16));
 203                   break;
 204
 205                 case 'X':
 206                   (*info->fprintf_func) (info->stream, "%d",
 207                                     ((insn16 << 8) + insn0) | 0xffff0000);
 208                   break;
 209
 210                 case 'P':
 211                   /* This output looks just like absolute addressing, but
 212                      maybe that's OK (it's what the GDB m68k and EBMON
 213                      a29k disassemblers do).  */
 214                   /* All the shifting is to sign-extend it.  p*/
 215                   (*info->print_address_func)
 216                     (memaddr +
 217                      (((int)((insn16 << 10) + (insn0 << 2)) << 14) >> 14),
 218                      info);
 219                   break;
 220
 221                 case 'A':
 222                   (*info->print_address_func)
 223                     ((insn16 << 10) + (insn0 << 2), info);
 224                   break;
 225
 226                 case 'e':
 227                   (*info->fprintf_func) (info->stream, "%d", insn16 >> 7);
 228                   break;
 229
 230                 case 'n':
 231                   (*info->fprintf_func) (info->stream, "0x%x", insn16 & 0x7f);
 232                   break;
 233
 234                 case 'v':
 235                   (*info->fprintf_func) (info->stream, "0x%x", insn16);
 236                   break;
 237
 238                 case 's':
 239                   print_special (insn8, info);
 240                   break;
 241
 242                 case 'u':
 243                   (*info->fprintf_func) (info->stream, "%d", insn0 >> 7);
 244                   break;
 245
 246                 case 'r':
 247                   (*info->fprintf_func) (info->stream, "%d", (insn0 >> 4) & 7);
 248                   break;
 249
 250                 case 'I':
 251                   if ((insn16 & 3) != 0)
 252                     (*info->fprintf_func) (info->stream, "%d", insn16 & 3);
 253                   break;
 254
 255                 case 'd':
 256                   (*info->fprintf_func) (info->stream, "%d", (insn0 >> 2) & 3);
 257                   break;
 258
 259                 case 'f':
 260                   (*info->fprintf_func) (info->stream, "%d", insn0 & 3);
 261                   break;
 262
 263                 case 'F':
 264                   (*info->fprintf_func) (info->stream, "%d", (insn16 >> 2) & 15);
 265                   break;
 266
 267                 case 'C':
 268                   (*info->fprintf_func) (info->stream, "%d", insn16 & 3);
 269                   break;
 270
 271                 default:
 272                   (*info->fprintf_func) (info->stream, "%c", *s);
 273                 }
 274             }
 275
 276           /* Now we look for a const,consth pair of instructions,
 277              in which case we try to print the symbolic address.  */
 278           if (insn24 == 2)  /* consth */
 279             {
 280               int errcode;
 281               char prev_insn[4];
 282               unsigned char prev_insn0, prev_insn8, prev_insn16, prev_insn24;
 283
 284               errcode = (*info->read_memory_func) (memaddr - 4,
 285                                                    (bfd_byte *) &prev_insn[0],
 286                                                    4,
 287                                                    info);
 288               if (errcode == 0)
 289                 {
 290                   /* If it is a delayed branch, we need to look at the
 291                      instruction before the delayed brach to handle
 292                      things like
 293
 294                      const _foo
 295                      call _printf
 296                      consth _foo
 297                      */
 298                   (*find_byte_func) (prev_insn, &prev_insn0, &prev_insn8,
 299                                      &prev_insn16, &prev_insn24);
 300                   if (is_delayed_branch (prev_insn24))
 301                     {
 302                       errcode = (*info->read_memory_func)
 303                         (memaddr - 8, (bfd_byte *) &prev_insn[0], 4, info);
 304                       (*find_byte_func) (prev_insn, &prev_insn0, &prev_insn8,
 305                                          &prev_insn16, &prev_insn24);
 306                     }
 307                 }
 308
 309               /* If there was a problem reading memory, then assume
 310                  the previous instruction was not const.  */
 311               if (errcode == 0)
 312                 {
 313                   /* Is it const to the same register?  */
 314                   if (prev_insn24 == 3
 315                       && prev_insn8 == insn8)
 316                     {
 317                       (*info->fprintf_func) (info->stream, "\t; ");
 318                       (*info->print_address_func)
 319                         (((insn16 << 24) + (insn0 << 16)
 320                           + (prev_insn16 << 8) + (prev_insn0)),
 321                          info);
 322                     }
 323                 }
 324             }
 325
 326           return 4;
 327         }
 328     }
 329   /* This used to be %8x for binutils.  */
 330   (*info->fprintf_func)
 331     (info->stream, ".word 0x%08x",
 332      (insn24 << 24) + (insn16 << 16) + (insn8 << 8) + insn0);
 333   return 4;
 334 }
 335
 336 /* Disassemble an big-endian a29k instruction.  */
 337 int
 338 print_insn_big_a29k (memaddr, info)
 339      bfd_vma memaddr;
 340      struct disassemble_info *info;
 341 {
 342   info->private_data = (PTR) find_bytes_big;
 343   return print_insn (memaddr, info);
 344 }
 345
 346 /* Disassemble a little-endian a29k instruction.  */
 347 int
 348 print_insn_little_a29k (memaddr, info)
 349      bfd_vma memaddr;
 350      struct disassemble_info *info;
 351 {
 352   info->private_data = (PTR) find_bytes_little;
 353   return print_insn (memaddr, info);
 354 }