| blob | f216271cf52c7c9a26ef8e05f0dba7151d037424 |
1 2006-05-06 Joseph S. Myers <joseph@codesourcery.com>
3 Backport:
4 2006-03-30 Jakub Jelinek <jakub@redhat.com>
5 * ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
6 bfd_find_nearest_line succeeded for %C or %D, but filename
7 is NULL, print section+offset at the end.
9 2006-05-05 Julian Brown <julian@codesourcery.com>
11 * gas/config/tc-arm.c (stdarg.h): include.
12 (arm_it): Add uncond_value field. Add isvec and issingle to operand
13 array.
14 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
15 REG_TYPE_NSDQ (single, double or quad vector reg).
16 (reg_expected_msgs): Update.
17 (BAD_FPU): Add macro for unsupported FPU instruction error.
18 (parse_neon_type): Support 'd' as an alias for .f64.
19 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
20 sets of registers.
21 (parse_vfp_reg_list): Don't update first arg on error.
22 (parse_neon_mov): Support extra syntax for VFP moves.
23 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
24 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
25 (parse_operands): Support isvec, issingle operands fields, new parse
26 codes above.
27 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
28 msr variants.
29 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
30 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
31 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
32 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
33 shapes.
34 (neon_shape): Redefine in terms of above.
35 (neon_shape_class): New enumeration, table of shape classes.
36 (neon_shape_el): New enumeration. One element of a shape.
37 (neon_shape_el_size): Register widths of above, where appropriate.
38 (neon_shape_info): New struct. Info for shape table.
39 (neon_shape_tab): New array.
40 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
41 (neon_check_shape): Rewrite as...
42 (neon_select_shape): New function to classify instruction shapes,
43 driven by new table neon_shape_tab array.
44 (neon_quad): New function. Return 1 if shape should set Q flag in
45 instructions (or equivalent), 0 otherwise.
46 (type_chk_of_el_type): Support F64.
47 (el_type_of_type_chk): Likewise.
48 (neon_check_type): Add support for VFP type checking (VFP data
49 elements fill their containing registers).
50 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
51 in thumb mode for VFP instructions.
52 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
53 and encode the current instruction as if it were that opcode.
54 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
55 arguments, call function in PFN.
56 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
57 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
58 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
59 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
60 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
61 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
62 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
63 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
64 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
65 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
66 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
67 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
68 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
69 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
70 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
71 neon_quad.
72 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
73 between VFP and Neon turns out to belong to Neon. Perform
74 architecture check and fill in condition field if appropriate.
75 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
76 (do_neon_cvt): Add support for VFP variants of instructions.
77 (neon_cvt_flavour): Extend to cover VFP conversions.
78 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
79 vmov variants.
80 (do_neon_ldr_str): Handle single-precision VFP load/store.
81 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
82 NS_NULL not NS_IGNORE.
83 (opcode_tag): Add OT_csuffixF for operands which either take a
84 conditional suffix, or have 0xF in the condition field.
85 (md_assemble): Add support for OT_csuffixF.
86 (NCE): Replace macro with...
87 (NCE_tag, NCE, NCEF): New macros.
88 (nCE): Replace macro with...
89 (nCE_tag, nCE, nCEF): New macros.
90 (insns): Add support for VFP insns or VFP versions of insns msr, mrs,
91 vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
92 vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
93 vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
94 together.
96 * gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
97 all-true IT blocks.
98 * gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
99 unconditional Neon instructions are rejected...
100 * gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
101 * gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
102 (with IT).
103 * gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
104 mode.
105 * gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
106 * gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
107 mode.
108 * gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
109 syntax.
110 * gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
111 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
112 * gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
113 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
114 mode.
116 2006-05-05 Mark Shinwell <shinwell@codesourcery.com>
118 * configure: Regenerate.
119 * configure.in: Enable gprof for cross builds.
121 2006-05-03 Julian Brown <julian@codesourcery.com>
123 * gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.
125 2006-05-03 Paul Brook <paul@codesourcery.com>
127 * bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
128 (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
129 (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
130 * bfd/reloc.c: Ditto.
131 * bfd/bfd-in2.h: Regenerate.
132 * bfd/libbfd.h: Regenerate.
133 * bfd/libcoff.h: Regenerate.
134 * gas/config/tc-arm.c (parse_half): New function.
135 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
136 (parse_operands): Ditto.
137 (do_mov16): Reject invalid relocations.
138 (do_t_mov16): Ditto. Use Thumb reloc numbers.
139 (insns): Replace Iffff with HALF.
140 (md_apply_fix): Add MOVW and MOVT relocs.
141 (tc_gen_reloc): Ditto.
142 * gas/doc/c-arm.texi: Document relocation operators
143 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
144 * ld/testsuite/ld-arm/arm-movwt.d: New test.
145 * ld/testsuite/ld-arm/arm-movwt.s: New test.
146 * ld/testsuite/ld-arm/arm.ld: Add .far.
148 2006-05-02 Joseph Myers <joseph@codesourcery.com>
150 * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset
151 by 4 here.
152 (md_apply_fix3): Multiply offset by 4 here for
153 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
154 * gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
155 wstrh.
156 * gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
157 * gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
158 and wldrh.
159 * gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
160 messages.
162 2006-05-01 Paul Brook <paul@codesourcery.com>
164 * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
165 bit for R_ARM_REL32.
166 * gas/config/tc-arm.c (arm_optimize_expr): New function.
167 * gas/config/tc-arm.h (md_optimize_expr): Define
168 (arm_optimize_expr): Add prototype.
169 (TC_FORCE_RELOCATION_SUB_SAME): Define.
170 * ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
171 * ld/testsuite/ld-arm/thumb-rel32.d: New test.
172 * ld/testsuite/ld-arm/thumb-rel32.s: New test.
174 2006-04-29 Paul Brook <paul@codesourcery.com>
176 * opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
177 arm instructions.
178 (neon_opcodes): Add conditional execution specifiers.
179 (thumb_opcodes): Ditto.
180 (thumb32_opcodes): Ditto.
181 (arm_conditional): Change 0xe to "al" and add "" to end.
182 (ifthen_state, ifthen_next_state, ifthen_address): New.
183 (IFTHEN_COND): Define.
184 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
185 (print_insn_arm): Change %c to use new values of arm_conditional.
186 (print_insn_thumb16): Print thumb conditions. Add %I.
187 (print_insn_thumb32): Print thumb conditions.
188 (find_ifthen_state): New function.
189 (print_insn): Track IT block state.
190 * gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
191 * gas/testsuite/gas/arm/thumb32.d: Ditto.
192 * gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
193 * gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
194 * binutils/testsuite/binutils-all/arm/objdump.exp: New file.
195 * binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
197 2006-04-28 Mark Mitchell <mark@codesourcery.com>
199 * doc/as.texinfo: Mention that some .type syntaxes are not
200 supported on all architectures.
202 2006-04-27 Richard Sandiford <richard@codesourcery.com>
204 include/opcodes/
205 * m68k.h (mcf_mask): Define.
207 opcodes/
208 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
209 and fmovem entries. Put register list entries before immediate
210 mask entries. Use "l" rather than "L" in the fmovem entries.
211 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
212 out from INFO.
213 (m68k_scan_mask): New function, split out from...
214 (print_insn_m68k): ...here. If no architecture has been set,
215 first try printing an m680x0 instruction, then try a Coldfire one.
217 2006-04-27 Richard Sandiford <richard@codesourcery.com>
219 bfd/
220 * elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
221 (elf_m68k_plt_info): Likewise.
222 (elf_m68k_plt_info): New table.
223 (CFV4E_PLT_ENTRY_SIZE): Rename to...
224 (ISAB_PLT_ENTRY_SIZE): ...this.
225 (CFV4E_FLAG): Delete.
226 (elf_cfv4e_plt0_entry): Rename to...
227 (elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0)
228 for the second instruction too.
229 (elf_cfv4e_plt_entry): Rename to...
230 (elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0).
231 (elf_isab_plt_info): New table.
232 (CPU32_FLAG): Delete.
233 (PLT_CPU32_ENTRY_SIZE): Rename to...
234 (CPU32_PLT_ENTRY_SIZE): ...this.
235 (elf_cpu32_plt0_entry): Update bounds accordingly.
236 (elf_cpu32_plt_entry): Likewise.
237 (elf_cpu32_plt_info): New table.
238 (elf_m68k_link_hash_table): Add a plt_info field.
239 (elf_m68k_link_hash_table_create): Initialize it.
240 (elf_m68k_get_plt_info): New function.
241 (elf_m68k_always_size_sections): Likewise.
242 (elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
243 (elf_m68k_install_pcrel_field): New function.
244 (elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
245 elf_m68k_install_pcrel_field.
246 (elf_m68k_finish_dynamic_sections): Likewise.
247 (elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
248 (elf_backend_always_size_sections): Define.
250 2006-04-26 Julian Brown <julian@codesourcery.com>
252 * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
253 checking.
254 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
255 architecture version checks.
256 (insns): Allow overlapping instructions to be used in VFP mode.
258 * gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
259 VFP/Neon instructions.
260 * gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
261 * gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
262 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
263 * gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
265 * opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
266 as vldm/vstm.
268 2006-04-26 Julian Brown <julian@codesourcery.com>
270 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
271 (is_quarter_float): Rename from above. Simplify slightly.
272 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
273 number.
274 (parse_neon_mov): Parse floating-point constants.
275 (neon_qfloat_bits): Fix encoding.
276 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
277 preference to integer encoding when using the F32 type.
279 * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
280 constants.
281 * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
282 * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
283 for VMOV.F32.
285 * opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
286 constant VMOV.
288 2006-04-24 Julian Brown <julian@codesourcery.com>
290 * libiberty/floatformat.c (floatformat_to_double): Fix (biased)
291 exponent=0 case.
293 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
295 * Makefile.tpl: Add install-html to install target deps.
296 * Makefile.in: Regenerate.
298 2006-04-07 Julian Brown <julian@codesourcery.com>
300 * gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
301 zero-initialising structures containing it will lead to invalid
302 types).
303 (arm_it): Add vectype to each operand.
304 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
305 defined field.
306 (neon_typed_alias): New structure. Extra information for typed
307 register aliases.
308 (reg_entry): Add neon type info field.
309 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
310 Break out alternative syntax for coprocessor registers, etc. into...
311 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
312 out from arm_reg_parse.
313 (parse_neon_type): Move. Return SUCCESS/FAIL.
314 (first_error): New function. Call to ensure first error which occurs
315 is reported.
316 (parse_neon_operand_type): Parse exactly one type.
317 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
318 (parse_typed_reg_or_scalar): New function. Handle core of both
319 arm_typed_reg_parse and parse_scalar.
320 (arm_typed_reg_parse): Parse a register with an optional type.
321 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
322 result.
323 (parse_scalar): Parse a Neon scalar with optional type.
324 (parse_reg_list): Use first_error.
325 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
326 (neon_alias_types_same): New function. Return true if two (alias) types
327 are the same.
328 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
329 of elements.
330 (insert_reg_alias): Return new reg_entry not void.
331 (insert_neon_reg_alias): New function. Insert type/index information as
332 well as register for alias.
333 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
334 make typed register aliases accordingly.
335 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
336 of line.
337 (s_unreq): Delete type information if present.
338 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
339 (s_arm_unwind_save_mmxwcg): Likewise.
340 (s_arm_unwind_movsp): Likewise.
341 (s_arm_unwind_setfp): Likewise.
342 (parse_shift): Likewise.
343 (parse_shifter_operand): Likewise.
344 (parse_address): Likewise.
345 (parse_tb): Likewise.
346 (tc_arm_regname_to_dw2regnum): Likewise.
347 (md_pseudo_table): Add dn, qn.
348 (parse_neon_mov): Handle typed operands.
349 (parse_operands): Likewise.
350 (neon_type_mask): Add N_SIZ.
351 (N_ALLMODS): New macro.
352 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
353 (el_type_of_type_chk): Add some safeguards.
354 (modify_types_allowed): Fix logic bug.
355 (neon_check_type): Handle operands with types.
356 (neon_three_same): Remove redundant optional arg handling.
357 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
358 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
359 (do_neon_step): Adjust accordingly.
360 (neon_cmode_for_logic_imm): Use first_error.
361 (do_neon_bitfield): Call neon_check_type.
362 (neon_dyadic): Rename to...
363 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
364 allow modification of type of the destination.
365 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
366 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
367 (do_neon_compare): Make destination be an untyped bitfield.
368 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
369 (neon_mul_mac): Return early in case of errors.
370 (neon_move_immediate): Use first_error.
371 (neon_mac_reg_scalar_long): Fix type to include scalar.
372 (do_neon_dup): Likewise.
373 (do_neon_mov): Likewise (in several places).
374 (do_neon_tbl_tbx): Fix type.
375 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
376 (do_neon_ld_dup): Exit early in case of errors and/or use first_error.
377 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
378 Handle .dn/.qn directives.
379 (REGDEF): Add zero for reg_entry neon field.
381 * gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
382 * gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
384 2006-04-03 Carlos O'Donell <carlos@codesourcery.com>
386 * Makefile.tpl: Add install-html target.
387 * Makefile.def: Add install-html target.
388 * Makefile.in: Regenerate.
389 * configure.in: Add --with-datarootdir, --with-docdir,
390 and --with-htmldir options.
391 * configure: Regenerate.
392 * opcodes/Makefile.am: Add install-html target.
393 * opcodes/Makefile.in: Regenerate.
394 * libiberty/Makefile.in: Add install-html, install-html-am, and
395 install-html-recursive targets. Define mkdir_p and
396 NORMAL_INSTALL.
397 * libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
398 * libiberty/configure: Regenerate.
399 * libiberty/testsuite/Makefile.in: Add install-html and html targets.
400 * ld/Makefile.am: Add install-html, install-html-am, and
401 install-html-recursive targets.
402 * ld/Makefile.in: Regenerate.
403 * ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
404 * ld/configure: Regenerate.
405 * ld/po/Make-in: Add install-html target.
406 * intl/Makefile.in: Add html info and dvi and install-html to .PHONY
407 Add install-html target.
408 * gprof/po/Make-in: Add install-html target.
409 * gprof/Makefile.am: Add install-html, install-html-am and
410 install-html-recursive targets.
411 * gprof/Makefile.in: Regenerate.
412 * gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
413 * gprof/configure: Regenerate.
414 * gas/po/Make-in: Add install-html target.
415 * gas/Makefile.am: Add install-html and install-html-recursive targets.
416 * gas/Makefile.in: Regenerate.
417 * gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
418 * gas/configure: Regenerate.
419 * gas/doc/Makefile.am: Add install-html and install-html-am targets.
420 * gas/doc/Makefile.in: Regenerate.
421 * binutils/po/Make-in: Add install-html target.
422 * binutils/Makefile.am: Add install-html and install-html-recursive targets.
423 * binutils/Makefile.in: Regenerate.
424 * binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
425 * binutils/configure: Regenerate.
426 * binutils/doc/Makefile.am: Add install-html and install-html-am targets.
427 * binutils/doc/Makefile.in: Regenerate.
428 * bfd/po/Make-in: Add install-html target.
429 * bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
430 htmldir. Add install-html and install-html-recursive targets.
431 * bfd/Makefile.in: Regenerate.
432 * bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
433 * bfd/configure: Regenerate.
434 * bfd/doc/Makefile.am: Add install-html and install-html-am targets.
435 Define datarootdir, docdir and htmldir.
436 * bfd/doc/Makefile.in: Regenerate.
437 * etc/Makefile.in: Add install-html target. Add htmldir,
438 docdir and datarootdir.
439 * etc/configure.texi: Document install-html target.
440 * etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
441 * etc/configure: Regenerate.
443 2005-04-03 Julian Brown <julian@codesourcery.com>
444 Nathan Sidwell <nathan@codesourcery.com>
446 * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
448 * gas/config/tc-arm.c (limits.h): Include.
449 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
450 (fpu_vfp_v3_or_neon_ext): Declare constants.
451 (neon_el_type): New enumeration of types for Neon vector elements.
452 (neon_type_el): New struct. Define type and size of a vector element.
453 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
454 instruction.
455 (neon_type): Define struct. The type of an instruction.
456 (arm_it): Add 'vectype' for the current instruction.
457 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
458 (vfp_sp_reg_pos): Rename to...
459 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
460 tags.
461 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
462 (Neon D or Q register).
463 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
464 D register.
465 (GE_OPT_PREFIX_BIG): Define constant, for use in...
466 (my_get_expression): Allow above constant as argument to accept
467 64-bit constants with optional prefix.
468 (arm_reg_parse): Add extra argument to return the specific type of
469 register in when either a D or Q register (REG_TYPE_NDQ) is requested.
470 Can be NULL.
471 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
472 (parse_reg_list): Update for new arm_reg_parse args.
473 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
474 (parse_neon_el_struct_list): New function. Parse element/structure
475 register lists for VLD<n>/VST<n> instructions.
476 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
477 (s_arm_unwind_save_mmxwr): Likewise.
478 (s_arm_unwind_save_mmxwcg): Likewise.
479 (s_arm_unwind_movsp): Likewise.
480 (s_arm_unwind_setfp): Likewise.
481 (parse_big_immediate): New function. Parse an immediate, which may
482 be 64 bits wide. Put results in inst.operands[i].
483 (parse_shift): Update for new arm_reg_parse args.
484 (parse_address): Likewise. Add parsing of alignment specifiers.
485 (parse_neon_mov): Parse the operands of a VMOV instruction.
486 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
487 OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
488 OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
489 OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
490 OP_oRNQ, OP_oRNDQ.
491 (parse_operands): Handle new codes above.
492 (encode_arm_vfp_sp_reg): Rename to...
493 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
494 selected VFP version only supports D0-D15.
495 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
496 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
497 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
498 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
499 encode_arm_vfp_reg name, and allow 32 D regs.
500 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
501 (do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
502 insns allowing 32 D regs.
503 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
504 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
505 constant-load and conversion insns introduced with VFPv3.
506 (neon_tab_entry): New struct.
507 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
508 those which are the targets of pseudo-instructions.
509 (neon_opc): Enumerate opcodes, use as indices into...
510 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
511 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
512 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
513 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
514 neon_enc_tab.
515 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
516 Neon instructions.
517 (neon_type_mask): New. Compact type representation for type
518 checking.
519 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
520 permitted type combinations.
521 (N_IGNORE_TYPE): New macro.
522 (neon_check_shape): New function. Check an instruction shape for
523 multiple alternatives. Return the specific shape for the current
524 instruction.
525 (neon_modify_type_size): New function. Modify a vector type and
526 size, depending on the bit mask in argument 1.
527 (neon_type_promote): New function. Convert a given "key" type (of an
528 operand) into the correct type for a different operand, based on a bit
529 mask.
530 (type_chk_of_el_type): New function. Convert a type and size into the
531 compact representation used for type checking.
532 (el_type_of_type_ckh): New function. Reverse of above (only when a
533 single bit is set in the bit mask).
534 (modify_types_allowed): New function. Alter a mask of allowed types
535 based on a bit mask of modifications.
536 (neon_check_type): New function. Check the type of the current
537 instruction against the variable argument list. The "key" type of the
538 instruction is returned.
539 (neon_dp_fixup): New function. Fill in and modify instruction bits for
540 a Neon data-processing instruction depending on whether we're in ARM
541 mode or Thumb-2 mode.
542 (neon_logbits): New function.
543 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
544 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
545 (do_neon_qshl_imm, neon_cmode_for_logic_imm)
546 (neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
547 (neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
548 (neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
549 (do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
550 (do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
551 (neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
552 (neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
553 (do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
554 (do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
555 (do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
556 (do_neon_qmovun, do_neon_rshift_sat_narrow)
557 (do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
558 (do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
559 (do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
560 (neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
561 (do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
562 (do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
563 (do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
564 (do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
565 (do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
566 (do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
567 (do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
568 functions. Neon bit encoding and encoding helpers.
569 (parse_neon_type): New function. Parse Neon type specifier.
570 (opcode_lookup): Allow parsing of Neon type specifiers.
571 (REGNUM2, REGSETH, REGSET2): New macros.
572 (reg_names): Add new VFPv3 and Neon registers.
573 (NUF, nUF, NCE, nCE): New macros for opcode table.
574 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
575 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
576 fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
577 fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
578 vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
579 veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
580 vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
581 vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
582 vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
583 v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
584 vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
585 vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
586 vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
587 vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
588 vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
589 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
590 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
591 (arm_option_cpu_value): Add vfp3 and neon.
592 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
593 Fix VFPv1 attribute.
595 * gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
596 instruction.
597 * gas/testsuite/gas/arm/copro.d: Update accordingly.
598 * gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
599 in ARM mode.
600 * gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
601 * gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
602 instructions.
603 * gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
604 * gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
605 loads and stores.
606 * gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
607 * gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
608 register loads and stores.
609 * gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
610 * gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
611 operands.
612 * gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
613 * gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
614 instructions.
615 * gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
616 * gas/testsuite/gas/arm/vfp1xD.d: Likewise.
617 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
618 * gas/testsuite/gas/arm/vfp2.d: Likewise.
619 * gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
620 * gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
621 range for VFP instructions.
622 * gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
623 * gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
624 constant-load and conversion instructions.
625 * gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
627 * include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
628 (FPU_NEON_EXT_V1): Likewise.
629 (FPU_VFP_HARD): Update.
630 (FPU_VFP_V3): Define macro.
631 (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
633 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
634 convert %<code>[zy] into %[zy]<code>. Expand meaning of
635 %<bitfield>['`?].
636 Add unified load/store instruction names.
637 (neon_opcode_table): New.
638 (arm_opcodes): Expand meaning of %<bitfield>['`?].
639 (arm_decode_bitfield): New.
640 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
641 Use arm_decode_bitfield and adjust numeric specifiers.
642 Adjust %z & %y.
643 (print_insn_neon): New.
644 (print_insn_arm): Adjust print_insn_coprocessor call. Call
645 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
646 (print_insn_thumb32): Likewise.
648 2005-04-01 Paul Brook <paul@codesourcery.com>
650 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
652 2006-03-30 Mark Mitchell <mark@codesourcery.com>
654 * libiberty/configure.ac: Add cygpath for mingw hosts.
655 * libiberty.configure: Rebuilt.
656 * libiberty/Makefile.in: Add cygpath.
657 * libiberty/cygpath.c: New.
659 2006-03-30 Jim Blandy <jimb@codesourcery.com>
661 * include/libiberty.h (pex_write_input): New declaration.
663 * libiberty/pex-common.c (pex_write_input): New function.
664 * libiberty/pexecute.txh (pex_write_input): Document it.
665 * libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
666 * libiberty/pex-unix.c (pex_unix_fdopenw): New function.
667 (funcs): List it as our fdopenw function.
668 * libiberty/pex-win32.c (pex_win32_fdopenw): New function.
669 (funcs): List it as our fdopenw function.
670 * libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
671 * libiberty/pex-msdos (funcs): Same.
672 * libiberty/functions.texi: Regenerated.
674 * libiberty/pex-common.h (struct pex_obj): Doc fixes.
676 * libiberty/functions.texi: Regenerate.
678 2006-03-27 Mark Mitchell <mark@codesourcery.com>
680 * libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
681 in parent.
683 2006-03-26 Nathan Sidwell <nathan@codesourcery.com>
685 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
686 cfloat/m68881 to correct architecture before using it.
688 2006-03-21 Paul Brook <paul@codesourcery.com>
690 * gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
692 2006-03-21 Nathan Sidwell <nathan@codesourcery.com>
694 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
695 (m68k_ip): ... here. Use for all chips. Protect against buffer
696 overrun and avoid excessive copying.
698 * gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
699 m68020_control_regs, m68040_control_regs, m68060_control_regs,
700 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
701 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
702 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
703 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
704 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
705 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
706 mcf5282_ctrl, mcfv4e_ctrl): ... these.
707 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
708 (struct m68k_cpu): Change chip field to control_regs.
709 (current_chip): Remove.
710 (control_regs): New.
711 (m68k_archs, m68k_extensions): Adjust.
712 (m68k_cpus): Reorder to be in cpu number order. Adjust.
713 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
714 (find_cf_chip): Reimplement for new organization of cpu table.
715 (select_control_regs): Remove.
716 (mri_chip): Adjust.
717 (struct save_opts): Save control regs, not chip.
718 (s_save, s_restore): Adjust.
719 (m68k_lookup_cpu): Give deprecated warning when necessary.
720 (m68k_init_arch): Adjust.
721 (md_show_usage): Adjust for new cpu table organization.
722 * include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
723 cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
724 cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
725 cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
726 cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
728 2006-03-20 Mark Mitchell <mark@codesourcery.com>
730 * libiberty/pex-win32.c (<errno.h>): Include.
731 (fix_argv): Remove.
732 (argv_to_cmdline): New function.
733 (std_suffixes): New variable.
734 (no_suffixes): Likewise.
735 (find_executable): New function.
736 (win32_spawn): Likewise.
737 (spawn_script): Use win32_spawn instead of _spawnv[p].
738 (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
739 (pex_win32_wait): Likewise.
741 2006-03-21 Richard Sandiford <richard@codesourcery.com>
743 * bfd/cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
744 incompatible. Likewise MAC and EMAC code.
745 * bfd/elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
746 bfd_get_compatible to set the new bfd architecture. Rely on it
747 to detect incompatibilities.
748 * gas/config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
749 mcfemac instead of mcfmac.
750 * ld/testsuite/ld-m68k/merge-error-1a.s,
751 * ld/testsuite/ld-m68k/merge-error-1b.s,
752 * ld/testsuite/ld-m68k/merge-error-1a.d,
753 * ld/testsuite/ld-m68k/merge-error-1b.d,
754 * ld/testsuite/ld-m68k/merge-error-1c.d,
755 * ld/testsuite/ld-m68k/merge-error-1d.d,
756 * ld/testsuite/ld-m68k/merge-error-1e.d,
757 * ld/testsuite/ld-m68k/merge-ok-1a.d,
758 * ld/testsuite/ld-m68k/merge-ok-1b.d: New tests.
759 * ld/testsuite/ld-m68k/m68k.exp: Run them.
761 2006-03-20 Paul Brook <paul@codesourcery.com>
763 * gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
764 * gas/testsuite/gas/arm/thumb32.d: Correct expected output.
766 2006-03-20 Paul Brook <paul@codesourcery.com>
768 * gas/config/tc-arm.c (parse_operands): Set default error message.
770 2006-03-20 Paul Brook <paul@codesourcery.com>
772 * gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
774 2006-03-20 Paul Brook <paul@codesourcery.com>
776 * gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
778 * gas/testsuite/gas/arm/blx-local.d: New test.
779 * gas/testsuite/gas/arm/blx-local.d: New test.
781 2006-03-20 Paul Brook <paul@codesourcery.com>
783 * gas/config/tc-arm.c (THUMB2_LOAD_BIT): Define.
784 (move_or_literal_pool): Handle Thumb-2 instructions.
785 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
787 * gas/testsuite/gas/arm/thumb2_pool.d: New test.
788 * gas/testsuite/gas/arm/thumb2_pool.s: New test.