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[binutils.git] / gas / config / tc-avr.c
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1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include <stdio.h>
25 #include "as.h"
26 #include "safe-ctype.h"
27 #include "subsegs.h"
28 #include "libiberty.h"
29
30 struct avr_opcodes_s
31 {
32 char * name;
33 char * constraints;
34 int insn_size; /* In words. */
35 int isa;
36 unsigned int bin_opcode;
37 };
38
39 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
40 {#NAME, CONSTR, SIZE, ISA, BIN},
41
42 struct avr_opcodes_s avr_opcodes[] =
43 {
44 #include "opcode/avr.h"
45 {NULL, NULL, 0, 0, 0}
46 };
47
48 const char comment_chars[] = ";";
49 const char line_comment_chars[] = "#";
50 const char line_separator_chars[] = "$";
51
52 const char *md_shortopts = "m:";
53 struct mcu_type_s
54 {
55 char *name;
56 int isa;
57 int mach;
58 };
59
60 /* XXX - devices that don't seem to exist (renamed, replaced with larger
61 ones, or planned but never produced), left here for compatibility.
62 TODO: hide them in show_mcu_list output? */
63
64 static struct mcu_type_s mcu_types[] =
65 {
66 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
67 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
68 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
69 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
70 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
71 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
72 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
73 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
77 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
79 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
80 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
81 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
82 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
83 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
84 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
85 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
86 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
89 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
90 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny2313",AVR_ISA_TINY2, bfd_mach_avr2},
92 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
93 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
94 {"at43usb320",AVR_ISA_M103, bfd_mach_avr3},
95 {"at43usb355",AVR_ISA_M603, bfd_mach_avr3},
96 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
97 {"atmega48", AVR_ISA_M8, bfd_mach_avr4},
98 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
99 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
100 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
101 {"atmega88", AVR_ISA_M8, bfd_mach_avr4},
102 {"atmega8515",AVR_ISA_M8, bfd_mach_avr4},
103 {"atmega8535",AVR_ISA_M8, bfd_mach_avr4},
104 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
105 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
106 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
107 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
108 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
109 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
110 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
111 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
112 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
113 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
114 {"atmega3250",AVR_ISA_M323, bfd_mach_avr5},
115 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
116 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
117 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
118 {"atmega6450",AVR_ISA_M323, bfd_mach_avr5},
119 {"at90can128",AVR_ISA_M128, bfd_mach_avr5},
120 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
121 {NULL, 0, 0}
122 };
123
124 /* Current MCU type. */
125 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
126 static struct mcu_type_s * avr_mcu = & default_mcu;
127
128 /* AVR target-specific switches. */
129 struct avr_opt_s
130 {
131 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
132 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
133 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
134 };
135
136 static struct avr_opt_s avr_opt = { 0, 0, 0 };
137
138 const char EXP_CHARS[] = "eE";
139 const char FLT_CHARS[] = "dD";
140
141 static void avr_set_arch (int);
142
143 /* The target specific pseudo-ops which we support. */
144 const pseudo_typeS md_pseudo_table[] =
145 {
146 {"arch", avr_set_arch, 0},
147 { NULL, NULL, 0}
148 };
149
150 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
151
152 #define EXP_MOD_NAME(i) exp_mod[i].name
153 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
154 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
155 #define HAVE_PM_P(i) exp_mod[i].have_pm
156
157 struct exp_mod_s
158 {
159 char * name;
160 bfd_reloc_code_real_type reloc;
161 bfd_reloc_code_real_type neg_reloc;
162 int have_pm;
163 };
164
165 static struct exp_mod_s exp_mod[] =
166 {
167 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
168 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
169 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
170 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
171 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
172 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
173 {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
174 {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
175 };
176
177 /* A union used to store indicies into the exp_mod[] array
178 in a hash table which expects void * data types. */
179 typedef union
180 {
181 void * ptr;
182 int index;
183 } mod_index;
184
185 /* Opcode hash table. */
186 static struct hash_control *avr_hash;
187
188 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
189 static struct hash_control *avr_mod_hash;
190
191 #define OPTION_MMCU 'm'
192 enum options
193 {
194 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
195 OPTION_NO_SKIP_BUG,
196 OPTION_NO_WRAP
197 };
198
199 struct option md_longopts[] =
200 {
201 { "mmcu", required_argument, NULL, OPTION_MMCU },
202 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
203 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
204 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
205 { NULL, no_argument, NULL, 0 }
206 };
207
208 size_t md_longopts_size = sizeof (md_longopts);
209
210 /* Display nicely formatted list of known MCU names. */
211
212 static void
213 show_mcu_list (FILE *stream)
214 {
215 int i, x;
216
217 fprintf (stream, _("Known MCU names:"));
218 x = 1000;
219
220 for (i = 0; mcu_types[i].name; i++)
221 {
222 int len = strlen (mcu_types[i].name);
223
224 x += len + 1;
225
226 if (x < 75)
227 fprintf (stream, " %s", mcu_types[i].name);
228 else
229 {
230 fprintf (stream, "\n %s", mcu_types[i].name);
231 x = len + 2;
232 }
233 }
234
235 fprintf (stream, "\n");
236 }
237
238 static inline char *
239 skip_space (char *s)
240 {
241 while (*s == ' ' || *s == '\t')
242 ++s;
243 return s;
244 }
245
246 /* Extract one word from FROM and copy it to TO. */
247
248 static char *
249 extract_word (char *from, char *to, int limit)
250 {
251 char *op_start;
252 char *op_end;
253 int size = 0;
254
255 /* Drop leading whitespace. */
256 from = skip_space (from);
257 *to = 0;
258
259 /* Find the op code end. */
260 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
261 {
262 to[size++] = *op_end++;
263 if (size + 1 >= limit)
264 break;
265 }
266
267 to[size] = 0;
268 return op_end;
269 }
270
271 int
272 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
273 asection *seg ATTRIBUTE_UNUSED)
274 {
275 abort ();
276 return 0;
277 }
278
279 void
280 md_show_usage (FILE *stream)
281 {
282 fprintf (stream,
283 _("AVR options:\n"
284 " -mmcu=[avr-name] select microcontroller variant\n"
285 " [avr-name] can be:\n"
286 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
287 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
288 " avr3 - ATmega103, ATmega603\n"
289 " avr4 - ATmega83, ATmega85\n"
290 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
291 " or immediate microcontroller name.\n"));
292 fprintf (stream,
293 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
294 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
295 " (default for avr4, avr5)\n"
296 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
297 " (default for avr3, avr5)\n"));
298 show_mcu_list (stream);
299 }
300
301 static void
302 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
303 {
304 char str[20];
305
306 input_line_pointer = extract_word (input_line_pointer, str, 20);
307 md_parse_option (OPTION_MMCU, str);
308 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
309 }
310
311 int
312 md_parse_option (int c, char *arg)
313 {
314 switch (c)
315 {
316 case OPTION_MMCU:
317 {
318 int i;
319 char *s = alloca (strlen (arg) + 1);
320
321 {
322 char *t = s;
323 char *arg1 = arg;
324
325 do
326 *t = TOLOWER (*arg1++);
327 while (*t++);
328 }
329
330 for (i = 0; mcu_types[i].name; ++i)
331 if (strcmp (mcu_types[i].name, s) == 0)
332 break;
333
334 if (!mcu_types[i].name)
335 {
336 show_mcu_list (stderr);
337 as_fatal (_("unknown MCU: %s\n"), arg);
338 }
339
340 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
341 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
342 as .arch ... in the asm output at the same time. */
343 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
344 avr_mcu = &mcu_types[i];
345 else
346 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
347 avr_mcu->name, mcu_types[i].name);
348 return 1;
349 }
350 case OPTION_ALL_OPCODES:
351 avr_opt.all_opcodes = 1;
352 return 1;
353 case OPTION_NO_SKIP_BUG:
354 avr_opt.no_skip_bug = 1;
355 return 1;
356 case OPTION_NO_WRAP:
357 avr_opt.no_wrap = 1;
358 return 1;
359 }
360
361 return 0;
362 }
363
364 symbolS *
365 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
366 {
367 return NULL;
368 }
369
370 /* Turn a string in input_line_pointer into a floating point constant
371 of type TYPE, and store the appropriate bytes in *LITP. The number
372 of LITTLENUMS emitted is stored in *SIZEP. An error message is
373 returned, or NULL on OK. */
374
375 char *
376 md_atof (int type, char *litP, int *sizeP)
377 {
378 int prec;
379 LITTLENUM_TYPE words[4];
380 LITTLENUM_TYPE *wordP;
381 char *t;
382
383 switch (type)
384 {
385 case 'f':
386 prec = 2;
387 break;
388 case 'd':
389 prec = 4;
390 break;
391 default:
392 *sizeP = 0;
393 return _("bad call to md_atof");
394 }
395
396 t = atof_ieee (input_line_pointer, type, words);
397 if (t)
398 input_line_pointer = t;
399
400 *sizeP = prec * sizeof (LITTLENUM_TYPE);
401
402 /* This loop outputs the LITTLENUMs in REVERSE order. */
403 for (wordP = words + prec - 1; prec--;)
404 {
405 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
406 litP += sizeof (LITTLENUM_TYPE);
407 }
408
409 return NULL;
410 }
411
412 void
413 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
414 asection *sec ATTRIBUTE_UNUSED,
415 fragS *fragP ATTRIBUTE_UNUSED)
416 {
417 abort ();
418 }
419
420 void
421 md_begin (void)
422 {
423 unsigned int i;
424 struct avr_opcodes_s *opcode;
425
426 avr_hash = hash_new ();
427
428 /* Insert unique names into hash table. This hash table then provides a
429 quick index to the first opcode with a particular name in the opcode
430 table. */
431 for (opcode = avr_opcodes; opcode->name; opcode++)
432 hash_insert (avr_hash, opcode->name, (char *) opcode);
433
434 avr_mod_hash = hash_new ();
435
436 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
437 {
438 mod_index m;
439
440 m.index = i + 10;
441 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
442 }
443
444 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
445 }
446
447 /* Resolve STR as a constant expression and return the result.
448 If result greater than MAX then error. */
449
450 static unsigned int
451 avr_get_constant (char *str, int max)
452 {
453 expressionS ex;
454
455 str = skip_space (str);
456 input_line_pointer = str;
457 expression (& ex);
458
459 if (ex.X_op != O_constant)
460 as_bad (_("constant value required"));
461
462 if (ex.X_add_number > max || ex.X_add_number < 0)
463 as_bad (_("number must be less than %d"), max + 1);
464
465 return ex.X_add_number;
466 }
467
468 /* Parse for ldd/std offset. */
469
470 static void
471 avr_offset_expression (expressionS *exp)
472 {
473 char *str = input_line_pointer;
474 char *tmp;
475 char op[8];
476
477 tmp = str;
478 str = extract_word (str, op, sizeof (op));
479
480 input_line_pointer = tmp;
481 expression (exp);
482
483 /* Warn about expressions that fail to use lo8 (). */
484 if (exp->X_op == O_constant)
485 {
486 int x = exp->X_add_number;
487
488 if (x < -255 || x > 255)
489 as_warn (_("constant out of 8-bit range: %d"), x);
490 }
491 }
492
493 /* Parse ordinary expression. */
494
495 static char *
496 parse_exp (char *s, expressionS *op)
497 {
498 input_line_pointer = s;
499 expression (op);
500 if (op->X_op == O_absent)
501 as_bad (_("missing operand"));
502 return input_line_pointer;
503 }
504
505 /* Parse special expressions (needed for LDI command):
506 xx8 (address)
507 xx8 (-address)
508 pm_xx8 (address)
509 pm_xx8 (-address)
510 where xx is: hh, hi, lo. */
511
512 static bfd_reloc_code_real_type
513 avr_ldi_expression (expressionS *exp)
514 {
515 char *str = input_line_pointer;
516 char *tmp;
517 char op[8];
518 int mod;
519 tmp = str;
520
521 str = extract_word (str, op, sizeof (op));
522
523 if (op[0])
524 {
525 mod_index m;
526
527 m.ptr = hash_find (avr_mod_hash, op);
528 mod = m.index;
529
530 if (mod)
531 {
532 int closes = 0;
533
534 mod -= 10;
535 str = skip_space (str);
536
537 if (*str == '(')
538 {
539 int neg_p = 0;
540
541 ++str;
542
543 if (strncmp ("pm(", str, 3) == 0
544 || strncmp ("-(pm(", str, 5) == 0)
545 {
546 if (HAVE_PM_P (mod))
547 {
548 ++mod;
549 ++closes;
550 }
551 else
552 as_bad (_("illegal expression"));
553
554 if (*str == '-')
555 {
556 neg_p = 1;
557 ++closes;
558 str += 5;
559 }
560 else
561 str += 3;
562 }
563
564 if (*str == '-' && *(str + 1) == '(')
565 {
566 neg_p ^= 1;
567 ++closes;
568 str += 2;
569 }
570
571 input_line_pointer = str;
572 expression (exp);
573
574 do
575 {
576 if (*input_line_pointer != ')')
577 {
578 as_bad (_("`)' required"));
579 break;
580 }
581 input_line_pointer++;
582 }
583 while (closes--);
584
585 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
586 }
587 }
588 }
589
590 input_line_pointer = tmp;
591 expression (exp);
592
593 /* Warn about expressions that fail to use lo8 (). */
594 if (exp->X_op == O_constant)
595 {
596 int x = exp->X_add_number;
597
598 if (x < -255 || x > 255)
599 as_warn (_("constant out of 8-bit range: %d"), x);
600 }
601
602 return BFD_RELOC_AVR_LDI;
603 }
604
605 /* Parse one instruction operand.
606 Return operand bitmask. Also fixups can be generated. */
607
608 static unsigned int
609 avr_operand (struct avr_opcodes_s *opcode,
610 int where,
611 char *op,
612 char **line)
613 {
614 expressionS op_expr;
615 unsigned int op_mask = 0;
616 char *str = skip_space (*line);
617
618 switch (*op)
619 {
620 /* Any register operand. */
621 case 'w':
622 case 'd':
623 case 'r':
624 case 'a':
625 case 'v':
626 if (*str == 'r' || *str == 'R')
627 {
628 char r_name[20];
629
630 str = extract_word (str, r_name, sizeof (r_name));
631 op_mask = 0xff;
632 if (ISDIGIT (r_name[1]))
633 {
634 if (r_name[2] == '\0')
635 op_mask = r_name[1] - '0';
636 else if (r_name[1] != '0'
637 && ISDIGIT (r_name[2])
638 && r_name[3] == '\0')
639 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
640 }
641 }
642 else
643 {
644 op_mask = avr_get_constant (str, 31);
645 str = input_line_pointer;
646 }
647
648 if (op_mask <= 31)
649 {
650 switch (*op)
651 {
652 case 'a':
653 if (op_mask < 16 || op_mask > 23)
654 as_bad (_("register r16-r23 required"));
655 op_mask -= 16;
656 break;
657
658 case 'd':
659 if (op_mask < 16)
660 as_bad (_("register number above 15 required"));
661 op_mask -= 16;
662 break;
663
664 case 'v':
665 if (op_mask & 1)
666 as_bad (_("even register number required"));
667 op_mask >>= 1;
668 break;
669
670 case 'w':
671 if ((op_mask & 1) || op_mask < 24)
672 as_bad (_("register r24, r26, r28 or r30 required"));
673 op_mask = (op_mask - 24) >> 1;
674 break;
675 }
676 break;
677 }
678 as_bad (_("register name or number from 0 to 31 required"));
679 break;
680
681 case 'e':
682 {
683 char c;
684
685 if (*str == '-')
686 {
687 str = skip_space (str + 1);
688 op_mask = 0x1002;
689 }
690 c = TOLOWER (*str);
691 if (c == 'x')
692 op_mask |= 0x100c;
693 else if (c == 'y')
694 op_mask |= 0x8;
695 else if (c != 'z')
696 as_bad (_("pointer register (X, Y or Z) required"));
697
698 str = skip_space (str + 1);
699 if (*str == '+')
700 {
701 ++str;
702 if (op_mask & 2)
703 as_bad (_("cannot both predecrement and postincrement"));
704 op_mask |= 0x1001;
705 }
706
707 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
708 registers, no predecrement, no postincrement. */
709 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
710 && !(avr_mcu->isa & AVR_ISA_SRAM))
711 as_bad (_("addressing mode not supported"));
712 }
713 break;
714
715 case 'z':
716 if (*str == '-')
717 as_bad (_("can't predecrement"));
718
719 if (! (*str == 'z' || *str == 'Z'))
720 as_bad (_("pointer register Z required"));
721
722 str = skip_space (str + 1);
723
724 if (*str == '+')
725 {
726 ++str;
727 op_mask |= 1;
728 }
729 break;
730
731 case 'b':
732 {
733 char c = TOLOWER (*str++);
734
735 if (c == 'y')
736 op_mask |= 0x8;
737 else if (c != 'z')
738 as_bad (_("pointer register (Y or Z) required"));
739 str = skip_space (str);
740 if (*str++ == '+')
741 {
742 input_line_pointer = str;
743 avr_offset_expression (& op_expr);
744 str = input_line_pointer;
745 fix_new_exp (frag_now, where, 3,
746 &op_expr, FALSE, BFD_RELOC_AVR_6);
747 }
748 }
749 break;
750
751 case 'h':
752 str = parse_exp (str, &op_expr);
753 fix_new_exp (frag_now, where, opcode->insn_size * 2,
754 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
755 break;
756
757 case 'L':
758 str = parse_exp (str, &op_expr);
759 fix_new_exp (frag_now, where, opcode->insn_size * 2,
760 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
761 break;
762
763 case 'l':
764 str = parse_exp (str, &op_expr);
765 fix_new_exp (frag_now, where, opcode->insn_size * 2,
766 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
767 break;
768
769 case 'i':
770 str = parse_exp (str, &op_expr);
771 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
772 &op_expr, FALSE, BFD_RELOC_16);
773 break;
774
775 case 'M':
776 {
777 bfd_reloc_code_real_type r_type;
778
779 input_line_pointer = str;
780 r_type = avr_ldi_expression (&op_expr);
781 str = input_line_pointer;
782 fix_new_exp (frag_now, where, 3,
783 &op_expr, FALSE, r_type);
784 }
785 break;
786
787 case 'n':
788 {
789 unsigned int x;
790
791 x = ~avr_get_constant (str, 255);
792 str = input_line_pointer;
793 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
794 }
795 break;
796
797 case 'K':
798 input_line_pointer = str;
799 avr_offset_expression (& op_expr);
800 str = input_line_pointer;
801 fix_new_exp (frag_now, where, 3,
802 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
803 break;
804
805 case 'S':
806 case 's':
807 {
808 unsigned int x;
809
810 x = avr_get_constant (str, 7);
811 str = input_line_pointer;
812 if (*op == 'S')
813 x <<= 4;
814 op_mask |= x;
815 }
816 break;
817
818 case 'P':
819 {
820 unsigned int x;
821
822 x = avr_get_constant (str, 63);
823 str = input_line_pointer;
824 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
825 }
826 break;
827
828 case 'p':
829 {
830 unsigned int x;
831
832 x = avr_get_constant (str, 31);
833 str = input_line_pointer;
834 op_mask |= x << 3;
835 }
836 break;
837
838 case '?':
839 break;
840
841 default:
842 as_bad (_("unknown constraint `%c'"), *op);
843 }
844
845 *line = str;
846 return op_mask;
847 }
848
849 /* Parse instruction operands.
850 Return binary opcode. */
851
852 static unsigned int
853 avr_operands (struct avr_opcodes_s *opcode, char **line)
854 {
855 char *op = opcode->constraints;
856 unsigned int bin = opcode->bin_opcode;
857 char *frag = frag_more (opcode->insn_size * 2);
858 char *str = *line;
859 int where = frag - frag_now->fr_literal;
860 static unsigned int prev = 0; /* Previous opcode. */
861
862 /* Opcode have operands. */
863 if (*op)
864 {
865 unsigned int reg1 = 0;
866 unsigned int reg2 = 0;
867 int reg1_present = 0;
868 int reg2_present = 0;
869
870 /* Parse first operand. */
871 if (REGISTER_P (*op))
872 reg1_present = 1;
873 reg1 = avr_operand (opcode, where, op, &str);
874 ++op;
875
876 /* Parse second operand. */
877 if (*op)
878 {
879 if (*op == ',')
880 ++op;
881
882 if (*op == '=')
883 {
884 reg2 = reg1;
885 reg2_present = 1;
886 }
887 else
888 {
889 if (REGISTER_P (*op))
890 reg2_present = 1;
891
892 str = skip_space (str);
893 if (*str++ != ',')
894 as_bad (_("`,' required"));
895 str = skip_space (str);
896
897 reg2 = avr_operand (opcode, where, op, &str);
898 }
899
900 if (reg1_present && reg2_present)
901 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
902 else if (reg2_present)
903 reg2 <<= 4;
904 }
905 if (reg1_present)
906 reg1 <<= 4;
907 bin |= reg1 | reg2;
908 }
909
910 /* Detect undefined combinations (like ld r31,Z+). */
911 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
912 as_warn (_("undefined combination of operands"));
913
914 if (opcode->insn_size == 2)
915 {
916 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
917 (AVR core bug, fixed in the newer devices). */
918 if (!(avr_opt.no_skip_bug ||
919 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
920 && AVR_SKIP_P (prev))
921 as_warn (_("skipping two-word instruction"));
922
923 bfd_putl32 ((bfd_vma) bin, frag);
924 }
925 else
926 bfd_putl16 ((bfd_vma) bin, frag);
927
928 prev = bin;
929 *line = str;
930 return bin;
931 }
932
933 /* GAS will call this function for each section at the end of the assembly,
934 to permit the CPU backend to adjust the alignment of a section. */
935
936 valueT
937 md_section_align (asection *seg, valueT addr)
938 {
939 int align = bfd_get_section_alignment (stdoutput, seg);
940 return ((addr + (1 << align) - 1) & (-1 << align));
941 }
942
943 /* If you define this macro, it should return the offset between the
944 address of a PC relative fixup and the position from which the PC
945 relative adjustment should be made. On many processors, the base
946 of a PC relative instruction is the next instruction, so this
947 macro would return the length of an instruction. */
948
949 long
950 md_pcrel_from_section (fixS *fixp, segT sec)
951 {
952 if (fixp->fx_addsy != (symbolS *) NULL
953 && (!S_IS_DEFINED (fixp->fx_addsy)
954 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
955 return 0;
956
957 return fixp->fx_frag->fr_address + fixp->fx_where;
958 }
959
960 /* GAS will call this for each fixup. It should store the correct
961 value in the object file. */
962
963 void
964 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
965 {
966 unsigned char *where;
967 unsigned long insn;
968 long value = *valP;
969
970 if (fixP->fx_addsy == (symbolS *) NULL)
971 fixP->fx_done = 1;
972
973 else if (fixP->fx_pcrel)
974 {
975 segT s = S_GET_SEGMENT (fixP->fx_addsy);
976
977 if (s == seg || s == absolute_section)
978 {
979 value += S_GET_VALUE (fixP->fx_addsy);
980 fixP->fx_done = 1;
981 }
982 }
983
984 /* We don't actually support subtracting a symbol. */
985 if (fixP->fx_subsy != (symbolS *) NULL)
986 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
987
988 switch (fixP->fx_r_type)
989 {
990 default:
991 fixP->fx_no_overflow = 1;
992 break;
993 case BFD_RELOC_AVR_7_PCREL:
994 case BFD_RELOC_AVR_13_PCREL:
995 case BFD_RELOC_32:
996 case BFD_RELOC_16:
997 case BFD_RELOC_AVR_CALL:
998 break;
999 }
1000
1001 if (fixP->fx_done)
1002 {
1003 /* Fetch the instruction, insert the fully resolved operand
1004 value, and stuff the instruction back again. */
1005 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1006 insn = bfd_getl16 (where);
1007
1008 switch (fixP->fx_r_type)
1009 {
1010 case BFD_RELOC_AVR_7_PCREL:
1011 if (value & 1)
1012 as_bad_where (fixP->fx_file, fixP->fx_line,
1013 _("odd address operand: %ld"), value);
1014
1015 /* Instruction addresses are always right-shifted by 1. */
1016 value >>= 1;
1017 --value; /* Correct PC. */
1018
1019 if (value < -64 || value > 63)
1020 as_bad_where (fixP->fx_file, fixP->fx_line,
1021 _("operand out of range: %ld"), value);
1022 value = (value << 3) & 0x3f8;
1023 bfd_putl16 ((bfd_vma) (value | insn), where);
1024 break;
1025
1026 case BFD_RELOC_AVR_13_PCREL:
1027 if (value & 1)
1028 as_bad_where (fixP->fx_file, fixP->fx_line,
1029 _("odd address operand: %ld"), value);
1030
1031 /* Instruction addresses are always right-shifted by 1. */
1032 value >>= 1;
1033 --value; /* Correct PC. */
1034
1035 if (value < -2048 || value > 2047)
1036 {
1037 /* No wrap for devices with >8K of program memory. */
1038 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1039 as_bad_where (fixP->fx_file, fixP->fx_line,
1040 _("operand out of range: %ld"), value);
1041 }
1042
1043 value &= 0xfff;
1044 bfd_putl16 ((bfd_vma) (value | insn), where);
1045 break;
1046
1047 case BFD_RELOC_32:
1048 bfd_putl16 ((bfd_vma) value, where);
1049 break;
1050
1051 case BFD_RELOC_16:
1052 bfd_putl16 ((bfd_vma) value, where);
1053 break;
1054
1055 case BFD_RELOC_AVR_16_PM:
1056 bfd_putl16 ((bfd_vma) (value >> 1), where);
1057 break;
1058
1059 case BFD_RELOC_AVR_LDI:
1060 if (value > 255)
1061 as_bad_where (fixP->fx_file, fixP->fx_line,
1062 _("operand out of range: %ld"), value);
1063 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1064 break;
1065
1066 case BFD_RELOC_AVR_6:
1067 if ((value > 63) || (value < 0))
1068 as_bad_where (fixP->fx_file, fixP->fx_line,
1069 _("operand out of range: %ld"), value);
1070 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1071 break;
1072
1073 case BFD_RELOC_AVR_6_ADIW:
1074 if ((value > 63) || (value < 0))
1075 as_bad_where (fixP->fx_file, fixP->fx_line,
1076 _("operand out of range: %ld"), value);
1077 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1078 break;
1079
1080 case BFD_RELOC_AVR_LO8_LDI:
1081 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1082 break;
1083
1084 case -BFD_RELOC_AVR_LO8_LDI:
1085 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1086 break;
1087
1088 case BFD_RELOC_AVR_HI8_LDI:
1089 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1090 break;
1091
1092 case -BFD_RELOC_AVR_HI8_LDI:
1093 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1094 break;
1095
1096 case BFD_RELOC_AVR_HH8_LDI:
1097 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1098 break;
1099
1100 case BFD_RELOC_AVR_LO8_LDI_NEG:
1101 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1102 break;
1103
1104 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1105 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1106 break;
1107
1108 case BFD_RELOC_AVR_HI8_LDI_NEG:
1109 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1110 break;
1111
1112 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1113 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1114 break;
1115
1116 case BFD_RELOC_AVR_HH8_LDI_NEG:
1117 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1118 break;
1119
1120 case BFD_RELOC_AVR_LO8_LDI_PM:
1121 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1122 break;
1123
1124 case BFD_RELOC_AVR_HI8_LDI_PM:
1125 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1126 break;
1127
1128 case BFD_RELOC_AVR_HH8_LDI_PM:
1129 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1130 break;
1131
1132 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1133 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1134 break;
1135
1136 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1137 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1138 break;
1139
1140 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1141 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1142 break;
1143
1144 case BFD_RELOC_AVR_CALL:
1145 {
1146 unsigned long x;
1147
1148 x = bfd_getl16 (where);
1149 if (value & 1)
1150 as_bad_where (fixP->fx_file, fixP->fx_line,
1151 _("odd address operand: %ld"), value);
1152 value >>= 1;
1153 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1154 bfd_putl16 ((bfd_vma) x, where);
1155 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1156 }
1157 break;
1158
1159 default:
1160 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1161 fixP->fx_line, fixP->fx_r_type);
1162 break;
1163 }
1164 }
1165 else
1166 {
1167 switch (fixP->fx_r_type)
1168 {
1169 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1170 case -BFD_RELOC_AVR_HI8_LDI:
1171 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1172 case -BFD_RELOC_AVR_LO8_LDI:
1173 as_bad_where (fixP->fx_file, fixP->fx_line,
1174 _("only constant expression allowed"));
1175 fixP->fx_done = 1;
1176 break;
1177 default:
1178 break;
1179 }
1180 }
1181 }
1182
1183 /* GAS will call this to generate a reloc, passing the resulting reloc
1184 to `bfd_install_relocation'. This currently works poorly, as
1185 `bfd_install_relocation' often does the wrong thing, and instances of
1186 `tc_gen_reloc' have been written to work around the problems, which
1187 in turns makes it difficult to fix `bfd_install_relocation'. */
1188
1189 /* If while processing a fixup, a reloc really needs to be created
1190 then it is done here. */
1191
1192 arelent *
1193 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1194 fixS *fixp)
1195 {
1196 arelent *reloc;
1197
1198 reloc = xmalloc (sizeof (arelent));
1199
1200 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1201 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1202
1203 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1204 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1205 if (reloc->howto == (reloc_howto_type *) NULL)
1206 {
1207 as_bad_where (fixp->fx_file, fixp->fx_line,
1208 _("reloc %d not supported by object file format"),
1209 (int) fixp->fx_r_type);
1210 return NULL;
1211 }
1212
1213 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1214 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1215 reloc->address = fixp->fx_offset;
1216
1217 reloc->addend = fixp->fx_offset;
1218
1219 return reloc;
1220 }
1221
1222 void
1223 md_assemble (char *str)
1224 {
1225 struct avr_opcodes_s *opcode;
1226 char op[11];
1227
1228 str = skip_space (extract_word (str, op, sizeof (op)));
1229
1230 if (!op[0])
1231 as_bad (_("can't find opcode "));
1232
1233 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1234
1235 if (opcode == NULL)
1236 {
1237 as_bad (_("unknown opcode `%s'"), op);
1238 return;
1239 }
1240
1241 /* Special case for opcodes with optional operands (lpm, elpm) -
1242 version with operands exists in avr_opcodes[] in the next entry. */
1243
1244 if (*str && *opcode->constraints == '?')
1245 ++opcode;
1246
1247 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1248 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1249
1250 /* We used to set input_line_pointer to the result of get_operands,
1251 but that is wrong. Our caller assumes we don't change it. */
1252 {
1253 char *t = input_line_pointer;
1254
1255 avr_operands (opcode, &str);
1256 if (*skip_space (str))
1257 as_bad (_("garbage at end of line"));
1258 input_line_pointer = t;
1259 }
1260 }
1261
1262 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1263 `avr_cons_fix_new'. */
1264 static int exp_mod_pm = 0;
1265
1266 /* Parse special CONS expression: pm (expression)
1267 which is used for addressing to a program memory.
1268 Relocation: BFD_RELOC_AVR_16_PM. */
1269
1270 void
1271 avr_parse_cons_expression (expressionS *exp, int nbytes)
1272 {
1273 char *tmp;
1274
1275 exp_mod_pm = 0;
1276
1277 tmp = input_line_pointer = skip_space (input_line_pointer);
1278
1279 if (nbytes == 2)
1280 {
1281 char *pm_name = "pm";
1282 int len = strlen (pm_name);
1283
1284 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1285 {
1286 input_line_pointer = skip_space (input_line_pointer + len);
1287
1288 if (*input_line_pointer == '(')
1289 {
1290 input_line_pointer = skip_space (input_line_pointer + 1);
1291 exp_mod_pm = 1;
1292 expression (exp);
1293
1294 if (*input_line_pointer == ')')
1295 ++input_line_pointer;
1296 else
1297 {
1298 as_bad (_("`)' required"));
1299 exp_mod_pm = 0;
1300 }
1301
1302 return;
1303 }
1304
1305 input_line_pointer = tmp;
1306 }
1307 }
1308
1309 expression (exp);
1310 }
1311
1312 void
1313 avr_cons_fix_new (fragS *frag,
1314 int where,
1315 int nbytes,
1316 expressionS *exp)
1317 {
1318 if (exp_mod_pm == 0)
1319 {
1320 if (nbytes == 2)
1321 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1322 else if (nbytes == 4)
1323 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1324 else
1325 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1326 }
1327 else
1328 {
1329 if (nbytes == 2)
1330 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1331 else
1332 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1333 exp_mod_pm = 0;
1334 }
1335 }
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