1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
6 This file is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
23 #include "floatformat.h"
24 #include "libiberty.h"
27 #include "opcode/m68k.h"
29 /* Local function prototypes. */
31 const char * const fpcr_names
[] =
33 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
34 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
37 static char *const reg_names
[] =
39 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
40 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
44 /* Name of register halves for MAC/EMAC.
45 Seperate from reg_names since 'spu', 'fpl' look weird. */
46 static char *const reg_half_names
[] =
48 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
49 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
53 /* Sign-extend an (unsigned char). */
55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 /* Get a 1 byte signed integer. */
61 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
63 /* Get a 2 byte signed integer. */
64 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
66 (p += 2, FETCH_DATA (info, p), \
67 COERCE16 ((p[-2] << 8) + p[-1]))
69 /* Get a 4 byte signed integer. */
70 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
72 (p += 4, FETCH_DATA (info, p), \
73 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
75 /* Get a 4 byte unsigned integer. */
76 #define NEXTULONG(p) \
77 (p += 4, FETCH_DATA (info, p), \
78 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
80 /* Get a single precision float. */
81 #define NEXTSINGLE(val, p) \
82 (p += 4, FETCH_DATA (info, p), \
83 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
85 /* Get a double precision float. */
86 #define NEXTDOUBLE(val, p) \
87 (p += 8, FETCH_DATA (info, p), \
88 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
90 /* Get an extended precision float. */
91 #define NEXTEXTEND(val, p) \
92 (p += 12, FETCH_DATA (info, p), \
93 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
95 /* Need a function to convert from packed to double
96 precision. Actually, it's easier to print a
97 packed number than a double anyway, so maybe
98 there should be a special case to handle this... */
99 #define NEXTPACKED(p) \
100 (p += 12, FETCH_DATA (info, p), 0.0)
102 /* Maximum length of an instruction. */
109 /* Points to first byte not fetched. */
110 bfd_byte
*max_fetched
;
111 bfd_byte the_buffer
[MAXLEN
];
116 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
117 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
119 #define FETCH_DATA(info, addr) \
120 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
121 ? 1 : fetch_data ((info), (addr)))
124 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
127 struct private *priv
= (struct private *)info
->private_data
;
128 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
130 status
= (*info
->read_memory_func
) (start
,
132 addr
- priv
->max_fetched
,
136 (*info
->memory_error_func
) (status
, start
, info
);
137 longjmp (priv
->bailout
, 1);
140 priv
->max_fetched
= addr
;
144 /* This function is used to print to the bit-bucket. */
146 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
147 const char *format ATTRIBUTE_UNUSED
,
154 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
155 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
159 /* Fetch BITS bits from a position in the instruction specified by CODE.
160 CODE is a "place to put an argument", or 'x' for a destination
161 that is a general address (mode and register).
162 BUFFER contains the instruction. */
165 fetch_arg (unsigned char *buffer
,
168 disassemble_info
*info
)
174 case '/': /* MAC/EMAC mask bit. */
175 val
= buffer
[3] >> 5;
178 case 'G': /* EMAC ACC load. */
179 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
182 case 'H': /* EMAC ACC !load. */
183 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
186 case ']': /* EMAC ACCEXT bit. */
187 val
= buffer
[0] >> 2;
190 case 'I': /* MAC/EMAC scale factor. */
191 val
= buffer
[2] >> 1;
194 case 'F': /* EMAC ACCx. */
195 val
= buffer
[0] >> 1;
206 case 'd': /* Destination, for register or quick. */
207 val
= (buffer
[0] << 8) + buffer
[1];
211 case 'x': /* Destination, for general arg. */
212 val
= (buffer
[0] << 8) + buffer
[1];
217 FETCH_DATA (info
, buffer
+ 3);
218 val
= (buffer
[3] >> 4);
222 FETCH_DATA (info
, buffer
+ 3);
227 FETCH_DATA (info
, buffer
+ 3);
228 val
= (buffer
[2] << 8) + buffer
[3];
233 FETCH_DATA (info
, buffer
+ 3);
234 val
= (buffer
[2] << 8) + buffer
[3];
240 FETCH_DATA (info
, buffer
+ 3);
241 val
= (buffer
[2] << 8) + buffer
[3];
245 FETCH_DATA (info
, buffer
+ 5);
246 val
= (buffer
[4] << 8) + buffer
[5];
251 FETCH_DATA (info
, buffer
+ 5);
252 val
= (buffer
[4] << 8) + buffer
[5];
257 FETCH_DATA (info
, buffer
+ 5);
258 val
= (buffer
[4] << 8) + buffer
[5];
262 FETCH_DATA (info
, buffer
+ 3);
263 val
= (buffer
[2] << 8) + buffer
[3];
268 FETCH_DATA (info
, buffer
+ 3);
269 val
= (buffer
[2] << 8) + buffer
[3];
274 FETCH_DATA (info
, buffer
+ 3);
275 val
= (buffer
[2] << 8) + buffer
[3];
280 val
= (buffer
[1] >> 6);
284 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
285 | ((buffer
[0] >> 1) & 0x7)
286 | (buffer
[3] & 0x80 ? 0x10 : 0);
290 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
294 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
298 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
302 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
306 val
= buffer
[2] >> 2;
338 /* Check if an EA is valid for a particular code. This is required
339 for the EMAC instructions since the type of source address determines
340 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
341 is a non-load EMAC instruction and the bits mean register Ry.
342 A similar case exists for the movem instructions where the register
343 mask is interpreted differently for different EAs. */
346 m68k_valid_ea (char code
, int val
)
349 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
350 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
351 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
356 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
359 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
362 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
365 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
368 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
371 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
374 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
377 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
380 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
383 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
386 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
389 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
392 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
395 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
398 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
401 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
404 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
407 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
410 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
413 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
416 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
419 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
422 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
425 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
432 mode
= (val
>> 3) & 7;
435 return (mask
& (1 << mode
)) != 0;
438 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
439 REGNO = -1 for pc, -2 for none (suppressed). */
442 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
446 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
447 (*info
->print_address_func
) (disp
, info
);
454 (*info
->fprintf_func
) (info
->stream
, "@(");
455 else if (regno
== -3)
456 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
458 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
460 sprintf_vma (buf
, disp
);
461 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);
465 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
466 P points to extension word, in buffer.
467 ADDR is the nominal core address of that extension word. */
469 static unsigned char *
470 print_indexed (int basereg
,
473 disassemble_info
*info
)
476 static char *const scales
[] = { "", ":2", ":4", ":8" };
484 /* Generate the text for the index register.
485 Where this will be output is not yet determined. */
486 sprintf (buf
, "%s:%c%s",
487 reg_names
[(word
>> 12) & 0xf],
488 (word
& 0x800) ? 'l' : 'w',
489 scales
[(word
>> 9) & 3]);
491 /* Handle the 68000 style of indexing. */
493 if ((word
& 0x100) == 0)
495 base_disp
= word
& 0xff;
496 if ((base_disp
& 0x80) != 0)
500 print_base (basereg
, base_disp
, info
);
501 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
505 /* Handle the generalized kind. */
506 /* First, compute the displacement to add to the base register. */
517 switch ((word
>> 4) & 3)
520 base_disp
= NEXTWORD (p
);
523 base_disp
= NEXTLONG (p
);
528 /* Handle single-level case (not indirect). */
531 print_base (basereg
, base_disp
, info
);
533 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
534 (*info
->fprintf_func
) (info
->stream
, ")");
538 /* Two level. Compute displacement to add after indirection. */
543 outer_disp
= NEXTWORD (p
);
546 outer_disp
= NEXTLONG (p
);
549 print_base (basereg
, base_disp
, info
);
550 if ((word
& 4) == 0 && buf
[0] != '\0')
552 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
555 sprintf_vma (vmabuf
, outer_disp
);
556 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
558 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
559 (*info
->fprintf_func
) (info
->stream
, ")");
564 /* Returns number of bytes "eaten" by the operand, or
565 return -1 if an invalid operand was found, or -2 if
566 an opcode tabe error was found.
567 ADDR is the pc for this arg to be relative to. */
570 print_insn_arg (const char *d
,
571 unsigned char *buffer
,
574 disassemble_info
*info
)
578 unsigned char *p
= p0
;
589 case 'c': /* Cache identifier. */
591 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
592 val
= fetch_arg (buffer
, place
, 2, info
);
593 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
597 case 'a': /* Address register indirect only. Cf. case '+'. */
599 (*info
->fprintf_func
)
602 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
606 case '_': /* 32-bit absolute address for move16. */
608 uval
= NEXTULONG (p
);
609 (*info
->print_address_func
) (uval
, info
);
614 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
618 (*info
->fprintf_func
) (info
->stream
, "%%sr");
622 (*info
->fprintf_func
) (info
->stream
, "%%usp");
626 (*info
->fprintf_func
) (info
->stream
, "%%acc");
630 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
634 (*info
->fprintf_func
) (info
->stream
, "%%mask");
639 /* FIXME: There's a problem here, different m68k processors call the
640 same address different names. This table can't get it right
641 because it doesn't know which processor it's disassembling for. */
642 static const struct { char *name
; int value
; } names
[]
643 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
644 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
645 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
646 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
647 {"%msp", 0x803}, {"%isp", 0x804},
648 {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
650 /* Should we be calling this psr like we do in case 'Y'? */
653 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
655 val
= fetch_arg (buffer
, place
, 12, info
);
656 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
657 if (names
[regno
].value
== val
)
659 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
663 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
668 val
= fetch_arg (buffer
, place
, 3, info
);
669 /* 0 means 8, except for the bkpt instruction... */
670 if (val
== 0 && d
[1] != 's')
672 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
676 val
= fetch_arg (buffer
, place
, 3, info
);
680 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
686 static char *const scalefactor_name
[] = { "<<", ">>" };
687 val
= fetch_arg (buffer
, place
, 1, info
);
688 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
692 val
= fetch_arg (buffer
, place
, 8, info
);
695 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
700 val
= fetch_arg (buffer
, place
, 4, info
);
701 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
705 (*info
->fprintf_func
) (info
->stream
, "%s",
706 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
710 (*info
->fprintf_func
)
712 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
716 (*info
->fprintf_func
)
718 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
722 regno
= fetch_arg (buffer
, place
, 4, info
);
724 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
726 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
730 (*info
->fprintf_func
)
731 (info
->stream
, "%%fp%d",
732 fetch_arg (buffer
, place
, 3, info
));
736 val
= fetch_arg (buffer
, place
, 6, info
);
738 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
740 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
744 (*info
->fprintf_func
)
745 (info
->stream
, "%s@+",
746 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
750 (*info
->fprintf_func
)
751 (info
->stream
, "%s@-",
752 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
757 (*info
->fprintf_func
)
758 (info
->stream
, "{%s}",
759 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
760 else if (place
== 'C')
762 val
= fetch_arg (buffer
, place
, 7, info
);
763 if (val
> 63) /* This is a signed constant. */
765 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
773 p1
= buffer
+ (*d
== '#' ? 2 : 4);
775 val
= fetch_arg (buffer
, place
, 4, info
);
776 else if (place
== 'C')
777 val
= fetch_arg (buffer
, place
, 7, info
);
778 else if (place
== '8')
779 val
= fetch_arg (buffer
, place
, 3, info
);
780 else if (place
== '3')
781 val
= fetch_arg (buffer
, place
, 8, info
);
782 else if (place
== 'b')
784 else if (place
== 'w' || place
== 'W')
786 else if (place
== 'l')
790 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
796 else if (place
== 'B')
797 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
798 else if (place
== 'w' || place
== 'W')
800 else if (place
== 'l' || place
== 'L' || place
== 'C')
802 else if (place
== 'g')
804 disp
= NEXTBYTE (buffer
);
810 else if (place
== 'c')
812 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
820 (*info
->print_address_func
) (addr
+ disp
, info
);
825 (*info
->fprintf_func
)
826 (info
->stream
, "%s@(%d)",
827 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8], val
);
831 (*info
->fprintf_func
) (info
->stream
, "%s",
832 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
836 val
= fetch_arg(buffer
, place
, 2, info
);
837 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
841 val
= fetch_arg(buffer
, place
, 1, info
);
842 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
==0 ? "01" : "23");
846 val
= fetch_arg(buffer
, place
, 2, info
);
848 (*info
->fprintf_func
) (info
->stream
, "<<");
850 (*info
->fprintf_func
) (info
->stream
, ">>");
856 /* Get coprocessor ID... */
857 val
= fetch_arg (buffer
, 'd', 3, info
);
859 if (val
!= 1) /* Unusual coprocessor ID? */
860 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
889 val
= fetch_arg (buffer
, 'x', 6, info
);
890 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
893 val
= fetch_arg (buffer
, 's', 6, info
);
895 /* If the <ea> is invalid for *d, then reject this match. */
896 if (!m68k_valid_ea (*d
, val
))
899 /* Get register number assuming address register. */
900 regno
= (val
& 7) + 8;
901 regname
= reg_names
[regno
];
905 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
909 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
913 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
917 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
921 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
926 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
930 p
= print_indexed (regno
, p
, addr
, info
);
938 (*info
->print_address_func
) (val
, info
);
942 uval
= NEXTULONG (p
);
943 (*info
->print_address_func
) (uval
, info
);
948 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
949 (*info
->print_address_func
) (addr
+ val
, info
);
950 (*info
->fprintf_func
) (info
->stream
, ")");
954 p
= print_indexed (-1, p
, addr
, info
);
958 flt_p
= 1; /* Assume it's a float... */
977 NEXTSINGLE (flval
, p
);
981 NEXTDOUBLE (flval
, p
);
985 NEXTEXTEND (flval
, p
);
989 flval
= NEXTPACKED (p
);
995 if (flt_p
) /* Print a float? */
996 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
998 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
1006 /* If place is '/', then this is the case of the mask bit for
1007 mac/emac loads. Now that the arg has been printed, grab the
1008 mask bit and if set, add a '&' to the arg. */
1011 val
= fetch_arg (buffer
, place
, 1, info
);
1013 info
->fprintf_func (info
->stream
, "&");
1023 val
= NEXTWORD (p1
);
1024 /* Move the pointer ahead if this point is farther ahead
1026 p
= p1
> p
? p1
: p
;
1029 (*info
->fprintf_func
) (info
->stream
, "#0");
1036 for (regno
= 0; regno
< 16; ++regno
)
1037 if (val
& (0x8000 >> regno
))
1038 newval
|= 1 << regno
;
1043 for (regno
= 0; regno
< 16; ++regno
)
1044 if (val
& (1 << regno
))
1049 (*info
->fprintf_func
) (info
->stream
, "/");
1051 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
1052 first_regno
= regno
;
1053 while (val
& (1 << (regno
+ 1)))
1055 if (regno
> first_regno
)
1056 (*info
->fprintf_func
) (info
->stream
, "-%s",
1060 else if (place
== '3')
1062 /* `fmovem' insn. */
1064 val
= fetch_arg (buffer
, place
, 8, info
);
1067 (*info
->fprintf_func
) (info
->stream
, "#0");
1074 for (regno
= 0; regno
< 8; ++regno
)
1075 if (val
& (0x80 >> regno
))
1076 newval
|= 1 << regno
;
1081 for (regno
= 0; regno
< 8; ++regno
)
1082 if (val
& (1 << regno
))
1086 (*info
->fprintf_func
) (info
->stream
, "/");
1088 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
1089 first_regno
= regno
;
1090 while (val
& (1 << (regno
+ 1)))
1092 if (regno
> first_regno
)
1093 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
1096 else if (place
== '8')
1098 /* fmoveml for FP status registers. */
1099 (*info
->fprintf_func
) (info
->stream
, "%s",
1100 fpcr_names
[fetch_arg (buffer
, place
, 3,
1117 int val
= fetch_arg (buffer
, place
, 5, info
);
1122 case 2: name
= "%tt0"; break;
1123 case 3: name
= "%tt1"; break;
1124 case 0x10: name
= "%tc"; break;
1125 case 0x11: name
= "%drp"; break;
1126 case 0x12: name
= "%srp"; break;
1127 case 0x13: name
= "%crp"; break;
1128 case 0x14: name
= "%cal"; break;
1129 case 0x15: name
= "%val"; break;
1130 case 0x16: name
= "%scc"; break;
1131 case 0x17: name
= "%ac"; break;
1132 case 0x18: name
= "%psr"; break;
1133 case 0x19: name
= "%pcsr"; break;
1137 int break_reg
= ((buffer
[3] >> 2) & 7);
1139 (*info
->fprintf_func
)
1140 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1145 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1148 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1154 int fc
= fetch_arg (buffer
, place
, 5, info
);
1157 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1159 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1161 /* xgettext:c-format */
1162 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1167 (*info
->fprintf_func
) (info
->stream
, "%%val");
1172 int level
= fetch_arg (buffer
, place
, 3, info
);
1174 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1181 int reg
= fetch_arg (buffer
, place
, 5, info
);
1188 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1189 reg_half_names
[reg
],
1190 is_upper
? "u" : "l");
1201 /* Try to match the current instruction to best and if so, return the
1202 number of bytes consumed from the instruction stream, else zero. */
1205 match_insn_m68k (bfd_vma memaddr
,
1206 disassemble_info
* info
,
1207 const struct m68k_opcode
* best
,
1208 struct private * priv
)
1210 unsigned char *save_p
;
1214 bfd_byte
*buffer
= priv
->the_buffer
;
1215 fprintf_ftype save_printer
= info
->fprintf_func
;
1216 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1217 = info
->print_address_func
;
1219 /* Point at first word of argument data,
1220 and at descriptor for first argument. */
1223 /* Figure out how long the fixed-size portion of the instruction is.
1224 The only place this is stored in the opcode table is
1225 in the arguments--look for arguments which specify fields in the 2nd
1226 or 3rd words of the instruction. */
1227 for (d
= best
->args
; *d
; d
+= 2)
1229 /* I don't think it is necessary to be checking d[0] here;
1230 I suspect all this could be moved to the case statement below. */
1233 if (d
[1] == 'l' && p
- buffer
< 6)
1235 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1239 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1265 /* pflusha is an exceptions. It takes no arguments but is two words
1266 long. Recognize it by looking at the lower 16 bits of the mask. */
1267 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1270 /* lpstop is another exception. It takes a one word argument but is
1271 three words long. */
1273 && (best
->match
& 0xffff) == 0xffff
1274 && best
->args
[0] == '#'
1275 && best
->args
[1] == 'w')
1277 /* Copy the one word argument into the usual location for a one
1278 word argument, to simplify printing it. We can get away with
1279 this because we know exactly what the second word is, and we
1280 aren't going to print anything based on it. */
1282 FETCH_DATA (info
, p
);
1283 buffer
[2] = buffer
[4];
1284 buffer
[3] = buffer
[5];
1287 FETCH_DATA (info
, p
);
1292 info
->print_address_func
= dummy_print_address
;
1293 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
1295 /* We scan the operands twice. The first time we don't print anything,
1296 but look for errors. */
1299 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1303 else if (eaten
== -1)
1305 info
->fprintf_func
= save_printer
;
1306 info
->print_address_func
= save_print_address
;
1311 info
->fprintf_func (info
->stream
,
1312 /* xgettext:c-format */
1313 _("<internal error in opcode table: %s %s>\n"),
1314 best
->name
, best
->args
);
1315 info
->fprintf_func
= save_printer
;
1316 info
->print_address_func
= save_print_address
;
1322 info
->fprintf_func
= save_printer
;
1323 info
->print_address_func
= save_print_address
;
1327 info
->fprintf_func (info
->stream
, "%s", best
->name
);
1330 info
->fprintf_func (info
->stream
, " ");
1334 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1337 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1338 info
->fprintf_func (info
->stream
, ",");
1344 /* Print the m68k instruction at address MEMADDR in debugged memory,
1345 on INFO->STREAM. Returns length of the instruction, in bytes. */
1348 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1352 unsigned int arch_mask
;
1353 struct private priv
;
1354 bfd_byte
*buffer
= priv
.the_buffer
;
1356 static int numopcodes
[16];
1357 static const struct m68k_opcode
**opcodes
[16];
1362 /* Speed up the matching by sorting the opcode
1363 table on the upper four bits of the opcode. */
1364 const struct m68k_opcode
**opc_pointer
[16];
1366 /* First count how many opcodes are in each of the sixteen buckets. */
1367 for (i
= 0; i
< m68k_numopcodes
; i
++)
1368 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1370 /* Then create a sorted table of pointers
1371 that point into the unsorted table. */
1372 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1374 opcodes
[0] = opc_pointer
[0];
1376 for (i
= 1; i
< 16; i
++)
1378 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1379 opcodes
[i
] = opc_pointer
[i
];
1382 for (i
= 0; i
< m68k_numopcodes
; i
++)
1383 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1386 info
->private_data
= (PTR
) &priv
;
1387 /* Tell objdump to use two bytes per chunk
1388 and six bytes per line for displaying raw data. */
1389 info
->bytes_per_chunk
= 2;
1390 info
->bytes_per_line
= 6;
1391 info
->display_endian
= BFD_ENDIAN_BIG
;
1392 priv
.max_fetched
= priv
.the_buffer
;
1393 priv
.insn_start
= memaddr
;
1395 if (setjmp (priv
.bailout
) != 0)
1399 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1401 arch_mask
= ~(unsigned int)0;
1403 FETCH_DATA (info
, buffer
+ 2);
1404 major_opcode
= (buffer
[0] >> 4) & 15;
1406 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1408 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1409 unsigned long opcode
= opc
->opcode
;
1410 unsigned long match
= opc
->match
;
1412 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1413 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1414 /* Only fetch the next two bytes if we need to. */
1415 && (((0xffff & match
) == 0)
1417 (FETCH_DATA (info
, buffer
+ 4)
1418 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1419 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1421 && (opc
->arch
& arch_mask
) != 0)
1423 /* Don't use for printout the variants of divul and divsl
1424 that have the same register number in two places.
1425 The more general variants will match instead. */
1426 for (d
= opc
->args
; *d
; d
+= 2)
1430 /* Don't use for printout the variants of most floating
1431 point coprocessor instructions which use the same
1432 register number in two places, as above. */
1434 for (d
= opc
->args
; *d
; d
+= 2)
1438 /* Don't match fmovel with more than one register;
1439 wait for fmoveml. */
1442 for (d
= opc
->args
; *d
; d
+= 2)
1444 if (d
[0] == 's' && d
[1] == '8')
1446 val
= fetch_arg (buffer
, d
[1], 3, info
);
1447 if ((val
& (val
- 1)) != 0)
1453 /* Don't match FPU insns with non-default coprocessor ID. */
1456 for (d
= opc
->args
; *d
; d
+= 2)
1460 val
= fetch_arg (buffer
, 'd', 3, info
);
1468 if ((val
= match_insn_m68k (memaddr
, info
, opc
, & priv
)))
1473 /* Handle undefined instructions. */
1474 info
->fprintf_func (info
->stream
, "0%o", (buffer
[0] << 8) + buffer
[1]);