gas/itbl-ops.c

   1 /* itbl-ops.c
   2    Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
   3
   4    This file is part of GAS, the GNU Assembler.
   5
   6    GAS is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2, or (at your option)
   9    any later version.
  10
  11    GAS is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GAS; see the file COPYING.  If not, write to the Free
  18    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  19    02111-1307, USA.  */
  20
  21 /*======================================================================*/
  22 /*
  23  * Herein lies the support for dynamic specification of processor
  24  * instructions and registers.  Mnemonics, values, and formats for each
  25  * instruction and register are specified in an ascii file consisting of
  26  * table entries.  The grammar for the table is defined in the document
  27  * "Processor instruction table specification".
  28  *
  29  * Instructions use the gnu assembler syntax, with the addition of
  30  * allowing mnemonics for register.
  31  * Eg. "func $2,reg3,0x100,symbol ; comment"
  32  *      func - opcode name
  33  *      $n - register n
  34  *      reg3 - mnemonic for processor's register defined in table
  35  *      0xddd..d - immediate value
  36  *      symbol - address of label or external symbol
  37  *
  38  * First, itbl_parse reads in the table of register and instruction
  39  * names and formats, and builds a list of entries for each
  40  * processor/type combination.  lex and yacc are used to parse
  41  * the entries in the table and call functions defined here to
  42  * add each entry to our list.
  43  *
  44  * Then, when assembling or disassembling, these functions are called to
  45  * 1) get information on a processor's registers and
  46  * 2) assemble/disassemble an instruction.
  47  * To assemble(disassemble) an instruction, the function
  48  * itbl_assemble(itbl_disassemble) is called to search the list of
  49  * instruction entries, and if a match is found, uses the format
  50  * described in the instruction entry structure to complete the action.
  51  *
  52  * Eg. Suppose we have a Mips coprocessor "cop3" with data register "d2"
  53  * and we want to define function "pig" which takes two operands.
  54  *
  55  * Given the table entries:
  56  *      "p3 insn pig 0x1:24-21 dreg:20-16 immed:15-0"
  57  *      "p3 dreg d2 0x2"
  58  * and that the instruction encoding for coprocessor pz has encoding:
  59  *      #define MIPS_ENCODE_COP_NUM(z) ((0x21|(z<<1))<<25)
  60  *      #define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum)
  61  *
  62  * a structure to describe the instruction might look something like:
  63  *      struct itbl_entry = {
  64  *      e_processor processor = e_p3
  65  *      e_type type = e_insn
  66  *      char *name = "pig"
  67  *      uint value = 0x1
  68  *      uint flags = 0
  69  *      struct itbl_range range = 24-21
  70  *      struct itbl_field *field = {
  71  *              e_type type = e_dreg
  72  *              struct itbl_range range = 20-16
  73  *              struct itbl_field *next = {
  74  *                      e_type type = e_immed
  75  *                      struct itbl_range range = 15-0
  76  *                      struct itbl_field *next = 0
  77  *                      };
  78  *              };
  79  *      struct itbl_entry *next = 0
  80  *      };
  81  *
  82  * And the assembler instructions:
  83  *      "pig d2,0x100"
  84  *      "pig $2,0x100"
  85  *
  86  * would both assemble to the hex value:
  87  *      "0x4e220100"
  88  *
  89  */
  90
  91 #include <stdio.h>
  92 #include <stdlib.h>
  93 #include <string.h>
  94 #include "itbl-ops.h"
  95 #include "itbl-parse.h"
  96
  97 /* #define DEBUG */
  98
  99 #ifdef DEBUG
 100 #include <assert.h>
 101 #define ASSERT(x) assert(x)
 102 #define DBG(x) printf x
 103 #else
 104 #define ASSERT(x)
 105 #define DBG(x)
 106 #endif
 107
 108 #ifndef min
 109 #define min(a,b) (a<b?a:b)
 110 #endif
 111
 112 int itbl_have_entries = 0;
 113
 114 /*======================================================================*/
 115 /* structures for keeping itbl format entries */
 116
 117 struct itbl_range
 118   {
 119     int sbit;                   /* mask starting bit position */
 120     int ebit;                   /* mask ending bit position */
 121   };
 122
 123 struct itbl_field
 124   {
 125     e_type type;                /* dreg/creg/greg/immed/symb */
 126     struct itbl_range range;    /* field's bitfield range within instruction */
 127     unsigned long flags;        /* field flags */
 128     struct itbl_field *next;    /* next field in list */
 129   };
 130
 131
 132 /* These structures define the instructions and registers for a processor.
 133  * If the type is an instruction, the structure defines the format of an
 134  * instruction where the fields are the list of operands.
 135  * The flags field below uses the same values as those defined in the
 136  * gnu assembler and are machine specific. */
 137 struct itbl_entry
 138   {
 139     e_processor processor;      /* processor number */
 140     e_type type;                /* dreg/creg/greg/insn */
 141     char *name;                 /* mnemionic name for insn/register */
 142     unsigned long value;        /* opcode/instruction mask/register number */
 143     unsigned long flags;        /* effects of the instruction */
 144     struct itbl_range range;    /* bit range within instruction for value */
 145     struct itbl_field *fields;  /* list of operand definitions (if any) */
 146     struct itbl_entry *next;    /* next entry */
 147   };
 148
 149
 150 /* local data and structures */
 151
 152 static int itbl_num_opcodes = 0;
 153 /* Array of entries for each processor and entry type */
 154 static struct itbl_entry *entries[e_nprocs][e_ntypes] =
 155 {
 156   {0, 0, 0, 0, 0, 0},
 157   {0, 0, 0, 0, 0, 0},
 158   {0, 0, 0, 0, 0, 0},
 159   {0, 0, 0, 0, 0, 0}
 160 };
 161
 162 /* local prototypes */
 163 static unsigned long build_opcode PARAMS ((struct itbl_entry *e));
 164 static e_type get_type PARAMS ((int yytype));
 165 static e_processor get_processor PARAMS ((int yyproc));
 166 static struct itbl_entry **get_entries PARAMS ((e_processor processor,
 167                                                 e_type type));
 168 static struct itbl_entry *find_entry_byname PARAMS ((e_processor processor,
 169                                         e_type type, char *name));
 170 static struct itbl_entry *find_entry_byval PARAMS ((e_processor processor,
 171                         e_type type, unsigned long val, struct itbl_range *r));
 172 static struct itbl_entry *alloc_entry PARAMS ((e_processor processor,
 173                 e_type type, char *name, unsigned long value));
 174 static unsigned long apply_range PARAMS ((unsigned long value,
 175                                                 struct itbl_range r));
 176 static unsigned long extract_range PARAMS ((unsigned long value,
 177                                                 struct itbl_range r));
 178 static struct itbl_field *alloc_field PARAMS ((e_type type, int sbit,
 179                                         int ebit, unsigned long flags));
 180
 181
 182 /*======================================================================*/
 183 /* Interfaces to the parser */
 184
 185
 186 /* Open the table and use lex and yacc to parse the entries.
 187  * Return 1 for failure; 0 for success.  */
 188
 189 int
 190 itbl_parse (char *insntbl)
 191 {
 192   extern FILE *yyin;
 193   extern int yyparse (void);
 194   yyin = fopen (insntbl, "r");
 195   if (yyin == 0)
 196     {
 197       printf ("Can't open processor instruction specification file \"%s\"\n",
 198               insntbl);
 199       return 1;
 200     }
 201   else
 202     {
 203       while (yyparse ());
 204     }
 205   fclose (yyin);
 206   itbl_have_entries = 1;
 207   return 0;
 208 }
 209
 210 /* Add a register entry */
 211
 212 struct itbl_entry *
 213 itbl_add_reg (int yyprocessor, int yytype, char *regname,
 214               int regnum)
 215 {
 216 #if 0
 217 #include "as.h"
 218 #include "symbols.h"
 219   /* Since register names don't have a prefix, we put them in the symbol table so
 220      they can't be used as symbols.  This also simplifies argument parsing as
 221      we can let gas parse registers for us.  The recorded register number is
 222      regnum.  */
 223   /* Use symbol_create here instead of symbol_new so we don't try to
 224      output registers into the object file's symbol table.  */
 225   symbol_table_insert (symbol_create (regname, reg_section,
 226                                       regnum, &zero_address_frag));
 227 #endif
 228   return alloc_entry (get_processor (yyprocessor), get_type (yytype), regname,
 229                       (unsigned long) regnum);
 230 }
 231
 232 /* Add an instruction entry */
 233
 234 struct itbl_entry *
 235 itbl_add_insn (int yyprocessor, char *name, unsigned long value,
 236                int sbit, int ebit, unsigned long flags)
 237 {
 238   struct itbl_entry *e;
 239   e = alloc_entry (get_processor (yyprocessor), e_insn, name, value);
 240   if (e)
 241     {
 242       e->range.sbit = sbit;
 243       e->range.ebit = ebit;
 244       e->flags = flags;
 245       itbl_num_opcodes++;
 246     }
 247   return e;
 248 }
 249
 250 /* Add an operand to an instruction entry */
 251
 252 struct itbl_field *
 253 itbl_add_operand (struct itbl_entry *e, int yytype, int sbit,
 254                   int ebit, unsigned long flags)
 255 {
 256   struct itbl_field *f, **last_f;
 257   if (!e)
 258     return 0;
 259   /* Add to end of fields' list. */
 260   f = alloc_field (get_type (yytype), sbit, ebit, flags);
 261   if (f)
 262     {
 263       last_f = &e->fields;
 264       while (*last_f)
 265         last_f = &(*last_f)->next;
 266       *last_f = f;
 267       f->next = 0;
 268     }
 269   return f;
 270 }
 271
 272
 273 /*======================================================================*/
 274 /* Interfaces for assembler and disassembler */
 275
 276 #ifndef STAND_ALONE
 277 #include "as.h"
 278 #include "symbols.h"
 279 static void append_insns_as_macros (void);
 280
 281 /* initialize for gas */
 282 void
 283 itbl_init (void)
 284 {
 285   struct itbl_entry *e, **es;
 286   e_processor procn;
 287   e_type type;
 288
 289   if (!itbl_have_entries)
 290         return;
 291
 292   /* Since register names don't have a prefix, put them in the symbol table so
 293      they can't be used as symbols.  This simplifies argument parsing as
 294      we can let gas parse registers for us. */
 295   /* Use symbol_create instead of symbol_new so we don't try to
 296      output registers into the object file's symbol table.  */
 297
 298   for (type = e_regtype0; type < e_nregtypes; type++)
 299     for (procn = e_p0; procn < e_nprocs; procn++)
 300       {
 301         es = get_entries (procn, type);
 302         for (e = *es; e; e = e->next)
 303           {
 304             symbol_table_insert (symbol_create (e->name, reg_section,
 305                                              e->value, &zero_address_frag));
 306           }
 307       }
 308   append_insns_as_macros ();
 309 }
 310
 311
 312 /* Append insns to opcodes table and increase number of opcodes
 313  * Structure of opcodes table:
 314  * struct itbl_opcode
 315  * {
 316  *   const char *name;
 317  *   const char *args;          - string describing the arguments.
 318  *   unsigned long match;       - opcode, or ISA level if pinfo=INSN_MACRO
 319  *   unsigned long mask;        - opcode mask, or macro id if pinfo=INSN_MACRO
 320  *   unsigned long pinfo;       - insn flags, or INSN_MACRO
 321  * };
 322  * examples:
 323  *      {"li",      "t,i",  0x34000000, 0xffe00000, WR_t    },
 324  *      {"li",      "t,I",  0,    (int) M_LI,   INSN_MACRO  },
 325  */
 326
 327 static char *form_args (struct itbl_entry *e);
 328 static void
 329 append_insns_as_macros (void)
 330 {
 331   struct ITBL_OPCODE_STRUCT *new_opcodes, *o;
 332   struct itbl_entry *e, **es;
 333   int n, id, size, new_size, new_num_opcodes;
 334
 335   if (!itbl_have_entries)
 336         return;
 337
 338   if (!itbl_num_opcodes)        /* no new instructions to add! */
 339     {
 340       return;
 341     }
 342   DBG (("previous num_opcodes=%d\n", ITBL_NUM_OPCODES));
 343
 344   new_num_opcodes = ITBL_NUM_OPCODES + itbl_num_opcodes;
 345   ASSERT (new_num_opcodes >= itbl_num_opcodes);
 346
 347   size = sizeof (struct ITBL_OPCODE_STRUCT) * ITBL_NUM_OPCODES;
 348   ASSERT (size >= 0);
 349   DBG (("I get=%d\n", size / sizeof (ITBL_OPCODES[0])));
 350
 351   new_size = sizeof (struct ITBL_OPCODE_STRUCT) * new_num_opcodes;
 352   ASSERT (new_size > size);
 353
 354   /* FIXME since ITBL_OPCODES culd be a static table,
 355                 we can't realloc or delete the old memory. */
 356   new_opcodes = (struct ITBL_OPCODE_STRUCT *) malloc (new_size);
 357   if (!new_opcodes)
 358     {
 359       printf (_("Unable to allocate memory for new instructions\n"));
 360       return;
 361     }
 362   if (size)                     /* copy prexisting opcodes table */
 363     memcpy (new_opcodes, ITBL_OPCODES, size);
 364
 365   /* FIXME! some NUMOPCODES are calculated expressions.
 366                 These need to be changed before itbls can be supported. */
 367
 368   id = ITBL_NUM_MACROS;         /* begin the next macro id after the last */
 369   o = &new_opcodes[ITBL_NUM_OPCODES];   /* append macro to opcodes list */
 370   for (n = e_p0; n < e_nprocs; n++)
 371     {
 372       es = get_entries (n, e_insn);
 373       for (e = *es; e; e = e->next)
 374         {
 375           /* name,    args,   mask,       match,  pinfo
 376                  * {"li",      "t,i",  0x34000000, 0xffe00000, WR_t    },
 377                  * {"li",      "t,I",  0,    (int) M_LI,   INSN_MACRO  },
 378                  * Construct args from itbl_fields.
 379                 */
 380           o->name = e->name;
 381           o->args = strdup (form_args (e));
 382           o->mask = apply_range (e->value, e->range);
 383           /* FIXME how to catch durring assembly? */
 384           /* mask to identify this insn */
 385           o->match = apply_range (e->value, e->range);
 386           o->pinfo = 0;
 387
 388 #ifdef USE_MACROS
 389           o->mask = id++;       /* FIXME how to catch durring assembly? */
 390           o->match = 0;         /* for macros, the insn_isa number */
 391           o->pinfo = INSN_MACRO;
 392 #endif
 393
 394           /* Don't add instructions which caused an error */
 395           if (o->args)
 396             o++;
 397           else
 398             new_num_opcodes--;
 399         }
 400     }
 401   ITBL_OPCODES = new_opcodes;
 402   ITBL_NUM_OPCODES = new_num_opcodes;
 403
 404   /* FIXME
 405                 At this point, we can free the entries, as they should have
 406                 been added to the assembler's tables.
 407                 Don't free name though, since name is being used by the new
 408                 opcodes table.
 409
 410                 Eventually, we should also free the new opcodes table itself
 411                 on exit.
 412         */
 413 }
 414
 415 static char *
 416 form_args (struct itbl_entry *e)
 417 {
 418   static char s[31];
 419   char c = 0, *p = s;
 420   struct itbl_field *f;
 421
 422   ASSERT (e);
 423   for (f = e->fields; f; f = f->next)
 424     {
 425       switch (f->type)
 426         {
 427         case e_dreg:
 428           c = 'd';
 429           break;
 430         case e_creg:
 431           c = 't';
 432           break;
 433         case e_greg:
 434           c = 's';
 435           break;
 436         case e_immed:
 437           c = 'i';
 438           break;
 439         case e_addr:
 440           c = 'a';
 441           break;
 442         default:
 443           c = 0;                /* ignore; unknown field type */
 444         }
 445       if (c)
 446         {
 447           if (p != s)
 448             *p++ = ',';
 449           *p++ = c;
 450         }
 451     }
 452   *p = 0;
 453   return s;
 454 }
 455 #endif /* !STAND_ALONE */
 456
 457
 458 /* Get processor's register name from val */
 459
 460 int
 461 itbl_get_reg_val (char *name, unsigned long *pval)
 462 {
 463   e_type t;
 464   e_processor p;
 465
 466   for (p = e_p0; p < e_nprocs; p++)
 467     {
 468       for (t = e_regtype0; t < e_nregtypes; t++)
 469         {
 470           if (itbl_get_val (p, t, name, pval))
 471             return 1;
 472         }
 473     }
 474   return 0;
 475 }
 476
 477 char *
 478 itbl_get_name (e_processor processor, e_type type, unsigned long val)
 479 {
 480   struct itbl_entry *r;
 481   /* type depends on instruction passed */
 482   r = find_entry_byval (processor, type, val, 0);
 483   if (r)
 484     return r->name;
 485   else
 486     return 0;                   /* error; invalid operand */
 487 }
 488
 489 /* Get processor's register value from name */
 490
 491 int
 492 itbl_get_val (e_processor processor, e_type type, char *name,
 493               unsigned long *pval)
 494 {
 495   struct itbl_entry *r;
 496   /* type depends on instruction passed */
 497   r = find_entry_byname (processor, type, name);
 498   if (r == NULL)
 499     return 0;
 500   *pval = r->value;
 501   return 1;
 502 }
 503
 504
 505 /* Assemble instruction "name" with operands "s".
 506  * name - name of instruction
 507  * s - operands
 508  * returns - long word for assembled instruction */
 509
 510 unsigned long
 511 itbl_assemble (char *name, char *s)
 512 {
 513   unsigned long opcode;
 514   struct itbl_entry *e;
 515   struct itbl_field *f;
 516   char *n;
 517   int processor;
 518
 519   if (!name || !*name)
 520     return 0;                   /* error!  must have a opcode name/expr */
 521
 522   /* find entry in list of instructions for all processors */
 523   for (processor = 0; processor < e_nprocs; processor++)
 524     {
 525       e = find_entry_byname (processor, e_insn, name);
 526       if (e)
 527         break;
 528     }
 529   if (!e)
 530     return 0;                   /* opcode not in table; invalid instrustion */
 531   opcode = build_opcode (e);
 532
 533   /* parse opcode's args (if any) */
 534   for (f = e->fields; f; f = f->next)   /* for each arg, ... */
 535     {
 536       struct itbl_entry *r;
 537       unsigned long value;
 538       if (!s || !*s)
 539         return 0;               /* error - not enough operands */
 540       n = itbl_get_field (&s);
 541       /* n should be in form $n or 0xhhh (are symbol names valid?? */
 542       switch (f->type)
 543         {
 544         case e_dreg:
 545         case e_creg:
 546         case e_greg:
 547           /* Accept either a string name
 548                          * or '$' followed by the register number */
 549           if (*n == '$')
 550             {
 551               n++;
 552               value = strtol (n, 0, 10);
 553               /* FIXME! could have "0l"... then what?? */
 554               if (value == 0 && *n != '0')
 555                 return 0;       /* error; invalid operand */
 556             }
 557           else
 558             {
 559               r = find_entry_byname (e->processor, f->type, n);
 560               if (r)
 561                 value = r->value;
 562               else
 563                 return 0;       /* error; invalid operand */
 564             }
 565           break;
 566         case e_addr:
 567           /* use assembler's symbol table to find symbol */
 568           /* FIXME!! Do we need this?
 569                                 if so, what about relocs??
 570                                 my_getExpression (&imm_expr, s);
 571                                 return 0;       /-* error; invalid operand *-/
 572                                 break;
 573                         */
 574           /* If not a symbol, fall thru to IMMED */
 575         case e_immed:
 576           if (*n == '0' && *(n + 1) == 'x')     /* hex begins 0x... */
 577             {
 578               n += 2;
 579               value = strtol (n, 0, 16);
 580               /* FIXME! could have "0xl"... then what?? */
 581             }
 582           else
 583             {
 584               value = strtol (n, 0, 10);
 585               /* FIXME! could have "0l"... then what?? */
 586               if (value == 0 && *n != '0')
 587                 return 0;       /* error; invalid operand */
 588             }
 589           break;
 590         default:
 591           return 0;             /* error; invalid field spec */
 592         }
 593       opcode |= apply_range (value, f->range);
 594     }
 595   if (s && *s)
 596     return 0;                   /* error - too many operands */
 597   return opcode;                /* done! */
 598 }
 599
 600 /* Disassemble instruction "insn".
 601  * insn - instruction
 602  * s - buffer to hold disassembled instruction
 603  * returns - 1 if succeeded; 0 if failed
 604  */
 605
 606 int
 607 itbl_disassemble (char *s, unsigned long insn)
 608 {
 609   e_processor processor;
 610   struct itbl_entry *e;
 611   struct itbl_field *f;
 612
 613   if (!ITBL_IS_INSN (insn))
 614     return 0;                   /* error*/
 615   processor = get_processor (ITBL_DECODE_PNUM (insn));
 616
 617   /* find entry in list */
 618   e = find_entry_byval (processor, e_insn, insn, 0);
 619   if (!e)
 620     return 0;                   /* opcode not in table; invalid instrustion */
 621   strcpy (s, e->name);
 622
 623   /* parse insn's args (if any) */
 624   for (f = e->fields; f; f = f->next)   /* for each arg, ... */
 625     {
 626       struct itbl_entry *r;
 627       unsigned long value;
 628
 629       if (f == e->fields)       /* first operand is preceeded by tab */
 630         strcat (s, "\t");
 631       else                      /* ','s separate following operands */
 632         strcat (s, ",");
 633       value = extract_range (insn, f->range);
 634       /* n should be in form $n or 0xhhh (are symbol names valid?? */
 635       switch (f->type)
 636         {
 637         case e_dreg:
 638         case e_creg:
 639         case e_greg:
 640           /* Accept either a string name
 641                          * or '$' followed by the register number */
 642           r = find_entry_byval (e->processor, f->type, value, &f->range);
 643           if (r)
 644             strcat (s, r->name);
 645           else
 646             sprintf (s, "%s$%lu", s, value);
 647           break;
 648         case e_addr:
 649           /* use assembler's symbol table to find symbol */
 650           /* FIXME!! Do we need this?
 651                          *   if so, what about relocs??
 652                         */
 653           /* If not a symbol, fall thru to IMMED */
 654         case e_immed:
 655           sprintf (s, "%s0x%lx", s, value);
 656           break;
 657         default:
 658           return 0;             /* error; invalid field spec */
 659         }
 660     }
 661   return 1;                     /* done! */
 662 }
 663
 664 /*======================================================================*/
 665 /*
 666  * Local functions for manipulating private structures containing
 667  * the names and format for the new instructions and registers
 668  * for each processor.
 669  */
 670
 671 /* Calculate instruction's opcode and function values from entry */
 672
 673 static unsigned long
 674 build_opcode (struct itbl_entry *e)
 675 {
 676   unsigned long opcode;
 677
 678   opcode = apply_range (e->value, e->range);
 679   opcode |= ITBL_ENCODE_PNUM (e->processor);
 680   return opcode;
 681 }
 682
 683 /* Calculate absolute value given the relative value and bit position range
 684  * within the instruction.
 685  * The range is inclusive where 0 is least significant bit.
 686  * A range of { 24, 20 } will have a mask of
 687  * bit   3           2            1
 688  * pos: 1098 7654 3210 9876 5432 1098 7654 3210
 689  * bin: 0000 0001 1111 0000 0000 0000 0000 0000
 690  * hex:    0    1    f    0    0    0    0    0
 691  * mask: 0x01f00000.
 692  */
 693
 694 static unsigned long
 695 apply_range (unsigned long rval, struct itbl_range r)
 696 {
 697   unsigned long mask;
 698   unsigned long aval;
 699   int len = MAX_BITPOS - r.sbit;
 700
 701   ASSERT (r.sbit >= r.ebit);
 702   ASSERT (MAX_BITPOS >= r.sbit);
 703   ASSERT (r.ebit >= 0);
 704
 705   /* create mask by truncating 1s by shifting */
 706   mask = 0xffffffff << len;
 707   mask = mask >> len;
 708   mask = mask >> r.ebit;
 709   mask = mask << r.ebit;
 710
 711   aval = (rval << r.ebit) & mask;
 712   return aval;
 713 }
 714
 715 /* Calculate relative value given the absolute value and bit position range
 716  * within the instruction.  */
 717
 718 static unsigned long
 719 extract_range (unsigned long aval, struct itbl_range r)
 720 {
 721   unsigned long mask;
 722   unsigned long rval;
 723   int len = MAX_BITPOS - r.sbit;
 724
 725   /* create mask by truncating 1s by shifting */
 726   mask = 0xffffffff << len;
 727   mask = mask >> len;
 728   mask = mask >> r.ebit;
 729   mask = mask << r.ebit;
 730
 731   rval = (aval & mask) >> r.ebit;
 732   return rval;
 733 }
 734
 735 /* Extract processor's assembly instruction field name from s;
 736  * forms are "n args" "n,args" or "n" */
 737 /* Return next argument from string pointer "s" and advance s.
 738  * delimiters are " ,()" */
 739
 740 char *
 741 itbl_get_field (char **S)
 742 {
 743   static char n[128];
 744   char *s;
 745   int len;
 746
 747   s = *S;
 748   if (!s || !*s)
 749     return 0;
 750   /* FIXME: This is a weird set of delimiters.  */
 751   len = strcspn (s, " \t,()");
 752   ASSERT (128 > len + 1);
 753   strncpy (n, s, len);
 754   n[len] = 0;
 755   if (s[len] == '\0')
 756     s = 0;                      /* no more args */
 757   else
 758     s += len + 1;               /* advance to next arg */
 759
 760   *S = s;
 761   return n;
 762 }
 763
 764 /* Search entries for a given processor and type
 765  * to find one matching the name "n".
 766  * Return a pointer to the entry */
 767
 768 static struct itbl_entry *
 769 find_entry_byname (e_processor processor,
 770                    e_type type, char *n)
 771 {
 772   struct itbl_entry *e, **es;
 773
 774   es = get_entries (processor, type);
 775   for (e = *es; e; e = e->next) /* for each entry, ... */
 776     {
 777       if (!strcmp (e->name, n))
 778         return e;
 779     }
 780   return 0;
 781 }
 782
 783 /* Search entries for a given processor and type
 784  * to find one matching the value "val" for the range "r".
 785  * Return a pointer to the entry.
 786  * This function is used for disassembling fields of an instruction.
 787  */
 788
 789 static struct itbl_entry *
 790 find_entry_byval (e_processor processor, e_type type,
 791                   unsigned long val, struct itbl_range *r)
 792 {
 793   struct itbl_entry *e, **es;
 794   unsigned long eval;
 795
 796   es = get_entries (processor, type);
 797   for (e = *es; e; e = e->next) /* for each entry, ... */
 798     {
 799       if (processor != e->processor)
 800         continue;
 801       /* For insns, we might not know the range of the opcode,
 802          * so a range of 0 will allow this routine to match against
 803          * the range of the entry to be compared with.
 804          * This could cause ambiguities.
 805          * For operands, we get an extracted value and a range.
 806          */
 807       /* if range is 0, mask val against the range of the compared entry. */
 808       if (r == 0)               /* if no range passed, must be whole 32-bits
 809                          * so create 32-bit value from entry's range */
 810         {
 811           eval = apply_range (e->value, e->range);
 812           val &= apply_range (0xffffffff, e->range);
 813         }
 814       else if ((r->sbit == e->range.sbit && r->ebit == e->range.ebit)
 815                || (e->range.sbit == 0 && e->range.ebit == 0))
 816         {
 817           eval = apply_range (e->value, *r);
 818           val = apply_range (val, *r);
 819         }
 820       else
 821         continue;
 822       if (val == eval)
 823         return e;
 824     }
 825   return 0;
 826 }
 827
 828 /* Return a pointer to the list of entries for a given processor and type. */
 829
 830 static struct itbl_entry **
 831 get_entries (e_processor processor, e_type type)
 832 {
 833   return &entries[processor][type];
 834 }
 835
 836 /* Return an integral value for the processor passed from yyparse. */
 837
 838 static e_processor
 839 get_processor (int yyproc)
 840 {
 841   /* translate from yacc's processor to enum */
 842   if (yyproc >= e_p0 && yyproc < e_nprocs)
 843     return (e_processor) yyproc;
 844   return e_invproc;             /* error; invalid processor */
 845 }
 846
 847 /* Return an integral value for the entry type passed from yyparse. */
 848
 849 static e_type
 850 get_type (int yytype)
 851 {
 852   switch (yytype)
 853     {
 854       /* translate from yacc's type to enum */
 855     case INSN:
 856       return e_insn;
 857     case DREG:
 858       return e_dreg;
 859     case CREG:
 860       return e_creg;
 861     case GREG:
 862       return e_greg;
 863     case ADDR:
 864       return e_addr;
 865     case IMMED:
 866       return e_immed;
 867     default:
 868       return e_invtype;         /* error; invalid type */
 869     }
 870 }
 871
 872
 873 /* Allocate and initialize an entry */
 874
 875 static struct itbl_entry *
 876 alloc_entry (e_processor processor, e_type type,
 877              char *name, unsigned long value)
 878 {
 879   struct itbl_entry *e, **es;
 880   if (!name)
 881     return 0;
 882   e = (struct itbl_entry *) malloc (sizeof (struct itbl_entry));
 883   if (e)
 884     {
 885       memset (e, 0, sizeof (struct itbl_entry));
 886       e->name = (char *) malloc (sizeof (strlen (name)) + 1);
 887       if (e->name)
 888         strcpy (e->name, name);
 889       e->processor = processor;
 890       e->type = type;
 891       e->value = value;
 892       es = get_entries (e->processor, e->type);
 893       e->next = *es;
 894       *es = e;
 895     }
 896   return e;
 897 }
 898
 899 /* Allocate and initialize an entry's field */
 900
 901 static struct itbl_field *
 902 alloc_field (e_type type, int sbit, int ebit,
 903              unsigned long flags)
 904 {
 905   struct itbl_field *f;
 906   f = (struct itbl_field *) malloc (sizeof (struct itbl_field));
 907   if (f)
 908     {
 909       memset (f, 0, sizeof (struct itbl_field));
 910       f->type = type;
 911       f->range.sbit = sbit;
 912       f->range.ebit = ebit;
 913       f->flags = flags;
 914     }
 915   return f;
 916 }