file configure.info-2 was initially added on branch binutils-2_10-branch.
[binutils.git] / opcodes / fr30-asm.c
blob6038dbba91753cb99bca53385b8131ada17f4a98
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
7 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
28 #include "sysdep.h"
29 #include <ctype.h>
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "fr30-desc.h"
35 #include "fr30-opc.h"
36 #include "opintl.h"
38 #undef min
39 #define min(a,b) ((a) < (b) ? (a) : (b))
40 #undef max
41 #define max(a,b) ((a) > (b) ? (a) : (b))
43 static const char * parse_insn_normal
44 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
46 /* -- assembler routines inserted here */
48 /* -- asm.c */
49 /* Handle register lists for LDMx and STMx */
51 static int
52 parse_register_number (strp)
53 const char **strp;
55 int regno;
56 if (**strp < '0' || **strp > '9')
57 return -1; /* error */
58 regno = **strp - '0';
59 ++*strp;
61 if (**strp >= '0' && **strp <= '9')
63 regno = regno * 10 + (**strp - '0');
64 ++*strp;
67 return regno;
70 static const char *
71 parse_register_list (cd, strp, opindex, valuep, high_low, load_store)
72 CGEN_CPU_DESC cd;
73 const char **strp;
74 int opindex;
75 unsigned long *valuep;
76 int high_low; /* 0 == high, 1 == low */
77 int load_store; /* 0 == load, 1 == store */
79 int regno;
80 *valuep = 0;
81 while (**strp && **strp != ')')
83 if (**strp != 'R' && **strp != 'r')
84 break;
85 ++*strp;
87 regno = parse_register_number (strp);
88 if (regno == -1)
89 return "Register number is not valid";
90 if (regno > 7 && !high_low)
91 return "Register must be between r0 and r7";
92 if (regno < 8 && high_low)
93 return "Register must be between r8 and r15";
95 if (high_low)
96 regno -= 8;
98 if (load_store) /* mask is reversed for store */
99 *valuep |= 0x80 >> regno;
100 else
101 *valuep |= 1 << regno;
103 if (**strp == ',')
105 if (*(*strp + 1) == ')')
106 break;
107 ++*strp;
111 if (!*strp || **strp != ')')
112 return "Register list is not valid";
114 return NULL;
117 static const char *
118 parse_low_register_list_ld (cd, strp, opindex, valuep)
119 CGEN_CPU_DESC cd;
120 const char **strp;
121 int opindex;
122 unsigned long *valuep;
124 return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 0/*load*/);
127 static const char *
128 parse_hi_register_list_ld (cd, strp, opindex, valuep)
129 CGEN_CPU_DESC cd;
130 const char **strp;
131 int opindex;
132 unsigned long *valuep;
134 return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 0/*load*/);
137 static const char *
138 parse_low_register_list_st (cd, strp, opindex, valuep)
139 CGEN_CPU_DESC cd;
140 const char **strp;
141 int opindex;
142 unsigned long *valuep;
144 return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 1/*store*/);
147 static const char *
148 parse_hi_register_list_st (cd, strp, opindex, valuep)
149 CGEN_CPU_DESC cd;
150 const char **strp;
151 int opindex;
152 unsigned long *valuep;
154 return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 1/*store*/);
157 /* -- */
159 /* Main entry point for operand parsing.
161 This function is basically just a big switch statement. Earlier versions
162 used tables to look up the function to use, but
163 - if the table contains both assembler and disassembler functions then
164 the disassembler contains much of the assembler and vice-versa,
165 - there's a lot of inlining possibilities as things grow,
166 - using a switch statement avoids the function call overhead.
168 This function could be moved into `parse_insn_normal', but keeping it
169 separate makes clear the interface between `parse_insn_normal' and each of
170 the handlers.
173 const char *
174 fr30_cgen_parse_operand (cd, opindex, strp, fields)
175 CGEN_CPU_DESC cd;
176 int opindex;
177 const char ** strp;
178 CGEN_FIELDS * fields;
180 const char * errmsg = NULL;
181 /* Used by scalar operands that still need to be parsed. */
182 long junk;
184 switch (opindex)
186 case FR30_OPERAND_CRI :
187 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRi);
188 break;
189 case FR30_OPERAND_CRJ :
190 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRj);
191 break;
192 case FR30_OPERAND_R13 :
193 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r13, & junk);
194 break;
195 case FR30_OPERAND_R14 :
196 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r14, & junk);
197 break;
198 case FR30_OPERAND_R15 :
199 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r15, & junk);
200 break;
201 case FR30_OPERAND_RI :
202 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ri);
203 break;
204 case FR30_OPERAND_RIC :
205 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ric);
206 break;
207 case FR30_OPERAND_RJ :
208 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rj);
209 break;
210 case FR30_OPERAND_RJC :
211 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rjc);
212 break;
213 case FR30_OPERAND_RS1 :
214 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs1);
215 break;
216 case FR30_OPERAND_RS2 :
217 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2);
218 break;
219 case FR30_OPERAND_CC :
220 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc);
221 break;
222 case FR30_OPERAND_CCC :
223 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc);
224 break;
225 case FR30_OPERAND_DIR10 :
226 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10);
227 break;
228 case FR30_OPERAND_DIR8 :
229 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8);
230 break;
231 case FR30_OPERAND_DIR9 :
232 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9);
233 break;
234 case FR30_OPERAND_DISP10 :
235 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10);
236 break;
237 case FR30_OPERAND_DISP8 :
238 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8);
239 break;
240 case FR30_OPERAND_DISP9 :
241 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9);
242 break;
243 case FR30_OPERAND_I20 :
244 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20);
245 break;
246 case FR30_OPERAND_I32 :
247 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32);
248 break;
249 case FR30_OPERAND_I8 :
250 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8);
251 break;
252 case FR30_OPERAND_LABEL12 :
254 bfd_vma value;
255 errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL, & value);
256 fields->f_rel12 = value;
258 break;
259 case FR30_OPERAND_LABEL9 :
261 bfd_vma value;
262 errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL, & value);
263 fields->f_rel9 = value;
265 break;
266 case FR30_OPERAND_M4 :
267 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4);
268 break;
269 case FR30_OPERAND_PS :
270 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & junk);
271 break;
272 case FR30_OPERAND_REGLIST_HI_LD :
273 errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld);
274 break;
275 case FR30_OPERAND_REGLIST_HI_ST :
276 errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st);
277 break;
278 case FR30_OPERAND_REGLIST_LOW_LD :
279 errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld);
280 break;
281 case FR30_OPERAND_REGLIST_LOW_ST :
282 errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st);
283 break;
284 case FR30_OPERAND_S10 :
285 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10);
286 break;
287 case FR30_OPERAND_U10 :
288 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10);
289 break;
290 case FR30_OPERAND_U4 :
291 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4);
292 break;
293 case FR30_OPERAND_U4C :
294 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c);
295 break;
296 case FR30_OPERAND_U8 :
297 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8);
298 break;
299 case FR30_OPERAND_UDISP6 :
300 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6);
301 break;
303 default :
304 /* xgettext:c-format */
305 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
306 abort ();
309 return errmsg;
312 cgen_parse_fn * const fr30_cgen_parse_handlers[] =
314 parse_insn_normal,
317 void
318 fr30_cgen_init_asm (cd)
319 CGEN_CPU_DESC cd;
321 fr30_cgen_init_opcode_table (cd);
322 fr30_cgen_init_ibld_table (cd);
323 cd->parse_handlers = & fr30_cgen_parse_handlers[0];
324 cd->parse_operand = fr30_cgen_parse_operand;
328 /* Default insn parser.
330 The syntax string is scanned and operands are parsed and stored in FIELDS.
331 Relocs are queued as we go via other callbacks.
333 ??? Note that this is currently an all-or-nothing parser. If we fail to
334 parse the instruction, we return 0 and the caller will start over from
335 the beginning. Backtracking will be necessary in parsing subexpressions,
336 but that can be handled there. Not handling backtracking here may get
337 expensive in the case of the m68k. Deal with later.
339 Returns NULL for success, an error message for failure.
342 static const char *
343 parse_insn_normal (cd, insn, strp, fields)
344 CGEN_CPU_DESC cd;
345 const CGEN_INSN *insn;
346 const char **strp;
347 CGEN_FIELDS *fields;
349 /* ??? Runtime added insns not handled yet. */
350 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
351 const char *str = *strp;
352 const char *errmsg;
353 const char *p;
354 const unsigned char * syn;
355 #ifdef CGEN_MNEMONIC_OPERANDS
356 /* FIXME: wip */
357 int past_opcode_p;
358 #endif
360 /* For now we assume the mnemonic is first (there are no leading operands).
361 We can parse it without needing to set up operand parsing.
362 GAS's input scrubber will ensure mnemonics are lowercase, but we may
363 not be called from GAS. */
364 p = CGEN_INSN_MNEMONIC (insn);
365 while (*p && tolower (*p) == tolower (*str))
366 ++p, ++str;
368 if (* p)
369 return _("unrecognized instruction");
371 #ifndef CGEN_MNEMONIC_OPERANDS
372 if (* str && !isspace (* str))
373 return _("unrecognized instruction");
374 #endif
376 CGEN_INIT_PARSE (cd);
377 cgen_init_parse_operand (cd);
378 #ifdef CGEN_MNEMONIC_OPERANDS
379 past_opcode_p = 0;
380 #endif
382 /* We don't check for (*str != '\0') here because we want to parse
383 any trailing fake arguments in the syntax string. */
384 syn = CGEN_SYNTAX_STRING (syntax);
386 /* Mnemonics come first for now, ensure valid string. */
387 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
388 abort ();
390 ++syn;
392 while (* syn != 0)
394 /* Non operand chars must match exactly. */
395 if (CGEN_SYNTAX_CHAR_P (* syn))
397 /* FIXME: While we allow for non-GAS callers above, we assume the
398 first char after the mnemonic part is a space. */
399 /* FIXME: We also take inappropriate advantage of the fact that
400 GAS's input scrubber will remove extraneous blanks. */
401 if (*str == CGEN_SYNTAX_CHAR (* syn))
403 #ifdef CGEN_MNEMONIC_OPERANDS
404 if (* syn == ' ')
405 past_opcode_p = 1;
406 #endif
407 ++ syn;
408 ++ str;
410 else
412 /* Syntax char didn't match. Can't be this insn. */
413 /* FIXME: would like to return something like
414 "expected char `c'" */
415 return _("syntax error");
417 continue;
420 /* We have an operand of some sort. */
421 errmsg = fr30_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
422 &str, fields);
423 if (errmsg)
424 return errmsg;
426 /* Done with this operand, continue with next one. */
427 ++ syn;
430 /* If we're at the end of the syntax string, we're done. */
431 if (* syn == '\0')
433 /* FIXME: For the moment we assume a valid `str' can only contain
434 blanks now. IE: We needn't try again with a longer version of
435 the insn and it is assumed that longer versions of insns appear
436 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
437 while (isspace (* str))
438 ++ str;
440 if (* str != '\0')
441 return _("junk at end of line"); /* FIXME: would like to include `str' */
443 return NULL;
446 /* We couldn't parse it. */
447 return _("unrecognized instruction");
450 /* Main entry point.
451 This routine is called for each instruction to be assembled.
452 STR points to the insn to be assembled.
453 We assume all necessary tables have been initialized.
454 The assembled instruction, less any fixups, is stored in BUF.
455 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
456 still needs to be converted to target byte order, otherwise BUF is an array
457 of bytes in target byte order.
458 The result is a pointer to the insn's entry in the opcode table,
459 or NULL if an error occured (an error message will have already been
460 printed).
462 Note that when processing (non-alias) macro-insns,
463 this function recurses.
465 ??? It's possible to make this cpu-independent.
466 One would have to deal with a few minor things.
467 At this point in time doing so would be more of a curiosity than useful
468 [for example this file isn't _that_ big], but keeping the possibility in
469 mind helps keep the design clean. */
471 const CGEN_INSN *
472 fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg)
473 CGEN_CPU_DESC cd;
474 const char *str;
475 CGEN_FIELDS *fields;
476 CGEN_INSN_BYTES_PTR buf;
477 char **errmsg;
479 const char *start;
480 CGEN_INSN_LIST *ilist;
482 /* Skip leading white space. */
483 while (isspace (* str))
484 ++ str;
486 /* The instructions are stored in hashed lists.
487 Get the first in the list. */
488 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
490 /* Keep looking until we find a match. */
492 start = str;
493 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
495 const CGEN_INSN *insn = ilist->insn;
497 #if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
498 /* Is this insn supported by the selected cpu? */
499 if (! fr30_cgen_insn_supported (cd, insn))
500 continue;
501 #endif
503 /* If the RELAX attribute is set, this is an insn that shouldn't be
504 chosen immediately. Instead, it is used during assembler/linker
505 relaxation if possible. */
506 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
507 continue;
509 str = start;
511 /* Allow parse/insert handlers to obtain length of insn. */
512 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
514 if (! CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields))
516 /* ??? 0 is passed for `pc' */
517 if (CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, (bfd_vma) 0)
518 != NULL)
519 continue;
520 /* It is up to the caller to actually output the insn and any
521 queued relocs. */
522 return insn;
525 /* Try the next entry. */
528 /* FIXME: We can return a better error message than this.
529 Need to track why it failed and pick the right one. */
531 static char errbuf[100];
532 if (strlen (start) > 50)
533 /* xgettext:c-format */
534 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
535 else
536 /* xgettext:c-format */
537 sprintf (errbuf, _("bad instruction `%.50s'"), start);
539 *errmsg = errbuf;
540 return NULL;
544 #if 0 /* This calls back to GAS which we can't do without care. */
546 /* Record each member of OPVALS in the assembler's symbol table.
547 This lets GAS parse registers for us.
548 ??? Interesting idea but not currently used. */
550 /* Record each member of OPVALS in the assembler's symbol table.
551 FIXME: Not currently used. */
553 void
554 fr30_cgen_asm_hash_keywords (cd, opvals)
555 CGEN_CPU_DESC cd;
556 CGEN_KEYWORD *opvals;
558 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
559 const CGEN_KEYWORD_ENTRY * ke;
561 while ((ke = cgen_keyword_search_next (& search)) != NULL)
563 #if 0 /* Unnecessary, should be done in the search routine. */
564 if (! fr30_cgen_opval_supported (ke))
565 continue;
566 #endif
567 cgen_asm_record_register (cd, ke->name, ke->value);
571 #endif /* 0 */