include/coff/sh.h

   1 /* coff information for Renesas SH
   2
   3    Copyright 2001, 2003 Free Software Foundation, Inc.
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 2 of the License, or
   8    (at your option) any later version.
   9
  10    This program is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  18
  19 #ifdef COFF_WITH_PE
  20 #define L_LNNO_SIZE 2
  21 #else
  22 #define L_LNNO_SIZE 4
  23 #endif
  24 #define INCLUDE_COMDAT_FIELDS_IN_AUXENT
  25 #include "coff/external.h"
  26
  27 #define SH_ARCH_MAGIC_BIG       0x0500
  28 #define SH_ARCH_MAGIC_LITTLE    0x0550  /* Little endian SH */
  29 #define SH_ARCH_MAGIC_WINCE     0x01a2  /* Windows CE - little endian */
  30 #define SH_PE_MAGIC             0x010b
  31
  32 #define SHBADMAG(x) \
  33  (((x).f_magic != SH_ARCH_MAGIC_BIG) && \
  34   ((x).f_magic != SH_ARCH_MAGIC_WINCE) && \
  35   ((x).f_magic != SH_ARCH_MAGIC_LITTLE))
  36
  37 /* Define some NT default values.  */
  38 /*  #define NT_IMAGE_BASE        0x400000 moved to internal.h */
  39 #define NT_SECTION_ALIGNMENT 0x1000
  40 #define NT_FILE_ALIGNMENT    0x200
  41 #define NT_DEF_RESERVE       0x100000
  42 #define NT_DEF_COMMIT        0x1000
  43
  44 /********************** RELOCATION DIRECTIVES **********************/
  45
  46 /* The external reloc has an offset field, because some of the reloc
  47    types on the h8 don't have room in the instruction for the entire
  48    offset - eg the strange jump and high page addressing modes.  */
  49
  50 #ifndef COFF_WITH_PE
  51 struct external_reloc
  52 {
  53   char r_vaddr[4];
  54   char r_symndx[4];
  55   char r_offset[4];
  56   char r_type[2];
  57   char r_stuff[2];
  58 };
  59 #else
  60 struct external_reloc
  61 {
  62   char r_vaddr[4];
  63   char r_symndx[4];
  64   char r_type[2];
  65 };
  66 #endif
  67
  68 #define RELOC struct external_reloc
  69 #ifdef COFF_WITH_PE
  70 #define RELSZ 10
  71 #else
  72 #define RELSZ 16
  73 #endif
  74
  75 /* SH relocation types.  Not all of these are actually used.  */
  76
  77 #define R_SH_UNUSED     0               /* only used internally */
  78 #define R_SH_IMM32CE    2               /* 32 bit immediate for WinCE */
  79 #define R_SH_PCREL8     3               /*  8 bit pcrel         */
  80 #define R_SH_PCREL16    4               /* 16 bit pcrel         */
  81 #define R_SH_HIGH8      5               /* high 8 bits of 24 bit address */
  82 #define R_SH_LOW16      7               /* low 16 bits of 24 bit immediate */
  83 #define R_SH_IMM24      6               /* 24 bit immediate */
  84 #define R_SH_PCDISP8BY4 9               /* PC rel 8 bits *4 +ve */
  85 #define R_SH_PCDISP8BY2 10              /* PC rel 8 bits *2 +ve */
  86 #define R_SH_PCDISP8    11              /* 8 bit branch */
  87 #define R_SH_PCDISP     12              /* 12 bit branch */
  88 #define R_SH_IMM32      14              /* 32 bit immediate */
  89 #define R_SH_IMM8       16              /* 8 bit immediate */
  90 #define R_SH_IMAGEBASE  16              /* Windows CE */
  91 #define R_SH_IMM8BY2    17              /* 8 bit immediate *2 */
  92 #define R_SH_IMM8BY4    18              /* 8 bit immediate *4 */
  93 #define R_SH_IMM4       19              /* 4 bit immediate */
  94 #define R_SH_IMM4BY2    20              /* 4 bit immediate *2 */
  95 #define R_SH_IMM4BY4    21              /* 4 bit immediate *4 */
  96 #define R_SH_PCRELIMM8BY2   22          /* PC rel 8 bits *2 unsigned */
  97 #define R_SH_PCRELIMM8BY4   23          /* PC rel 8 bits *4 unsigned */
  98 #define R_SH_IMM16      24              /* 16 bit immediate */
  99
 100 /* The switch table reloc types are used for relaxing.  They are
 101    generated for expressions such as
 102      .word L1 - L2
 103    The r_offset field holds the difference between the reloc address
 104    and L2.  */
 105 #define R_SH_SWITCH8    33              /* 8 bit switch table entry */
 106 #define R_SH_SWITCH16   25              /* 16 bit switch table entry */
 107 #define R_SH_SWITCH32   26              /* 32 bit switch table entry */
 108
 109 /* The USES reloc type is used for relaxing.  The compiler will
 110    generate .uses pseudo-ops when it finds a function call which it
 111    can relax.  The r_offset field of the USES reloc holds the PC
 112    relative offset to the instruction which loads the register used in
 113    the function call.  */
 114 #define R_SH_USES       27              /* .uses pseudo-op */
 115
 116 /* The COUNT reloc type is used for relaxing.  The assembler will
 117    generate COUNT relocs for addresses referred to by the register
 118    loads associated with USES relocs.  The r_offset field of the COUNT
 119    reloc holds the number of times the address is referenced in the
 120    object file.  */
 121 #define R_SH_COUNT      28              /* Count of constant pool uses */
 122
 123 /* The ALIGN reloc type is used for relaxing.  The r_offset field is
 124    the power of two to which subsequent portions of the object file
 125    must be aligned.  */
 126 #define R_SH_ALIGN      29              /* .align pseudo-op */
 127
 128 /* The CODE and DATA reloc types are used for aligning load and store
 129    instructions.  The assembler will generate a CODE reloc before a
 130    block of instructions.  It will generate a DATA reloc before data.
 131    A section should be processed assuming it contains data, unless a
 132    CODE reloc is seen.  The only relevant pieces of information in the
 133    CODE and DATA relocs are the section and the address.  The symbol
 134    and offset are meaningless.  */
 135 #define R_SH_CODE       30              /* start of code */
 136 #define R_SH_DATA       31              /* start of data */
 137
 138 /* The LABEL reloc type is used for aligning load and store
 139    instructions.  The assembler will generate a LABEL reloc for each
 140    label within a block of instructions.  This permits the linker to
 141    avoid swapping instructions which are the targets of branches.  */
 142 #define R_SH_LABEL      32              /* label */
 143
 144 /* NB: R_SH_SWITCH8 is 33 */
 145
 146 #define R_SH_LOOP_START 34
 147 #define R_SH_LOOP_END   35