* acinclude.m4: Include libtool and gettext macros from the
[binutils.git] / opcodes / cris-dis.c
blob0d13b8f180b4878d03efbb055da61dc9ddfb3686
1 /* Disassembler code for CRIS.
2 Copyright (C) 2000 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB, Lund, Sweden.
4 Written by Hans-Peter Nilsson.
6 This file is part of the GNU binutils and GDB, the GNU debugger.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
11 any later version.
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "dis-asm.h"
23 #include "sysdep.h"
24 #include "opcode/cris.h"
25 #include "libiberty.h"
28 /* No instruction will be disassembled longer than this. In theory, and
29 in silicon, address prefixes can be cascaded. In practice, cascading
30 is not used by GCC, and not supported by the assembler. */
31 #ifndef MAX_BYTES_PER_CRIS_INSN
32 #define MAX_BYTES_PER_CRIS_INSN 8
33 #endif
35 /* Whether or not to decode prefixes, folding it into the following
36 instruction. FIXME: Make this optional later. */
37 #ifndef PARSE_PREFIX
38 #define PARSE_PREFIX 1
39 #endif
41 /* Whether or not to trace the following sequence:
42 sub* X,r%d
43 bound* Y,r%d
44 adds.w [pc+r%d.w],pc
46 This is the assembly form of a switch-statement in C.
47 The "sub is optional. If there is none, then X will be zero.
48 X is the value of the first case,
49 Y is the number of cases (including default).
51 This results in case offsets printed on the form:
52 case N: -> case_address
53 where N is an estimation on the corresponding 'case' operand in C,
54 and case_address is where execution of that case continues after the
55 sequence presented above.
57 The old style of output was to print the offsets as instructions,
58 which made it hard to follow "case"-constructs in the disassembly,
59 and caused a lot of annoying warnings about undefined instructions.
61 FIXME: Make this optional later. */
62 #ifndef TRACE_CASE
63 #define TRACE_CASE 1
64 #endif
66 /* Value of first element in switch. */
67 static long case_offset = 0;
69 /* How many more case-offsets to print. */
70 static long case_offset_counter = 0;
72 /* Number of case offsets. */
73 static long no_of_case_offsets = 0;
75 /* Candidate for next case_offset. */
76 static long last_immediate = 0;
78 static int number_of_bits PARAMS ((unsigned int));
79 static char *format_hex PARAMS ((unsigned long, char *));
80 static char *format_dec PARAMS ((long, char *, int));
81 static char *format_reg PARAMS ((int, char *));
82 static int cris_constraint PARAMS ((const char *, unsigned int,
83 unsigned int));
84 static unsigned bytes_to_skip PARAMS ((unsigned int,
85 const struct cris_opcode *));
86 static char *print_flags PARAMS ((unsigned int, char *));
87 static void print_with_operands PARAMS ((const struct cris_opcode *,
88 unsigned int, unsigned char *,
89 bfd_vma, disassemble_info *,
90 const struct cris_opcode *,
91 unsigned int, unsigned char *));
92 static const struct cris_spec_reg *spec_reg_info PARAMS ((unsigned int));
94 /* Return the descriptor of a special register.
95 FIXME: Depend on a CPU-version specific argument when all machinery
96 is in place. */
97 static const struct cris_spec_reg *
98 spec_reg_info (sreg)
99 unsigned int sreg;
101 int i;
102 for (i = 0; cris_spec_regs[i].name != NULL; i++)
104 if (cris_spec_regs[i].number == sreg)
105 return &cris_spec_regs[i];
108 return NULL;
112 /* Return the number of bits in the argument. */
113 static int
114 number_of_bits (val)
115 unsigned int val;
117 int bits;
119 for (bits = 0; val != 0; val &= val-1)
120 bits++;
122 return bits;
126 /* Get an entry in the opcode-table. */
127 static const struct cris_opcode *
128 get_opcode_entry (insn, prefix_insn)
129 unsigned int insn;
130 unsigned int prefix_insn;
132 /* For non-prefixed insns, we keep a table of pointers, indexed by the
133 insn code. Each entry is initialized when found to be NULL. */
134 static const struct cris_opcode **opc_table = NULL;
136 const struct cris_opcode *max_matchedp = NULL;
137 const struct cris_opcode **prefix_opc_table = NULL;
139 /* We hold a table for each prefix that need to be handled differently. */
140 static const struct cris_opcode **dip_prefixes = NULL;
141 static const struct cris_opcode **bdapq_m1_prefixes = NULL;
142 static const struct cris_opcode **bdapq_m2_prefixes = NULL;
143 static const struct cris_opcode **bdapq_m4_prefixes = NULL;
144 static const struct cris_opcode **rest_prefixes = NULL;
146 /* Allocate and clear the opcode-table. */
147 if (opc_table == NULL)
149 opc_table = xmalloc (65536 * sizeof (opc_table[0]));
150 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *));
152 dip_prefixes
153 = xmalloc (65536 * sizeof (const struct cris_opcode **));
154 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0]));
156 bdapq_m1_prefixes
157 = xmalloc (65536 * sizeof (const struct cris_opcode **));
158 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0]));
160 bdapq_m2_prefixes
161 = xmalloc (65536 * sizeof (const struct cris_opcode **));
162 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0]));
164 bdapq_m4_prefixes
165 = xmalloc (65536 * sizeof (const struct cris_opcode **));
166 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0]));
168 rest_prefixes
169 = xmalloc (65536 * sizeof (const struct cris_opcode **));
170 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0]));
173 /* Get the right table if this is a prefix.
174 This code is connected to cris_constraints in that it knows what
175 prefixes play a role in recognition of patterns; the necessary
176 state is reflected by which table is used. If constraints
177 involving match or non-match of prefix insns are changed, then this
178 probably needs changing too. */
179 if (prefix_insn != NO_CRIS_PREFIX)
181 const struct cris_opcode *popcodep
182 = (opc_table[prefix_insn] != NULL
183 ? opc_table[prefix_insn]
184 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX));
186 if (popcodep == NULL)
187 return NULL;
189 if (popcodep->match == BDAP_QUICK_OPCODE)
191 /* Since some offsets are recognized with "push" macros, we
192 have to have different tables for them. */
193 int offset = (prefix_insn & 255);
195 if (offset > 127)
196 offset -= 256;
198 switch (offset)
200 case -4:
201 prefix_opc_table = bdapq_m4_prefixes;
202 break;
204 case -2:
205 prefix_opc_table = bdapq_m2_prefixes;
206 break;
208 case -1:
209 prefix_opc_table = bdapq_m1_prefixes;
210 break;
212 default:
213 prefix_opc_table = rest_prefixes;
214 break;
217 else if (popcodep->match == DIP_OPCODE)
218 /* We don't allow postincrement when the prefix is DIP, so use a
219 different table for DIP. */
220 prefix_opc_table = dip_prefixes;
221 else
222 prefix_opc_table = rest_prefixes;
225 if (prefix_insn != NO_CRIS_PREFIX
226 && prefix_opc_table[insn] != NULL)
227 max_matchedp = prefix_opc_table[insn];
228 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
229 max_matchedp = opc_table[insn];
230 else
232 const struct cris_opcode *opcodep;
233 int max_level_of_match = -1;
235 for (opcodep = cris_opcodes;
236 opcodep->name != NULL;
237 opcodep++)
239 int level_of_match;
241 /* We give a double lead for bits matching the template in
242 cris_opcodes. Not even, because then "move p8,r10" would
243 be given 2 bits lead over "clear.d r10". When there's a
244 tie, the first entry in the table wins. This is
245 deliberate, to avoid a more complicated recognition
246 formula. */
247 if ((opcodep->match & insn) == opcodep->match
248 && (opcodep->lose & insn) == 0
249 && ((level_of_match
250 = cris_constraint (opcodep->args,
251 insn,
252 prefix_insn))
253 >= 0)
254 && ((level_of_match
255 += 2 * number_of_bits (opcodep->match
256 | opcodep->lose))
257 > max_level_of_match))
259 max_matchedp = opcodep;
260 max_level_of_match = level_of_match;
262 /* If there was a full match, never mind looking
263 further. */
264 if (level_of_match >= 2 * 16)
265 break;
268 /* Fill in the new entry.
270 If there are changes to the opcode-table involving prefixes, and
271 disassembly then does not work correctly, try removing the
272 else-clause below that fills in the prefix-table. If that
273 helps, you need to change the prefix_opc_table setting above, or
274 something related. */
275 if (prefix_insn == NO_CRIS_PREFIX)
276 opc_table[insn] = max_matchedp;
277 else
278 prefix_opc_table[insn] = max_matchedp;
281 return max_matchedp;
285 /* Format number as hex with a leading "0x" into outbuffer. */
286 static char *
287 format_hex (number, outbuffer)
288 unsigned long number;
289 char *outbuffer;
291 /* Obfuscate to avoid warning on 32-bit host, but properly truncate
292 negative numbers on >32-bit hosts. */
293 if (sizeof (number) > 4)
294 number &= (1 << (sizeof (number) > 4 ? 32 : 1)) - 1;
296 sprintf (outbuffer, "0x%lx", number);
298 /* Save this value for the "case" support. */
299 if (TRACE_CASE)
300 last_immediate = number;
302 return outbuffer + strlen (outbuffer);
306 /* Format number as decimal into outbuffer. Parameter signedp says
307 whether the number should be formatted as signed (!= 0) or
308 unsigned (== 0). */
309 static char *
310 format_dec (number, outbuffer, signedp)
311 long number;
312 char *outbuffer;
313 int signedp;
315 last_immediate = number;
316 sprintf (outbuffer, signedp ? "%ld" : "%lu", number);
318 return outbuffer + strlen (outbuffer);
322 /* Format the name of the general register regno into outbuffer. */
323 static char *
324 format_reg (regno, outbuffer)
325 int regno;
326 char *outbuffer;
328 switch (regno)
330 case 15:
331 strcpy (outbuffer, "pc");
332 break;
334 case 14:
335 strcpy (outbuffer, "sp");
336 break;
338 default:
339 sprintf (outbuffer, "r%d", regno);
340 break;
343 return outbuffer + strlen (outbuffer);
347 /* Return -1 if the constraints of a bitwise-matched instruction say
348 that there is no match. Otherwise return a nonnegative number
349 indicating the confidence in the match (higher is better). */
350 static int
351 cris_constraint (cs, insn, prefix_insn)
352 const char *cs;
353 unsigned int insn;
354 unsigned int prefix_insn;
356 int retval = 0;
357 int tmp;
358 int prefix_ok = 0;
360 const char *s;
361 for (s = cs; *s; s++)
362 switch (*s)
364 case '!':
365 /* Do not recognize "pop" if there's a prefix. */
366 if (prefix_insn != NO_CRIS_PREFIX)
367 return -1;
368 break;
370 case 'M':
371 /* Size modifier for "clear", i.e. special register 0, 4 or 8.
372 Check that it is one of them. Only special register 12 could
373 be mismatched, but checking for matches is more logical than
374 checking for mismatches when there are only a few cases. */
375 tmp = ((insn >> 12) & 0xf);
376 if (tmp != 0 && tmp != 4 && tmp != 8)
377 return -1;
378 break;
380 case 'm':
381 if ((insn & 0x30) == 0x30)
382 return -1;
383 break;
385 case 'S':
386 /* A prefix operand without side-effect. */
387 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0)
389 prefix_ok = 1;
390 break;
392 else
393 return -1;
395 case 's':
396 case 'y':
397 /* If this is a prefixed insn with postincrement (side-effect),
398 the prefix must not be DIP. */
399 if (prefix_insn != NO_CRIS_PREFIX)
401 if (insn & 0x400)
403 const struct cris_opcode *prefix_opcodep
404 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX);
406 if (prefix_opcodep->match == DIP_OPCODE)
407 return -1;
410 prefix_ok = 1;
412 break;
414 case 'B':
415 /* If we don't fall through, then the prefix is ok. */
416 prefix_ok = 1;
418 /* A "push" prefix. Check for valid "push" size.
419 In case of special register, it may be != 4. */
420 if (prefix_insn != NO_CRIS_PREFIX)
422 /* Match the prefix insn to BDAPQ. */
423 const struct cris_opcode *prefix_opcodep
424 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX);
426 if (prefix_opcodep->match == BDAP_QUICK_OPCODE)
428 int pushsize = (prefix_insn & 255);
430 if (pushsize > 127)
431 pushsize -= 256;
433 if (s[1] == 'P')
435 unsigned int spec_reg = (insn >> 12) & 15;
436 const struct cris_spec_reg *sregp
437 = spec_reg_info (spec_reg);
439 /* For a special-register, the "prefix size" must
440 match the size of the register. */
441 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
442 break;
444 else if (s[1] == 'R')
446 if ((insn & 0x30) == 0x20 && pushsize == -4)
447 break;
449 /* FIXME: Should abort here; next constraint letter
450 *must* be 'P' or 'R'. */
453 return -1;
455 case 'D':
456 retval = (((insn >> 12) & 15) == (insn & 15));
457 if (!retval)
458 return -1;
459 else
460 retval += 4;
461 break;
463 case 'P':
465 const struct cris_spec_reg *sregp
466 = spec_reg_info ((insn >> 12) & 15);
468 /* Since we match four bits, we will give a value of 4-1 = 3
469 in a match. If there is a corresponding exact match of a
470 special register in another pattern, it will get a value of
471 4, which will be higher. This should be correct in that an
472 exact pattern would match better than a general pattern.
474 Note that there is a reason for not returning zero; the
475 pattern for "clear" is partly matched in the bit-pattern
476 (the two lower bits must be zero), while the bit-pattern
477 for a move from a special register is matched in the
478 register constraint. */
480 if (sregp != NULL)
482 retval += 3;
483 break;
485 else
486 return -1;
490 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok)
491 return -1;
493 return retval;
497 /* Return the length of an instruction. */
498 static unsigned
499 bytes_to_skip (insn, matchedp)
500 unsigned int insn;
501 const struct cris_opcode *matchedp;
503 /* Each insn is a word plus "immediate" operands. */
504 unsigned to_skip = 2;
505 const char *template = matchedp->args;
506 const char *s;
508 for (s = template; *s; s++)
509 if (*s == 's' && (insn & 0x400) && (insn & 15) == 15)
511 /* Immediate via [pc+], so we have to check the size of the
512 operand. */
513 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3));
515 if (matchedp->imm_oprnd_size == SIZE_FIX_32)
516 to_skip += 4;
517 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG)
519 const struct cris_spec_reg *sregp
520 = spec_reg_info ((insn >> 12) & 15);
522 /* FIXME: Improve error handling; should have been caught
523 earlier. */
524 if (sregp == NULL)
525 return 2;
527 /* PC is incremented by two, not one, for a byte. */
528 to_skip += (sregp->reg_size + 1) & ~1;
530 else
531 to_skip += (mode_size + 1) & ~1;
533 else if (*s == 'b')
534 to_skip += 2;
536 return to_skip;
540 /* Print condition code flags. */
541 static char *
542 print_flags (insn, cp)
543 unsigned int insn;
544 char *cp;
546 /* Use the v8 (Etrax 100) flag definitions for disassembly.
547 The differences with v0 (Etrax 1..4) vs. Svinto are:
548 v0 'd' <=> v8 'm'
549 v0 'e' <=> v8 'b'. */
550 static const char fnames[] = "cvznxibm";
552 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15));
553 int i;
555 for (i = 0; i < 8; i++)
556 if (flagbits & (1 << i))
557 *cp++ = fnames[i];
559 return cp;
563 /* Print out an insn with its operands, and update the info->insn_type
564 fields. The prefix_opcodep and the rest hold a prefix insn that is
565 supposed to be output as an address mode. */
566 static void
567 print_with_operands (opcodep, insn, buffer, addr, info, prefix_opcodep,
568 prefix_insn, prefix_buffer)
569 const struct cris_opcode *opcodep;
570 unsigned int insn;
571 unsigned char *buffer;
572 bfd_vma addr;
573 disassemble_info *info;
575 /* If a prefix insn was before this insn (and is supposed to be
576 output as an address), here is a description of it. */
577 const struct cris_opcode *prefix_opcodep;
578 unsigned int prefix_insn;
579 unsigned char *prefix_buffer;
581 /* Get a buffer of somewhat reasonable size where we store
582 intermediate parts of the insn. */
583 char temp[sizeof (".d [r13=r12-2147483648],r10") * 2];
584 char *tp = temp;
585 static const char mode_char[] = "bwd?";
586 const char *s;
587 const char *cs;
589 /* Print out the name first thing we do. */
590 (*info->fprintf_func) (info->stream, "%s", opcodep->name);
592 cs = opcodep->args;
593 s = cs;
595 /* Ignore any prefix indicator. */
596 if (*s == 'p')
597 s++;
599 if (*s == 'm' || *s == 'M' || *s == 'z')
601 *tp++ = '.';
603 /* Get the size-letter. */
604 *tp++ = *s == 'M'
605 ? (insn & 0x8000 ? 'd'
606 : insn & 0x4000 ? 'w' : 'b')
607 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)];
609 /* Ignore the size and the space character that follows. */
610 s += 2;
613 /* Add a space if this isn't a long-branch, because for those will add
614 the condition part of the name later. */
615 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256))
616 *tp++ = ' ';
618 /* Fill in the insn-type if deducible from the name (and there's no
619 better way). */
620 if (opcodep->name[0] == 'j')
622 if (strncmp (opcodep->name, "jsr", 3) == 0)
623 /* It's "jsr" or "jsrc". */
624 info->insn_type = dis_jsr;
625 else
626 /* Any other jump-type insn is considered a branch. */
627 info->insn_type = dis_branch;
630 /* We might know some more fields right now. */
631 info->branch_delay_insns = opcodep->delayed;
633 /* Handle operands. */
634 for (; *s; s++)
636 switch (*s)
638 case ',':
639 *tp++ = *s;
640 break;
642 case '!':
643 /* Ignore at this point; used at earlier stages to avoid recognition
644 if there's a prefixes at something that in other ways looks like
645 a "pop". */
646 break;
648 case 'B':
649 /* This was the prefix that made this a "push". We've already
650 handled it by recognizing it, so signal that the prefix is
651 handled by setting it to NULL. */
652 prefix_opcodep = NULL;
653 break;
655 case 'D':
656 case 'r':
657 tp = format_reg (insn & 15, tp);
658 break;
660 case 'R':
661 tp = format_reg ((insn >> 12) & 15, tp);
662 break;
664 case 'y':
665 case 'S':
666 case 's':
667 /* Any "normal" memory operand. */
668 if ((insn & 0x400) && (insn & 15) == 15)
670 /* We're looking at [pc+], i.e. we need to output an immediate
671 number, where the size can depend on different things. */
672 long number;
673 int signedp
674 = ((*cs == 'z' && (insn & 0x20))
675 || opcodep->match == BDAP_QUICK_OPCODE);
676 int nbytes;
678 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
679 nbytes = 4;
680 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
682 const struct cris_spec_reg *sregp
683 = spec_reg_info ((insn >> 12) & 15);
685 /* A NULL return should have been as a non-match earlier,
686 so catch it as an internal error in the error-case
687 below. */
688 if (sregp == NULL)
689 /* Whatever non-valid size. */
690 nbytes = 42;
691 else
692 /* PC is always incremented by a multiple of two. */
693 nbytes = (sregp->reg_size + 1) & ~1;
695 else
697 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3));
699 if (mode_size == 1)
700 nbytes = 2;
701 else
702 nbytes = mode_size;
705 switch (nbytes)
707 case 1:
708 number = buffer[2];
709 if (signedp && number > 127)
710 number -= 256;
711 break;
713 case 2:
714 number = buffer[2] + buffer[3] * 256;
715 if (signedp && number > 32767)
716 number -= 65536;
717 break;
719 case 4:
720 number
721 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536
722 + buffer[5] * 0x1000000;
723 break;
725 default:
726 strcpy (tp, "bug");
727 tp += 3;
728 number = 42;
731 if ((*cs == 'z' && (insn & 0x20))
732 || (opcodep->match == BDAP_QUICK_OPCODE
733 && (nbytes <= 2 || buffer[1 + nbytes] == 0)))
734 tp = format_dec (number, tp, signedp);
735 else
737 unsigned int highbyte = (number >> 24) & 0xff;
739 /* Either output this as an address or as a number. If it's
740 a dword with the same high-byte as the address of the
741 insn, assume it's an address, and also if it's a non-zero
742 non-0xff high-byte. If this is a jsr or a jump, then
743 it's definitely an address. */
744 if (nbytes == 4
745 && (highbyte == ((addr >> 24) & 0xff)
746 || (highbyte != 0 && highbyte != 0xff)
747 || info->insn_type == dis_branch
748 || info->insn_type == dis_jsr))
750 /* Finish off and output previous formatted bytes. */
751 *tp = 0;
752 tp = temp;
753 if (temp[0])
754 (*info->fprintf_func) (info->stream, "%s", temp);
756 (*info->print_address_func) ((bfd_vma) number, info);
758 info->target = number;
760 else
761 tp = format_hex (number, tp);
764 else
766 /* Not an immediate number. Then this is a (possibly
767 prefixed) memory operand. */
768 if (info->insn_type != dis_nonbranch)
770 int mode_size
771 = 1 << ((insn >> 4)
772 & (opcodep->args[0] == 'z' ? 1 : 3));
773 int size;
774 info->insn_type = dis_dref;
775 info->flags |= CRIS_DIS_FLAG_MEMREF;
777 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
778 size = 4;
779 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
781 const struct cris_spec_reg *sregp
782 = spec_reg_info ((insn >> 12) & 15);
784 /* FIXME: Improve error handling; should have been caught
785 earlier. */
786 if (sregp == NULL)
787 size = 4;
788 else
789 size = sregp->reg_size;
791 else
792 size = mode_size;
794 info->data_size = size;
797 *tp++ = '[';
799 if (prefix_opcodep
800 /* We don't match dip with a postincremented field
801 as a side-effect address mode. */
802 && ((insn & 0x400) == 0
803 || prefix_opcodep->match != DIP_OPCODE))
805 if (insn & 0x400)
807 tp = format_reg (insn & 15, tp);
808 *tp++ = '=';
812 /* We mainly ignore the prefix format string when the
813 address-mode syntax is output. */
814 switch (prefix_opcodep->match)
816 case DIP_OPCODE:
817 /* It's [r], [r+] or [pc+]. */
818 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
820 /* It's [pc+]. This cannot possibly be anything
821 but an address. */
822 unsigned long number
823 = prefix_buffer[2] + prefix_buffer[3] * 256
824 + prefix_buffer[4] * 65536
825 + prefix_buffer[5] * 0x1000000;
827 info->target = (bfd_vma) number;
829 /* Finish off and output previous formatted
830 data. */
831 *tp = 0;
832 tp = temp;
833 if (temp[0])
834 (*info->fprintf_func) (info->stream, "%s", temp);
836 (*info->print_address_func) ((bfd_vma) number, info);
838 else
840 /* For a memref in an address, we use target2.
841 In this case, target is zero. */
842 info->flags
843 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
844 | CRIS_DIS_FLAG_MEM_TARGET2_MEM);
846 info->target2 = prefix_insn & 15;
848 *tp++ = '[';
849 tp = format_reg (prefix_insn & 15, tp);
850 if (prefix_insn & 0x400)
851 *tp++ = '+';
852 *tp++ = ']';
854 break;
856 case BDAP_QUICK_OPCODE:
858 int number;
860 number = prefix_buffer[0];
861 if (number > 127)
862 number -= 256;
864 /* Output "reg+num" or, if num < 0, "reg-num". */
865 tp = format_reg ((prefix_insn >> 12) & 15, tp);
866 if (number >= 0)
867 *tp++ = '+';
868 tp = format_dec (number, tp, 1);
870 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
871 info->target = (prefix_insn >> 12) & 15;
872 info->target2 = (bfd_vma) number;
873 break;
876 case BIAP_OPCODE:
877 /* Output "r+R.m". */
878 tp = format_reg (prefix_insn & 15, tp);
879 *tp++ = '+';
880 tp = format_reg ((prefix_insn >> 12) & 15, tp);
881 *tp++ = '.';
882 *tp++ = mode_char[(prefix_insn >> 4) & 3];
884 info->flags
885 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
886 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
888 | ((prefix_insn & 0x8000)
889 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4
890 : ((prefix_insn & 0x8000)
891 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0)));
893 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */
894 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f)
895 /* Then start interpreting data as offsets. */
896 case_offset_counter = no_of_case_offsets;
897 break;
899 case BDAP_INDIR_OPCODE:
900 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or
901 "r-s". */
902 tp = format_reg ((prefix_insn >> 12) & 15, tp);
904 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
906 long number;
907 unsigned int nbytes;
909 /* It's a value. Get its size. */
910 int mode_size = 1 << ((prefix_insn >> 4) & 3);
912 if (mode_size == 1)
913 nbytes = 2;
914 else
915 nbytes = mode_size;
917 switch (nbytes)
919 case 1:
920 number = prefix_buffer[2];
921 if (number > 127)
922 number -= 256;
923 break;
925 case 2:
926 number = prefix_buffer[2] + prefix_buffer[3] * 256;
927 if (number > 32767)
928 number -= 65536;
929 break;
931 case 4:
932 number
933 = prefix_buffer[2] + prefix_buffer[3] * 256
934 + prefix_buffer[4] * 65536
935 + prefix_buffer[5] * 0x1000000;
936 break;
938 default:
939 strcpy (tp, "bug");
940 tp += 3;
941 number = 42;
944 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
945 info->target2 = (bfd_vma) number;
947 /* If the size is dword, then assume it's an
948 address. */
949 if (nbytes == 4)
951 /* Finish off and output previous formatted
952 bytes. */
953 *tp++ = '+';
954 *tp = 0;
955 tp = temp;
956 (*info->fprintf_func) (info->stream, "%s", temp);
958 (*info->print_address_func) ((bfd_vma) number, info);
960 else
962 if (number >= 0)
963 *tp++ = '+';
964 tp = format_dec (number, tp, 1);
967 else
969 /* Output "r+[R].m" or "r+[R+].m". */
970 *tp++ = '+';
971 *tp++ = '[';
972 tp = format_reg (prefix_insn & 15, tp);
973 if (prefix_insn & 0x400)
974 *tp++ = '+';
975 *tp++ = ']';
976 *tp++ = '.';
977 *tp++ = mode_char[(prefix_insn >> 4) & 3];
979 info->flags
980 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
981 | CRIS_DIS_FLAG_MEM_TARGET2_MEM
982 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
984 | (((prefix_insn >> 4) == 2)
986 : (((prefix_insn >> 4) & 3) == 1
987 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD
988 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE)));
990 break;
992 default:
993 (*info->fprintf_func) (info->stream, "?prefix-bug");
996 /* To mark that the prefix is used, reset it. */
997 prefix_opcodep = NULL;
999 else
1001 tp = format_reg (insn & 15, tp);
1003 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1004 info->target = insn & 15;
1006 if (insn & 0x400)
1007 *tp++ = '+';
1009 *tp++ = ']';
1011 break;
1013 case 'x':
1014 tp = format_reg ((insn >> 12) & 15, tp);
1015 *tp++ = '.';
1016 *tp++ = mode_char[(insn >> 4) & 3];
1017 break;
1019 case 'I':
1020 tp = format_dec (insn & 63, tp, 0);
1021 break;
1023 case 'b':
1025 int where = buffer[2] + buffer[3] * 256;
1027 if (where > 32767)
1028 where -= 65536;
1030 where += addr + 4;
1032 if (insn == BA_PC_INCR_OPCODE)
1033 info->insn_type = dis_branch;
1034 else
1035 info->insn_type = dis_condbranch;
1037 info->target = (bfd_vma) where;
1039 *tp = 0;
1040 tp = temp;
1041 (*info->fprintf_func) (info->stream, "%s%s ",
1042 temp, cris_cc_strings[insn >> 12]);
1044 (*info->print_address_func) ((bfd_vma) where, info);
1046 break;
1048 case 'c':
1049 tp = format_dec (insn & 31, tp, 0);
1050 break;
1052 case 'C':
1053 tp = format_dec (insn & 15, tp, 0);
1054 break;
1056 case 'o':
1058 long offset = insn & 0xfe;
1060 if (insn & 1)
1061 offset |= ~0xff;
1063 if (opcodep->match == BA_QUICK_OPCODE)
1064 info->insn_type = dis_branch;
1065 else
1066 info->insn_type = dis_condbranch;
1068 info->target = (bfd_vma) (addr + 2 + offset);
1069 *tp = 0;
1070 tp = temp;
1071 (*info->fprintf_func) (info->stream, "%s", temp);
1073 (*info->print_address_func) ((bfd_vma) (addr + 2 + offset), info);
1075 break;
1077 case 'O':
1079 long number = buffer[0];
1081 if (number > 127)
1082 number = number - 256;
1084 tp = format_dec (number, tp, 1);
1085 *tp++ = ',';
1086 tp = format_reg ((insn >> 12) & 15, tp);
1088 break;
1090 case 'f':
1091 tp = print_flags (insn, tp);
1092 break;
1094 case 'i':
1095 tp = format_dec ((insn & 32) ? (insn & 31) | ~31 : insn & 31, tp, 1);
1096 break;
1098 case 'P':
1100 const struct cris_spec_reg *sregp
1101 = spec_reg_info ((insn >> 12) & 15);
1103 if (sregp->name == NULL)
1104 /* Should have been caught as a non-match eariler. */
1105 *tp++ = '?';
1106 else
1108 strcpy (tp, sregp->name);
1109 tp += strlen (tp);
1112 break;
1114 default:
1115 strcpy (tp, "???");
1116 tp += 3;
1120 *tp = 0;
1122 if (prefix_opcodep)
1123 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")",
1124 prefix_opcodep->name, prefix_opcodep->args);
1126 (*info->fprintf_func) (info->stream, "%s", temp);
1128 /* Get info for matching case-tables, if we don't have any active.
1129 We assume that the last constant seen is used; either in the insn
1130 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */
1131 if (TRACE_CASE && case_offset_counter == 0)
1133 if (strncmp (opcodep->name, "sub", 3) == 0)
1134 case_offset = last_immediate;
1136 /* It could also be an "add", if there are negative case-values. */
1137 else if (strncmp (opcodep->name, "add", 3) == 0)
1139 /* The first case is the negated operand to the add. */
1140 case_offset = -last_immediate;
1142 /* A bound insn will tell us the number of cases. */
1143 else if (strncmp (opcodep->name, "bound", 5) == 0)
1145 no_of_case_offsets = last_immediate + 1;
1147 /* A jump or jsr or branch breaks the chain of insns for a
1148 case-table, so assume default first-case again. */
1149 else if (info->insn_type == dis_jsr
1150 || info->insn_type == dis_branch
1151 || info->insn_type == dis_condbranch)
1152 case_offset = 0;
1157 /* Print the CRIS instruction at address memaddr on stream. Returns
1158 length of the instruction, in bytes. */
1160 print_insn_cris (memaddr, info)
1161 bfd_vma memaddr;
1162 disassemble_info *info;
1164 int nbytes;
1165 unsigned int insn;
1166 const struct cris_opcode *matchedp;
1167 int advance = 0;
1169 /* No instruction will be disassembled as longer than this number of
1170 bytes; stacked prefixes will not be expanded. */
1171 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN];
1172 unsigned char *bufp;
1173 int status;
1174 bfd_vma addr;
1176 /* There will be an "out of range" error after the last instruction.
1177 Reading pairs of bytes in decreasing number, we hope that we will get
1178 at least the amount that we will consume.
1180 If we can't get any data, or we do not get enough data, we print
1181 the error message. */
1183 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2)
1185 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info);
1186 if (status == 0)
1187 break;
1190 /* If we did not get all we asked for, then clear the rest.
1191 Hopefully this makes a reproducible result in case of errors. */
1192 if (nbytes != MAX_BYTES_PER_CRIS_INSN)
1193 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes);
1195 addr = memaddr;
1196 bufp = buffer;
1198 /* Set some defaults for the insn info. */
1199 info->insn_info_valid = 1;
1200 info->branch_delay_insns = 0;
1201 info->data_size = 0;
1202 info->insn_type = dis_nonbranch;
1203 info->flags = 0;
1204 info->target = 0;
1205 info->target2 = 0;
1207 /* If we got any data, disassemble it. */
1208 if (nbytes != 0)
1210 matchedp = NULL;
1212 insn = bufp[0] + bufp[1] * 256;
1214 /* If we're in a case-table, don't disassemble the offsets. */
1215 if (TRACE_CASE && case_offset_counter != 0)
1217 info->insn_type = dis_noninsn;
1218 advance += 2;
1220 /* If to print data as offsets, then shortcut here. */
1221 (*info->fprintf_func) (info->stream, "case %d%s: -> ",
1222 case_offset + no_of_case_offsets
1223 - case_offset_counter,
1224 case_offset_counter == 1 ? "/default" :
1225 "");
1227 (*info->print_address_func) ((bfd_vma)
1228 ((short) (insn)
1229 + (long) (addr
1230 - (no_of_case_offsets
1231 - case_offset_counter)
1232 * 2)), info);
1233 case_offset_counter--;
1235 /* The default case start (without a "sub" or "add") must be
1236 zero. */
1237 if (case_offset_counter == 0)
1238 case_offset = 0;
1240 else if (insn == 0)
1242 /* We're often called to disassemble zeroes. While this is a
1243 valid "bcc .+2" insn, it is also useless enough and enough
1244 of a nuiscance that we will just output "bcc .+2" for it
1245 and signal it as a noninsn. */
1246 (*info->fprintf_func) (info->stream, "bcc .+2");
1247 info->insn_type = dis_noninsn;
1248 advance += 2;
1250 else
1252 const struct cris_opcode *prefix_opcodep = NULL;
1253 unsigned char *prefix_buffer = bufp;
1254 unsigned int prefix_insn = insn;
1255 int prefix_size = 0;
1257 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX);
1259 /* Check if we're supposed to write out prefixes as address
1260 modes and if this was a prefix. */
1261 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p')
1263 /* If it's a prefix, put it into the prefix vars and get the
1264 main insn. */
1265 prefix_size = bytes_to_skip (prefix_insn, matchedp);
1266 prefix_opcodep = matchedp;
1268 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
1269 matchedp = get_opcode_entry (insn, prefix_insn);
1271 if (matchedp != NULL)
1273 addr += prefix_size;
1274 bufp += prefix_size;
1275 advance += prefix_size;
1277 else
1279 /* The "main" insn wasn't valid, at least not when
1280 prefixed. Put back things enough to output the
1281 prefix insn only, as a normal insn. */
1282 matchedp = prefix_opcodep;
1283 insn = prefix_insn;
1284 prefix_opcodep = NULL;
1288 if (matchedp == NULL)
1290 (*info->fprintf_func) (info->stream, "??0x%lx", insn);
1291 advance += 2;
1293 info->insn_type = dis_noninsn;
1295 else
1297 advance += bytes_to_skip (insn, matchedp);
1299 /* The info_type and assorted fields will be set according
1300 to the operands. */
1301 print_with_operands (matchedp, insn, bufp, addr, info,
1302 prefix_opcodep, prefix_insn,
1303 prefix_buffer);
1307 else
1308 info->insn_type = dis_noninsn;
1310 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error
1311 status when reading that much, and the insn decoding indicated a
1312 length exceeding what we read, there is an error. */
1313 if (status != 0 && (nbytes == 0 || advance > nbytes))
1315 (*info->memory_error_func) (status, memaddr, info);
1316 return -1;
1319 /* Max supported insn size with one folded prefix insn. */
1320 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN;
1322 /* I would like to set this to a fixed value larger than the actual
1323 number of bytes to print in order to avoid spaces between bytes,
1324 but objdump.c (2.9.1) does not like that, so we print 16-bit
1325 chunks, which is the next choice. */
1326 info->bytes_per_chunk = 2;
1328 /* Printing bytes in order of increasing addresses makes sense,
1329 especially on a little-endian target.
1330 This is completely the opposite of what you think; setting this to
1331 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N
1332 we want. */
1333 info->display_endian = BFD_ENDIAN_BIG;
1335 return advance;
1339 * Local variables:
1340 * eval: (c-set-style "gnu")
1341 * indent-tabs-mode: t
1342 * End: