* config.sub, config.guess: Update from upstream sources.
[binutils.git] / opcodes / avr-dis.c
blobac3775212e84f3d2e51147e159f9326438eec0c6
1 /* Disassemble AVR instructions.
2 Copyright 1999, 2000, 2002, 2004, 2005 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20 #include <assert.h>
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "opintl.h"
24 #include "libiberty.h"
26 struct avr_opcodes_s
28 char *name;
29 char *constraints;
30 char *opcode;
31 int insn_size; /* In words. */
32 int isa;
33 unsigned int bin_opcode;
36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
37 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
39 const struct avr_opcodes_s avr_opcodes[] =
41 #include "opcode/avr.h"
42 {NULL, NULL, NULL, 0, 0, 0}
45 static int
46 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
47 char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
49 int ok = 1;
50 *sym = 0;
52 switch (constraint)
54 /* Any register operand. */
55 case 'r':
56 if (regs)
57 insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register. */
58 else
59 insn = (insn & 0x01f0) >> 4; /* Destination register. */
61 sprintf (buf, "r%d", insn);
62 break;
64 case 'd':
65 if (regs)
66 sprintf (buf, "r%d", 16 + (insn & 0xf));
67 else
68 sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
69 break;
71 case 'w':
72 sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
73 break;
75 case 'a':
76 if (regs)
77 sprintf (buf, "r%d", 16 + (insn & 7));
78 else
79 sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
80 break;
82 case 'v':
83 if (regs)
84 sprintf (buf, "r%d", (insn & 0xf) * 2);
85 else
86 sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
87 break;
89 case 'e':
91 char *xyz;
93 switch (insn & 0x100f)
95 case 0x0000: xyz = "Z"; break;
96 case 0x1001: xyz = "Z+"; break;
97 case 0x1002: xyz = "-Z"; break;
98 case 0x0008: xyz = "Y"; break;
99 case 0x1009: xyz = "Y+"; break;
100 case 0x100a: xyz = "-Y"; break;
101 case 0x100c: xyz = "X"; break;
102 case 0x100d: xyz = "X+"; break;
103 case 0x100e: xyz = "-X"; break;
104 default: xyz = "??"; ok = 0;
106 sprintf (buf, xyz);
108 if (AVR_UNDEF_P (insn))
109 sprintf (comment, _("undefined"));
111 break;
113 case 'z':
114 *buf++ = 'Z';
115 if (insn & 0x1)
116 *buf++ = '+';
117 *buf = '\0';
118 if (AVR_UNDEF_P (insn))
119 sprintf (comment, _("undefined"));
120 break;
122 case 'b':
124 unsigned int x;
126 x = (insn & 7);
127 x |= (insn >> 7) & (3 << 3);
128 x |= (insn >> 8) & (1 << 5);
130 if (insn & 0x8)
131 *buf++ = 'Y';
132 else
133 *buf++ = 'Z';
134 sprintf (buf, "+%d", x);
135 sprintf (comment, "0x%02x", x);
137 break;
139 case 'h':
140 *sym = 1;
141 *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
142 /* See PR binutils/2545. Ideally we would like to display the hex
143 value of the address only once, but this would mean recoding
144 objdump_print_address() which would affect many targets. */
145 sprintf (buf, "%#lx", (unsigned long ) *sym_addr);
146 sprintf (comment, "0x");
148 break;
150 case 'L':
152 int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
153 sprintf (buf, ".%+-8d", rel_addr);
154 *sym = 1;
155 *sym_addr = pc + 2 + rel_addr;
156 sprintf (comment, "0x");
158 break;
160 case 'l':
162 int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
163 sprintf (buf, ".%+-8d", rel_addr);
164 *sym = 1;
165 *sym_addr = pc + 2 + rel_addr;
166 sprintf (comment, "0x");
168 break;
170 case 'i':
171 sprintf (buf, "0x%04X", insn2);
172 break;
174 case 'M':
175 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
176 sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
177 break;
179 case 'n':
180 sprintf (buf, "??");
181 fprintf (stderr, _("Internal disassembler error"));
182 ok = 0;
183 break;
185 case 'K':
187 unsigned int x;
189 x = (insn & 0xf) | ((insn >> 2) & 0x30);
190 sprintf (buf, "0x%02x", x);
191 sprintf (comment, "%d", x);
193 break;
195 case 's':
196 sprintf (buf, "%d", insn & 7);
197 break;
199 case 'S':
200 sprintf (buf, "%d", (insn >> 4) & 7);
201 break;
203 case 'P':
205 unsigned int x;
207 x = (insn & 0xf);
208 x |= (insn >> 5) & 0x30;
209 sprintf (buf, "0x%02x", x);
210 sprintf (comment, "%d", x);
212 break;
214 case 'p':
216 unsigned int x;
218 x = (insn >> 3) & 0x1f;
219 sprintf (buf, "0x%02x", x);
220 sprintf (comment, "%d", x);
222 break;
224 case '?':
225 *buf = '\0';
226 break;
228 default:
229 sprintf (buf, "??");
230 fprintf (stderr, _("unknown constraint `%c'"), constraint);
231 ok = 0;
234 return ok;
237 static unsigned short
238 avrdis_opcode (bfd_vma addr, disassemble_info *info)
240 bfd_byte buffer[2];
241 int status;
243 status = info->read_memory_func (addr, buffer, 2, info);
245 if (status == 0)
246 return bfd_getl16 (buffer);
248 info->memory_error_func (status, addr, info);
249 return -1;
254 print_insn_avr (bfd_vma addr, disassemble_info *info)
256 unsigned int insn, insn2;
257 const struct avr_opcodes_s *opcode;
258 static unsigned int *maskptr;
259 void *stream = info->stream;
260 fprintf_ftype prin = info->fprintf_func;
261 static unsigned int *avr_bin_masks;
262 static int initialized;
263 int cmd_len = 2;
264 int ok = 0;
265 char op1[20], op2[20], comment1[40], comment2[40];
266 int sym_op1 = 0, sym_op2 = 0;
267 bfd_vma sym_addr1, sym_addr2;
269 if (!initialized)
271 unsigned int nopcodes;
273 nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
275 avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
277 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
278 opcode->name;
279 opcode++, maskptr++)
281 char * s;
282 unsigned int bin = 0;
283 unsigned int mask = 0;
285 for (s = opcode->opcode; *s; ++s)
287 bin <<= 1;
288 mask <<= 1;
289 bin |= (*s == '1');
290 mask |= (*s == '1' || *s == '0');
292 assert (s - opcode->opcode == 16);
293 assert (opcode->bin_opcode == bin);
294 *maskptr = mask;
297 initialized = 1;
300 insn = avrdis_opcode (addr, info);
302 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
303 opcode->name;
304 opcode++, maskptr++)
305 if ((insn & *maskptr) == opcode->bin_opcode)
306 break;
308 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
309 `std b+0,r' as `st b,r' (next entry in the table). */
311 if (AVR_DISP0_P (insn))
312 opcode++;
314 op1[0] = 0;
315 op2[0] = 0;
316 comment1[0] = 0;
317 comment2[0] = 0;
319 if (opcode->name)
321 char *op = opcode->constraints;
323 insn2 = 0;
324 ok = 1;
326 if (opcode->insn_size > 1)
328 insn2 = avrdis_opcode (addr + 2, info);
329 cmd_len = 4;
332 if (*op && *op != '?')
334 int regs = REGISTER_P (*op);
336 ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
338 if (ok && *(++op) == ',')
339 ok = avr_operand (insn, insn2, addr, *(++op), op2,
340 *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
344 if (!ok)
346 /* Unknown opcode, or invalid combination of operands. */
347 sprintf (op1, "0x%04x", insn);
348 op2[0] = 0;
349 sprintf (comment1, "????");
350 comment2[0] = 0;
353 (*prin) (stream, "%s", ok ? opcode->name : ".word");
355 if (*op1)
356 (*prin) (stream, "\t%s", op1);
358 if (*op2)
359 (*prin) (stream, ", %s", op2);
361 if (*comment1)
362 (*prin) (stream, "\t; %s", comment1);
364 if (sym_op1)
365 info->print_address_func (sym_addr1, info);
367 if (*comment2)
368 (*prin) (stream, " %s", comment2);
370 if (sym_op2)
371 info->print_address_func (sym_addr2, info);
373 return cmd_len;