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2000-03-08 H.J. Lu (hjl@gnu.org)
[binutils.git] / bfd / elf32-m32r.c
blobbe6af6c95bb43258c64515551f6b93f4de6ff599
1 /* M32R-specific support for 32-bit ELF.
2 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "bfd.h"
21 #include "sysdep.h"
22 #include "libbfd.h"
23 #include "elf-bfd.h"
24 #include "elf/m32r.h"
25
26 static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
27 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
28 static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
29 PARAMS ((bfd *, reloc_howto_type *, asection *,
30 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
31 static bfd_reloc_status_type m32r_elf_hi16_reloc
32 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
33 static void m32r_elf_relocate_hi16
34 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
35 bfd_byte *, bfd_vma));
36 bfd_reloc_status_type m32r_elf_lo16_reloc
37 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
38 static bfd_reloc_status_type m32r_elf_sda16_reloc
39 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
40 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
41 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
42 static void m32r_info_to_howto_rel
43 PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
44 boolean _bfd_m32r_elf_section_from_bfd_section
45 PARAMS ((bfd *, Elf32_Internal_Shdr *, asection *, int *));
46 void _bfd_m32r_elf_symbol_processing
47 PARAMS ((bfd *, asymbol *));
48 static boolean m32r_elf_add_symbol_hook
49 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
50 const char **, flagword *, asection **, bfd_vma *));
51 static boolean m32r_elf_relocate_section
52 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
53 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
54 #if 0 /* not yet */
55 static boolean m32r_elf_relax_delete_bytes
56 PARAMS ((bfd *, asection *, bfd_vma, int));
57 #endif
58
59 static bfd_reloc_status_type m32r_elf_final_sda_base
60 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
61 static boolean m32r_elf_object_p
62 PARAMS ((bfd *));
63 static void m32r_elf_final_write_processing
64 PARAMS ((bfd *, boolean));
65 static boolean m32r_elf_set_private_flags
66 PARAMS ((bfd *, flagword));
67 static boolean m32r_elf_copy_private_bfd_data
68 PARAMS ((bfd *, bfd *));
69 static boolean m32r_elf_merge_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71 static boolean m32r_elf_print_private_bfd_data
72 PARAMS ((bfd *, PTR));
73
74 #define NOP_INSN 0x7000
75 #define MAKE_PARALLEL(insn) ((insn) | 0x8000)
76
77 /* Use REL instead of RELA to save space.
78 This only saves space in libraries and object files, but perhaps
79 relocs will be put in ROM? All in all though, REL relocs are a pain
80 to work with. */
81 #define USE_REL
82
83 static reloc_howto_type m32r_elf_howto_table[] =
84 {
85 /* This reloc does nothing. */
86 HOWTO (R_M32R_NONE, /* type */
87 0, /* rightshift */
88 2, /* size (0 = byte, 1 = short, 2 = long) */
89 32, /* bitsize */
90 false, /* pc_relative */
91 0, /* bitpos */
92 complain_overflow_bitfield, /* complain_on_overflow */
93 bfd_elf_generic_reloc, /* special_function */
94 "R_M32R_NONE", /* name */
95 false, /* partial_inplace */
96 0, /* src_mask */
97 0, /* dst_mask */
98 false), /* pcrel_offset */
99
100 /* A 16 bit absolute relocation. */
101 HOWTO (R_M32R_16, /* type */
102 0, /* rightshift */
103 1, /* size (0 = byte, 1 = short, 2 = long) */
104 16, /* bitsize */
105 false, /* pc_relative */
106 0, /* bitpos */
107 complain_overflow_bitfield, /* complain_on_overflow */
108 bfd_elf_generic_reloc, /* special_function */
109 "R_M32R_16", /* name */
110 true, /* partial_inplace */
111 0xffff, /* src_mask */
112 0xffff, /* dst_mask */
113 false), /* pcrel_offset */
114
115 /* A 32 bit absolute relocation. */
116 HOWTO (R_M32R_32, /* type */
117 0, /* rightshift */
118 2, /* size (0 = byte, 1 = short, 2 = long) */
119 32, /* bitsize */
120 false, /* pc_relative */
121 0, /* bitpos */
122 complain_overflow_bitfield, /* complain_on_overflow */
123 bfd_elf_generic_reloc, /* special_function */
124 "R_M32R_32", /* name */
125 true, /* partial_inplace */
126 0xffffffff, /* src_mask */
127 0xffffffff, /* dst_mask */
128 false), /* pcrel_offset */
129
130 /* A 24 bit address. */
131 HOWTO (R_M32R_24, /* type */
132 0, /* rightshift */
133 2, /* size (0 = byte, 1 = short, 2 = long) */
134 24, /* bitsize */
135 false, /* pc_relative */
136 0, /* bitpos */
137 complain_overflow_unsigned, /* complain_on_overflow */
138 bfd_elf_generic_reloc, /* special_function */
139 "R_M32R_24", /* name */
140 true, /* partial_inplace */
141 0xffffff, /* src_mask */
142 0xffffff, /* dst_mask */
143 false), /* pcrel_offset */
144
145 /* An PC Relative 10-bit relocation, shifted by 2.
146 This reloc is complicated because relocations are relative to pc & -4.
147 i.e. branches in the right insn slot use the address of the left insn
148 slot for pc. */
149 /* ??? It's not clear whether this should have partial_inplace set or not.
150 Branch relaxing in the assembler can store the addend in the insn,
151 and if bfd_install_relocation gets called the addend may get added
152 again. */
153 HOWTO (R_M32R_10_PCREL, /* type */
154 2, /* rightshift */
155 1, /* size (0 = byte, 1 = short, 2 = long) */
156 10, /* bitsize */
157 true, /* pc_relative */
158 0, /* bitpos */
159 complain_overflow_signed, /* complain_on_overflow */
160 m32r_elf_10_pcrel_reloc, /* special_function */
161 "R_M32R_10_PCREL", /* name */
162 false, /* partial_inplace */
163 0xff, /* src_mask */
164 0xff, /* dst_mask */
165 true), /* pcrel_offset */
166
167 /* A relative 18 bit relocation, right shifted by 2. */
168 HOWTO (R_M32R_18_PCREL, /* type */
169 2, /* rightshift */
170 2, /* size (0 = byte, 1 = short, 2 = long) */
171 16, /* bitsize */
172 true, /* pc_relative */
173 0, /* bitpos */
174 complain_overflow_signed, /* complain_on_overflow */
175 bfd_elf_generic_reloc, /* special_function */
176 "R_M32R_18_PCREL", /* name */
177 false, /* partial_inplace */
178 0xffff, /* src_mask */
179 0xffff, /* dst_mask */
180 true), /* pcrel_offset */
181
182 /* A relative 26 bit relocation, right shifted by 2. */
183 /* ??? It's not clear whether this should have partial_inplace set or not.
184 Branch relaxing in the assembler can store the addend in the insn,
185 and if bfd_install_relocation gets called the addend may get added
186 again. */
187 HOWTO (R_M32R_26_PCREL, /* type */
188 2, /* rightshift */
189 2, /* size (0 = byte, 1 = short, 2 = long) */
190 26, /* bitsize */
191 true, /* pc_relative */
192 0, /* bitpos */
193 complain_overflow_signed, /* complain_on_overflow */
194 bfd_elf_generic_reloc, /* special_function */
195 "R_M32R_26_PCREL", /* name */
196 false, /* partial_inplace */
197 0xffffff, /* src_mask */
198 0xffffff, /* dst_mask */
199 true), /* pcrel_offset */
200
201 /* High 16 bits of address when lower 16 is or'd in. */
202 HOWTO (R_M32R_HI16_ULO, /* type */
203 16, /* rightshift */
204 2, /* size (0 = byte, 1 = short, 2 = long) */
205 16, /* bitsize */
206 false, /* pc_relative */
207 0, /* bitpos */
208 complain_overflow_dont, /* complain_on_overflow */
209 m32r_elf_hi16_reloc, /* special_function */
210 "R_M32R_HI16_ULO", /* name */
211 true, /* partial_inplace */
212 0x0000ffff, /* src_mask */
213 0x0000ffff, /* dst_mask */
214 false), /* pcrel_offset */
215
216 /* High 16 bits of address when lower 16 is added in. */
217 HOWTO (R_M32R_HI16_SLO, /* type */
218 16, /* rightshift */
219 2, /* size (0 = byte, 1 = short, 2 = long) */
220 16, /* bitsize */
221 false, /* pc_relative */
222 0, /* bitpos */
223 complain_overflow_dont, /* complain_on_overflow */
224 m32r_elf_hi16_reloc, /* special_function */
225 "R_M32R_HI16_SLO", /* name */
226 true, /* partial_inplace */
227 0x0000ffff, /* src_mask */
228 0x0000ffff, /* dst_mask */
229 false), /* pcrel_offset */
230
231 /* Lower 16 bits of address. */
232 HOWTO (R_M32R_LO16, /* type */
233 0, /* rightshift */
234 2, /* size (0 = byte, 1 = short, 2 = long) */
235 16, /* bitsize */
236 false, /* pc_relative */
237 0, /* bitpos */
238 complain_overflow_dont, /* complain_on_overflow */
239 m32r_elf_lo16_reloc, /* special_function */
240 "R_M32R_LO16", /* name */
241 true, /* partial_inplace */
242 0x0000ffff, /* src_mask */
243 0x0000ffff, /* dst_mask */
244 false), /* pcrel_offset */
245
246 /* Small data area 16 bits offset. */
247 HOWTO (R_M32R_SDA16, /* type */
248 0, /* rightshift */
249 2, /* size (0 = byte, 1 = short, 2 = long) */
250 16, /* bitsize */
251 false, /* pc_relative */
252 0, /* bitpos */
253 complain_overflow_signed, /* complain_on_overflow */
254 m32r_elf_sda16_reloc, /* special_function */
255 "R_M32R_SDA16", /* name */
256 true, /* partial_inplace */ /* FIXME: correct? */
257 0x0000ffff, /* src_mask */
258 0x0000ffff, /* dst_mask */
259 false), /* pcrel_offset */
260
261 /* GNU extension to record C++ vtable hierarchy */
262 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
263 0, /* rightshift */
264 2, /* size (0 = byte, 1 = short, 2 = long) */
265 0, /* bitsize */
266 false, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_dont, /* complain_on_overflow */
269 NULL, /* special_function */
270 "R_M32R_GNU_VTINHERIT", /* name */
271 false, /* partial_inplace */
272 0, /* src_mask */
273 0, /* dst_mask */
274 false), /* pcrel_offset */
275
276 /* GNU extension to record C++ vtable member usage */
277 HOWTO (R_M32R_GNU_VTENTRY, /* type */
278 0, /* rightshift */
279 2, /* size (0 = byte, 1 = short, 2 = long) */
280 0, /* bitsize */
281 false, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_dont, /* complain_on_overflow */
284 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
285 "R_M32R_GNU_VTENTRY", /* name */
286 false, /* partial_inplace */
287 0, /* src_mask */
288 0, /* dst_mask */
289 false), /* pcrel_offset */
290
291 };
292 \f
293 /* Handle the R_M32R_10_PCREL reloc. */
294
295 static bfd_reloc_status_type
296 m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
297 input_section, output_bfd, error_message)
298 bfd * abfd;
299 arelent * reloc_entry;
300 asymbol * symbol;
301 PTR data;
302 asection * input_section;
303 bfd * output_bfd;
304 char ** error_message ATTRIBUTE_UNUSED;
305 {
306 /* This part is from bfd_elf_generic_reloc. */
307 if (output_bfd != (bfd *) NULL
308 && (symbol->flags & BSF_SECTION_SYM) == 0
309 && (! reloc_entry->howto->partial_inplace
310 || reloc_entry->addend == 0))
311 {
312 reloc_entry->address += input_section->output_offset;
313 return bfd_reloc_ok;
314 }
315
316 if (output_bfd != NULL)
317 {
318 /* FIXME: See bfd_perform_relocation. Is this right? */
319 return bfd_reloc_continue;
320 }
321
322 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
323 input_section,
324 data, reloc_entry->address,
325 symbol->section,
326 (symbol->value
327 + symbol->section->output_section->vma
328 + symbol->section->output_offset),
329 reloc_entry->addend);
330 }
331
332 /* Utility to actually perform an R_M32R_10_PCREL reloc. */
333
334 static bfd_reloc_status_type
335 m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
336 symbol_section, symbol_value, addend)
337 bfd *abfd;
338 reloc_howto_type *howto;
339 asection *input_section;
340 bfd_byte *data;
341 bfd_vma offset;
342 asection *symbol_section ATTRIBUTE_UNUSED;
343 bfd_vma symbol_value;
344 bfd_vma addend;
345 {
346 bfd_signed_vma relocation;
347 unsigned long x;
348 bfd_reloc_status_type status;
349
350 /* Sanity check the address (offset in section). */
351 if (offset > input_section->_cooked_size)
352 return bfd_reloc_outofrange;
353
354 relocation = symbol_value + addend;
355 /* Make it pc relative. */
356 relocation -= (input_section->output_section->vma
357 + input_section->output_offset);
358 /* These jumps mask off the lower two bits of the current address
359 before doing pcrel calculations. */
360 relocation -= (offset & -4L);
361
362 if (relocation < -0x200 || relocation > 0x1ff)
363 status = bfd_reloc_overflow;
364 else
365 status = bfd_reloc_ok;
366
367 x = bfd_get_16 (abfd, data + offset);
368 relocation >>= howto->rightshift;
369 relocation <<= howto->bitpos;
370 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
371 bfd_put_16 (abfd, x, data + offset);
372
373 return status;
374 }
375
376 /* Handle the R_M32R_HI16_[SU]LO relocs.
377 HI16_SLO is for the add3 and load/store with displacement instructions.
378 HI16_ULO is for the or3 instruction.
379 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
380 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
381 we must add one to the high 16 bytes (which will get subtracted off when
382 the low 16 bits are added).
383 These relocs have to be done in combination with an R_M32R_LO16 reloc
384 because there is a carry from the LO16 to the HI16. Here we just save
385 the information we need; we do the actual relocation when we see the LO16.
386 This code is copied from the elf32-mips.c. We also support an arbitrary
387 number of HI16 relocs to be associated with a single LO16 reloc. The
388 assembler sorts the relocs to ensure each HI16 immediately precedes its
389 LO16. However if there are multiple copies, the assembler may not find
390 the real LO16 so it picks the first one it finds. */
391
392 struct m32r_hi16
393 {
394 struct m32r_hi16 *next;
395 bfd_byte *addr;
396 bfd_vma addend;
397 };
398
399 /* FIXME: This should not be a static variable. */
400
401 static struct m32r_hi16 *m32r_hi16_list;
402
403 static bfd_reloc_status_type
404 m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
405 input_section, output_bfd, error_message)
406 bfd *abfd ATTRIBUTE_UNUSED;
407 arelent *reloc_entry;
408 asymbol *symbol;
409 PTR data;
410 asection *input_section;
411 bfd *output_bfd;
412 char **error_message ATTRIBUTE_UNUSED;
413 {
414 bfd_reloc_status_type ret;
415 bfd_vma relocation;
416 struct m32r_hi16 *n;
417
418 /* This part is from bfd_elf_generic_reloc.
419 If we're relocating, and this an external symbol, we don't want
420 to change anything. */
421 if (output_bfd != (bfd *) NULL
422 && (symbol->flags & BSF_SECTION_SYM) == 0
423 && reloc_entry->addend == 0)
424 {
425 reloc_entry->address += input_section->output_offset;
426 return bfd_reloc_ok;
427 }
428
429 /* Sanity check the address (offset in section). */
430 if (reloc_entry->address > input_section->_cooked_size)
431 return bfd_reloc_outofrange;
432
433 ret = bfd_reloc_ok;
434 if (bfd_is_und_section (symbol->section)
435 && output_bfd == (bfd *) NULL)
436 ret = bfd_reloc_undefined;
437
438 if (bfd_is_com_section (symbol->section))
439 relocation = 0;
440 else
441 relocation = symbol->value;
442
443 relocation += symbol->section->output_section->vma;
444 relocation += symbol->section->output_offset;
445 relocation += reloc_entry->addend;
446
447 /* Save the information, and let LO16 do the actual relocation. */
448 n = (struct m32r_hi16 *) bfd_malloc (sizeof *n);
449 if (n == NULL)
450 return bfd_reloc_outofrange;
451 n->addr = (bfd_byte *) data + reloc_entry->address;
452 n->addend = relocation;
453 n->next = m32r_hi16_list;
454 m32r_hi16_list = n;
455
456 if (output_bfd != (bfd *) NULL)
457 reloc_entry->address += input_section->output_offset;
458
459 return ret;
460 }
461
462 /* Handle an M32R ELF HI16 reloc. */
463
464 static void
465 m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
466 bfd *input_bfd;
467 int type;
468 Elf_Internal_Rela *relhi;
469 Elf_Internal_Rela *rello;
470 bfd_byte *contents;
471 bfd_vma addend;
472 {
473 unsigned long insn;
474 bfd_vma addlo;
475
476 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
477
478 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
479 if (type == R_M32R_HI16_SLO)
480 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
481 else
482 addlo &= 0xffff;
483
484 addend += ((insn & 0xffff) << 16) + addlo;
485
486 /* Reaccount for sign extension of low part. */
487 if (type == R_M32R_HI16_SLO
488 && (addend & 0x8000) != 0)
489 addend += 0x10000;
490
491 bfd_put_32 (input_bfd,
492 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
493 contents + relhi->r_offset);
494 }
495
496 /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
497 inplace relocation; this function exists in order to do the
498 R_M32R_HI16_[SU]LO relocation described above. */
499
500 bfd_reloc_status_type
501 m32r_elf_lo16_reloc (abfd, reloc_entry, symbol, data,
502 input_section, output_bfd, error_message)
503 bfd *abfd;
504 arelent *reloc_entry;
505 asymbol *symbol;
506 PTR data;
507 asection *input_section;
508 bfd *output_bfd;
509 char **error_message;
510 {
511 if (m32r_hi16_list != NULL)
512 {
513 struct m32r_hi16 *l;
514
515 l = m32r_hi16_list;
516 while (l != NULL)
517 {
518 unsigned long insn;
519 unsigned long val;
520 unsigned long vallo;
521 struct m32r_hi16 *next;
522
523 /* Do the HI16 relocation. Note that we actually don't need
524 to know anything about the LO16 itself, except where to
525 find the low 16 bits of the addend needed by the LO16. */
526 insn = bfd_get_32 (abfd, l->addr);
527 vallo = ((bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address)
528 & 0xffff) ^ 0x8000) - 0x8000;
529 val = ((insn & 0xffff) << 16) + vallo;
530 val += l->addend;
531
532 /* Reaccount for sign extension of low part. */
533 if ((val & 0x8000) != 0)
534 val += 0x10000;
535
536 insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff);
537 bfd_put_32 (abfd, insn, l->addr);
538
539 next = l->next;
540 free (l);
541 l = next;
542 }
543
544 m32r_hi16_list = NULL;
545 }
546
547 /* Now do the LO16 reloc in the usual way. */
548 return bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data,
549 input_section, output_bfd, error_message);
550 }
551
552 /* Handle the R_M32R_SDA16 reloc.
553 This reloc is used to compute the address of objects in the small data area
554 and to perform loads and stores from that area.
555 The lower 16 bits are sign extended and added to the register specified
556 in the instruction, which is assumed to point to _SDA_BASE_. */
557
558 static bfd_reloc_status_type
559 m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
560 input_section, output_bfd, error_message)
561 bfd *abfd ATTRIBUTE_UNUSED;
562 arelent *reloc_entry;
563 asymbol *symbol;
564 PTR data ATTRIBUTE_UNUSED;
565 asection *input_section;
566 bfd *output_bfd;
567 char **error_message ATTRIBUTE_UNUSED;
568 {
569 /* This part is from bfd_elf_generic_reloc. */
570 if (output_bfd != (bfd *) NULL
571 && (symbol->flags & BSF_SECTION_SYM) == 0
572 && (! reloc_entry->howto->partial_inplace
573 || reloc_entry->addend == 0))
574 {
575 reloc_entry->address += input_section->output_offset;
576 return bfd_reloc_ok;
577 }
578
579 if (output_bfd != NULL)
580 {
581 /* FIXME: See bfd_perform_relocation. Is this right? */
582 return bfd_reloc_continue;
583 }
584
585 /* FIXME: not sure what to do here yet. But then again, the linker
586 may never call us. */
587 abort ();
588 }
589 \f
590 /* Map BFD reloc types to M32R ELF reloc types. */
591
592 struct m32r_reloc_map
593 {
594 bfd_reloc_code_real_type bfd_reloc_val;
595 unsigned char elf_reloc_val;
596 };
597
598 static const struct m32r_reloc_map m32r_reloc_map[] =
599 {
600 { BFD_RELOC_NONE, R_M32R_NONE },
601 { BFD_RELOC_16, R_M32R_16 },
602 { BFD_RELOC_32, R_M32R_32 },
603 { BFD_RELOC_M32R_24, R_M32R_24 },
604 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
605 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
606 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
607 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
608 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
609 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
610 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
611 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
612 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
613 };
614
615 static reloc_howto_type *
616 bfd_elf32_bfd_reloc_type_lookup (abfd, code)
617 bfd *abfd ATTRIBUTE_UNUSED;
618 bfd_reloc_code_real_type code;
619 {
620 unsigned int i;
621
622 for (i = 0;
623 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
624 i++)
625 {
626 if (m32r_reloc_map[i].bfd_reloc_val == code)
627 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
628 }
629
630 return NULL;
631 }
632
633 /* Set the howto pointer for an M32R ELF reloc. */
634
635 static void
636 m32r_info_to_howto_rel (abfd, cache_ptr, dst)
637 bfd *abfd ATTRIBUTE_UNUSED;
638 arelent *cache_ptr;
639 Elf32_Internal_Rel *dst;
640 {
641 unsigned int r_type;
642
643 r_type = ELF32_R_TYPE (dst->r_info);
644 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
645 cache_ptr->howto = &m32r_elf_howto_table[r_type];
646 }
647 \f
648 /* Given a BFD section, try to locate the corresponding ELF section
649 index. */
650
651 boolean
652 _bfd_m32r_elf_section_from_bfd_section (abfd, hdr, sec, retval)
653 bfd *abfd ATTRIBUTE_UNUSED;
654 Elf32_Internal_Shdr *hdr ATTRIBUTE_UNUSED;
655 asection *sec;
656 int *retval;
657 {
658 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
659 {
660 *retval = SHN_M32R_SCOMMON;
661 return true;
662 }
663 return false;
664 }
665
666 /* M32R ELF uses two common sections. One is the usual one, and the other
667 is for small objects. All the small objects are kept together, and then
668 referenced via one register, which yields faster assembler code. It is
669 up to the compiler to emit an instruction to load the register with
670 _SDA_BASE. This is what we use for the small common section. This
671 approach is copied from elf32-mips.c. */
672 static asection m32r_elf_scom_section;
673 static asymbol m32r_elf_scom_symbol;
674 static asymbol *m32r_elf_scom_symbol_ptr;
675
676 /* Handle the special M32R section numbers that a symbol may use. */
677
678 void
679 _bfd_m32r_elf_symbol_processing (abfd, asym)
680 bfd *abfd ATTRIBUTE_UNUSED;
681 asymbol *asym;
682 {
683 elf_symbol_type *elfsym;
684
685 elfsym = (elf_symbol_type *) asym;
686
687 switch (elfsym->internal_elf_sym.st_shndx)
688 {
689 case SHN_M32R_SCOMMON:
690 if (m32r_elf_scom_section.name == NULL)
691 {
692 /* Initialize the small common section. */
693 m32r_elf_scom_section.name = ".scommon";
694 m32r_elf_scom_section.flags = SEC_IS_COMMON;
695 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
696 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
697 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
698 m32r_elf_scom_symbol.name = ".scommon";
699 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
700 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
701 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
702 }
703 asym->section = &m32r_elf_scom_section;
704 asym->value = elfsym->internal_elf_sym.st_size;
705 break;
706 }
707 }
708
709 /* Hook called by the linker routine which adds symbols from an object
710 file. We must handle the special M32R section numbers here.
711 We also keep watching for whether we need to create the sdata special
712 linker sections. */
713
714 static boolean
715 m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
716 bfd *abfd;
717 struct bfd_link_info *info;
718 const Elf_Internal_Sym *sym;
719 const char **namep;
720 flagword *flagsp ATTRIBUTE_UNUSED;
721 asection **secp;
722 bfd_vma *valp;
723 {
724 if (! info->relocateable
725 && (*namep)[0] == '_' && (*namep)[1] == 'S'
726 && strcmp (*namep, "_SDA_BASE_") == 0)
727 {
728 /* This is simpler than using _bfd_elf_create_linker_section
729 (our needs are simpler than ppc's needs). Also
730 _bfd_elf_create_linker_section currently has a bug where if a .sdata
731 section already exists a new one is created that follows it which
732 screws of _SDA_BASE_ address calcs because output_offset != 0. */
733 struct elf_link_hash_entry *h;
734 asection *s = bfd_get_section_by_name (abfd, ".sdata");
735
736 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
737
738 if (s == NULL)
739 {
740 int flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
741 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
742
743 s = bfd_make_section_anyway (abfd, ".sdata");
744 if (s == NULL)
745 return false;
746 bfd_set_section_flags (abfd, s, flags);
747 bfd_set_section_alignment (abfd, s, 2);
748 }
749
750 h = (struct elf_link_hash_entry *)
751 bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false);
752
753 if ((h == NULL || h->root.type == bfd_link_hash_undefined)
754 && !(_bfd_generic_link_add_one_symbol (info,
755 abfd,
756 "_SDA_BASE_",
757 BSF_GLOBAL,
758 s,
759 32768,
760 (const char *) NULL,
761 false,
762 get_elf_backend_data (abfd)->collect,
763 (struct bfd_link_hash_entry **) &h)))
764 return false;
765 h->type = STT_OBJECT;
766 }
767
768 switch (sym->st_shndx)
769 {
770 case SHN_M32R_SCOMMON:
771 *secp = bfd_make_section_old_way (abfd, ".scommon");
772 (*secp)->flags |= SEC_IS_COMMON;
773 *valp = sym->st_size;
774 break;
775 }
776
777 return true;
778 }
779
780 /* We have to figure out the SDA_BASE value, so that we can adjust the
781 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
782 BFD. If we can't find it, we're stuck. We cache it in the ELF
783 target data. We don't need to adjust the symbol value for an
784 external symbol if we are producing relocateable output. */
785
786 static bfd_reloc_status_type
787 m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
788 bfd *output_bfd;
789 struct bfd_link_info *info;
790 const char **error_message;
791 bfd_vma *psb;
792 {
793 if (elf_gp (output_bfd) == 0)
794 {
795 struct bfd_link_hash_entry *h;
796
797 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
798 if (h != (struct bfd_link_hash_entry *) NULL
799 && h->type == bfd_link_hash_defined)
800 elf_gp (output_bfd) = (h->u.def.value
801 + h->u.def.section->output_section->vma
802 + h->u.def.section->output_offset);
803 else
804 {
805 /* Only get the error once. */
806 *psb = elf_gp (output_bfd) = 4;
807 *error_message =
808 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
809 return bfd_reloc_dangerous;
810 }
811 }
812 *psb = elf_gp (output_bfd);
813 return bfd_reloc_ok;
814 }
815 \f
816 /* Relocate an M32R/D ELF section.
817 There is some attempt to make this function usable for many architectures,
818 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
819 if only to serve as a learning tool.
820
821 The RELOCATE_SECTION function is called by the new ELF backend linker
822 to handle the relocations for a section.
823
824 The relocs are always passed as Rela structures; if the section
825 actually uses Rel structures, the r_addend field will always be
826 zero.
827
828 This function is responsible for adjust the section contents as
829 necessary, and (if using Rela relocs and generating a
830 relocateable output file) adjusting the reloc addend as
831 necessary.
832
833 This function does not have to worry about setting the reloc
834 address or the reloc symbol index.
835
836 LOCAL_SYMS is a pointer to the swapped in local symbols.
837
838 LOCAL_SECTIONS is an array giving the section in the input file
839 corresponding to the st_shndx field of each local symbol.
840
841 The global hash table entry for the global symbols can be found
842 via elf_sym_hashes (input_bfd).
843
844 When generating relocateable output, this function must handle
845 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
846 going to be the section symbol corresponding to the output
847 section, which means that the addend must be adjusted
848 accordingly. */
849
850 static boolean
851 m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
852 contents, relocs, local_syms, local_sections)
853 bfd *output_bfd ATTRIBUTE_UNUSED;
854 struct bfd_link_info *info;
855 bfd *input_bfd;
856 asection *input_section;
857 bfd_byte *contents;
858 Elf_Internal_Rela *relocs;
859 Elf_Internal_Sym *local_syms;
860 asection **local_sections;
861 {
862 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
863 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
864 Elf_Internal_Rela *rel, *relend;
865 /* Assume success. */
866 boolean ret = true;
867
868 rel = relocs;
869 relend = relocs + input_section->reloc_count;
870 for (; rel < relend; rel++)
871 {
872 int r_type;
873 reloc_howto_type *howto;
874 unsigned long r_symndx;
875 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
876 ensure it's zero (we use REL relocs, not RELA). Therefore this
877 should be assigning zero to `addend', but for clarity we use
878 `r_addend'. */
879 bfd_vma addend = rel->r_addend;
880 bfd_vma offset = rel->r_offset;
881 struct elf_link_hash_entry *h;
882 Elf_Internal_Sym *sym;
883 asection *sec;
884 const char *sym_name;
885 bfd_reloc_status_type r;
886 const char *errmsg = NULL;
887
888 h = NULL;
889 r_type = ELF32_R_TYPE (rel->r_info);
890 if (r_type < 0 || r_type >= (int) R_M32R_max)
891 {
892 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
893 bfd_get_filename (input_bfd),
894 (int) r_type);
895 bfd_set_error (bfd_error_bad_value);
896 ret = false;
897 continue;
898 }
899
900 if (r_type == R_M32R_GNU_VTENTRY
901 || r_type == R_M32R_GNU_VTINHERIT)
902 continue;
903
904 howto = m32r_elf_howto_table + r_type;
905 r_symndx = ELF32_R_SYM (rel->r_info);
906
907 if (info->relocateable)
908 {
909 /* This is a relocateable link. We don't have to change
910 anything, unless the reloc is against a section symbol,
911 in which case we have to adjust according to where the
912 section symbol winds up in the output section. */
913 sec = NULL;
914 if (r_symndx >= symtab_hdr->sh_info)
915 {
916 /* External symbol. */
917 continue;
918 }
919
920 /* Local symbol. */
921 sym = local_syms + r_symndx;
922 sym_name = "<local symbol>";
923 /* STT_SECTION: symbol is associated with a section. */
924 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
925 {
926 /* Symbol isn't associated with a section. Nothing to do. */
927 continue;
928 }
929
930 sec = local_sections[r_symndx];
931 addend += sec->output_offset + sym->st_value;
932 #ifndef USE_REL
933 /* This can't be done for USE_REL because it doesn't mean anything
934 and elf_link_input_bfd asserts this stays zero. */
935 rel->r_addend = addend;
936 #endif
937
938 #ifndef USE_REL
939 /* Addends are stored with relocs. We're done. */
940 continue;
941 #else /* USE_REL */
942 /* If partial_inplace, we need to store any additional addend
943 back in the section. */
944 if (! howto->partial_inplace)
945 continue;
946 /* ??? Here is a nice place to call a special_function
947 like handler. */
948 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
949 r = _bfd_relocate_contents (howto, input_bfd,
950 addend, contents + offset);
951 else
952 {
953 Elf_Internal_Rela *lorel;
954
955 /* We allow an arbitrary number of HI16 relocs before the
956 LO16 reloc. This permits gcc to emit the HI and LO relocs
957 itself. */
958 for (lorel = rel + 1;
959 (lorel < relend
960 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
961 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
962 lorel++)
963 continue;
964 if (lorel < relend
965 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
966 {
967 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
968 contents, addend);
969 r = bfd_reloc_ok;
970 }
971 else
972 r = _bfd_relocate_contents (howto, input_bfd,
973 addend, contents + offset);
974 }
975 #endif /* USE_REL */
976 }
977 else
978 {
979 bfd_vma relocation;
980
981 /* This is a final link. */
982 sym = NULL;
983 sec = NULL;
984
985 if (r_symndx < symtab_hdr->sh_info)
986 {
987 /* Local symbol. */
988 sym = local_syms + r_symndx;
989 sec = local_sections[r_symndx];
990 sym_name = "<local symbol>";
991 relocation = (sec->output_section->vma
992 + sec->output_offset
993 + sym->st_value);
994 }
995 else
996 {
997 /* External symbol. */
998 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
999 while (h->root.type == bfd_link_hash_indirect
1000 || h->root.type == bfd_link_hash_warning)
1001 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1002 sym_name = h->root.root.string;
1003
1004 if (h->root.type == bfd_link_hash_defined
1005 || h->root.type == bfd_link_hash_defweak)
1006 {
1007 sec = h->root.u.def.section;
1008 if (sec->output_section == NULL)
1009 relocation = 0;
1010 else
1011 relocation = (h->root.u.def.value
1012 + sec->output_section->vma
1013 + sec->output_offset);
1014 }
1015 else if (h->root.type == bfd_link_hash_undefweak)
1016 relocation = 0;
1017 else
1018 {
1019 if (! ((*info->callbacks->undefined_symbol)
1020 (info, h->root.root.string, input_bfd,
1021 input_section, offset, true)))
1022 return false;
1023 relocation = 0;
1024 }
1025 }
1026
1027 /* Sanity check the address. */
1028 if (offset > input_section->_raw_size)
1029 {
1030 r = bfd_reloc_outofrange;
1031 goto check_reloc;
1032 }
1033
1034 switch ((int) r_type)
1035 {
1036 case (int) R_M32R_10_PCREL :
1037 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1038 contents, offset,
1039 sec, relocation, addend);
1040 break;
1041
1042 case (int) R_M32R_HI16_SLO :
1043 case (int) R_M32R_HI16_ULO :
1044 {
1045 Elf_Internal_Rela *lorel;
1046
1047 /* We allow an arbitrary number of HI16 relocs before the
1048 LO16 reloc. This permits gcc to emit the HI and LO relocs
1049 itself. */
1050 for (lorel = rel + 1;
1051 (lorel < relend
1052 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1053 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1054 lorel++)
1055 continue;
1056 if (lorel < relend
1057 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1058 {
1059 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1060 contents, relocation + addend);
1061 r = bfd_reloc_ok;
1062 }
1063 else
1064 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1065 contents, offset,
1066 relocation, addend);
1067 }
1068 break;
1069
1070 case (int) R_M32R_SDA16 :
1071 {
1072 const char *name;
1073
1074 BFD_ASSERT (sec != NULL);
1075 name = bfd_get_section_name (abfd, sec);
1076
1077 if (strcmp (name, ".sdata") == 0
1078 || strcmp (name, ".sbss") == 0
1079 || strcmp (name, ".scommon") == 0)
1080 {
1081 bfd_vma sda_base;
1082 bfd *out_bfd = sec->output_section->owner;
1083
1084 r = m32r_elf_final_sda_base (out_bfd, info,
1085 &errmsg,
1086 &sda_base);
1087 if (r != bfd_reloc_ok)
1088 {
1089 ret = false;
1090 goto check_reloc;
1091 }
1092
1093 /* At this point `relocation' contains the object's
1094 address. */
1095 relocation -= sda_base;
1096 /* Now it contains the offset from _SDA_BASE_. */
1097 }
1098 else
1099 {
1100 (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1101 bfd_get_filename (input_bfd),
1102 sym_name,
1103 m32r_elf_howto_table[(int) r_type].name,
1104 bfd_get_section_name (abfd, sec));
1105 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1106 ret = false;
1107 continue;
1108 }
1109 }
1110 /* fall through */
1111
1112 default :
1113 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1114 contents, offset,
1115 relocation, addend);
1116 break;
1117 }
1118 }
1119
1120 check_reloc:
1121
1122 if (r != bfd_reloc_ok)
1123 {
1124 /* FIXME: This should be generic enough to go in a utility. */
1125 const char *name;
1126
1127 if (h != NULL)
1128 name = h->root.root.string;
1129 else
1130 {
1131 name = (bfd_elf_string_from_elf_section
1132 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1133 if (name == NULL || *name == '\0')
1134 name = bfd_section_name (input_bfd, sec);
1135 }
1136
1137 if (errmsg != NULL)
1138 goto common_error;
1139
1140 switch (r)
1141 {
1142 case bfd_reloc_overflow:
1143 if (! ((*info->callbacks->reloc_overflow)
1144 (info, name, howto->name, (bfd_vma) 0,
1145 input_bfd, input_section, offset)))
1146 return false;
1147 break;
1148
1149 case bfd_reloc_undefined:
1150 if (! ((*info->callbacks->undefined_symbol)
1151 (info, name, input_bfd, input_section,
1152 offset, true)))
1153 return false;
1154 break;
1155
1156 case bfd_reloc_outofrange:
1157 errmsg = _("internal error: out of range error");
1158 goto common_error;
1159
1160 case bfd_reloc_notsupported:
1161 errmsg = _("internal error: unsupported relocation error");
1162 goto common_error;
1163
1164 case bfd_reloc_dangerous:
1165 errmsg = _("internal error: dangerous error");
1166 goto common_error;
1167
1168 default:
1169 errmsg = _("internal error: unknown error");
1170 /* fall through */
1171
1172 common_error:
1173 if (!((*info->callbacks->warning)
1174 (info, errmsg, name, input_bfd, input_section,
1175 offset)))
1176 return false;
1177 break;
1178 }
1179 }
1180 }
1181
1182 return ret;
1183 }
1184 \f
1185 #if 0 /* relaxing not supported yet */
1186
1187 /* This function handles relaxing for the m32r.
1188 Relaxing on the m32r is tricky because of instruction alignment
1189 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1190
1191 The following relaxing opportunities are handled:
1192
1193 seth/add3/jl -> bl24 or bl8
1194 seth/add3 -> ld24
1195
1196 It would be nice to handle bl24 -> bl8 but given:
1197
1198 - 4 byte insns must be on 4 byte boundaries
1199 - branch instructions only branch to insns on 4 byte boundaries
1200
1201 this isn't much of a win because the insn in the 2 "deleted" bytes
1202 must become a nop. With some complexity some real relaxation could be
1203 done but the frequency just wouldn't make it worth it; it's better to
1204 try to do all the code compaction one can elsewhere.
1205 When the chip supports parallel 16 bit insns, things may change.
1206 */
1207
1208 static boolean
1209 m32r_elf_relax_section (abfd, sec, link_info, again)
1210 bfd *abfd;
1211 asection *sec;
1212 struct bfd_link_info *link_info;
1213 boolean *again;
1214 {
1215 Elf_Internal_Shdr *symtab_hdr;
1216 /* The Rela structures are used here because that's what
1217 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1218 field to 0]. */
1219 Elf_Internal_Rela *internal_relocs;
1220 Elf_Internal_Rela *free_relocs = NULL;
1221 Elf_Internal_Rela *irel, *irelend;
1222 bfd_byte *contents = NULL;
1223 bfd_byte *free_contents = NULL;
1224 Elf32_External_Sym *extsyms = NULL;
1225 Elf32_External_Sym *free_extsyms = NULL;
1226
1227 /* Assume nothing changes. */
1228 *again = false;
1229
1230 /* We don't have to do anything for a relocateable link, if
1231 this section does not have relocs, or if this is not a
1232 code section. */
1233 if (link_info->relocateable
1234 || (sec->flags & SEC_RELOC) == 0
1235 || sec->reloc_count == 0
1236 || (sec->flags & SEC_CODE) == 0
1237 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1238 return true;
1239
1240 /* If this is the first time we have been called for this section,
1241 initialize the cooked size. */
1242 if (sec->_cooked_size == 0)
1243 sec->_cooked_size = sec->_raw_size;
1244
1245 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1246
1247 /* Get a copy of the native relocations. */
1248 internal_relocs = (_bfd_elf32_link_read_relocs
1249 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1250 link_info->keep_memory));
1251 if (internal_relocs == NULL)
1252 goto error_return;
1253 if (! link_info->keep_memory)
1254 free_relocs = internal_relocs;
1255
1256 /* Walk through them looking for relaxing opportunities. */
1257 irelend = internal_relocs + sec->reloc_count;
1258 for (irel = internal_relocs; irel < irelend; irel++)
1259 {
1260 bfd_vma symval;
1261
1262 /* If this isn't something that can be relaxed, then ignore
1263 this reloc. */
1264 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1265 continue;
1266
1267 /* Get the section contents if we haven't done so already. */
1268 if (contents == NULL)
1269 {
1270 /* Get cached copy if it exists. */
1271 if (elf_section_data (sec)->this_hdr.contents != NULL)
1272 contents = elf_section_data (sec)->this_hdr.contents;
1273 else
1274 {
1275 /* Go get them off disk. */
1276 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1277 if (contents == NULL)
1278 goto error_return;
1279 free_contents = contents;
1280
1281 if (! bfd_get_section_contents (abfd, sec, contents,
1282 (file_ptr) 0, sec->_raw_size))
1283 goto error_return;
1284 }
1285 }
1286
1287 /* Read this BFD's symbols if we haven't done so already. */
1288 if (extsyms == NULL)
1289 {
1290 /* Get cached copy if it exists. */
1291 if (symtab_hdr->contents != NULL)
1292 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1293 else
1294 {
1295 /* Go get them off disk. */
1296 extsyms = ((Elf32_External_Sym *)
1297 bfd_malloc (symtab_hdr->sh_size));
1298 if (extsyms == NULL)
1299 goto error_return;
1300 free_extsyms = extsyms;
1301 if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0
1302 || (bfd_read (extsyms, 1, symtab_hdr->sh_size, abfd)
1303 != symtab_hdr->sh_size))
1304 goto error_return;
1305 }
1306 }
1307
1308 /* Get the value of the symbol referred to by the reloc. */
1309 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1310 {
1311 Elf_Internal_Sym isym;
1312 asection *sym_sec;
1313
1314 /* A local symbol. */
1315 bfd_elf32_swap_symbol_in (abfd,
1316 extsyms + ELF32_R_SYM (irel->r_info),
1317 &isym);
1318
1319 sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx);
1320 symval = (isym.st_value
1321 + sym_sec->output_section->vma
1322 + sym_sec->output_offset);
1323 }
1324 else
1325 {
1326 unsigned long indx;
1327 struct elf_link_hash_entry *h;
1328
1329 /* An external symbol. */
1330 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1331 h = elf_sym_hashes (abfd)[indx];
1332 BFD_ASSERT (h != NULL);
1333 if (h->root.type != bfd_link_hash_defined
1334 && h->root.type != bfd_link_hash_defweak)
1335 {
1336 /* This appears to be a reference to an undefined
1337 symbol. Just ignore it--it will be caught by the
1338 regular reloc processing. */
1339 continue;
1340 }
1341
1342 symval = (h->root.u.def.value
1343 + h->root.u.def.section->output_section->vma
1344 + h->root.u.def.section->output_offset);
1345 }
1346
1347 /* For simplicity of coding, we are going to modify the section
1348 contents, the section relocs, and the BFD symbol table. We
1349 must tell the rest of the code not to free up this
1350 information. It would be possible to instead create a table
1351 of changes which have to be made, as is done in coff-mips.c;
1352 that would be more work, but would require less memory when
1353 the linker is run. */
1354
1355 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1356 This sequence is generated by the compiler when compiling in
1357 32 bit mode. Also look for seth/add3 -> ld24. */
1358
1359 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1360 {
1361 Elf_Internal_Rela *nrel;
1362 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1363 + irel->r_offset);
1364 bfd_signed_vma pcrel_value = symval - pc;
1365 unsigned int code,reg;
1366 int addend,nop_p,bl8_p,to_delete;
1367
1368 /* The tests are ordered so that we get out as quickly as possible
1369 if this isn't something we can relax, taking into account that
1370 we are looking for two separate possibilities (jl/ld24). */
1371
1372 /* Do nothing if no room in the section for this to be what we're
1373 looking for. */
1374 if (irel->r_offset > sec->_cooked_size - 8)
1375 continue;
1376
1377 /* Make sure the next relocation applies to the next
1378 instruction and that it's the add3's reloc. */
1379 nrel = irel + 1;
1380 if (nrel == irelend
1381 || irel->r_offset + 4 != nrel->r_offset
1382 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1383 continue;
1384
1385 /* See if the instructions are seth/add3. */
1386 /* FIXME: This is where macros from cgen can come in. */
1387 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1388 if ((code & 0xf0ff) != 0xd0c0)
1389 continue; /* not seth rN,foo */
1390 reg = (code & 0x0f00) >> 8;
1391 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1392 if (code != (0x80a0 | reg | (reg << 8)))
1393 continue; /* not add3 rN,rN,foo */
1394
1395 /* At this point we've confirmed we have seth/add3. Now check
1396 whether the next insn is a jl, in which case try to change this
1397 to bl24 or bl8. */
1398
1399 /* Ensure the branch target is in range.
1400 The bl24 instruction has a 24 bit operand which is the target
1401 address right shifted by 2, giving a signed range of 26 bits.
1402 Note that 4 bytes are added to the high value because the target
1403 will be at least 4 bytes closer if we can relax. It'll actually
1404 be 4 or 8 bytes closer, but we don't know which just yet and
1405 the difference isn't significant enough to worry about. */
1406 #ifndef USE_REL /* put in for learning purposes */
1407 pcrel_value += irel->r_addend;
1408 #else
1409 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1410 pcrel_value += addend;
1411 #endif
1412
1413 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1414 /* Do nothing if no room in the section for this to be what we're
1415 looking for. */
1416 && (irel->r_offset <= sec->_cooked_size - 12)
1417 /* Ensure the next insn is "jl rN". */
1418 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1419 code != (0x1ec0 | reg)))
1420 {
1421 /* We can relax to bl24/bl8. */
1422
1423 /* See if there's a nop following the jl.
1424 Also see if we can use a bl8 insn. */
1425 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1426 nop_p = (code & 0x7fff) == NOP_INSN;
1427 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1428
1429 if (bl8_p)
1430 {
1431 /* Change "seth rN,foo" to "bl8 foo || nop".
1432 We OR in CODE just in case it's not a nop (technically,
1433 CODE currently must be a nop, but for cleanness we
1434 allow it to be anything). */
1435 #ifndef USE_REL /* put in for learning purposes */
1436 code = 0x7e000000 | MAKE_PARALLEL (code);
1437 #else
1438 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1439 #endif
1440 to_delete = 8;
1441 }
1442 else
1443 {
1444 /* Change the seth rN,foo to a bl24 foo. */
1445 #ifndef USE_REL /* put in for learning purposes */
1446 code = 0xfe000000;
1447 #else
1448 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1449 #endif
1450 to_delete = nop_p ? 8 : 4;
1451 }
1452
1453 bfd_put_32 (abfd, code, contents + irel->r_offset);
1454
1455 /* Set the new reloc type. */
1456 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1457 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1458
1459 /* Delete the add3 reloc by making it a null reloc. */
1460 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1461 R_M32R_NONE);
1462 }
1463 else if (addend >= 0
1464 && symval + addend <= 0xffffff)
1465 {
1466 /* We can relax to ld24. */
1467
1468 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1469 bfd_put_32 (abfd, code, contents + irel->r_offset);
1470 to_delete = 4;
1471 /* Tell the following code a nop filler isn't needed. */
1472 nop_p = 1;
1473 }
1474 else
1475 {
1476 /* Can't do anything here. */
1477 continue;
1478 }
1479
1480 /* Note that we've changed the relocs, section contents, etc. */
1481 elf_section_data (sec)->relocs = internal_relocs;
1482 free_relocs = NULL;
1483
1484 elf_section_data (sec)->this_hdr.contents = contents;
1485 free_contents = NULL;
1486
1487 symtab_hdr->contents = (bfd_byte *) extsyms;
1488 free_extsyms = NULL;
1489
1490 /* Delete TO_DELETE bytes of data. */
1491 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1492 irel->r_offset + 4, to_delete))
1493 goto error_return;
1494
1495 /* Now that the following bytes have been moved into place, see if
1496 we need to replace the jl with a nop. This happens when we had
1497 to use a bl24 insn and the insn following the jl isn't a nop.
1498 Technically, this situation can't happen (since the insn can
1499 never be executed) but to be clean we do this. When the chip
1500 supports parallel 16 bit insns things may change.
1501 We don't need to do this in the case of relaxing to ld24,
1502 and the above code sets nop_p so this isn't done. */
1503 if (! nop_p && to_delete == 4)
1504 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1505
1506 /* That will change things, so we should relax again.
1507 Note that this is not required, and it may be slow. */
1508 *again = true;
1509
1510 continue;
1511 }
1512
1513 /* loop to try the next reloc */
1514 }
1515
1516 if (free_relocs != NULL)
1517 {
1518 free (free_relocs);
1519 free_relocs = NULL;
1520 }
1521
1522 if (free_contents != NULL)
1523 {
1524 if (! link_info->keep_memory)
1525 free (free_contents);
1526 else
1527 {
1528 /* Cache the section contents for elf_link_input_bfd. */
1529 elf_section_data (sec)->this_hdr.contents = contents;
1530 }
1531 free_contents = NULL;
1532 }
1533
1534 if (free_extsyms != NULL)
1535 {
1536 if (! link_info->keep_memory)
1537 free (free_extsyms);
1538 else
1539 {
1540 /* Cache the symbols for elf_link_input_bfd. */
1541 symtab_hdr->contents = extsyms;
1542 }
1543 free_extsyms = NULL;
1544 }
1545
1546 return true;
1547
1548 error_return:
1549 if (free_relocs != NULL)
1550 free (free_relocs);
1551 if (free_contents != NULL)
1552 free (free_contents);
1553 if (free_extsyms != NULL)
1554 free (free_extsyms);
1555 return false;
1556 }
1557
1558 /* Delete some bytes from a section while relaxing. */
1559
1560 static boolean
1561 m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1562 bfd *abfd;
1563 asection *sec;
1564 bfd_vma addr;
1565 int count;
1566 {
1567 Elf_Internal_Shdr *symtab_hdr;
1568 Elf32_External_Sym *extsyms;
1569 int shndx, index;
1570 bfd_byte *contents;
1571 Elf_Internal_Rela *irel, *irelend;
1572 Elf_Internal_Rela *irelalign;
1573 bfd_vma toaddr;
1574 Elf32_External_Sym *esym, *esymend;
1575 struct elf_link_hash_entry *sym_hash;
1576
1577 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1578 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1579
1580 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1581
1582 contents = elf_section_data (sec)->this_hdr.contents;
1583
1584 /* The deletion must stop at the next ALIGN reloc for an aligment
1585 power larger than the number of bytes we are deleting. */
1586
1587 irelalign = NULL;
1588 toaddr = sec->_cooked_size;
1589
1590 irel = elf_section_data (sec)->relocs;
1591 irelend = irel + sec->reloc_count;
1592
1593 /* Actually delete the bytes. */
1594 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1595 sec->_cooked_size -= count;
1596
1597 /* Adjust all the relocs. */
1598 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1599 {
1600 /* Get the new reloc address. */
1601 if ((irel->r_offset > addr
1602 && irel->r_offset < toaddr))
1603 irel->r_offset -= count;
1604 }
1605
1606 /* Adjust the local symbols defined in this section. */
1607 esym = extsyms;
1608 esymend = esym + symtab_hdr->sh_info;
1609 for (; esym < esymend; esym++)
1610 {
1611 Elf_Internal_Sym isym;
1612
1613 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1614
1615 if (isym.st_shndx == shndx
1616 && isym.st_value > addr
1617 && isym.st_value < toaddr)
1618 {
1619 isym.st_value -= count;
1620 bfd_elf32_swap_symbol_out (abfd, &isym, esym);
1621 }
1622 }
1623
1624 /* Now adjust the global symbols defined in this section. */
1625 esym = extsyms + symtab_hdr->sh_info;
1626 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
1627 for (index = 0; esym < esymend; esym++, index++)
1628 {
1629 Elf_Internal_Sym isym;
1630
1631 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1632 sym_hash = elf_sym_hashes (abfd)[index];
1633 if (isym.st_shndx == shndx
1634 && ((sym_hash)->root.type == bfd_link_hash_defined
1635 || (sym_hash)->root.type == bfd_link_hash_defweak)
1636 && (sym_hash)->root.u.def.section == sec
1637 && (sym_hash)->root.u.def.value > addr
1638 && (sym_hash)->root.u.def.value < toaddr)
1639 {
1640 (sym_hash)->root.u.def.value -= count;
1641 }
1642 }
1643
1644 return true;
1645 }
1646
1647 /* This is a version of bfd_generic_get_relocated_section_contents
1648 which uses m32r_elf_relocate_section. */
1649
1650 static bfd_byte *
1651 m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1652 data, relocateable, symbols)
1653 bfd *output_bfd;
1654 struct bfd_link_info *link_info;
1655 struct bfd_link_order *link_order;
1656 bfd_byte *data;
1657 boolean relocateable;
1658 asymbol **symbols;
1659 {
1660 Elf_Internal_Shdr *symtab_hdr;
1661 asection *input_section = link_order->u.indirect.section;
1662 bfd *input_bfd = input_section->owner;
1663 asection **sections = NULL;
1664 Elf_Internal_Rela *internal_relocs = NULL;
1665 Elf32_External_Sym *external_syms = NULL;
1666 Elf_Internal_Sym *internal_syms = NULL;
1667
1668 /* We only need to handle the case of relaxing, or of having a
1669 particular set of section contents, specially. */
1670 if (relocateable
1671 || elf_section_data (input_section)->this_hdr.contents == NULL)
1672 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1673 link_order, data,
1674 relocateable,
1675 symbols);
1676
1677 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1678
1679 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1680 input_section->_raw_size);
1681
1682 if ((input_section->flags & SEC_RELOC) != 0
1683 && input_section->reloc_count > 0)
1684 {
1685 Elf_Internal_Sym *isymp;
1686 asection **secpp;
1687 Elf32_External_Sym *esym, *esymend;
1688
1689 if (symtab_hdr->contents != NULL)
1690 external_syms = (Elf32_External_Sym *) symtab_hdr->contents;
1691 else
1692 {
1693 external_syms = ((Elf32_External_Sym *)
1694 bfd_malloc (symtab_hdr->sh_info
1695 * sizeof (Elf32_External_Sym)));
1696 if (external_syms == NULL && symtab_hdr->sh_info > 0)
1697 goto error_return;
1698 if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0
1699 || (bfd_read (external_syms, sizeof (Elf32_External_Sym),
1700 symtab_hdr->sh_info, input_bfd)
1701 != (symtab_hdr->sh_info * sizeof (Elf32_External_Sym))))
1702 goto error_return;
1703 }
1704
1705 internal_relocs = (_bfd_elf32_link_read_relocs
1706 (input_bfd, input_section, (PTR) NULL,
1707 (Elf_Internal_Rela *) NULL, false));
1708 if (internal_relocs == NULL)
1709 goto error_return;
1710
1711 internal_syms = ((Elf_Internal_Sym *)
1712 bfd_malloc (symtab_hdr->sh_info
1713 * sizeof (Elf_Internal_Sym)));
1714 if (internal_syms == NULL && symtab_hdr->sh_info > 0)
1715 goto error_return;
1716
1717 sections = (asection **) bfd_malloc (symtab_hdr->sh_info
1718 * sizeof (asection *));
1719 if (sections == NULL && symtab_hdr->sh_info > 0)
1720 goto error_return;
1721
1722 isymp = internal_syms;
1723 secpp = sections;
1724 esym = external_syms;
1725 esymend = esym + symtab_hdr->sh_info;
1726 for (; esym < esymend; ++esym, ++isymp, ++secpp)
1727 {
1728 asection *isec;
1729
1730 bfd_elf32_swap_symbol_in (input_bfd, esym, isymp);
1731
1732 if (isymp->st_shndx == SHN_UNDEF)
1733 isec = bfd_und_section_ptr;
1734 else if (isymp->st_shndx > 0 && isymp->st_shndx < SHN_LORESERVE)
1735 isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx);
1736 else if (isymp->st_shndx == SHN_ABS)
1737 isec = bfd_abs_section_ptr;
1738 else if (isymp->st_shndx == SHN_COMMON)
1739 isec = bfd_com_section_ptr;
1740 else if (isymp->st_shndx == SHN_M32R_SCOMMON)
1741 isec = &m32r_elf_scom_section;
1742 else
1743 {
1744 /* Who knows? */
1745 isec = NULL;
1746 }
1747
1748 *secpp = isec;
1749 }
1750
1751 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1752 input_section, data, internal_relocs,
1753 internal_syms, sections))
1754 goto error_return;
1755
1756 if (sections != NULL)
1757 free (sections);
1758 sections = NULL;
1759 if (internal_syms != NULL)
1760 free (internal_syms);
1761 internal_syms = NULL;
1762 if (external_syms != NULL && symtab_hdr->contents == NULL)
1763 free (external_syms);
1764 external_syms = NULL;
1765 if (internal_relocs != elf_section_data (input_section)->relocs)
1766 free (internal_relocs);
1767 internal_relocs = NULL;
1768 }
1769
1770 return data;
1771
1772 error_return:
1773 if (internal_relocs != NULL
1774 && internal_relocs != elf_section_data (input_section)->relocs)
1775 free (internal_relocs);
1776 if (external_syms != NULL && symtab_hdr->contents == NULL)
1777 free (external_syms);
1778 if (internal_syms != NULL)
1779 free (internal_syms);
1780 if (sections != NULL)
1781 free (sections);
1782 return NULL;
1783 }
1784
1785 #endif /* #if 0 */
1786 \f
1787 /* Set the right machine number. */
1788 static boolean
1789 m32r_elf_object_p (abfd)
1790 bfd *abfd;
1791 {
1792 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1793 {
1794 default:
1795 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
1796 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
1797 }
1798 return true;
1799 }
1800
1801 /* Store the machine number in the flags field. */
1802 static void
1803 m32r_elf_final_write_processing (abfd, linker)
1804 bfd * abfd;
1805 boolean linker ATTRIBUTE_UNUSED;
1806 {
1807 unsigned long val;
1808
1809 switch (bfd_get_mach (abfd))
1810 {
1811 default:
1812 case bfd_mach_m32r: val = E_M32R_ARCH; break;
1813 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
1814 }
1815
1816 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1817 elf_elfheader (abfd)->e_flags |= val;
1818 }
1819
1820 /* Function to keep M32R specific file flags. */
1821 static boolean
1822 m32r_elf_set_private_flags (abfd, flags)
1823 bfd * abfd;
1824 flagword flags;
1825 {
1826 BFD_ASSERT (!elf_flags_init (abfd)
1827 || elf_elfheader (abfd)->e_flags == flags);
1828
1829 elf_elfheader (abfd)->e_flags = flags;
1830 elf_flags_init (abfd) = true;
1831 return true;
1832 }
1833
1834 /* Copy backend specific data from one object module to another */
1835 static boolean
1836 m32r_elf_copy_private_bfd_data (ibfd, obfd)
1837 bfd * ibfd;
1838 bfd * obfd;
1839 {
1840 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1841 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1842 return true;
1843
1844 BFD_ASSERT (!elf_flags_init (obfd)
1845 || (elf_elfheader (obfd)->e_flags
1846 == elf_elfheader (ibfd)->e_flags));
1847
1848 elf_gp (obfd) = elf_gp (ibfd);
1849 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
1850 elf_flags_init (obfd) = true;
1851 return true;
1852 }
1853
1854 /* Merge backend specific data from an object file to the output
1855 object file when linking. */
1856 static boolean
1857 m32r_elf_merge_private_bfd_data (ibfd, obfd)
1858 bfd * ibfd;
1859 bfd * obfd;
1860 {
1861 flagword out_flags;
1862 flagword in_flags;
1863
1864 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1865 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1866 return true;
1867
1868 in_flags = elf_elfheader (ibfd)->e_flags;
1869 out_flags = elf_elfheader (obfd)->e_flags;
1870
1871 if (! elf_flags_init (obfd))
1872 {
1873 /* If the input is the default architecture then do not
1874 bother setting the flags for the output architecture,
1875 instead allow future merges to do this. If no future
1876 merges ever set these flags then they will retain their
1877 unitialised values, which surprise surprise, correspond
1878 to the default values. */
1879 if (bfd_get_arch_info (ibfd)->the_default)
1880 return true;
1881
1882 elf_flags_init (obfd) = true;
1883 elf_elfheader (obfd)->e_flags = in_flags;
1884
1885 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1886 && bfd_get_arch_info (obfd)->the_default)
1887 {
1888 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
1889 }
1890
1891 return true;
1892 }
1893
1894 /* Check flag compatibility. */
1895 if (in_flags == out_flags)
1896 return true;
1897
1898 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
1899 {
1900 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
1901 {
1902 _bfd_error_handler (_("%s: Instruction set mismatch with previous modules"),
1903 bfd_get_filename (ibfd));
1904
1905 bfd_set_error (bfd_error_bad_value);
1906 return false;
1907 }
1908 }
1909
1910 return true;
1911 }
1912
1913 /* Display the flags field */
1914 static boolean
1915 m32r_elf_print_private_bfd_data (abfd, ptr)
1916 bfd * abfd;
1917 PTR ptr;
1918 {
1919 FILE * file = (FILE *) ptr;
1920
1921 BFD_ASSERT (abfd != NULL && ptr != NULL)
1922
1923 _bfd_elf_print_private_bfd_data (abfd, ptr);
1924
1925 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
1926
1927 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1928 {
1929 default:
1930 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
1931 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
1932 }
1933
1934 fputc ('\n', file);
1935
1936 return true;
1937 }
1938
1939 asection *
1940 m32r_elf_gc_mark_hook (abfd, info, rel, h, sym)
1941 bfd *abfd;
1942 struct bfd_link_info *info ATTRIBUTE_UNUSED;
1943 Elf_Internal_Rela *rel;
1944 struct elf_link_hash_entry *h;
1945 Elf_Internal_Sym *sym;
1946 {
1947 if (h != NULL)
1948 {
1949 switch (ELF32_R_TYPE (rel->r_info))
1950 {
1951 case R_M32R_GNU_VTINHERIT:
1952 case R_M32R_GNU_VTENTRY:
1953 break;
1954
1955 default:
1956 switch (h->root.type)
1957 {
1958 case bfd_link_hash_defined:
1959 case bfd_link_hash_defweak:
1960 return h->root.u.def.section;
1961
1962 case bfd_link_hash_common:
1963 return h->root.u.c.p->section;
1964
1965 default:
1966 break;
1967 }
1968 }
1969 }
1970 else
1971 {
1972 if (!(elf_bad_symtab (abfd)
1973 && ELF_ST_BIND (sym->st_info) != STB_LOCAL)
1974 && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE)
1975 && sym->st_shndx != SHN_COMMON))
1976 {
1977 return bfd_section_from_elf_index (abfd, sym->st_shndx);
1978 }
1979 }
1980 return NULL;
1981 }
1982
1983 static boolean
1984 m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
1985 bfd *abfd ATTRIBUTE_UNUSED;
1986 struct bfd_link_info *info ATTRIBUTE_UNUSED;
1987 asection *sec ATTRIBUTE_UNUSED;
1988 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
1989 {
1990 /* we don't use got and plt entries for m32r */
1991 return true;
1992 }
1993
1994
1995 /* Look through the relocs for a section during the first phase.
1996 Since we don't do .gots or .plts, we just need to consider the
1997 virtual table relocs for gc. */
1998
1999 static boolean
2000 m32r_elf_check_relocs (abfd, info, sec, relocs)
2001 bfd *abfd;
2002 struct bfd_link_info *info;
2003 asection *sec;
2004 const Elf_Internal_Rela *relocs;
2005 {
2006 Elf_Internal_Shdr *symtab_hdr;
2007 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2008 const Elf_Internal_Rela *rel;
2009 const Elf_Internal_Rela *rel_end;
2010
2011 if (info->relocateable)
2012 return true;
2013
2014 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2015 sym_hashes = elf_sym_hashes (abfd);
2016 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
2017 if (!elf_bad_symtab (abfd))
2018 sym_hashes_end -= symtab_hdr->sh_info;
2019
2020 rel_end = relocs + sec->reloc_count;
2021 for (rel = relocs; rel < rel_end; rel++)
2022 {
2023 struct elf_link_hash_entry *h;
2024 unsigned long r_symndx;
2025
2026 r_symndx = ELF32_R_SYM (rel->r_info);
2027 if (r_symndx < symtab_hdr->sh_info)
2028 h = NULL;
2029 else
2030 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
2031
2032 switch (ELF32_R_TYPE (rel->r_info))
2033 {
2034 /* This relocation describes the C++ object vtable hierarchy.
2035 Reconstruct it for later use during GC. */
2036 case R_M32R_GNU_VTINHERIT:
2037 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2038 return false;
2039 break;
2040
2041 /* This relocation describes which C++ vtable entries are actually
2042 used. Record for later use during GC. */
2043 case R_M32R_GNU_VTENTRY:
2044 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2045 return false;
2046 break;
2047 }
2048 }
2049
2050 return true;
2051 }
2052
2053
2054 \f
2055
2056 #define ELF_ARCH bfd_arch_m32r
2057 #define ELF_MACHINE_CODE EM_CYGNUS_M32R
2058 #define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
2059
2060 #define TARGET_BIG_SYM bfd_elf32_m32r_vec
2061 #define TARGET_BIG_NAME "elf32-m32r"
2062
2063 #define elf_info_to_howto 0
2064 #define elf_info_to_howto_rel m32r_info_to_howto_rel
2065 #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2066 #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2067 #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2068 #define elf_backend_relocate_section m32r_elf_relocate_section
2069 #define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2070 #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2071 #define elf_backend_check_relocs m32r_elf_check_relocs
2072
2073 #define elf_backend_can_gc_sections 1
2074 #if 0 /* not yet */
2075 /* relax support */
2076 #define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2077 #define bfd_elf32_bfd_get_relocated_section_contents \
2078 m32r_elf_get_relocated_section_contents
2079 #endif
2080
2081 #define elf_backend_object_p m32r_elf_object_p
2082 #define elf_backend_final_write_processing m32r_elf_final_write_processing
2083 #define bfd_elf32_bfd_copy_private_bfd_data m32r_elf_copy_private_bfd_data
2084 #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2085 #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2086 #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
2087
2088 #include "elf32-target.h"
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