gas/config/tc-lm32.c

   1 /* tc-lm32.c - Lattice Mico32 assembler.
   2    Copyright 2008   Free Software Foundation, Inc.
   3    Contributed by Jon Beniston <jon@beniston.com>
   4
   5    This file is part of GAS, the GNU Assembler.
   6
   7    GAS is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2, or (at your option)
  10    any later version.
  11
  12    GAS is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License along
  18    with GAS; see the file COPYING.  If not, write to the Free Software
  19    Foundation, 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22 #include <string.h>
  23 #include <stdlib.h>
  24
  25 #include "as.h"
  26 #include "safe-ctype.h"
  27 #include "subsegs.h"
  28 #include "bfd.h"
  29 #include "safe-ctype.h"
  30 #include "opcodes/lm32-desc.h"
  31 #include "opcodes/lm32-opc.h"
  32 #include "cgen.h"
  33 #include "elf/lm32.h"
  34
  35 typedef struct
  36 {
  37   const CGEN_INSN *insn;
  38   const CGEN_INSN *orig_insn;
  39   CGEN_FIELDS fields;
  40 #if CGEN_INT_INSN_P
  41   CGEN_INSN_INT buffer [1];
  42 #define INSN_VALUE(buf) (*(buf))
  43 #else
  44   unsigned char buffer[CGEN_MAX_INSN_SIZE];
  45 #define INSN_VALUE(buf) (buf)
  46 #endif
  47   char *addr;
  48   fragS *frag;
  49   int num_fixups;
  50   fixS *fixups[GAS_CGEN_MAX_FIXUPS];
  51   int indices[MAX_OPERAND_INSTANCES];
  52 } lm32_insn;
  53
  54 /* Configuration options */
  55
  56 #define LM_CFG_MULTIPLIY_ENABLED        0x0001
  57 #define LM_CFG_DIVIDE_ENABLED           0x0002
  58 #define LM_CFG_BARREL_SHIFT_ENABLED     0x0004
  59 #define LM_CFG_SIGN_EXTEND_ENABLED      0x0008
  60 #define LM_CFG_USER_ENABLED             0x0010
  61 #define LM_CFG_ICACHE_ENABLED           0x0020
  62 #define LM_CFG_DCACHE_ENABLED           0x0040
  63 #define LM_CFG_BREAK_ENABLED            0x0080
  64
  65 static unsigned config = 0U;
  66
  67 /* Target specific assembler tokens / delimiters.  */
  68
  69 const char comment_chars[]        = "#";
  70 const char line_comment_chars[]   = "#";
  71 const char line_separator_chars[] = ";";
  72 const char EXP_CHARS[]            = "eE";
  73 const char FLT_CHARS[]            = "dD";
  74
  75 /* Target specific assembly directives.  */
  76
  77 const pseudo_typeS md_pseudo_table[] =
  78 {
  79   { "align",   s_align_bytes,       0 },
  80   { "byte",    cons,                1 },
  81   { "hword",   cons,                2 },
  82   { "word",    cons,                4 },
  83   { "dword",   cons,                8 },
  84   {(char *)0 , (void(*)(int))0,     0}
  85 };
  86
  87 /* Target specific command line options.  */
  88
  89 const char * md_shortopts = "";
  90
  91 struct option md_longopts[] =
  92 {
  93 #define OPTION_MULTIPLY_ENABLED         (OPTION_MD_BASE + 1)
  94   { "mmultiply-enabled",            no_argument, NULL, OPTION_MULTIPLY_ENABLED },
  95 #define OPTION_DIVIDE_ENABLED           (OPTION_MD_BASE + 2)
  96   { "mdivide-enabled",              no_argument, NULL, OPTION_DIVIDE_ENABLED },
  97 #define OPTION_BARREL_SHIFT_ENABLED     (OPTION_MD_BASE + 3)
  98   { "mbarrel-shift-enabled",        no_argument, NULL, OPTION_BARREL_SHIFT_ENABLED },
  99 #define OPTION_SIGN_EXTEND_ENABLED      (OPTION_MD_BASE + 4)
 100   { "msign-extend-enabled",         no_argument, NULL, OPTION_SIGN_EXTEND_ENABLED },
 101 #define OPTION_USER_ENABLED             (OPTION_MD_BASE + 5)
 102   { "muser-enabled",                no_argument, NULL, OPTION_USER_ENABLED },
 103 #define OPTION_ICACHE_ENABLED           (OPTION_MD_BASE + 6)
 104   { "micache-enabled",              no_argument, NULL, OPTION_ICACHE_ENABLED },
 105 #define OPTION_DCACHE_ENABLED           (OPTION_MD_BASE + 7)
 106   { "mdcache-enabled",              no_argument, NULL, OPTION_DCACHE_ENABLED },
 107 #define OPTION_BREAK_ENABLED            (OPTION_MD_BASE + 8)
 108   { "mbreak-enabled",               no_argument, NULL, OPTION_BREAK_ENABLED },
 109 #define OPTION_ALL_ENABLED              (OPTION_MD_BASE + 9)
 110   { "mall-enabled",                 no_argument, NULL, OPTION_ALL_ENABLED },
 111 };
 112
 113 size_t md_longopts_size = sizeof (md_longopts);
 114
 115 /* Display architecture specific options.  */
 116
 117 void
 118 md_show_usage (FILE * fp)
 119 {
 120   fprintf (fp, "LM32 specific options:\n"
 121         "  -mmultiply-enabled          enable multiply instructions\n"
 122         "  -mdivide-enabled            enable divide and modulus instructions\n"
 123         "  -mbarrel-shift-enabled      enable multi-bit shift instructions\n"
 124         "  -msign-extend-enabled       enable sign-extension instructions\n"
 125         "  -muser-enabled              enable user-defined instructions\n"
 126         "  -micache-enabled            enable instruction cache instructions\n"
 127         "  -mdcache-enabled            enable data cache instructions\n"
 128         "  -mbreak-enabled             enable the break instruction\n"
 129         "  -mall-enabled               enable all optional instructions\n"
 130         );
 131 }
 132
 133 /* Parse command line options.  */
 134
 135 int
 136 md_parse_option (int c, char * arg ATTRIBUTE_UNUSED)
 137 {
 138   switch (c)
 139     {
 140       case OPTION_MULTIPLY_ENABLED:
 141         config |= LM_CFG_MULTIPLIY_ENABLED;
 142         break;
 143       case OPTION_DIVIDE_ENABLED:
 144         config |= LM_CFG_DIVIDE_ENABLED;
 145         break;
 146       case OPTION_BARREL_SHIFT_ENABLED:
 147         config |= LM_CFG_BARREL_SHIFT_ENABLED;
 148         break;
 149       case OPTION_SIGN_EXTEND_ENABLED:
 150         config |= LM_CFG_SIGN_EXTEND_ENABLED;
 151         break;
 152       case OPTION_USER_ENABLED:
 153         config |= LM_CFG_USER_ENABLED;
 154         break;
 155       case OPTION_ICACHE_ENABLED:
 156         config |= LM_CFG_ICACHE_ENABLED;
 157         break;
 158       case OPTION_DCACHE_ENABLED:
 159         config |= LM_CFG_DCACHE_ENABLED;
 160         break;
 161       case OPTION_BREAK_ENABLED:
 162         config |= LM_CFG_BREAK_ENABLED;
 163         break;
 164       case OPTION_ALL_ENABLED:
 165         config |= LM_CFG_MULTIPLIY_ENABLED;
 166         config |= LM_CFG_DIVIDE_ENABLED;
 167         config |= LM_CFG_BARREL_SHIFT_ENABLED;
 168         config |= LM_CFG_SIGN_EXTEND_ENABLED;
 169         config |= LM_CFG_USER_ENABLED;
 170         config |= LM_CFG_ICACHE_ENABLED;
 171         config |= LM_CFG_DCACHE_ENABLED;
 172         config |= LM_CFG_BREAK_ENABLED;
 173         break;
 174       default:
 175         return 0;
 176     }
 177   return 1;
 178 }
 179
 180 /* Do any architecture specific initialisation.  */
 181
 182 void
 183 md_begin (void)
 184 {
 185   /* Initialize the `cgen' interface.  */
 186
 187   /* Set the machine number and endian.  */
 188   gas_cgen_cpu_desc = lm32_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
 189                                            CGEN_CPU_OPEN_ENDIAN,
 190                                            CGEN_ENDIAN_BIG,
 191                                            CGEN_CPU_OPEN_END);
 192   lm32_cgen_init_asm (gas_cgen_cpu_desc);
 193
 194   /* This is a callback from cgen to gas to parse operands.  */
 195   cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
 196 }
 197
 198 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
 199    for use in the a.out file, and stores them in the array pointed to by buf. */
 200
 201 void
 202 md_number_to_chars (char * buf, valueT val, int n)
 203 {
 204   if (target_big_endian)
 205     number_to_chars_bigendian (buf, val, n);
 206   else
 207     number_to_chars_littleendian (buf, val, n);
 208 }
 209
 210 /* Turn a string in input_line_pointer into a floating point constant
 211    of type TYPE, and store the appropriate bytes in *LITP.  The number
 212    of LITTLENUMS emitted is stored in *SIZEP.  An error message is
 213    returned, or NULL on OK.  */
 214
 215 char *
 216 md_atof (int type, char *litP, int *sizeP)
 217 {
 218   int i;
 219   int prec;
 220   LITTLENUM_TYPE words[4];
 221
 222   char *t;
 223
 224   switch (type)
 225     {
 226     case 'f':
 227       prec = 2;
 228       break;
 229     case 'd':
 230       prec = 4;
 231       break;
 232     default:
 233       *sizeP = 0;
 234       return _("bad call to md_atof");
 235     }
 236
 237   t = atof_ieee (input_line_pointer, type, words);
 238   if (t)
 239     input_line_pointer = t;
 240
 241   *sizeP = prec * sizeof (LITTLENUM_TYPE);
 242
 243   if (target_big_endian)
 244     {
 245       for (i = 0; i < prec; i++)
 246         {
 247           md_number_to_chars (litP, (valueT) words[i],
 248                               sizeof (LITTLENUM_TYPE));
 249           litP += sizeof (LITTLENUM_TYPE);
 250         }
 251     }
 252   else
 253     {
 254       for (i = prec - 1; i >= 0; i--)
 255         {
 256           md_number_to_chars (litP, (valueT) words[i],
 257                               sizeof (LITTLENUM_TYPE));
 258           litP += sizeof (LITTLENUM_TYPE);
 259         }
 260     }
 261
 262   return NULL;
 263 }
 264
 265 /* Called for each undefined symbol. */
 266
 267 symbolS *
 268 md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
 269 {
 270   return 0;
 271 }
 272
 273 /* Round up a section size to the appropriate boundary.  */
 274
 275 valueT
 276 md_section_align (asection *seg, valueT addr)
 277 {
 278   int align = bfd_get_section_alignment (stdoutput, seg);
 279   return ((addr + (1 << align) - 1) & (-1 << align));
 280 }
 281
 282 /* This function assembles the instructions. It emits the frags/bytes to the
 283    sections and creates the relocation entries.  */
 284
 285 void
 286 md_assemble (char * str)
 287 {
 288   lm32_insn insn;
 289   char * errmsg;
 290
 291   /* Initialize GAS's cgen interface for a new instruction.  */
 292   gas_cgen_init_parse ();
 293
 294   insn.insn = lm32_cgen_assemble_insn
 295       (gas_cgen_cpu_desc, str, &insn.fields, insn.buffer, &errmsg);
 296
 297   if (!insn.insn)
 298     {
 299       as_bad ("%s", errmsg);
 300       return;
 301     }
 302
 303   gas_cgen_finish_insn (insn.insn, insn.buffer,
 304                         CGEN_FIELDS_BITSIZE (&insn.fields), 1, NULL);
 305 }
 306
 307 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
 308    Returns BFD_RELOC_NONE if no reloc type can be found.
 309    *FIXP may be modified if desired.  */
 310
 311 bfd_reloc_code_real_type
 312 md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
 313                       const CGEN_OPERAND *operand,
 314                       fixS *fixP ATTRIBUTE_UNUSED)
 315 {
 316   switch (operand->type)
 317     {
 318     case LM32_OPERAND_GOT16:
 319       return BFD_RELOC_LM32_16_GOT;
 320     case LM32_OPERAND_GOTOFFHI16:
 321       return BFD_RELOC_LM32_GOTOFF_HI16;
 322     case LM32_OPERAND_GOTOFFLO16:
 323       return BFD_RELOC_LM32_GOTOFF_LO16;
 324     case LM32_OPERAND_GP16:
 325       return BFD_RELOC_GPREL16;
 326     case LM32_OPERAND_LO16:
 327       return BFD_RELOC_LO16;
 328     case LM32_OPERAND_HI16:
 329       return BFD_RELOC_HI16;
 330     case LM32_OPERAND_BRANCH:
 331       return BFD_RELOC_LM32_BRANCH;
 332     case LM32_OPERAND_CALL:
 333       return BFD_RELOC_LM32_CALL;
 334     default:
 335       break;
 336     }
 337   return BFD_RELOC_NONE;
 338 }
 339
 340 /* Return the position from which the PC relative adjustment for a PC relative
 341    fixup should be made.  */
 342
 343 long
 344 md_pcrel_from (fixS *fixP)
 345 {
 346   /* Shouldn't get called.  */
 347   abort ();
 348   /* Return address of current instruction.  */
 349   return fixP->fx_where + fixP->fx_frag->fr_address;
 350 }
 351
 352 /* The location from which a PC relative jump should be calculated,
 353    given a PC relative reloc.  */
 354
 355 long
 356 md_pcrel_from_section (fixS * fixP, segT sec)
 357 {
 358   if ((fixP->fx_addsy != (symbolS *) NULL)
 359       && (! S_IS_DEFINED (fixP->fx_addsy)
 360           || (S_GET_SEGMENT (fixP->fx_addsy) != sec)))
 361     {
 362       /* The symbol is undefined (or is defined but not in this section).
 363          Let the linker figure it out.  */
 364       return 0;
 365     }
 366
 367   /*fprintf(stderr, "%s extern %d local %d\n", S_GET_NAME (fixP->fx_addsy), S_IS_EXTERN (fixP->fx_addsy), S_IS_LOCAL (fixP->fx_addsy));*/
 368   /* FIXME: Weak problem? */
 369   if ((fixP->fx_addsy != (symbolS *) NULL)
 370       && S_IS_EXTERNAL (fixP->fx_addsy))
 371     {
 372       /* If the symbol is external, let the linker handle it.  */
 373       return 0;
 374     }
 375
 376   return fixP->fx_where + fixP->fx_frag->fr_address;
 377 }
 378
 379 /* Return true if we can partially resolve a relocation now.  */
 380
 381 bfd_boolean
 382 lm32_fix_adjustable (fixS * fixP)
 383 {
 384   /* We need the symbol name for the VTABLE entries */
 385   if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
 386       || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
 387     return FALSE;
 388
 389   return TRUE;
 390 }
 391
 392 /* Relaxation isn't required/supported on this target.  */
 393
 394 int
 395 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
 396                                asection *seg ATTRIBUTE_UNUSED)
 397 {
 398   abort ();
 399   return 0;
 400 }
 401
 402 void
 403 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
 404                  asection *sec ATTRIBUTE_UNUSED,
 405                  fragS *fragP ATTRIBUTE_UNUSED)
 406 {
 407   abort ();
 408 }
 409
 410 void
 411 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
 412 {
 413   /* Fix for weak symbols. Why do we have fx_addsy for weak symbols?  */
 414   if (fixP->fx_addsy != NULL && S_IS_WEAK (fixP->fx_addsy))
 415     *valP = 0;
 416
 417   gas_cgen_md_apply_fix (fixP, valP, seg);
 418   return;
 419 }