opcodes/i386-init.h

   1 /* This file is automatically generated by i386-gen.  Do not edit!  */
   2 /* Copyright 2007, 2008  Free Software Foundation, Inc.
   3
   4    This file is part of the GNU opcodes library.
   5
   6    This library is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3, or (at your option)
   9    any later version.
  10
  11    It is distributed in the hope that it will be useful, but WITHOUT
  12    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  14    License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 #define CPU_UNKNOWN_FLAGS \
  22   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,  \
  23       1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } }
  24
  25 #define CPU_GENERIC32_FLAGS \
  26   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  27       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  28
  29 #define CPU_GENERIC64_FLAGS \
  30   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,  \
  31       0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
  32
  33 #define CPU_NONE_FLAGS \
  34   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  35       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  36
  37 #define CPU_I186_FLAGS \
  38   { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  39       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  40
  41 #define CPU_I286_FLAGS \
  42   { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  43       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  44
  45 #define CPU_I386_FLAGS \
  46   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  47       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  48
  49 #define CPU_I486_FLAGS \
  50   { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  51       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  52
  53 #define CPU_I586_FLAGS \
  54   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  55       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  56
  57 #define CPU_I686_FLAGS \
  58   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  59       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  60
  61 #define CPU_P2_FLAGS \
  62   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  63       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  64
  65 #define CPU_P3_FLAGS \
  66   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  67       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  68
  69 #define CPU_P4_FLAGS \
  70   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,  \
  71       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  72
  73 #define CPU_NOCONA_FLAGS \
  74   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0,  \
  75       0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
  76
  77 #define CPU_CORE_FLAGS \
  78   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0,  \
  79       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  80
  81 #define CPU_CORE2_FLAGS \
  82   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1,  \
  83       0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
  84
  85 #define CPU_K6_FLAGS \
  86   { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  87       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  88
  89 #define CPU_K6_2_FLAGS \
  90   { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,  \
  91       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  92
  93 #define CPU_ATHLON_FLAGS \
  94   { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0,  \
  95       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  96
  97 #define CPU_K8_FLAGS \
  98   { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,  \
  99       0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
 100
 101 #define CPU_AMDFAM10_FLAGS \
 102   { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,  \
 103       1, 1, 0, 0, 0, 0, 1, 0, 0, 0 } }
 104
 105 #define CPU_MMX_FLAGS \
 106   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
 107       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 108
 109 #define CPU_SSE_FLAGS \
 110   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
 111       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 112
 113 #define CPU_SSE2_FLAGS \
 114   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,  \
 115       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 116
 117 #define CPU_SSE3_FLAGS \
 118   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0,  \
 119       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 120
 121 #define CPU_SSSE3_FLAGS \
 122   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1,  \
 123       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 124
 125 #define CPU_SSE4_1_FLAGS \
 126   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1,  \
 127       0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }
 128
 129 #define CPU_SSE4_2_FLAGS \
 130   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1,  \
 131       0, 0, 1, 1, 0, 0, 0, 0, 0, 0 } }
 132
 133 #define CPU_VMX_FLAGS \
 134   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,  \
 135       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 136
 137 #define CPU_SMX_FLAGS \
 138   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,  \
 139       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 140
 141 #define CPU_XSAVE_FLAGS \
 142   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
 143       0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }
 144
 145 #define CPU_3DNOW_FLAGS \
 146   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,  \
 147       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 148
 149 #define CPU_3DNOWA_FLAGS \
 150   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0,  \
 151       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 152
 153 #define CPU_PADLOCK_FLAGS \
 154   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,  \
 155       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 156
 157 #define CPU_SVME_FLAGS \
 158   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,  \
 159       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 160
 161 #define CPU_SSE4A_FLAGS \
 162   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0,  \
 163       1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 164
 165 #define CPU_ABM_FLAGS \
 166   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
 167       0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } }
 168
 169 #define CPU_SSE5_FLAGS \
 170   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0,  \
 171       1, 1, 0, 0, 1, 0, 0, 0, 0, 0 } }
 172
 173
 174 #define OPERAND_TYPE_NONE \
 175   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 176       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 177       0, 0, 0 } }
 178
 179 #define OPERAND_TYPE_REG8 \
 180   { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 181       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 182       0, 0, 0 } }
 183
 184 #define OPERAND_TYPE_REG16 \
 185   { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 186       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 187       0, 0, 0 } }
 188
 189 #define OPERAND_TYPE_REG32 \
 190   { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 191       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 192       0, 0, 0 } }
 193
 194 #define OPERAND_TYPE_REG64 \
 195   { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 196       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 197       0, 0, 0 } }
 198
 199 #define OPERAND_TYPE_IMM1 \
 200   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
 201       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 202       0, 0, 0 } }
 203
 204 #define OPERAND_TYPE_IMM8 \
 205   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
 206       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 207       0, 0, 0 } }
 208
 209 #define OPERAND_TYPE_IMM8S \
 210   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
 211       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 212       0, 0, 0 } }
 213
 214 #define OPERAND_TYPE_IMM16 \
 215   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
 216       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 217       0, 0, 0 } }
 218
 219 #define OPERAND_TYPE_IMM32 \
 220   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
 221       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 222       0, 0, 0 } }
 223
 224 #define OPERAND_TYPE_IMM32S \
 225   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
 226       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 227       0, 0, 0 } }
 228
 229 #define OPERAND_TYPE_IMM64 \
 230   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
 231       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 232       0, 0, 0 } }
 233
 234 #define OPERAND_TYPE_BASEINDEX \
 235   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 236       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 237       0, 0, 0 } }
 238
 239 #define OPERAND_TYPE_DISP8 \
 240   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
 241       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 242       0, 0, 0 } }
 243
 244 #define OPERAND_TYPE_DISP16 \
 245   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 246       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 247       0, 0, 0 } }
 248
 249 #define OPERAND_TYPE_DISP32 \
 250   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 251       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 252       0, 0, 0 } }
 253
 254 #define OPERAND_TYPE_DISP32S \
 255   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 256       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 257       0, 0, 0 } }
 258
 259 #define OPERAND_TYPE_DISP64 \
 260   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 261       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 262       0, 0, 0 } }
 263
 264 #define OPERAND_TYPE_INOUTPORTREG \
 265   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 266       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 267       0, 0, 0 } }
 268
 269 #define OPERAND_TYPE_SHIFTCOUNT \
 270   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 271       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 272       0, 0, 0 } }
 273
 274 #define OPERAND_TYPE_CONTROL \
 275   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 276       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 277       0, 0, 0 } }
 278
 279 #define OPERAND_TYPE_TEST \
 280   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 281       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 282       0, 0, 0 } }
 283
 284 #define OPERAND_TYPE_DEBUG \
 285   { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 286       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 287       0, 0, 0 } }
 288
 289 #define OPERAND_TYPE_FLOATREG \
 290   { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 291       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 292       0, 0, 0 } }
 293
 294 #define OPERAND_TYPE_FLOATACC \
 295   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 296       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 297       0, 0, 0 } }
 298
 299 #define OPERAND_TYPE_SREG2 \
 300   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 301       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 302       0, 0, 0 } }
 303
 304 #define OPERAND_TYPE_SREG3 \
 305   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
 306       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 307       0, 0, 0 } }
 308
 309 #define OPERAND_TYPE_ACC \
 310   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 311       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 312       0, 0, 0 } }
 313
 314 #define OPERAND_TYPE_JUMPABSOLUTE \
 315   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 316       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 317       0, 0, 0 } }
 318
 319 #define OPERAND_TYPE_REGMMX \
 320   { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 321       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 322       0, 0, 0 } }
 323
 324 #define OPERAND_TYPE_REGXMM \
 325   { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 326       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 327       0, 0, 0 } }
 328
 329 #define OPERAND_TYPE_ESSEG \
 330   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 331       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 332       0, 0, 0 } }
 333
 334 #define OPERAND_TYPE_ACC32 \
 335   { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 336       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
 337       0, 0, 0 } }
 338
 339 #define OPERAND_TYPE_ACC64 \
 340   { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 341       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
 342       0, 0, 0 } }
 343
 344 #define OPERAND_TYPE_INOUTPORTREG \
 345   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 346       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 347       0, 0, 0 } }
 348
 349 #define OPERAND_TYPE_REG16_INOUTPORTREG \
 350   { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 351       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 352       0, 0, 0 } }
 353
 354 #define OPERAND_TYPE_DISP16_32 \
 355   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 356       1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 357       0, 0, 0 } }
 358
 359 #define OPERAND_TYPE_ANYDISP \
 360   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
 361       1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 362       0, 0, 0 } }
 363
 364 #define OPERAND_TYPE_IMM16_32 \
 365   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
 366       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 367       0, 0, 0 } }
 368
 369 #define OPERAND_TYPE_IMM16_32S \
 370   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
 371       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 372       0, 0, 0 } }
 373
 374 #define OPERAND_TYPE_IMM16_32_32S \
 375   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
 376       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 377       0, 0, 0 } }
 378
 379 #define OPERAND_TYPE_IMM32_32S_DISP32 \
 380   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
 381       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 382       0, 0, 0 } }
 383
 384 #define OPERAND_TYPE_IMM64_DISP64 \
 385   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
 386       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 387       0, 0, 0 } }
 388
 389 #define OPERAND_TYPE_IMM32_32S_64_DISP32 \
 390   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
 391       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 392       0, 0, 0 } }
 393
 394 #define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \
 395   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
 396       0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 397       0, 0, 0 } }