1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses
PARAMS ((int));
53 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
54 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
56 static void s_uacons
PARAMS ((int));
57 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
58 static unsigned int assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
59 static void little
PARAMS ((int));
60 static void big
PARAMS ((int));
61 static bfd_reloc_code_real_type sh_elf_suffix
62 PARAMS ((char **str_p
, expressionS
*, expressionS
*new_exp_p
));
63 static int parse_reg
PARAMS ((char *, int *, int *));
64 static symbolS
*dot
PARAMS ((void));
65 static char *parse_exp
PARAMS ((char *, sh_operand_info
*));
66 static char *parse_at
PARAMS ((char *, sh_operand_info
*));
67 static void get_operand
PARAMS ((char **, sh_operand_info
*));
68 static char *get_operands
69 PARAMS ((sh_opcode_info
*, char *, sh_operand_info
*));
70 static sh_opcode_info
*get_specific
71 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
72 static void insert
PARAMS ((char *, int, int, sh_operand_info
*));
73 static void build_relax
PARAMS ((sh_opcode_info
*, sh_operand_info
*));
74 static char *insert_loop_bounds
PARAMS ((char *, sh_operand_info
*));
75 static unsigned int build_Mytes
76 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
79 static void sh_elf_cons
PARAMS ((int));
81 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
86 int ignore ATTRIBUTE_UNUSED
;
88 if (! target_big_endian
)
89 as_bad (_("directive .big encountered when option -big required"));
91 /* Stop further messages. */
92 target_big_endian
= 1;
97 int ignore ATTRIBUTE_UNUSED
;
99 if (target_big_endian
)
100 as_bad (_("directive .little encountered when option -little required"));
102 /* Stop further messages. */
103 target_big_endian
= 0;
106 /* This table describes all the machine specific pseudo-ops the assembler
107 has to support. The fields are:
108 pseudo-op name without dot
109 function to call to execute this pseudo-op
110 Integer arg to pass to the function. */
112 const pseudo_typeS md_pseudo_table
[] =
115 {"long", sh_elf_cons
, 4},
116 {"int", sh_elf_cons
, 4},
117 {"word", sh_elf_cons
, 2},
118 {"short", sh_elf_cons
, 2},
124 {"form", listing_psize
, 0},
125 {"little", little
, 0},
126 {"heading", listing_title
, 0},
127 {"import", s_ignore
, 0},
128 {"page", listing_eject
, 0},
129 {"program", s_ignore
, 0},
131 {"uaword", s_uacons
, 2},
132 {"ualong", s_uacons
, 4},
133 {"uaquad", s_uacons
, 8},
134 {"2byte", s_uacons
, 2},
135 {"4byte", s_uacons
, 4},
136 {"8byte", s_uacons
, 8},
138 {"file", dwarf2_directive_file
, 0 },
139 {"loc", dwarf2_directive_loc
, 0 },
144 /*int md_reloc_size; */
146 int sh_relax
; /* set if -relax seen */
148 /* Whether -small was seen. */
152 /* Whether -dsp was seen. */
156 /* The bit mask of architectures that could
157 accomodate the insns seen so far. */
158 static int valid_arch
;
160 const char EXP_CHARS
[] = "eE";
162 /* Chars that mean this number is a floating point constant. */
165 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
167 #define C(a,b) ENCODE_RELAX(a,b)
169 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
170 #define GET_WHAT(x) ((x>>4))
172 /* These are the three types of relaxable instrction. */
174 #define COND_JUMP_DELAY 2
175 #define UNCOND_JUMP 3
182 #define UNDEF_WORD_DISP 4
187 /* Branch displacements are from the address of the branch plus
188 four, thus all minimum and maximum values have 4 added to them. */
191 #define COND8_LENGTH 2
193 /* There is one extra instruction before the branch, so we must add
194 two more bytes to account for it. */
195 #define COND12_F 4100
196 #define COND12_M -4090
197 #define COND12_LENGTH 6
199 #define COND12_DELAY_LENGTH 4
201 /* ??? The minimum and maximum values are wrong, but this does not matter
202 since this relocation type is not supported yet. */
203 #define COND32_F (1<<30)
204 #define COND32_M -(1<<30)
205 #define COND32_LENGTH 14
207 #define UNCOND12_F 4098
208 #define UNCOND12_M -4092
209 #define UNCOND12_LENGTH 2
211 /* ??? The minimum and maximum values are wrong, but this does not matter
212 since this relocation type is not supported yet. */
213 #define UNCOND32_F (1<<30)
214 #define UNCOND32_M -(1<<30)
215 #define UNCOND32_LENGTH 14
217 #define EMPTY { 0, 0, 0, 0 }
219 const relax_typeS md_relax_table
[C (END
, 0)] = {
220 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
221 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
224 /* C (COND_JUMP, COND8) */
225 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
226 /* C (COND_JUMP, COND12) */
227 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
228 /* C (COND_JUMP, COND32) */
229 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
230 /* C (COND_JUMP, UNDEF_WORD_DISP) */
231 { 0, 0, COND32_LENGTH
, 0, },
233 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
236 /* C (COND_JUMP_DELAY, COND8) */
237 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
238 /* C (COND_JUMP_DELAY, COND12) */
239 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
240 /* C (COND_JUMP_DELAY, COND32) */
241 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
242 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
243 { 0, 0, COND32_LENGTH
, 0, },
245 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
248 /* C (UNCOND_JUMP, UNCOND12) */
249 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
250 /* C (UNCOND_JUMP, UNCOND32) */
251 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
253 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
254 { 0, 0, UNCOND32_LENGTH
, 0, },
256 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
261 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
265 /* Parse @got, etc. and return the desired relocation.
266 If we have additional arithmetic expression, then we fill in new_exp_p. */
267 static bfd_reloc_code_real_type
268 sh_elf_suffix (str_p
, exp_p
, new_exp_p
)
270 expressionS
*exp_p
, *new_exp_p
;
275 bfd_reloc_code_real_type reloc
;
285 #define MAP(str,reloc) { str, sizeof (str)-1, reloc }
287 static struct map_bfd mapping
[] = {
288 MAP ("got", BFD_RELOC_32_GOT_PCREL
),
289 MAP ("plt", BFD_RELOC_32_PLT_PCREL
),
290 MAP ("gotoff", BFD_RELOC_32_GOTOFF
),
291 { (char *)0, 0, BFD_RELOC_UNUSED
}
295 return BFD_RELOC_UNUSED
;
297 for (ch
= *str
, str2
= ident
;
298 (str2
< ident
+ sizeof (ident
) - 1
299 && (ISALNUM (ch
) || ch
== '@'));
301 *str2
++ = TOLOWER (ch
);
307 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
308 if (ch
== ptr
->string
[0]
309 && len
== ptr
->length
310 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0)
312 /* Now check for identifier@suffix+constant */
313 if (*str
== '-' || *str
== '+')
315 char *orig_line
= input_line_pointer
;
317 input_line_pointer
= str
;
318 expression (new_exp_p
);
319 if (new_exp_p
->X_op
== O_constant
)
321 exp_p
->X_add_number
+= new_exp_p
->X_add_number
;
322 str
= input_line_pointer
;
324 if (new_exp_p
->X_op
== O_subtract
)
325 str
= input_line_pointer
;
327 if (&input_line_pointer
!= str_p
)
328 input_line_pointer
= orig_line
;
335 return BFD_RELOC_UNUSED
;
338 /* The regular cons() function, that reads constants, doesn't support
339 suffixes such as @GOT, @GOTOFF and @PLT, that generate
340 machine-specific relocation types. So we must define it here. */
341 /* Clobbers input_line_pointer, checks end-of-line. */
344 register int nbytes
; /* 1=.byte, 2=.word, 4=.long */
346 expressionS exp
, new_exp
;
347 bfd_reloc_code_real_type reloc
;
350 if (is_it_end_of_statement ())
352 demand_empty_rest_of_line ();
359 new_exp
.X_op
= O_absent
;
360 new_exp
.X_add_symbol
= new_exp
.X_op_symbol
= NULL
;
361 /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet,
362 use the name of the symbol to tell whether it's the
363 _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is
365 if (! GOT_symbol
&& exp
.X_add_symbol
)
366 name
= S_GET_NAME (exp
.X_add_symbol
);
369 /* Check whether this expression involves the
370 _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a
371 difference of two other symbols. */
372 if (((GOT_symbol
&& GOT_symbol
== exp
.X_add_symbol
)
373 || (! GOT_symbol
&& name
374 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0))
375 && (exp
.X_op
== O_symbol
376 || (exp
.X_op
== O_add
377 && ((symbol_get_value_expression (exp
.X_op_symbol
)->X_op
)
380 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
382 int size
= bfd_get_reloc_size (reloc_howto
);
384 if (GOT_symbol
== NULL
)
385 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
388 as_bad (_("%s relocations do not fit in %d bytes\n"),
389 reloc_howto
->name
, nbytes
);
392 register char *p
= frag_more ((int) nbytes
);
393 int offset
= nbytes
- size
;
395 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
,
396 size
, &exp
, 0, TC_RELOC_GLOBAL_OFFSET_TABLE
);
399 /* Check if this symbol involves one of the magic suffixes, such
400 as @GOT, @GOTOFF or @PLT, and determine which relocation type
402 else if ((exp
.X_op
== O_symbol
|| (exp
.X_op
== O_add
&& exp
.X_op_symbol
))
403 && *input_line_pointer
== '@'
404 && ((reloc
= sh_elf_suffix (&input_line_pointer
, &exp
, &new_exp
))
405 != BFD_RELOC_UNUSED
))
407 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
409 int size
= bfd_get_reloc_size (reloc_howto
);
411 /* Force a GOT to be generated. */
412 if (GOT_symbol
== NULL
)
413 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
416 as_bad (_("%s relocations do not fit in %d bytes\n"),
417 reloc_howto
->name
, nbytes
);
420 register char *p
= frag_more ((int) nbytes
);
421 int offset
= nbytes
- size
;
423 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
425 if (new_exp
.X_op
!= O_absent
)
426 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
427 &new_exp
, 0, BFD_RELOC_32
);
431 emit_expr (&exp
, (unsigned int) nbytes
);
433 while (*input_line_pointer
++ == ',');
435 input_line_pointer
--; /* Put terminator back into stream. */
436 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
438 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
441 demand_empty_rest_of_line ();
446 /* This function is called once, at assembler startup time. This should
447 set up all the tables, etc that the MD part of the assembler needs. */
452 sh_opcode_info
*opcode
;
453 char *prev_name
= "";
456 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
457 valid_arch
= target_arch
;
459 opcode_hash_control
= hash_new ();
461 /* Insert unique names into hash table. */
462 for (opcode
= sh_table
; opcode
->name
; opcode
++)
464 if (strcmp (prev_name
, opcode
->name
))
466 if (! (opcode
->arch
& target_arch
))
468 prev_name
= opcode
->name
;
469 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
473 /* Make all the opcodes with the same name point to the same
475 opcode
->name
= prev_name
;
482 static int reg_x
, reg_y
;
486 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
488 /* Try to parse a reg name. Return the number of chars consumed. */
491 parse_reg (src
, mode
, reg
)
496 char l0
= TOLOWER (src
[0]);
497 char l1
= l0
? TOLOWER (src
[1]) : 0;
499 /* We use ! IDENT_CHAR for the next character after the register name, to
500 make sure that we won't accidentally recognize a symbol name such as
501 'sram' or sr_ram as being a reference to the register 'sr'. */
507 if (src
[2] >= '0' && src
[2] <= '5'
508 && ! IDENT_CHAR ((unsigned char) src
[3]))
511 *reg
= 10 + src
[2] - '0';
515 if (l1
>= '0' && l1
<= '9'
516 && ! IDENT_CHAR ((unsigned char) src
[2]))
522 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
523 && ! IDENT_CHAR ((unsigned char) src
[7]))
530 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
535 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
546 if (! IDENT_CHAR ((unsigned char) src
[2]))
552 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
561 if (! IDENT_CHAR ((unsigned char) src
[2]))
567 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
575 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
576 && ! IDENT_CHAR ((unsigned char) src
[3]))
579 *reg
= 4 + (l1
- '0');
582 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
583 && ! IDENT_CHAR ((unsigned char) src
[3]))
586 *reg
= 6 + (l1
- '0');
589 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
590 && ! IDENT_CHAR ((unsigned char) src
[3]))
595 *reg
= n
| ((~n
& 2) << 1);
600 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[3]))
622 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
623 && ! IDENT_CHAR ((unsigned char) src
[2]))
626 *reg
= A_X0_NUM
+ l1
- '0';
630 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
631 && ! IDENT_CHAR ((unsigned char) src
[2]))
634 *reg
= A_Y0_NUM
+ l1
- '0';
638 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
639 && ! IDENT_CHAR ((unsigned char) src
[2]))
642 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
648 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
654 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
655 && ! IDENT_CHAR ((unsigned char) src
[3]))
661 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
662 && ! IDENT_CHAR ((unsigned char) src
[3]))
668 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
669 && ! IDENT_CHAR ((unsigned char) src
[3]))
675 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
676 && ! IDENT_CHAR ((unsigned char) src
[3]))
682 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
688 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
695 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
700 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
702 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
703 and use an uninitialized immediate. */
707 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
708 && ! IDENT_CHAR ((unsigned char) src
[3]))
713 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
714 && ! IDENT_CHAR ((unsigned char) src
[3]))
720 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
721 && ! IDENT_CHAR ((unsigned char) src
[4]))
723 if (TOLOWER (src
[3]) == 'l')
728 if (TOLOWER (src
[3]) == 'h')
734 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
735 && ! IDENT_CHAR ((unsigned char) src
[4]))
740 if (l0
== 'f' && l1
== 'r')
744 if (src
[3] >= '0' && src
[3] <= '5'
745 && ! IDENT_CHAR ((unsigned char) src
[4]))
748 *reg
= 10 + src
[3] - '0';
752 if (src
[2] >= '0' && src
[2] <= '9'
753 && ! IDENT_CHAR ((unsigned char) src
[3]))
756 *reg
= (src
[2] - '0');
760 if (l0
== 'd' && l1
== 'r')
764 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
765 && ! IDENT_CHAR ((unsigned char) src
[4]))
768 *reg
= 10 + src
[3] - '0';
772 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
773 && ! IDENT_CHAR ((unsigned char) src
[3]))
776 *reg
= (src
[2] - '0');
780 if (l0
== 'x' && l1
== 'd')
784 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
785 && ! IDENT_CHAR ((unsigned char) src
[4]))
788 *reg
= 11 + src
[3] - '0';
792 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
793 && ! IDENT_CHAR ((unsigned char) src
[3]))
796 *reg
= (src
[2] - '0') + 1;
800 if (l0
== 'f' && l1
== 'v')
802 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
808 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
809 && ! IDENT_CHAR ((unsigned char) src
[3]))
812 *reg
= (src
[2] - '0');
816 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
817 && TOLOWER (src
[3]) == 'l'
818 && ! IDENT_CHAR ((unsigned char) src
[4]))
824 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
825 && TOLOWER (src
[3]) == 'c'
826 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
832 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
833 && TOLOWER (src
[3]) == 'r'
834 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
848 /* JF: '.' is pseudo symbol with value of current location
849 in current segment. */
850 fake
= FAKE_LABEL_NAME
;
851 return symbol_new (fake
,
853 (valueT
) frag_now_fix (),
865 save
= input_line_pointer
;
866 input_line_pointer
= s
;
867 expression (&op
->immediate
);
868 if (op
->immediate
.X_op
== O_absent
)
869 as_bad (_("missing operand"));
870 new = input_line_pointer
;
871 input_line_pointer
= save
;
875 /* The many forms of operand:
878 @Rn Register indirect
891 pr, gbr, vbr, macl, mach
904 /* Must be predecrement. */
907 len
= parse_reg (src
, &mode
, &(op
->reg
));
909 as_bad (_("illegal register after @-"));
914 else if (src
[0] == '(')
916 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
919 len
= parse_reg (src
, &mode
, &(op
->reg
));
920 if (len
&& mode
== A_REG_N
)
925 as_bad (_("must be @(r0,...)"));
929 /* Now can be rn or gbr */
930 len
= parse_reg (src
, &mode
, &(op
->reg
));
935 else if (mode
== A_REG_N
)
937 op
->type
= A_IND_R0_REG_N
;
941 as_bad (_("syntax error in @(r0,...)"));
946 /* Must be an @(disp,.. thing) */
947 src
= parse_exp (src
, op
);
950 /* Now can be rn, gbr or pc */
951 len
= parse_reg (src
, &mode
, &op
->reg
);
956 op
->type
= A_DISP_REG_N
;
958 else if (mode
== A_GBR
)
960 op
->type
= A_DISP_GBR
;
962 else if (mode
== A_PC
)
964 /* Turn a plain @(4,pc) into @(.+4,pc). */
965 if (op
->immediate
.X_op
== O_constant
)
967 op
->immediate
.X_add_symbol
= dot();
968 op
->immediate
.X_op
= O_symbol
;
970 op
->type
= A_DISP_PC
;
974 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
979 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
984 as_bad (_("expecting )"));
990 src
+= parse_reg (src
, &mode
, &(op
->reg
));
992 as_bad (_("illegal register after @"));
999 l0
= TOLOWER (src
[0]);
1000 l1
= TOLOWER (src
[1]);
1002 if ((l0
== 'r' && l1
== '8')
1003 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1006 op
->type
= A_PMOD_N
;
1008 else if ( (l0
== 'r' && l1
== '9')
1009 || (l0
== 'i' && l1
== 'y'))
1012 op
->type
= A_PMODY_N
;
1024 get_operand (ptr
, op
)
1026 sh_operand_info
*op
;
1035 *ptr
= parse_exp (src
, op
);
1040 else if (src
[0] == '@')
1042 *ptr
= parse_at (src
, op
);
1045 len
= parse_reg (src
, &mode
, &(op
->reg
));
1054 /* Not a reg, the only thing left is a displacement. */
1055 *ptr
= parse_exp (src
, op
);
1056 op
->type
= A_DISP_PC
;
1062 get_operands (info
, args
, operand
)
1063 sh_opcode_info
*info
;
1065 sh_operand_info
*operand
;
1070 /* The pre-processor will eliminate whitespace in front of '@'
1071 after the first argument; we may be called multiple times
1072 from assemble_ppi, so don't insist on finding whitespace here. */
1076 get_operand (&ptr
, operand
+ 0);
1083 get_operand (&ptr
, operand
+ 1);
1084 /* ??? Hack: psha/pshl have a varying operand number depending on
1085 the type of the first operand. We handle this by having the
1086 three-operand version first and reducing the number of operands
1087 parsed to two if we see that the first operand is an immediate.
1088 This works because no insn with three operands has an immediate
1089 as first operand. */
1090 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1096 get_operand (&ptr
, operand
+ 2);
1100 operand
[2].type
= 0;
1105 operand
[1].type
= 0;
1106 operand
[2].type
= 0;
1111 operand
[0].type
= 0;
1112 operand
[1].type
= 0;
1113 operand
[2].type
= 0;
1118 /* Passed a pointer to a list of opcodes which use different
1119 addressing modes, return the opcode which matches the opcodes
1122 static sh_opcode_info
*
1123 get_specific (opcode
, operands
)
1124 sh_opcode_info
*opcode
;
1125 sh_operand_info
*operands
;
1127 sh_opcode_info
*this_try
= opcode
;
1128 char *name
= opcode
->name
;
1131 while (opcode
->name
)
1133 this_try
= opcode
++;
1134 if (this_try
->name
!= name
)
1136 /* We've looked so far down the table that we've run out of
1137 opcodes with the same name. */
1141 /* Look at both operands needed by the opcodes and provided by
1142 the user - since an arg test will often fail on the same arg
1143 again and again, we'll try and test the last failing arg the
1144 first on each opcode try. */
1145 for (n
= 0; this_try
->arg
[n
]; n
++)
1147 sh_operand_info
*user
= operands
+ n
;
1148 sh_arg_type arg
= this_try
->arg
[n
];
1160 if (user
->type
!= arg
)
1164 /* opcode needs r0 */
1165 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1169 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1173 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1181 case A_IND_R0_REG_N
:
1192 /* Opcode needs rn */
1193 if (user
->type
!= arg
)
1198 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1213 if (user
->type
!= arg
)
1218 if (user
->type
!= arg
)
1227 case A_IND_R0_REG_M
:
1230 /* Opcode needs rn */
1231 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1237 if (user
->type
!= DSP_REG_N
)
1259 if (user
->type
!= DSP_REG_N
)
1281 if (user
->type
!= DSP_REG_N
)
1303 if (user
->type
!= DSP_REG_N
)
1325 if (user
->type
!= DSP_REG_N
)
1347 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1351 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1355 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1359 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1363 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1373 /* Opcode needs rn */
1374 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1379 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1384 if (user
->type
!= XMTRX_M4
)
1390 printf (_("unhandled %d\n"), arg
);
1394 if ( !(valid_arch
& this_try
->arch
))
1396 valid_arch
&= this_try
->arch
;
1406 insert (where
, how
, pcrel
, op
)
1410 sh_operand_info
*op
;
1412 fix_new_exp (frag_now
,
1413 where
- frag_now
->fr_literal
,
1421 build_relax (opcode
, op
)
1422 sh_opcode_info
*opcode
;
1423 sh_operand_info
*op
;
1425 int high_byte
= target_big_endian
? 0 : 1;
1428 if (opcode
->arg
[0] == A_BDISP8
)
1430 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1431 p
= frag_var (rs_machine_dependent
,
1432 md_relax_table
[C (what
, COND32
)].rlx_length
,
1433 md_relax_table
[C (what
, COND8
)].rlx_length
,
1435 op
->immediate
.X_add_symbol
,
1436 op
->immediate
.X_add_number
,
1438 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1440 else if (opcode
->arg
[0] == A_BDISP12
)
1442 p
= frag_var (rs_machine_dependent
,
1443 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1444 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1446 op
->immediate
.X_add_symbol
,
1447 op
->immediate
.X_add_number
,
1449 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1454 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1457 insert_loop_bounds (output
, operand
)
1459 sh_operand_info
*operand
;
1464 /* Since the low byte of the opcode will be overwritten by the reloc, we
1465 can just stash the high byte into both bytes and ignore endianness. */
1468 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1469 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1473 static int count
= 0;
1475 /* If the last loop insn is a two-byte-insn, it is in danger of being
1476 swapped with the insn after it. To prevent this, create a new
1477 symbol - complete with SH_LABEL reloc - after the last loop insn.
1478 If the last loop insn is four bytes long, the symbol will be
1479 right in the middle, but four byte insns are not swapped anyways. */
1480 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1481 Hence a 9 digit number should be enough to count all REPEATs. */
1483 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1484 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1485 /* Make this a local symbol. */
1487 SF_SET_LOCAL (end_sym
);
1488 #endif /* OBJ_COFF */
1489 symbol_table_insert (end_sym
);
1490 end_sym
->sy_value
= operand
[1].immediate
;
1491 end_sym
->sy_value
.X_add_number
+= 2;
1492 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1495 output
= frag_more (2);
1498 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1499 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1501 return frag_more (2);
1504 /* Now we know what sort of opcodes it is, let's build the bytes. */
1507 build_Mytes (opcode
, operand
)
1508 sh_opcode_info
*opcode
;
1509 sh_operand_info
*operand
;
1513 char *output
= frag_more (2);
1514 unsigned int size
= 2;
1515 int low_byte
= target_big_endian
? 1 : 0;
1521 for (index
= 0; index
< 4; index
++)
1523 sh_nibble_type i
= opcode
->nibbles
[index
];
1533 nbuf
[index
] = reg_n
;
1536 nbuf
[index
] = reg_m
;
1539 if (reg_n
< 2 || reg_n
> 5)
1540 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1541 nbuf
[index
] = (reg_n
& 3) | 4;
1544 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1547 nbuf
[index
] = reg_b
| 0x08;
1550 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1553 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1556 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1559 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1562 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1565 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1568 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1571 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1574 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1577 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1580 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1583 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1586 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1589 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1592 output
= insert_loop_bounds (output
, operand
);
1593 nbuf
[index
] = opcode
->nibbles
[3];
1597 printf (_("failed for %d\n"), i
);
1601 if (!target_big_endian
)
1603 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1604 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1608 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1609 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1614 /* Find an opcode at the start of *STR_P in the hash table, and set
1615 *STR_P to the first character after the last one read. */
1617 static sh_opcode_info
*
1618 find_cooked_opcode (str_p
)
1622 unsigned char *op_start
;
1623 unsigned char *op_end
;
1627 /* Drop leading whitespace. */
1631 /* Find the op code end.
1632 The pre-processor will eliminate whitespace in front of
1633 any '@' after the first argument; we may be called from
1634 assemble_ppi, so the opcode might be terminated by an '@'. */
1635 for (op_start
= op_end
= (unsigned char *) (str
);
1638 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1641 unsigned char c
= op_start
[nlen
];
1643 /* The machine independent code will convert CMP/EQ into cmp/EQ
1644 because it thinks the '/' is the end of the symbol. Moreover,
1645 all but the first sub-insn is a parallel processing insn won't
1646 be capitalized. Instead of hacking up the machine independent
1647 code, we just deal with it here. */
1657 as_bad (_("can't find opcode "));
1659 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1662 /* Assemble a parallel processing insn. */
1663 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1666 assemble_ppi (op_end
, opcode
)
1668 sh_opcode_info
*opcode
;
1678 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1679 Make sure we encode a defined insn pattern. */
1685 sh_operand_info operand
[3];
1687 if (opcode
->arg
[0] != A_END
)
1688 op_end
= get_operands (opcode
, op_end
, operand
);
1689 opcode
= get_specific (opcode
, operand
);
1692 /* Couldn't find an opcode which matched the operands. */
1693 char *where
= frag_more (2);
1698 as_bad (_("invalid operands for opcode"));
1702 if (opcode
->nibbles
[0] != PPI
)
1703 as_bad (_("insn can't be combined with parallel processing insn"));
1705 switch (opcode
->nibbles
[1])
1710 as_bad (_("multiple movx specifications"));
1715 as_bad (_("multiple movy specifications"));
1721 as_bad (_("multiple movx specifications"));
1722 if (reg_n
< 4 || reg_n
> 5)
1723 as_bad (_("invalid movx address register"));
1724 if (opcode
->nibbles
[2] & 8)
1726 if (reg_m
== A_A1_NUM
)
1728 else if (reg_m
!= A_A0_NUM
)
1729 as_bad (_("invalid movx dsp register"));
1734 as_bad (_("invalid movx dsp register"));
1737 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1742 as_bad (_("multiple movy specifications"));
1743 if (opcode
->nibbles
[2] & 8)
1745 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1748 if (reg_m
== A_A1_NUM
)
1750 else if (reg_m
!= A_A0_NUM
)
1751 as_bad (_("invalid movy dsp register"));
1756 as_bad (_("invalid movy dsp register"));
1759 if (reg_n
< 6 || reg_n
> 7)
1760 as_bad (_("invalid movy address register"));
1761 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1765 if (operand
[0].immediate
.X_op
!= O_constant
)
1766 as_bad (_("dsp immediate shift value not constant"));
1767 field_b
= ((opcode
->nibbles
[2] << 12)
1768 | (operand
[0].immediate
.X_add_number
& 127) << 4
1773 as_bad (_("multiple parallel processing specifications"));
1774 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1775 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1779 as_bad (_("multiple condition specifications"));
1780 cond
= opcode
->nibbles
[2] << 8;
1782 goto skip_cond_check
;
1786 as_bad (_("multiple parallel processing specifications"));
1787 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1788 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1794 if ((field_b
& 0xef00) != 0xa100)
1795 as_bad (_("insn cannot be combined with pmuls"));
1797 switch (field_b
& 0xf)
1800 field_b
+= 0 - A_X0_NUM
;
1803 field_b
+= 1 - A_Y0_NUM
;
1806 field_b
+= 2 - A_A0_NUM
;
1809 field_b
+= 3 - A_A1_NUM
;
1812 as_bad (_("bad padd / psub pmuls output operand"));
1815 field_b
+= 0x4000 + reg_efg
;
1822 as_bad (_("condition not followed by conditionalizable insn"));
1828 opcode
= find_cooked_opcode (&op_end
);
1832 (_("unrecognized characters at end of parallel processing insn")));
1837 move_code
= movx
| movy
;
1840 /* Parallel processing insn. */
1841 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1843 output
= frag_more (4);
1845 if (! target_big_endian
)
1847 output
[3] = ppi_code
>> 8;
1848 output
[2] = ppi_code
;
1852 output
[2] = ppi_code
>> 8;
1853 output
[3] = ppi_code
;
1855 move_code
|= 0xf800;
1859 /* Just a double data transfer. */
1860 output
= frag_more (2);
1863 if (! target_big_endian
)
1865 output
[1] = move_code
>> 8;
1866 output
[0] = move_code
;
1870 output
[0] = move_code
>> 8;
1871 output
[1] = move_code
;
1876 /* This is the guts of the machine-dependent assembler. STR points to a
1877 machine dependent instruction. This function is supposed to emit
1878 the frags/bytes it assembles to. */
1884 unsigned char *op_end
;
1885 sh_operand_info operand
[3];
1886 sh_opcode_info
*opcode
;
1887 unsigned int size
= 0;
1889 opcode
= find_cooked_opcode (&str
);
1894 as_bad (_("unknown opcode"));
1899 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1901 /* Output a CODE reloc to tell the linker that the following
1902 bytes are instructions, not data. */
1903 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1905 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1908 if (opcode
->nibbles
[0] == PPI
)
1910 size
= assemble_ppi (op_end
, opcode
);
1914 if (opcode
->arg
[0] == A_BDISP12
1915 || opcode
->arg
[0] == A_BDISP8
)
1917 parse_exp (op_end
+ 1, &operand
[0]);
1918 build_relax (opcode
, &operand
[0]);
1922 if (opcode
->arg
[0] == A_END
)
1924 /* Ignore trailing whitespace. If there is any, it has already
1925 been compressed to a single space. */
1931 op_end
= get_operands (opcode
, op_end
, operand
);
1933 opcode
= get_specific (opcode
, operand
);
1937 /* Couldn't find an opcode which matched the operands. */
1938 char *where
= frag_more (2);
1943 as_bad (_("invalid operands for opcode"));
1948 as_bad (_("excess operands: '%s'"), op_end
);
1950 size
= build_Mytes (opcode
, operand
);
1955 #ifdef BFD_ASSEMBLER
1956 dwarf2_emit_insn (size
);
1960 /* This routine is called each time a label definition is seen. It
1961 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1966 static fragS
*last_label_frag
;
1967 static int last_label_offset
;
1970 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1974 offset
= frag_now_fix ();
1975 if (frag_now
!= last_label_frag
1976 || offset
!= last_label_offset
)
1978 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1979 last_label_frag
= frag_now
;
1980 last_label_offset
= offset
;
1985 /* This routine is called when the assembler is about to output some
1986 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1989 sh_flush_pending_output ()
1992 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1994 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1996 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2001 md_undefined_symbol (name
)
2005 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we
2006 have no need to default values of symbols. */
2007 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2011 if (symbol_find (name
))
2012 as_bad ("GOT already in the symbol table");
2014 GOT_symbol
= symbol_new (name
, undefined_section
,
2015 (valueT
)0, & zero_address_frag
);
2020 #endif /* OBJ_ELF */
2026 #ifndef BFD_ASSEMBLER
2029 tc_crawl_symbol_chain (headers
)
2030 object_headers
*headers
;
2032 printf (_("call to tc_crawl_symbol_chain \n"));
2036 tc_headers_hook (headers
)
2037 object_headers
*headers
;
2039 printf (_("call to tc_headers_hook \n"));
2045 /* Various routines to kill one day. */
2046 /* Equal to MAX_PRECISION in atof-ieee.c. */
2047 #define MAX_LITTLENUMS 6
2049 /* Turn a string in input_line_pointer into a floating point constant
2050 of type TYPE, and store the appropriate bytes in *LITP. The number
2051 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2052 returned, or NULL on OK. */
2055 md_atof (type
, litP
, sizeP
)
2061 LITTLENUM_TYPE words
[4];
2077 return _("bad call to md_atof");
2080 t
= atof_ieee (input_line_pointer
, type
, words
);
2082 input_line_pointer
= t
;
2086 if (! target_big_endian
)
2088 for (i
= prec
- 1; i
>= 0; i
--)
2090 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2096 for (i
= 0; i
< prec
; i
++)
2098 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2106 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2107 call instruction. It refers to a label of the instruction which
2108 loads the register which the call uses. We use it to generate a
2109 special reloc for the linker. */
2113 int ignore ATTRIBUTE_UNUSED
;
2118 as_warn (_(".uses pseudo-op seen when not relaxing"));
2122 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2124 as_bad (_("bad .uses format"));
2125 ignore_rest_of_line ();
2129 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2131 demand_empty_rest_of_line ();
2134 CONST
char *md_shortopts
= "";
2135 struct option md_longopts
[] =
2137 #define OPTION_RELAX (OPTION_MD_BASE)
2138 #define OPTION_BIG (OPTION_MD_BASE + 1)
2139 #define OPTION_LITTLE (OPTION_BIG + 1)
2140 #define OPTION_SMALL (OPTION_LITTLE + 1)
2141 #define OPTION_DSP (OPTION_SMALL + 1)
2143 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2144 {"big", no_argument
, NULL
, OPTION_BIG
},
2145 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2146 {"small", no_argument
, NULL
, OPTION_SMALL
},
2147 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2148 {NULL
, no_argument
, NULL
, 0}
2150 size_t md_longopts_size
= sizeof (md_longopts
);
2153 md_parse_option (c
, arg
)
2155 char *arg ATTRIBUTE_UNUSED
;
2164 target_big_endian
= 1;
2168 target_big_endian
= 0;
2187 md_show_usage (stream
)
2190 fprintf (stream
, _("\
2192 -little generate little endian code\n\
2193 -big generate big endian code\n\
2194 -relax alter jump instructions for long displacements\n\
2195 -small align sections to 4 byte boundaries, not 16\n\
2196 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2199 /* This struct is used to pass arguments to sh_count_relocs through
2200 bfd_map_over_sections. */
2202 struct sh_count_relocs
2204 /* Symbol we are looking for. */
2206 /* Count of relocs found. */
2210 /* Count the number of fixups in a section which refer to a particular
2211 symbol. When using BFD_ASSEMBLER, this is called via
2212 bfd_map_over_sections. */
2215 sh_count_relocs (abfd
, sec
, data
)
2216 bfd
*abfd ATTRIBUTE_UNUSED
;
2220 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2221 segment_info_type
*seginfo
;
2225 seginfo
= seg_info (sec
);
2226 if (seginfo
== NULL
)
2230 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2232 if (fix
->fx_addsy
== sym
)
2240 /* Handle the count relocs for a particular section. When using
2241 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2244 sh_frob_section (abfd
, sec
, ignore
)
2245 bfd
*abfd ATTRIBUTE_UNUSED
;
2247 PTR ignore ATTRIBUTE_UNUSED
;
2249 segment_info_type
*seginfo
;
2252 seginfo
= seg_info (sec
);
2253 if (seginfo
== NULL
)
2256 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2261 struct sh_count_relocs info
;
2263 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2266 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2267 symbol in the same section. */
2268 sym
= fix
->fx_addsy
;
2270 || fix
->fx_subsy
!= NULL
2271 || fix
->fx_addnumber
!= 0
2272 || S_GET_SEGMENT (sym
) != sec
2273 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2274 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2276 || S_IS_EXTERNAL (sym
))
2278 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2279 _(".uses does not refer to a local symbol in the same section"));
2283 /* Look through the fixups again, this time looking for one
2284 at the same location as sym. */
2285 val
= S_GET_VALUE (sym
);
2286 for (fscan
= seginfo
->fix_root
;
2288 fscan
= fscan
->fx_next
)
2289 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2290 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2291 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2292 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2293 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2297 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2298 _("can't find fixup pointed to by .uses"));
2302 if (fscan
->fx_tcbit
)
2304 /* We've already done this one. */
2308 /* The variable fscan should also be a fixup to a local symbol
2309 in the same section. */
2310 sym
= fscan
->fx_addsy
;
2312 || fscan
->fx_subsy
!= NULL
2313 || fscan
->fx_addnumber
!= 0
2314 || S_GET_SEGMENT (sym
) != sec
2315 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2316 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2318 || S_IS_EXTERNAL (sym
))
2320 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2321 _(".uses target does not refer to a local symbol in the same section"));
2325 /* Now we look through all the fixups of all the sections,
2326 counting the number of times we find a reference to sym. */
2329 #ifdef BFD_ASSEMBLER
2330 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2335 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2336 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2343 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2344 We have already adjusted the value of sym to include the
2345 fragment address, so we undo that adjustment here. */
2346 subseg_change (sec
, 0);
2347 fix_new (fscan
->fx_frag
,
2348 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
2349 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2353 /* This function is called after the symbol table has been completed,
2354 but before the relocs or section contents have been written out.
2355 If we have seen any .uses pseudo-ops, they point to an instruction
2356 which loads a register with the address of a function. We look
2357 through the fixups to find where the function address is being
2358 loaded from. We then generate a COUNT reloc giving the number of
2359 times that function address is referred to. The linker uses this
2360 information when doing relaxing, to decide when it can eliminate
2361 the stored function address entirely. */
2369 #ifdef BFD_ASSEMBLER
2370 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2375 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2376 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2381 /* Called after relaxing. Set the correct sizes of the fragments, and
2382 create relocs so that md_apply_fix3 will fill in the correct values. */
2385 md_convert_frag (headers
, seg
, fragP
)
2386 #ifdef BFD_ASSEMBLER
2387 bfd
*headers ATTRIBUTE_UNUSED
;
2389 object_headers
*headers
;
2396 switch (fragP
->fr_subtype
)
2398 case C (COND_JUMP
, COND8
):
2399 case C (COND_JUMP_DELAY
, COND8
):
2400 subseg_change (seg
, 0);
2401 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2402 1, BFD_RELOC_SH_PCDISP8BY2
);
2407 case C (UNCOND_JUMP
, UNCOND12
):
2408 subseg_change (seg
, 0);
2409 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2410 1, BFD_RELOC_SH_PCDISP12BY2
);
2415 case C (UNCOND_JUMP
, UNCOND32
):
2416 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2417 if (fragP
->fr_symbol
== NULL
)
2418 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2419 _("displacement overflows 12-bit field"));
2420 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2421 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2422 _("displacement to defined symbol %s overflows 12-bit field"),
2423 S_GET_NAME (fragP
->fr_symbol
));
2425 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2426 _("displacement to undefined symbol %s overflows 12-bit field"),
2427 S_GET_NAME (fragP
->fr_symbol
));
2428 /* Stabilize this frag, so we don't trip an assert. */
2429 fragP
->fr_fix
+= fragP
->fr_var
;
2433 case C (COND_JUMP
, COND12
):
2434 case C (COND_JUMP_DELAY
, COND12
):
2435 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2436 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2437 was due to gas incorrectly relaxing an out-of-range conditional
2438 branch with delay slot. It turned:
2439 bf.s L6 (slot mov.l r12,@(44,r0))
2442 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2444 32: 10 cb mov.l r12,@(44,r0)
2445 Therefore, branches with delay slots have to be handled
2446 differently from ones without delay slots. */
2448 unsigned char *buffer
=
2449 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2450 int highbyte
= target_big_endian
? 0 : 1;
2451 int lowbyte
= target_big_endian
? 1 : 0;
2452 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2454 /* Toggle the true/false bit of the bcond. */
2455 buffer
[highbyte
] ^= 0x2;
2457 /* If this is a delayed branch, we may not put the bra in the
2458 slot. So we change it to a non-delayed branch, like that:
2459 b! cond slot_label; bra disp; slot_label: slot_insn
2460 ??? We should try if swapping the conditional branch and
2461 its delay-slot insn already makes the branch reach. */
2463 /* Build a relocation to six / four bytes farther on. */
2464 subseg_change (seg
, 0);
2465 fix_new (fragP
, fragP
->fr_fix
, 2,
2466 #ifdef BFD_ASSEMBLER
2467 section_symbol (seg
),
2469 seg_info (seg
)->dot
,
2471 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2472 1, BFD_RELOC_SH_PCDISP8BY2
);
2474 /* Set up a jump instruction. */
2475 buffer
[highbyte
+ 2] = 0xa0;
2476 buffer
[lowbyte
+ 2] = 0;
2477 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2478 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2482 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2487 /* Fill in a NOP instruction. */
2488 buffer
[highbyte
+ 4] = 0x0;
2489 buffer
[lowbyte
+ 4] = 0x9;
2498 case C (COND_JUMP
, COND32
):
2499 case C (COND_JUMP_DELAY
, COND32
):
2500 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2501 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2502 if (fragP
->fr_symbol
== NULL
)
2503 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2504 _("displacement overflows 8-bit field"));
2505 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2506 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2507 _("displacement to defined symbol %s overflows 8-bit field"),
2508 S_GET_NAME (fragP
->fr_symbol
));
2510 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2511 _("displacement to undefined symbol %s overflows 8-bit field "),
2512 S_GET_NAME (fragP
->fr_symbol
));
2513 /* Stabilize this frag, so we don't trip an assert. */
2514 fragP
->fr_fix
+= fragP
->fr_var
;
2522 if (donerelax
&& !sh_relax
)
2523 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2524 _("overflow in branch to %s; converted into longer instruction sequence"),
2525 (fragP
->fr_symbol
!= NULL
2526 ? S_GET_NAME (fragP
->fr_symbol
)
2531 md_section_align (seg
, size
)
2532 segT seg ATTRIBUTE_UNUSED
;
2535 #ifdef BFD_ASSEMBLER
2538 #else /* ! OBJ_ELF */
2539 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2540 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2541 #endif /* ! OBJ_ELF */
2542 #else /* ! BFD_ASSEMBLER */
2543 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2544 & (-1 << section_alignment
[(int) seg
]));
2545 #endif /* ! BFD_ASSEMBLER */
2548 /* This static variable is set by s_uacons to tell sh_cons_align that
2549 the expession does not need to be aligned. */
2551 static int sh_no_align_cons
= 0;
2553 /* This handles the unaligned space allocation pseudo-ops, such as
2554 .uaword. .uaword is just like .word, but the value does not need
2561 /* Tell sh_cons_align not to align this value. */
2562 sh_no_align_cons
= 1;
2566 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2567 aligned correctly. Note that this can cause warnings to be issued
2568 when assembling initialized structured which were declared with the
2569 packed attribute. FIXME: Perhaps we should require an option to
2570 enable this warning? */
2573 sh_cons_align (nbytes
)
2579 if (sh_no_align_cons
)
2581 /* This is an unaligned pseudo-op. */
2582 sh_no_align_cons
= 0;
2587 while ((nbytes
& 1) == 0)
2596 if (now_seg
== absolute_section
)
2598 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2599 as_warn (_("misaligned data"));
2603 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
2604 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2606 record_alignment (now_seg
, nalign
);
2609 /* When relaxing, we need to output a reloc for any .align directive
2610 that requests alignment to a four byte boundary or larger. This is
2611 also where we check for misaligned data. */
2614 sh_handle_align (frag
)
2617 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
2619 if (frag
->fr_type
== rs_align_code
)
2621 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2622 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2624 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
2633 if (target_big_endian
)
2635 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
2636 frag
->fr_var
= sizeof big_nop_pattern
;
2640 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
2641 frag
->fr_var
= sizeof little_nop_pattern
;
2644 else if (frag
->fr_type
== rs_align_test
)
2647 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2651 && (frag
->fr_type
== rs_align
2652 || frag
->fr_type
== rs_align_code
)
2653 && frag
->fr_address
+ frag
->fr_fix
> 0
2654 && frag
->fr_offset
> 1
2655 && now_seg
!= bss_section
)
2656 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2657 BFD_RELOC_SH_ALIGN
);
2660 /* This macro decides whether a particular reloc is an entry in a
2661 switch table. It is used when relaxing, because the linker needs
2662 to know about all such entries so that it can adjust them if
2665 #ifdef BFD_ASSEMBLER
2666 #define SWITCH_TABLE_CONS(fix) (0)
2668 #define SWITCH_TABLE_CONS(fix) \
2669 ((fix)->fx_r_type == 0 \
2670 && ((fix)->fx_size == 2 \
2671 || (fix)->fx_size == 1 \
2672 || (fix)->fx_size == 4))
2675 #define SWITCH_TABLE(fix) \
2676 ((fix)->fx_addsy != NULL \
2677 && (fix)->fx_subsy != NULL \
2678 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2679 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2680 && ((fix)->fx_r_type == BFD_RELOC_32 \
2681 || (fix)->fx_r_type == BFD_RELOC_16 \
2682 || (fix)->fx_r_type == BFD_RELOC_8 \
2683 || SWITCH_TABLE_CONS (fix)))
2685 /* See whether we need to force a relocation into the output file.
2686 This is used to force out switch and PC relative relocations when
2690 sh_force_relocation (fix
)
2694 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2695 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2696 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2697 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2703 return (fix
->fx_pcrel
2704 || SWITCH_TABLE (fix
)
2705 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2706 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2707 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2708 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2709 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2714 sh_fix_adjustable (fixP
)
2718 if (fixP
->fx_addsy
== NULL
)
2721 if (fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
2722 || fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
2723 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
2724 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
2725 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
2726 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH16
2727 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH32
)
2730 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP
)
2731 || fixP
->fx_r_type
== BFD_RELOC_32_GOTOFF
2732 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
2735 /* We need the symbol name for the VTABLE entries */
2736 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2737 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2744 sh_elf_final_processing ()
2748 /* Set file-specific flags to indicate if this code needs
2749 a processor with the sh-dsp / sh3e ISA to execute. */
2750 if (valid_arch
& arch_sh1
)
2752 else if (valid_arch
& arch_sh2
)
2754 else if (valid_arch
& arch_sh_dsp
)
2756 else if (valid_arch
& arch_sh3
)
2758 else if (valid_arch
& arch_sh3_dsp
)
2760 else if (valid_arch
& arch_sh3e
)
2762 else if (valid_arch
& arch_sh4
)
2767 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2768 elf_elfheader (stdoutput
)->e_flags
|= val
;
2772 /* Apply a fixup to the object file. */
2775 md_apply_fix3 (fixP
, valP
, seg
)
2778 segT seg ATTRIBUTE_UNUSED
;
2780 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2781 int lowbyte
= target_big_endian
? 1 : 0;
2782 int highbyte
= target_big_endian
? 0 : 1;
2783 long val
= * (long *) valP
;
2787 #ifdef BFD_ASSEMBLER
2788 /* A difference between two symbols, the second of which is in the
2789 current section, is transformed in a PC-relative relocation to
2790 the other symbol. We have to adjust the relocation type here. */
2793 switch (fixP
->fx_r_type
)
2799 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2802 /* Currently, we only support 32-bit PCREL relocations.
2803 We'd need a new reloc type to handle 16_PCREL, and
2804 8_PCREL is already taken for R_SH_SWITCH8, which
2805 apparently does something completely different than what
2808 bfd_set_error (bfd_error_bad_value
);
2812 bfd_set_error (bfd_error_bad_value
);
2817 /* The function adjust_reloc_syms won't convert a reloc against a weak
2818 symbol into a reloc against a section, but bfd_install_relocation
2819 will screw up if the symbol is defined, so we have to adjust val here
2820 to avoid the screw up later.
2822 For ordinary relocs, this does not happen for ELF, since for ELF,
2823 bfd_install_relocation uses the "special function" field of the
2824 howto, and does not execute the code that needs to be undone, as long
2825 as the special function does not return bfd_reloc_continue.
2826 It can happen for GOT- and PLT-type relocs the way they are
2827 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
2828 doesn't matter here since those relocs don't use VAL; see below. */
2829 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
2830 && fixP
->fx_addsy
!= NULL
2831 && S_IS_WEAK (fixP
->fx_addsy
))
2832 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2835 #ifndef BFD_ASSEMBLER
2836 if (fixP
->fx_r_type
== 0)
2838 if (fixP
->fx_size
== 2)
2839 fixP
->fx_r_type
= BFD_RELOC_16
;
2840 else if (fixP
->fx_size
== 4)
2841 fixP
->fx_r_type
= BFD_RELOC_32
;
2842 else if (fixP
->fx_size
== 1)
2843 fixP
->fx_r_type
= BFD_RELOC_8
;
2851 switch (fixP
->fx_r_type
)
2853 case BFD_RELOC_SH_IMM4
:
2855 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2858 case BFD_RELOC_SH_IMM4BY2
:
2861 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2864 case BFD_RELOC_SH_IMM4BY4
:
2867 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2870 case BFD_RELOC_SH_IMM8BY2
:
2876 case BFD_RELOC_SH_IMM8BY4
:
2883 case BFD_RELOC_SH_IMM8
:
2884 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2885 sometimes it is not (e.g., and). We permit any 8 bit value.
2886 Note that adding further restrictions may invalidate
2887 reasonable looking assembly code, such as ``and -0x1,r0''. */
2893 case BFD_RELOC_SH_PCRELIMM8BY4
:
2894 /* The lower two bits of the PC are cleared before the
2895 displacement is added in. We can assume that the destination
2896 is on a 4 byte bounday. If this instruction is also on a 4
2897 byte boundary, then we want
2899 and target - here is a multiple of 4.
2900 Otherwise, we are on a 2 byte boundary, and we want
2901 (target - (here - 2)) / 4
2902 and target - here is not a multiple of 4. Computing
2903 (target - (here - 2)) / 4 == (target - here + 2) / 4
2904 works for both cases, since in the first case the addition of
2905 2 will be removed by the division. target - here is in the
2907 val
= (val
+ 2) / 4;
2909 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2913 case BFD_RELOC_SH_PCRELIMM8BY2
:
2916 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2920 case BFD_RELOC_SH_PCDISP8BY2
:
2922 if (val
< -0x80 || val
> 0x7f)
2923 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2927 case BFD_RELOC_SH_PCDISP12BY2
:
2929 if (val
< -0x800 || val
> 0x7ff)
2930 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2931 buf
[lowbyte
] = val
& 0xff;
2932 buf
[highbyte
] |= (val
>> 8) & 0xf;
2936 case BFD_RELOC_32_PCREL
:
2937 md_number_to_chars (buf
, val
, 4);
2941 md_number_to_chars (buf
, val
, 2);
2944 case BFD_RELOC_SH_USES
:
2945 /* Pass the value into sh_coff_reloc_mangle. */
2946 fixP
->fx_addnumber
= val
;
2949 case BFD_RELOC_SH_COUNT
:
2950 case BFD_RELOC_SH_ALIGN
:
2951 case BFD_RELOC_SH_CODE
:
2952 case BFD_RELOC_SH_DATA
:
2953 case BFD_RELOC_SH_LABEL
:
2954 /* Nothing to do here. */
2957 case BFD_RELOC_SH_LOOP_START
:
2958 case BFD_RELOC_SH_LOOP_END
:
2960 case BFD_RELOC_VTABLE_INHERIT
:
2961 case BFD_RELOC_VTABLE_ENTRY
:
2966 case BFD_RELOC_32_PLT_PCREL
:
2967 /* Make the jump instruction point to the address of the operand. At
2968 runtime we merely add the offset to the actual PLT entry. */
2969 * valP
= 0xfffffffc;
2972 case BFD_RELOC_SH_GOTPC
:
2973 /* This is tough to explain. We end up with this one if we have
2974 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
2975 The goal here is to obtain the absolute address of the GOT,
2976 and it is strongly preferable from a performance point of
2977 view to avoid using a runtime relocation for this. There are
2978 cases where you have something like:
2980 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
2982 and here no correction would be required. Internally in the
2983 assembler we treat operands of this form as not being pcrel
2984 since the '.' is explicitly mentioned, and I wonder whether
2985 it would simplify matters to do it this way. Who knows. In
2986 earlier versions of the PIC patches, the pcrel_adjust field
2987 was used to store the correction, but since the expression is
2988 not pcrel, I felt it would be confusing to do it this way. */
2990 md_number_to_chars (buf
, val
, 4);
2993 case BFD_RELOC_32_GOT_PCREL
:
2994 * valP
= 0; /* Fully resolved at runtime. No addend. */
2995 md_number_to_chars (buf
, 0, 4);
2998 case BFD_RELOC_32_GOTOFF
:
3008 if ((val
& ((1 << shift
) - 1)) != 0)
3009 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3013 val
= ((val
>> shift
)
3014 | ((long) -1 & ~ ((long) -1 >> shift
)));
3016 if (max
!= 0 && (val
< min
|| val
> max
))
3017 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3019 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3023 /* Called just before address relaxation. Return the length
3024 by which a fragment must grow to reach it's destination. */
3027 md_estimate_size_before_relax (fragP
, segment_type
)
3028 register fragS
*fragP
;
3029 register segT segment_type
;
3033 switch (fragP
->fr_subtype
)
3038 case C (UNCOND_JUMP
, UNDEF_DISP
):
3039 /* Used to be a branch to somewhere which was unknown. */
3040 if (!fragP
->fr_symbol
)
3042 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3044 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3046 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3050 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3054 case C (COND_JUMP
, UNDEF_DISP
):
3055 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3056 what
= GET_WHAT (fragP
->fr_subtype
);
3057 /* Used to be a branch to somewhere which was unknown. */
3058 if (fragP
->fr_symbol
3059 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3061 /* Got a symbol and it's defined in this segment, become byte
3062 sized - maybe it will fix up. */
3063 fragP
->fr_subtype
= C (what
, COND8
);
3065 else if (fragP
->fr_symbol
)
3067 /* Its got a segment, but its not ours, so it will always be long. */
3068 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3072 /* We know the abs value. */
3073 fragP
->fr_subtype
= C (what
, COND8
);
3077 case C (UNCOND_JUMP
, UNCOND12
):
3078 case C (UNCOND_JUMP
, UNCOND32
):
3079 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3080 case C (COND_JUMP
, COND8
):
3081 case C (COND_JUMP
, COND12
):
3082 case C (COND_JUMP
, COND32
):
3083 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3084 case C (COND_JUMP_DELAY
, COND8
):
3085 case C (COND_JUMP_DELAY
, COND12
):
3086 case C (COND_JUMP_DELAY
, COND32
):
3087 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3088 /* When relaxing a section for the second time, we don't need to
3089 do anything besides return the current size. */
3093 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3094 return fragP
->fr_var
;
3097 /* Put number into target byte order. */
3100 md_number_to_chars (ptr
, use
, nbytes
)
3105 if (! target_big_endian
)
3106 number_to_chars_littleendian (ptr
, use
, nbytes
);
3108 number_to_chars_bigendian (ptr
, use
, nbytes
);
3112 md_pcrel_from_section (fixP
, sec
)
3116 if (fixP
->fx_addsy
!= (symbolS
*) NULL
3117 && (! S_IS_DEFINED (fixP
->fx_addsy
)
3118 || S_IS_EXTERN (fixP
->fx_addsy
)
3119 || S_IS_WEAK (fixP
->fx_addsy
)
3120 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3122 /* The symbol is undefined (or is defined but not in this section,
3123 or we're not sure about it being the final definition). Let the
3124 linker figure it out. We need to adjust the subtraction of a
3125 symbol to the position of the relocated data, though. */
3126 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3129 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3135 tc_coff_sizemachdep (frag
)
3138 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3141 #endif /* OBJ_COFF */
3143 #ifndef BFD_ASSEMBLER
3146 /* Map BFD relocs to SH COFF relocs. */
3150 bfd_reloc_code_real_type bfd_reloc
;
3154 static const struct reloc_map coff_reloc_map
[] =
3156 { BFD_RELOC_32
, R_SH_IMM32
},
3157 { BFD_RELOC_16
, R_SH_IMM16
},
3158 { BFD_RELOC_8
, R_SH_IMM8
},
3159 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3160 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3161 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3162 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3163 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3164 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3165 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3166 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3167 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3168 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3169 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3170 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3171 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3172 { BFD_RELOC_SH_USES
, R_SH_USES
},
3173 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3174 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3175 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3176 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3177 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3178 { BFD_RELOC_UNUSED
, 0 }
3181 /* Adjust a reloc for the SH. This is similar to the generic code,
3182 but does some minor tweaking. */
3185 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
3186 segment_info_type
*seg
;
3188 struct internal_reloc
*intr
;
3191 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3194 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3196 if (! SWITCH_TABLE (fix
))
3198 const struct reloc_map
*rm
;
3200 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3201 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3203 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3204 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3205 _("Can not represent %s relocation in this object file format"),
3206 bfd_get_reloc_code_name (fix
->fx_r_type
));
3207 intr
->r_type
= rm
->sh_reloc
;
3214 if (fix
->fx_r_type
== BFD_RELOC_16
)
3215 intr
->r_type
= R_SH_SWITCH16
;
3216 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3217 intr
->r_type
= R_SH_SWITCH8
;
3218 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3219 intr
->r_type
= R_SH_SWITCH32
;
3223 /* For a switch reloc, we set r_offset to the difference between
3224 the reloc address and the subtrahend. When the linker is
3225 doing relaxing, it can use the determine the starting and
3226 ending points of the switch difference expression. */
3227 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3230 /* PC relative relocs are always against the current section. */
3231 if (symbol_ptr
== NULL
)
3233 switch (fix
->fx_r_type
)
3235 case BFD_RELOC_SH_PCRELIMM8BY2
:
3236 case BFD_RELOC_SH_PCRELIMM8BY4
:
3237 case BFD_RELOC_SH_PCDISP8BY2
:
3238 case BFD_RELOC_SH_PCDISP12BY2
:
3239 case BFD_RELOC_SH_USES
:
3240 symbol_ptr
= seg
->dot
;
3247 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3249 /* We can't store the offset in the object file, since this
3250 reloc does not take up any space, so we store it in r_offset.
3251 The fx_addnumber field was set in md_apply_fix3. */
3252 intr
->r_offset
= fix
->fx_addnumber
;
3254 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3256 /* We can't store the count in the object file, since this reloc
3257 does not take up any space, so we store it in r_offset. The
3258 fx_offset field was set when the fixup was created in
3259 sh_coff_frob_file. */
3260 intr
->r_offset
= fix
->fx_offset
;
3261 /* This reloc is always absolute. */
3264 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3266 /* Store the alignment in the r_offset field. */
3267 intr
->r_offset
= fix
->fx_offset
;
3268 /* This reloc is always absolute. */
3271 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3272 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3273 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3275 /* These relocs are always absolute. */
3279 /* Turn the segment of the symbol into an offset. */
3280 if (symbol_ptr
!= NULL
)
3282 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3284 intr
->r_symndx
= dot
->sy_number
;
3286 intr
->r_symndx
= symbol_ptr
->sy_number
;
3289 intr
->r_symndx
= -1;
3292 #endif /* OBJ_COFF */
3293 #endif /* ! BFD_ASSEMBLER */
3295 #ifdef BFD_ASSEMBLER
3297 /* Create a reloc. */
3300 tc_gen_reloc (section
, fixp
)
3301 asection
*section ATTRIBUTE_UNUSED
;
3305 bfd_reloc_code_real_type r_type
;
3307 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3308 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3309 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3310 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3312 r_type
= fixp
->fx_r_type
;
3314 if (SWITCH_TABLE (fixp
))
3316 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3317 if (r_type
== BFD_RELOC_16
)
3318 r_type
= BFD_RELOC_SH_SWITCH16
;
3319 else if (r_type
== BFD_RELOC_8
)
3320 r_type
= BFD_RELOC_8_PCREL
;
3321 else if (r_type
== BFD_RELOC_32
)
3322 r_type
= BFD_RELOC_SH_SWITCH32
;
3326 else if (r_type
== BFD_RELOC_SH_USES
)
3327 rel
->addend
= fixp
->fx_addnumber
;
3328 else if (r_type
== BFD_RELOC_SH_COUNT
)
3329 rel
->addend
= fixp
->fx_offset
;
3330 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3331 rel
->addend
= fixp
->fx_offset
;
3332 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3333 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3334 rel
->addend
= fixp
->fx_offset
;
3335 else if (r_type
== BFD_RELOC_SH_LOOP_START
3336 || r_type
== BFD_RELOC_SH_LOOP_END
)
3337 rel
->addend
= fixp
->fx_offset
;
3338 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3341 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3343 else if (fixp
->fx_pcrel
)
3344 rel
->addend
= fixp
->fx_addnumber
;
3345 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3346 rel
->addend
= fixp
->fx_addnumber
;
3350 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3351 if (rel
->howto
== NULL
)
3353 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3354 _("Cannot represent relocation type %s"),
3355 bfd_get_reloc_code_name (r_type
));
3356 /* Set howto to a garbage value so that we can keep going. */
3357 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3358 assert (rel
->howto
!= NULL
);
3364 #endif /* BFD_ASSEMBLER */