1 /* mips-opc.c -- MIPS opcode list.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
4 Contributed by Ralph Campbell and OSF
5 Commented and modified by Ian Lance Taylor, Cygnus Support
6 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
8 This file is part of GDB, GAS, and the GNU binutils.
10 GDB, GAS, and the GNU binutils are free software; you can redistribute
11 them and/or modify them under the terms of the GNU General Public
12 License as published by the Free Software Foundation; either version
13 1, or (at your option) any later version.
15 GDB, GAS, and the GNU binutils are distributed in the hope that they
16 will be useful, but WITHOUT ANY WARRANTY; without even the implied
17 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
18 the GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this file; see the file COPYING. If not, write to the Free
22 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
26 #include "opcode/mips.h"
28 /* Short hand so the lines aren't too long. */
30 #define LDD INSN_LOAD_MEMORY_DELAY
31 #define LCD INSN_LOAD_COPROC_DELAY
32 #define UBD INSN_UNCOND_BRANCH_DELAY
33 #define CBD INSN_COND_BRANCH_DELAY
34 #define COD INSN_COPROC_MOVE_DELAY
35 #define CLD INSN_COPROC_MEMORY_DELAY
36 #define CBL INSN_COND_BRANCH_LIKELY
37 #define TRAP INSN_TRAP
38 #define SM INSN_STORE_MEMORY
40 #define WR_d INSN_WRITE_GPR_D
41 #define WR_t INSN_WRITE_GPR_T
42 #define WR_31 INSN_WRITE_GPR_31
43 #define WR_D INSN_WRITE_FPR_D
44 #define WR_T INSN_WRITE_FPR_T
45 #define WR_S INSN_WRITE_FPR_S
46 #define RD_s INSN_READ_GPR_S
47 #define RD_b INSN_READ_GPR_S
48 #define RD_t INSN_READ_GPR_T
49 #define RD_S INSN_READ_FPR_S
50 #define RD_T INSN_READ_FPR_T
51 #define RD_R INSN_READ_FPR_R
52 #define WR_CC INSN_WRITE_COND_CODE
53 #define RD_CC INSN_READ_COND_CODE
54 #define RD_C0 INSN_COP
55 #define RD_C1 INSN_COP
56 #define RD_C2 INSN_COP
57 #define RD_C3 INSN_COP
58 #define WR_C0 INSN_COP
59 #define WR_C1 INSN_COP
60 #define WR_C2 INSN_COP
61 #define WR_C3 INSN_COP
63 #define WR_HI INSN_WRITE_HI
64 #define RD_HI INSN_READ_HI
65 #define MOD_HI WR_HI|RD_HI
67 #define WR_LO INSN_WRITE_LO
68 #define RD_LO INSN_READ_LO
69 #define MOD_LO WR_LO|RD_LO
71 #define WR_HILO WR_HI|WR_LO
72 #define RD_HILO RD_HI|RD_LO
73 #define MOD_HILO WR_HILO|RD_HILO
75 #define IS_M INSN_MULT
82 #define I32 INSN_ISA32
83 #define I64 INSN_ISA64
101 /* The order of overloaded instructions matters. Label arguments and
102 register arguments look the same. Instructions that can have either
103 for arguments must apear in the correct order in this table for the
104 assembler to pick the right one. In other words, entries with
105 immediate operands must apear after the same instruction with
108 Many instructions are short hand for other instructions (i.e., The
109 jal <register> instruction is short for jalr <register>). */
111 const struct mips_opcode mips_builtin_opcodes
[] =
113 /* These instructions appear first so that the disassembler will find
114 them first. The assemblers uses a hash table based on the
115 instruction name anyhow. */
116 /* name, args, match, mask, pinfo, membership */
117 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b
, I32
|G3
},
118 {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b
|RD_t
, I4
},
119 {"nop", "", 0x00000000, 0xffffffff, 0, I1
},
120 {"ssnop", "", 0x00000040, 0xffffffff, 0, I32
},
121 {"li", "t,j", 0x24000000, 0xffe00000, WR_t
, I1
}, /* addiu */
122 {"li", "t,i", 0x34000000, 0xffe00000, WR_t
, I1
}, /* ori */
123 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, I1
},
124 {"move", "d,s", 0, (int) M_MOVE
, INSN_MACRO
, I1
},
125 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d
|RD_s
, I3
},/* daddu */
126 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d
|RD_s
, I1
},/* addu */
127 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d
|RD_s
, I1
},/* or */
128 {"b", "p", 0x10000000, 0xffff0000, UBD
, I1
},/* beq 0,0 */
129 {"b", "p", 0x04010000, 0xffff0000, UBD
, I1
},/* bgez 0 */
130 {"bal", "p", 0x04110000, 0xffff0000, UBD
|WR_31
, I1
},/* bgezal 0*/
132 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, I1
},
133 {"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
134 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
135 {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D
|RD_S
|FP_D
, I5
},
136 {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
137 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, I1
},
138 {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
139 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
140 {"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
141 {"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t
|RD_s
, I1
},
142 {"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t
|RD_s
, I1
},
143 {"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
144 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, I1
},
145 {"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
146 {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
147 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, I1
},
148 {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t
|RD_s
, I1
},
149 /* b is at the top of the table. */
150 /* bal is at the top of the table. */
151 {"bc0f", "p", 0x41000000, 0xffff0000, CBD
|RD_CC
, I1
},
152 {"bc0fl", "p", 0x41020000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
153 {"bc1f", "p", 0x45000000, 0xffff0000, CBD
|RD_CC
|FP_S
, I1
},
154 {"bc1f", "N,p", 0x45000000, 0xffe30000, CBD
|RD_CC
|FP_S
, I4
|I32
},
155 {"bc1fl", "p", 0x45020000, 0xffff0000, CBL
|RD_CC
|FP_S
, I2
|T3
},
156 {"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL
|RD_CC
|FP_S
, I4
|I32
},
157 {"bc2f", "p", 0x49000000, 0xffff0000, CBD
|RD_CC
, I1
},
158 {"bc2fl", "p", 0x49020000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
159 {"bc3f", "p", 0x4d000000, 0xffff0000, CBD
|RD_CC
, I1
},
160 {"bc3fl", "p", 0x4d020000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
161 {"bc0t", "p", 0x41010000, 0xffff0000, CBD
|RD_CC
, I1
},
162 {"bc0tl", "p", 0x41030000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
163 {"bc1t", "p", 0x45010000, 0xffff0000, CBD
|RD_CC
|FP_S
, I1
},
164 {"bc1t", "N,p", 0x45010000, 0xffe30000, CBD
|RD_CC
|FP_S
, I4
|I32
},
165 {"bc1tl", "p", 0x45030000, 0xffff0000, CBL
|RD_CC
|FP_S
, I2
|T3
},
166 {"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL
|RD_CC
|FP_S
, I4
|I32
},
167 {"bc2t", "p", 0x49010000, 0xffff0000, CBD
|RD_CC
, I1
},
168 {"bc2tl", "p", 0x49030000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
169 {"bc3t", "p", 0x4d010000, 0xffff0000, CBD
|RD_CC
, I1
},
170 {"bc3tl", "p", 0x4d030000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
171 {"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD
|RD_s
, I1
},
172 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
173 {"beq", "s,t,p", 0x10000000, 0xfc000000, CBD
|RD_s
|RD_t
, I1
},
174 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, I1
},
175 {"beql", "s,t,p", 0x50000000, 0xfc000000, CBL
|RD_s
|RD_t
, I2
|T3
},
176 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, I2
|T3
},
177 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, I1
},
178 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, I1
},
179 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, I2
|T3
},
180 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, I2
|T3
},
181 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, I1
},
182 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, I1
},
183 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, I2
|T3
},
184 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, I2
|T3
},
185 {"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD
|RD_s
, I1
},
186 {"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
187 {"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD
|RD_s
|WR_31
, I1
},
188 {"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL
|RD_s
|WR_31
, I2
|T3
},
189 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, I1
},
190 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, I1
},
191 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, I2
|T3
},
192 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, I2
|T3
},
193 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, I1
},
194 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, I1
},
195 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, I2
|T3
},
196 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, I2
|T3
},
197 {"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD
|RD_s
, I1
},
198 {"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
199 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, I1
},
200 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, I1
},
201 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, I2
|T3
},
202 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, I2
|T3
},
203 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, I1
},
204 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, I1
},
205 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, I2
|T3
},
206 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, I2
|T3
},
207 {"blez", "s,p", 0x18000000, 0xfc1f0000, CBD
|RD_s
, I1
},
208 {"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
209 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, I1
},
210 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, I1
},
211 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, I2
|T3
},
212 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, I2
|T3
},
213 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, I1
},
214 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, I1
},
215 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, I2
|T3
},
216 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, I2
|T3
},
217 {"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD
|RD_s
, I1
},
218 {"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
219 {"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD
|RD_s
|WR_31
, I1
},
220 {"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL
|RD_s
|WR_31
, I2
|T3
},
221 {"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD
|RD_s
, I1
},
222 {"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
223 {"bne", "s,t,p", 0x14000000, 0xfc000000, CBD
|RD_s
|RD_t
, I1
},
224 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, I1
},
225 {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL
|RD_s
|RD_t
, I2
|T3
},
226 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, I2
|T3
},
227 {"break", "", 0x0000000d, 0xffffffff, TRAP
, I1
},
228 {"break", "B", 0x0000000d, 0xfc00003f, TRAP
, I32
},
229 {"break", "c", 0x0000000d, 0xfc00ffff, TRAP
, I1
},
230 {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP
, I1
},
231 {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
232 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
233 {"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
234 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
235 {"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
236 {"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
237 {"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
238 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
239 {"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
240 {"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
241 {"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
242 {"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
243 {"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
244 {"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
245 {"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
246 {"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
247 {"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
248 {"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
249 {"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
250 {"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
251 {"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
252 {"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
253 {"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
254 {"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
255 {"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
256 {"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
257 {"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
258 {"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
259 {"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
260 {"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
261 {"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
262 {"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
263 {"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
264 {"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
265 {"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
266 {"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
267 {"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
268 {"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
269 {"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
270 {"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
271 {"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
272 {"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
273 {"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
274 {"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
275 {"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
276 {"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
277 {"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
278 {"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
279 {"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
280 {"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
281 {"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
282 {"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
283 {"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
284 {"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
285 {"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
286 {"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
287 {"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
288 {"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
289 {"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
290 {"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
291 {"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
292 {"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
293 {"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
294 {"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
295 {"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
296 {"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
297 {"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
298 {"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
299 {"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
300 {"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
301 {"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
302 {"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
303 {"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
304 {"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
305 {"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
306 {"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
307 {"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
308 {"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
309 {"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
310 {"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
311 {"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
312 {"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
313 {"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
314 {"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
315 {"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
316 {"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
317 {"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
318 {"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
319 {"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
320 {"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
321 {"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
322 {"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
|I32
},
323 {"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
324 {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
|I32
},
325 {"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
326 {"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I5
},
327 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b
, I3
|I32
|T3
},
328 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
329 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
330 {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
331 {"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
332 {"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD
|WR_t
|RD_C0
, I1
},
333 {"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, I1
},
334 {"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, I1
},
335 {"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD
|WR_t
|RD_C2
, I1
},
336 {"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD
|WR_t
|RD_C3
, I1
},
337 {"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d
|WR_t
|RD_s
, I32
},
338 {"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d
|WR_t
|RD_s
, I32
},
339 {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, I1
},
340 {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, I1
},
341 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, I1
},
342 {"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, I1
},
343 {"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD
|RD_t
|WR_CC
, I1
},
344 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
345 {"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D
|RD_S
|FP_D
|FP_S
, I1
},
346 {"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
347 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
348 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
349 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
350 {"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, I1
},
351 {"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
352 {"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, I5
},
353 {"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, I5
},
354 {"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
355 {"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
356 {"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
357 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, I3
},
358 {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
359 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, I3
},
360 {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t
|RD_s
, I3
},
361 {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t
|RD_s
, I3
},
362 {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
363 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, I3
},
364 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s
|WR_d
|WR_t
, I64
},
365 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s
|WR_d
|WR_t
, I64
},
366 /* dctr and dctw are used on the r5000. */
367 {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b
, I3
},
368 {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b
, I3
},
369 {"deret", "", 0x4200001f, 0xffffffff, 0, I32
|G2
},
370 /* For ddiv, see the comments about div. */
371 {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I3
},
372 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, I3
},
373 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, I3
},
374 /* For ddivu, see the comments about div. */
375 {"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I3
},
376 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, I3
},
377 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, I3
},
378 /* The MIPS assembler treats the div opcode with two operands as
379 though the first operand appeared twice (the first operand is both
380 a source and a destination). To get the div machine instruction,
381 you must use an explicit destination of $0. */
382 {"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I1
},
383 {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s
|RD_t
|WR_HILO
, I1
},
384 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, I1
},
385 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, I1
},
386 {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
387 {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
388 {"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, SB1
},
389 /* For divu, see the comments about div. */
390 {"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I1
},
391 {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s
|RD_t
|WR_HILO
, I1
},
392 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, I1
},
393 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, I1
},
394 {"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t
|RD_s
, I3
}, /* daddiu */
395 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, I3
},
396 {"dli", "t,j", 0x24000000, 0xffe00000, WR_t
, I3
}, /* addiu */
397 {"dli", "t,i", 0x34000000, 0xffe00000, WR_t
, I3
}, /* ori */
398 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, I3
},
400 {"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s
|RD_t
|MOD_LO
, V1
},
401 {"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD
|WR_t
|RD_C0
, I3
},
402 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD
|WR_t
|RD_C0
, I64
},
403 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, I3
},
404 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, I64
},
405 {"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I3
},
406 {"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I3
},
407 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I3
},
408 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I3
},
409 {"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD
|WR_t
|RD_C2
, I3
},
410 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD
|WR_t
|RD_C2
, I64
},
411 {"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, I3
},
412 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, I64
},
413 {"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD
|WR_t
|RD_C3
, I3
},
414 {"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD
|WR_t
|RD_C3
, I64
},
415 {"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, I3
},
416 {"dmtc3", "t,G,H", 0x4ca00000, 0xffe007f8, COD
|RD_t
|WR_C3
|WR_CC
, I64
},
417 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, I3
},
418 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, I3
},
419 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, I3
},
420 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, I3
},
421 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, I3
},
422 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, I3
},
423 {"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I3
},
424 {"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I3
},
425 {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d
|RD_t
, I3
}, /* dsub 0 */
426 {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d
|RD_t
, I3
}, /* dsubu 0*/
427 {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I3
},
428 {"drem", "d,v,t", 3, (int) M_DREM_3
, INSN_MACRO
, I3
},
429 {"drem", "d,v,I", 3, (int) M_DREM_3I
, INSN_MACRO
, I3
},
430 {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I3
},
431 {"dremu", "d,v,t", 3, (int) M_DREMU_3
, INSN_MACRO
, I3
},
432 {"dremu", "d,v,I", 3, (int) M_DREMU_3I
, INSN_MACRO
, I3
},
433 {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
},
434 {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, I3
},
435 {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
}, /* dsllv */
436 {"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, I3
}, /* dsll32 */
437 {"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d
|RD_t
, I3
},
438 {"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
},
439 {"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, I3
},
440 {"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
}, /* dsrav */
441 {"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, I3
}, /* dsra32 */
442 {"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d
|RD_t
, I3
},
443 {"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
},
444 {"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, I3
},
445 {"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
}, /* dsrlv */
446 {"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, I3
}, /* dsrl32 */
447 {"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d
|RD_t
, I3
},
448 {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
449 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, I3
},
450 {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
451 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, I3
},
452 {"eret", "", 0x42000018, 0xffffffff, 0, I3
|I32
},
453 {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
454 {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
455 {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
456 {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
457 {"flushi", "", 0xbc010000, 0xffffffff, 0, L1
},
458 {"flushd", "", 0xbc020000, 0xffffffff, 0, L1
},
459 {"flushid", "", 0xbc030000, 0xffffffff, 0, L1
},
460 {"hibernate","", 0x42000023, 0xffffffff, 0, V1
},
461 {"jr", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, I1
},
462 {"j", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, I1
}, /* jr */
463 /* SVR4 PIC code requires special handling for j, so it must be a
465 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, I1
},
466 /* This form of j is used by the disassembler and internally by the
467 assembler, but will never match user input (because the line above
468 will match first). */
469 {"j", "a", 0x08000000, 0xfc000000, UBD
, I1
},
470 {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD
|RD_s
|WR_d
, I1
},
471 {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD
|RD_s
|WR_d
, I1
},
472 /* SVR4 PIC code requires special handling for jal, so it must be a
474 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, I1
},
475 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, I1
},
476 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, I1
},
477 /* This form of jal is used by the disassembler and internally by the
478 assembler, but will never match user input (because the line above
479 will match first). */
480 {"jal", "a", 0x0c000000, 0xfc000000, UBD
|WR_31
, I1
},
481 /* jalx really should only be avaliable if mips16 is available,
482 but for now make it I1. */
483 {"jalx", "a", 0x74000000, 0xfc000000, UBD
|WR_31
, I1
},
484 {"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t
|RD_s
, I1
}, /* addiu */
485 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, I1
},
486 {"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
487 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, I1
},
488 {"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
489 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, I1
},
490 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t
|RD_b
, I3
},
491 {"ld", "t,o(b)", 0, (int) M_LD_OB
, INSN_MACRO
, I1
},
492 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, I1
},
493 {"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, I2
},
494 {"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, I2
},
495 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, I2
},
496 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, I2
},
497 {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, I2
}, /* ldc1 */
498 {"l.d", "T,o(b)", 0, (int) M_L_DOB
, INSN_MACRO
, I1
},
499 {"l.d", "T,A(b)", 0, (int) M_L_DAB
, INSN_MACRO
, I1
},
500 {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I2
},
501 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, I2
},
502 {"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I2
},
503 {"ldc3", "E,A(b)", 0, (int) M_LDC3_AB
, INSN_MACRO
, I2
},
504 {"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD
|WR_t
|RD_b
, I3
},
505 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, I3
},
506 {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD
|WR_t
|RD_b
, I3
},
507 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, I3
},
508 {"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
, I4
},
509 {"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
510 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, I1
},
511 {"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
512 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, I1
},
513 /* li is at the start of the table. */
514 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, I1
},
515 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, I1
},
516 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, I1
},
517 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, I1
},
518 {"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD
|RD_b
|WR_t
, I2
},
519 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, I2
},
520 {"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD
|RD_b
|WR_t
, I3
},
521 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, I3
},
522 {"lui", "t,u", 0x3c000000, 0xffe00000, WR_t
, I1
},
523 {"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
, I5
},
524 {"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
525 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, I1
},
526 {"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I1
},
527 {"lwc0", "E,A(b)", 0, (int) M_LWC0_AB
, INSN_MACRO
, I1
},
528 {"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, I1
},
529 {"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, I1
},
530 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, I1
},
531 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, I1
},
532 {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, I1
}, /* lwc1 */
533 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, I1
},
534 {"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I1
},
535 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, I1
},
536 {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I1
},
537 {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB
, INSN_MACRO
, I1
},
538 {"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
539 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, I1
},
540 {"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, I2
}, /* same */
541 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, I2
}, /* as lwl */
542 {"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
543 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, I1
},
544 {"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, I2
}, /* same */
545 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, I2
}, /* as lwr */
546 {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD
|RD_b
|WR_t
, I3
},
547 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, I3
},
548 {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
, I4
},
549 {"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, P3
},
550 {"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, P3
},
551 {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
552 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
553 {"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I5
},
554 {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, L1
},
555 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, I32
},
556 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, G1
},
557 {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, G1
},
558 {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, L1
},
559 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, I32
},
560 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, G1
},
561 {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, G1
},
562 {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, V1
},
563 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, LCD
|WR_t
|RD_C0
, M1
},
564 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, LCD
|WR_t
|RD_C0
, M1
},
565 {"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD
|WR_t
|RD_C0
, I1
},
566 {"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD
|WR_t
|RD_C0
, I32
},
567 {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I1
},
568 {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I1
},
569 {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD
|WR_t
|RD_C2
, I1
},
570 {"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD
|WR_t
|RD_C2
, I32
},
571 {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD
|WR_t
|RD_C3
, I1
},
572 {"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD
|WR_t
|RD_C3
, I32
},
573 {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d
|RD_HI
, I1
},
574 {"mflo", "d", 0x00000012, 0xffff07ff, WR_d
|RD_LO
, I1
},
575 {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
576 {"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
577 {"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D
|RD_S
|FP_D
, I5
},
578 {"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
|FP_D
|FP_S
, I4
|I32
},
579 {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, I4
|I32
},
580 {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, I4
|I32
},
581 {"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, I5
},
582 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I4
|I32
},
583 {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d
|RD_s
, L1
},
584 {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, I4
|I32
},
585 {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, I4
|I32
},
586 {"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
, I4
|I32
},
587 {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, I4
|I32
},
588 {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, I4
|I32
},
589 {"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, I5
},
590 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I4
|I32
},
591 {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d
|RD_s
, L1
},
592 {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, I4
|I32
},
593 {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, I4
|I32
},
594 /* move is at the top of the table. */
595 {"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
596 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
597 {"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I5
},
598 {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, L1
},
599 {"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, I32
},
600 {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, L1
},
601 {"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, I32
},
602 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD
|RD_t
|WR_C0
, M1
},
603 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD
|RD_t
|WR_C0
, M1
},
604 {"mtc0", "t,G", 0x40800000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, I1
},
605 {"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, I32
},
606 {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I1
},
607 {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I1
},
608 {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, I1
},
609 {"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, I32
},
610 {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, I1
},
611 {"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD
|RD_t
|WR_C3
|WR_CC
, I32
},
612 {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s
|WR_HI
, I1
},
613 {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s
|WR_LO
, I1
},
614 {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
615 {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
616 {"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
617 {"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, I32
|P3
},
618 {"mul", "d,v,t", 0, (int) M_MUL
, INSN_MACRO
, I1
},
619 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, I1
},
620 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, I1
},
621 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, I1
},
622 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, I1
},
623 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, I1
},
624 {"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, I1
},
625 {"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, G1
},
626 {"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, I1
},
627 {"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, G1
},
628 {"neg", "d,w", 0x00000022, 0xffe007ff, WR_d
|RD_t
, I1
}, /* sub 0 */
629 {"negu", "d,w", 0x00000023, 0xffe007ff, WR_d
|RD_t
, I1
}, /* subu 0 */
630 {"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
631 {"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
632 {"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D
|RD_S
|FP_D
, I5
},
633 {"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
634 {"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
635 {"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I5
},
636 {"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
637 {"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
638 {"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I5
},
639 /* nop is at the start of the table. */
640 {"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
641 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, I1
},
642 {"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d
|RD_s
|RD_t
, I1
},/*nor d,s,0*/
643 {"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
644 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, I1
},
645 {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t
|RD_s
, I1
},
647 {"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
648 {"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
650 /* pref and prefx are at the start of the table. */
652 {"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
653 {"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
655 {"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D
|RD_S
|FP_D
, I4
},
656 {"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D
|RD_S
|FP_S
, I4
},
657 {"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D
|RD_S
|FP_D
, SB1
},
658 {"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I1
},
659 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, I1
},
660 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, I1
},
661 {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, I1
},
662 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, I1
},
663 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, I1
},
664 {"rfe", "", 0x42000010, 0xffffffff, 0, I1
|T3
},
665 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, I1
},
666 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, I1
},
667 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, I1
},
668 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, I1
},
669 {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
670 {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
671 {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
672 {"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
673 {"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D
|RD_S
|FP_D
, I4
},
674 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D
|RD_S
|FP_S
, I4
},
675 {"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D
|RD_S
|FP_D
, SB1
},
676 {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
677 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, I1
},
678 {"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, I2
},
679 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, I2
},
680 {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, I3
},
681 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, I3
},
682 {"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM
|RD_t
|RD_b
, I3
},
683 {"sd", "t,o(b)", 0, (int) M_SD_OB
, INSN_MACRO
, I1
},
684 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, I1
},
685 {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP
, G2
},
686 {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP
, G2
},
687 {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP
, G2
},
688 {"sdbbp", "", 0x7000003f, 0xffffffff, TRAP
, I32
},
689 {"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP
, I32
},
690 {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, I2
},
691 {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, I2
},
692 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, I2
},
693 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, I2
},
694 {"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM
|RD_C2
|RD_b
, I2
},
695 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, I2
},
696 {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM
|RD_C3
|RD_b
, I2
},
697 {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB
, INSN_MACRO
, I2
},
698 {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, I2
},
699 {"s.d", "T,o(b)", 0, (int) M_S_DOB
, INSN_MACRO
, I1
},
700 {"s.d", "T,A(b)", 0, (int) M_S_DAB
, INSN_MACRO
, I1
},
701 {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM
|RD_t
|RD_b
, I3
},
702 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, I3
},
703 {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM
|RD_t
|RD_b
, I3
},
704 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, I3
},
705 {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
, I4
},
706 {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d
|RD_s
|RD_t
, L1
},
707 {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d
|RD_s
|RD_t
, L1
},
708 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, I1
},
709 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, I1
},
710 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, I1
},
711 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, I1
},
712 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, I1
},
713 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, I1
},
714 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, I1
},
715 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, I1
},
716 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, I1
},
717 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, I1
},
718 {"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
719 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, I1
},
720 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, I1
},
721 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, I1
},
722 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, I1
},
723 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, I1
},
724 {"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
},
725 {"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
}, /* sllv */
726 {"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d
|RD_t
, I1
},
727 {"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
728 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, I1
},
729 {"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t
|RD_s
, I1
},
730 {"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t
|RD_s
, I1
},
731 {"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
732 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, I1
},
733 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, I1
},
734 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, I1
},
735 {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
736 {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
737 {"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D
|RD_S
|FP_D
, SB1
},
738 {"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
},
739 {"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
}, /* srav */
740 {"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d
|RD_t
, I1
},
741 {"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
},
742 {"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
}, /* srlv */
743 {"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d
|RD_t
, I1
},
744 /* ssnop is at the start of the table. */
745 {"standby", "", 0x42000021, 0xffffffff, 0, V1
},
746 {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
747 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, I1
},
748 {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
749 {"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
750 {"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I5
},
751 {"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
752 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, I1
},
753 {"suspend", "", 0x42000022, 0xffffffff, 0, V1
},
754 {"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
, I5
},
755 {"sw", "t,o(b)", 0xac000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
756 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, I1
},
757 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM
|RD_C0
|RD_b
, I1
},
758 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB
, INSN_MACRO
, I1
},
759 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, I1
},
760 {"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, I1
},
761 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, I1
},
762 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, I1
},
763 {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, I1
}, /* swc1 */
764 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, I1
},
765 {"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM
|RD_C2
|RD_b
, I1
},
766 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, I1
},
767 {"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM
|RD_C3
|RD_b
, I1
},
768 {"swc3", "E,A(b)", 0, (int) M_SWC3_AB
, INSN_MACRO
, I1
},
769 {"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
770 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, I1
},
771 {"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t
|RD_b
, I2
}, /* same */
772 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, I2
}, /* as swl */
773 {"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
774 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, I1
},
775 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t
|RD_b
, I2
}, /* same */
776 {"invalidate", "t,A(b)",0, (int) M_SWR_AB
, INSN_MACRO
, I2
}, /* as swr */
777 {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
, I4
},
778 {"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC
, I2
|G1
},
779 {"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC
, I2
},
780 {"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC
, I2
},
781 {"syscall", "", 0x0000000c, 0xffffffff, TRAP
, I1
},
782 {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP
, I1
},
783 {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
784 {"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s
|RD_t
|TRAP
, I2
},
785 {"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
786 {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* teqi */
787 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, I2
},
788 {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, I2
},
789 {"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s
|RD_t
|TRAP
, I2
},
790 {"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
791 {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tgei */
792 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, I2
},
793 {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, I2
},
794 {"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s
|RD_t
|TRAP
, I2
},
795 {"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
796 {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tgeiu */
797 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, I2
},
798 {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB
, I1
},
799 {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB
, I1
},
800 {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB
, I1
},
801 {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB
, I1
},
802 {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
803 {"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s
|RD_t
|TRAP
, I2
},
804 {"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
805 {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tlti */
806 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, I2
},
807 {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
808 {"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s
|RD_t
|TRAP
, I2
},
809 {"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
810 {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tltiu */
811 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, I2
},
812 {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
813 {"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s
|RD_t
|TRAP
, I2
},
814 {"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
815 {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tnei */
816 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, I2
},
817 {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
818 {"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
819 {"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
820 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
821 {"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD
, INSN_MACRO
, I1
},
822 {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
823 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
824 {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS
, INSN_MACRO
, I1
},
825 {"uld", "t,o(b)", 0, (int) M_ULD
, INSN_MACRO
, I3
},
826 {"uld", "t,A(b)", 0, (int) M_ULD_A
, INSN_MACRO
, I3
},
827 {"ulh", "t,o(b)", 0, (int) M_ULH
, INSN_MACRO
, I1
},
828 {"ulh", "t,A(b)", 0, (int) M_ULH_A
, INSN_MACRO
, I1
},
829 {"ulhu", "t,o(b)", 0, (int) M_ULHU
, INSN_MACRO
, I1
},
830 {"ulhu", "t,A(b)", 0, (int) M_ULHU_A
, INSN_MACRO
, I1
},
831 {"ulw", "t,o(b)", 0, (int) M_ULW
, INSN_MACRO
, I1
},
832 {"ulw", "t,A(b)", 0, (int) M_ULW_A
, INSN_MACRO
, I1
},
833 {"usd", "t,o(b)", 0, (int) M_USD
, INSN_MACRO
, I3
},
834 {"usd", "t,A(b)", 0, (int) M_USD_A
, INSN_MACRO
, I3
},
835 {"ush", "t,o(b)", 0, (int) M_USH
, INSN_MACRO
, I1
},
836 {"ush", "t,A(b)", 0, (int) M_USH_A
, INSN_MACRO
, I1
},
837 {"usw", "t,o(b)", 0, (int) M_USW
, INSN_MACRO
, I1
},
838 {"usw", "t,A(b)", 0, (int) M_USW_A
, INSN_MACRO
, I1
},
839 {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
840 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, I1
},
841 {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t
|RD_s
, I1
},
842 {"wait", "", 0x42000020, 0xffffffff, TRAP
, I3
|I32
},
843 {"wait", "J", 0x42000020, 0xfe00003f, TRAP
, I32
},
844 {"waiti", "", 0x42000020, 0xffffffff, TRAP
, L1
},
845 {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM
|RD_b
, L1
},
846 /* No hazard protection on coprocessor instructions--they shouldn't
847 change the state of the processor and if they do it's up to the
848 user to put in nops as necessary. These are at the end so that the
849 disassembler recognizes more specific versions first. */
850 {"c0", "C", 0x42000000, 0xfe000000, 0, I1
},
851 {"c1", "C", 0x46000000, 0xfe000000, 0, I1
},
852 {"c2", "C", 0x4a000000, 0xfe000000, 0, I1
},
853 {"c3", "C", 0x4e000000, 0xfe000000, 0, I1
},
854 {"cop0", "C", 0, (int) M_COP0
, INSN_MACRO
, I1
},
855 {"cop1", "C", 0, (int) M_COP1
, INSN_MACRO
, I1
},
856 {"cop2", "C", 0, (int) M_COP2
, INSN_MACRO
, I1
},
857 {"cop3", "C", 0, (int) M_COP3
, INSN_MACRO
, I1
},
859 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
860 4010 any more, so move this insn out of the way. If the object
861 format gave us more info, we could do this right. */
862 {"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t
|RD_s
, L1
},
865 #define MIPS_NUM_OPCODES \
866 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
867 const int bfd_mips_num_builtin_opcodes
= MIPS_NUM_OPCODES
;
869 /* const removed from the following to allow for dynamic extensions to the
870 * built-in instruction set. */
871 struct mips_opcode
*mips_opcodes
=
872 (struct mips_opcode
*) mips_builtin_opcodes
;
873 int bfd_mips_num_opcodes
= MIPS_NUM_OPCODES
;
874 #undef MIPS_NUM_OPCODES
