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* src-release (DEVO_SUPPORT): Correct typos.
[binutils.git] / opcodes / m32c-asm.c
blob7d2aac85125ad90fd155368aaa042088e414300e
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52 #include "safe-ctype.h"
53
54 #define MACH_M32C 5 /* Must match md_begin. */
55
56 static int
57 m32c_cgen_isa_register (const char **strp)
58 {
59 int u;
60 const char *s = *strp;
61 static char * m32c_register_names [] =
62 {
63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
67 };
68
69 for (u = 0; m32c_register_names[u]; u++)
70 {
71 int len = strlen (m32c_register_names[u]);
72
73 if (memcmp (m32c_register_names[u], s, len) == 0
74 && (s[len] == 0 || ! ISALNUM (s[len])))
75 return 1;
76 }
77 return 0;
78 }
79
80 #define PARSE_UNSIGNED \
81 do \
82 { \
83 /* Don't successfully parse literals beginning with '['. */ \
84 if (**strp == '[') \
85 return "Invalid literal"; /* Anything -- will not be seen. */ \
86 \
87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
88 if (errmsg) \
89 return errmsg; \
90 } \
91 while (0)
92
93 #define PARSE_SIGNED \
94 do \
95 { \
96 /* Don't successfully parse literals beginning with '['. */ \
97 if (**strp == '[') \
98 return "Invalid literal"; /* Anything -- will not be seen. */ \
99 \
100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
101 if (errmsg) \
102 return errmsg; \
103 } \
104 while (0)
105
106 static const char *
107 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
108 int opindex, unsigned long *valuep)
109 {
110 const char *errmsg = 0;
111 unsigned long value;
112
113 PARSE_UNSIGNED;
114
115 if (value > 0x3f)
116 return _("imm:6 immediate is out of range");
117
118 *valuep = value;
119 return 0;
120 }
121
122 static const char *
123 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
124 int opindex, unsigned long *valuep)
125 {
126 const char *errmsg = 0;
127 unsigned long value;
128 long have_zero = 0;
129
130 if (strncasecmp (*strp, "%dsp8(", 6) == 0)
131 {
132 enum cgen_parse_operand_result result_type;
133 bfd_vma value;
134 const char *errmsg;
135
136 *strp += 6;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138 & result_type, & value);
139 if (**strp != ')')
140 return _("missing `)'");
141 (*strp) ++;
142
143 if (errmsg == NULL
144 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145 {
146 return _("%dsp8() takes a symbolic address, not a number");
147 }
148 *valuep = value;
149 return errmsg;
150 }
151
152 if (strncmp (*strp, "0x0", 3) == 0
153 || (**strp == '0' && *(*strp + 1) != 'x'))
154 have_zero = 1;
155
156 PARSE_UNSIGNED;
157
158 if (value > 0xff)
159 return _("dsp:8 immediate is out of range");
160
161 /* If this field may require a relocation then use larger dsp16. */
162 if (! have_zero && value == 0)
163 return _("dsp:8 immediate is out of range");
164
165 *valuep = value;
166 return 0;
167 }
168
169 static const char *
170 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171 int opindex, signed long *valuep)
172 {
173 const char *errmsg = 0;
174 signed long value;
175 long have_zero = 0;
176
177 if (strncmp (*strp, "0x0", 3) == 0
178 || (**strp == '0' && *(*strp + 1) != 'x'))
179 have_zero = 1;
180
181 PARSE_SIGNED;
182
183 if (value < -8 || value > 7)
184 return _("Immediate is out of range -8 to 7");
185
186 /* If this field may require a relocation then use larger dsp16. */
187 if (! have_zero && value == 0)
188 return _("Immediate is out of range -8 to 7");
189
190 *valuep = value;
191 return 0;
192 }
193
194 static const char *
195 parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
196 int opindex, signed long *valuep)
197 {
198 const char *errmsg = 0;
199 signed long value;
200 long have_zero = 0;
201
202 if (strncmp (*strp, "0x0", 3) == 0
203 || (**strp == '0' && *(*strp + 1) != 'x'))
204 have_zero = 1;
205
206 PARSE_SIGNED;
207
208 if (value < -7 || value > 8)
209 return _("Immediate is out of range -7 to 8");
210
211 /* If this field may require a relocation then use larger dsp16. */
212 if (! have_zero && value == 0)
213 return _("Immediate is out of range -7 to 8");
214
215 *valuep = -value;
216 return 0;
217 }
218
219 static const char *
220 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
221 int opindex, signed long *valuep)
222 {
223 const char *errmsg = 0;
224 signed long value;
225
226 if (strncasecmp (*strp, "%hi8(", 5) == 0)
227 {
228 enum cgen_parse_operand_result result_type;
229 bfd_vma value;
230 const char *errmsg;
231
232 *strp += 5;
233 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
234 & result_type, & value);
235 if (**strp != ')')
236 return _("missing `)'");
237 (*strp) ++;
238
239 if (errmsg == NULL
240 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
241 {
242 value >>= 16;
243 }
244 *valuep = value;
245 return errmsg;
246 }
247
248 PARSE_SIGNED;
249
250 if (value <= 255 && value > 127)
251 value -= 0x100;
252
253 if (value < -128 || value > 127)
254 return _("dsp:8 immediate is out of range");
255
256 *valuep = value;
257 return 0;
258 }
259
260 static const char *
261 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
262 int opindex, unsigned long *valuep)
263 {
264 const char *errmsg = 0;
265 unsigned long value;
266 long have_zero = 0;
267
268 if (strncasecmp (*strp, "%dsp16(", 7) == 0)
269 {
270 enum cgen_parse_operand_result result_type;
271 bfd_vma value;
272 const char *errmsg;
273
274 *strp += 7;
275 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
276 & result_type, & value);
277 if (**strp != ')')
278 return _("missing `)'");
279 (*strp) ++;
280
281 if (errmsg == NULL
282 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
283 {
284 return _("%dsp16() takes a symbolic address, not a number");
285 }
286 *valuep = value;
287 return errmsg;
288 }
289
290 /* Don't successfully parse literals beginning with '['. */
291 if (**strp == '[')
292 return "Invalid literal"; /* Anything -- will not be seen. */
293
294 /* Don't successfully parse register names. */
295 if (m32c_cgen_isa_register (strp))
296 return "Invalid literal"; /* Anything -- will not be seen. */
297
298 if (strncmp (*strp, "0x0", 3) == 0
299 || (**strp == '0' && *(*strp + 1) != 'x'))
300 have_zero = 1;
301
302 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
303 if (errmsg)
304 return errmsg;
305
306 if (value > 0xffff)
307 return _("dsp:16 immediate is out of range");
308
309 /* If this field may require a relocation then use larger dsp24. */
310 if (cd->machs == MACH_M32C && ! have_zero && value == 0
311 && (strncmp (*strp, "[a", 2) == 0
312 || **strp == ','
313 || **strp == 0))
314 return _("dsp:16 immediate is out of range");
315
316 *valuep = value;
317 return 0;
318 }
319
320 static const char *
321 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
322 int opindex, signed long *valuep)
323 {
324 const char *errmsg = 0;
325 signed long value;
326
327 if (strncasecmp (*strp, "%lo16(", 6) == 0)
328 {
329 enum cgen_parse_operand_result result_type;
330 bfd_vma value;
331 const char *errmsg;
332
333 *strp += 6;
334 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
335 & result_type, & value);
336 if (**strp != ')')
337 return _("missing `)'");
338 (*strp) ++;
339
340 if (errmsg == NULL
341 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
342 {
343 value &= 0xffff;
344 }
345 *valuep = value;
346 return errmsg;
347 }
348
349 if (strncasecmp (*strp, "%hi16(", 6) == 0)
350 {
351 enum cgen_parse_operand_result result_type;
352 bfd_vma value;
353 const char *errmsg;
354
355 *strp += 6;
356 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
357 & result_type, & value);
358 if (**strp != ')')
359 return _("missing `)'");
360 (*strp) ++;
361
362 if (errmsg == NULL
363 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
364 {
365 value >>= 16;
366 }
367 *valuep = value;
368 return errmsg;
369 }
370
371 PARSE_SIGNED;
372
373 if (value <= 65535 && value > 32767)
374 value -= 0x10000;
375
376 if (value < -32768 || value > 32767)
377 return _("dsp:16 immediate is out of range");
378
379 *valuep = value;
380 return 0;
381 }
382
383 static const char *
384 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
385 int opindex, unsigned long *valuep)
386 {
387 const char *errmsg = 0;
388 unsigned long value;
389
390 /* Don't successfully parse literals beginning with '['. */
391 if (**strp == '[')
392 return "Invalid literal"; /* Anything -- will not be seen. */
393
394 /* Don't successfully parse register names. */
395 if (m32c_cgen_isa_register (strp))
396 return "Invalid literal"; /* Anything -- will not be seen. */
397
398 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
399 if (errmsg)
400 return errmsg;
401
402 if (value > 0xfffff)
403 return _("dsp:20 immediate is out of range");
404
405 *valuep = value;
406 return 0;
407 }
408
409 static const char *
410 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
411 int opindex, unsigned long *valuep)
412 {
413 const char *errmsg = 0;
414 unsigned long value;
415
416 /* Don't successfully parse literals beginning with '['. */
417 if (**strp == '[')
418 return "Invalid literal"; /* Anything -- will not be seen. */
419
420 /* Don't successfully parse register names. */
421 if (m32c_cgen_isa_register (strp))
422 return "Invalid literal"; /* Anything -- will not be seen. */
423
424 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
425 if (errmsg)
426 return errmsg;
427
428 if (value > 0xffffff)
429 return _("dsp:24 immediate is out of range");
430
431 *valuep = value;
432 return 0;
433 }
434
435 /* This should only be used for #imm->reg. */
436 static const char *
437 parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
438 int opindex, signed long *valuep)
439 {
440 const char *errmsg = 0;
441 signed long value;
442
443 PARSE_SIGNED;
444
445 if (value <= 0xffffff && value > 0x7fffff)
446 value -= 0x1000000;
447
448 if (value > 0xffffff)
449 return _("dsp:24 immediate is out of range");
450
451 *valuep = value;
452 return 0;
453 }
454
455 static const char *
456 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
457 int opindex, signed long *valuep)
458 {
459 const char *errmsg = 0;
460 signed long value;
461
462 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
463 if (errmsg)
464 return errmsg;
465
466 *valuep = value;
467 return 0;
468 }
469
470 static const char *
471 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
472 int opindex, signed long *valuep)
473 {
474 const char *errmsg = 0;
475 signed long value;
476
477 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
478 if (errmsg)
479 return errmsg;
480
481 if (value < 1 || value > 2)
482 return _("immediate is out of range 1-2");
483
484 *valuep = value;
485 return 0;
486 }
487
488 static const char *
489 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
490 int opindex, signed long *valuep)
491 {
492 const char *errmsg = 0;
493 signed long value;
494
495 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
496 if (errmsg)
497 return errmsg;
498
499 if (value < 1 || value > 8)
500 return _("immediate is out of range 1-8");
501
502 *valuep = value;
503 return 0;
504 }
505
506 static const char *
507 parse_bit3_S (CGEN_CPU_DESC cd, const char **strp,
508 int opindex, signed long *valuep)
509 {
510 const char *errmsg = 0;
511 signed long value;
512
513 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
514 if (errmsg)
515 return errmsg;
516
517 if (value < 0 || value > 7)
518 return _("immediate is out of range 0-7");
519
520 *valuep = value;
521 return 0;
522 }
523
524 static const char *
525 parse_lab_5_3 (CGEN_CPU_DESC cd,
526 const char **strp,
527 int opindex ATTRIBUTE_UNUSED,
528 int opinfo,
529 enum cgen_parse_operand_result *type_addr,
530 bfd_vma *valuep)
531 {
532 const char *errmsg = 0;
533 bfd_vma value;
534 enum cgen_parse_operand_result op_res;
535
536 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
537 opinfo, & op_res, & value);
538
539 if (type_addr)
540 *type_addr = op_res;
541
542 if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
543 {
544 /* This is a hack; the field cannot handle near-zero signed
545 offsets that CGEN wants to put in to indicate an "empty"
546 operand at first. */
547 *valuep = 2;
548 return 0;
549 }
550 if (errmsg)
551 return errmsg;
552
553 if (value < 2 || value > 9)
554 return _("immediate is out of range 2-9");
555
556 *valuep = value;
557 return 0;
558 }
559
560 static const char *
561 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
562 int opindex, unsigned long *valuep)
563 {
564 const char *errmsg = 0;
565 unsigned long value;
566
567 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
568 if (errmsg)
569 return errmsg;
570
571 if (value > 15)
572 return _("Bit number for indexing general register is out of range 0-15");
573
574 *valuep = value;
575 return 0;
576 }
577
578 static const char *
579 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
580 int opindex, unsigned long *valuep,
581 unsigned bits, int allow_syms)
582 {
583 const char *errmsg = 0;
584 unsigned long bit;
585 unsigned long base;
586 const char *newp = *strp;
587 unsigned long long bitbase;
588 long have_zero = 0;
589
590 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
591 if (errmsg)
592 return errmsg;
593
594 if (*newp != ',')
595 return "Missing base for bit,base:8";
596
597 ++newp;
598
599 if (strncmp (newp, "0x0", 3) == 0
600 || (newp[0] == '0' && newp[1] != 'x'))
601 have_zero = 1;
602
603 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
604 if (errmsg)
605 return errmsg;
606
607 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
608
609 if (bitbase >= (1ull << bits))
610 return _("bit,base is out of range");
611
612 /* If this field may require a relocation then use larger displacement. */
613 if (! have_zero && base == 0)
614 {
615 switch (allow_syms) {
616 case 0:
617 return _("bit,base out of range for symbol");
618 case 1:
619 break;
620 case 2:
621 if (strncmp (newp, "[sb]", 4) != 0)
622 return _("bit,base out of range for symbol");
623 break;
624 }
625 }
626
627 *valuep = bitbase;
628 *strp = newp;
629 return 0;
630 }
631
632 static const char *
633 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
634 int opindex, signed long *valuep,
635 unsigned bits, int allow_syms)
636 {
637 const char *errmsg = 0;
638 unsigned long bit;
639 signed long base;
640 const char *newp = *strp;
641 long long bitbase;
642 long long limit;
643 long have_zero = 0;
644
645 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
646 if (errmsg)
647 return errmsg;
648
649 if (*newp != ',')
650 return "Missing base for bit,base:8";
651
652 ++newp;
653
654 if (strncmp (newp, "0x0", 3) == 0
655 || (newp[0] == '0' && newp[1] != 'x'))
656 have_zero = 1;
657
658 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
659 if (errmsg)
660 return errmsg;
661
662 bitbase = (long long)bit + ((long long)base * 8);
663
664 limit = 1ll << (bits - 1);
665 if (bitbase < -limit || bitbase >= limit)
666 return _("bit,base is out of range");
667
668 /* If this field may require a relocation then use larger displacement. */
669 if (! have_zero && base == 0 && ! allow_syms)
670 return _("bit,base out of range for symbol");
671
672 *valuep = bitbase;
673 *strp = newp;
674 return 0;
675 }
676
677 static const char *
678 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
679 int opindex, unsigned long *valuep)
680 {
681 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0);
682 }
683
684 static const char *
685 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
686 int opindex, unsigned long *valuep)
687 {
688 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0);
689 }
690
691 static const char *
692 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
693 int opindex, unsigned long *valuep)
694 {
695 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1);
696 }
697
698 static const char *
699 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
700 int opindex, unsigned long *valuep)
701 {
702 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2);
703 }
704
705 static const char *
706 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
707 int opindex, unsigned long *valuep)
708 {
709 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1);
710 }
711
712 static const char *
713 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
714 int opindex, signed long *valuep)
715 {
716 return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1);
717 }
718
719 static const char *
720 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
721 int opindex, signed long *valuep)
722 {
723 return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0);
724 }
725
726 static const char *
727 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
728 int opindex, signed long *valuep)
729 {
730 return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1);
731 }
732
733 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */
734
735 static const char *
736 parse_suffix (const char **strp, char suffix)
737 {
738 const char *newp = *strp;
739
740 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
741 newp = *strp + 2;
742
743 if (ISSPACE (*newp))
744 {
745 *strp = newp;
746 return 0;
747 }
748
749 return "Invalid suffix"; /* Anything -- will not be seen. */
750 }
751
752 static const char *
753 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
754 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
755 {
756 return parse_suffix (strp, 's');
757 }
758
759 static const char *
760 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
761 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
762 {
763 return parse_suffix (strp, 'g');
764 }
765
766 static const char *
767 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
768 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
769 {
770 return parse_suffix (strp, 'q');
771 }
772
773 static const char *
774 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
775 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
776 {
777 return parse_suffix (strp, 'z');
778 }
779
780 /* Parse an empty suffix. Fail if the next char is ':'. */
781
782 static const char *
783 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
784 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
785 {
786 if (**strp == ':')
787 return "Unexpected suffix";
788 return 0;
789 }
790
791 static const char *
792 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
793 int opindex ATTRIBUTE_UNUSED, signed long *valuep)
794 {
795 const char *errmsg;
796 signed long value;
797 signed long junk;
798 const char *newp = *strp;
799
800 /* Parse r0[hl]. */
801 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
802 if (errmsg)
803 return errmsg;
804
805 if (*newp != ',')
806 return _("not a valid r0l/r0h pair");
807 ++newp;
808
809 /* Parse the second register in the pair. */
810 if (value == 0) /* r0l */
811 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
812 else
813 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
814 if (errmsg)
815 return errmsg;
816
817 *strp = newp;
818 *valuep = ! value;
819 return 0;
820 }
821
822 /* Accept .b or .w in any case. */
823
824 static const char *
825 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
826 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
827 {
828 if (**strp == '.'
829 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
830 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
831 {
832 *strp += 2;
833 return NULL;
834 }
835
836 return _("Invalid size specifier");
837 }
838
839 /* Special check to ensure that instruction exists for given machine. */
840
841 int
842 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
843 const CGEN_INSN *insn)
844 {
845 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
846 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
847
848 /* If attributes are absent, assume no restriction. */
849 if (machs == 0)
850 machs = ~0;
851
852 return ((machs & cd->machs)
853 && cgen_bitset_intersect_p (& isas, cd->isas));
854 }
855
856 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
857
858 static const char *
859 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
860 const char **strp,
861 int opindex ATTRIBUTE_UNUSED,
862 unsigned long *valuep,
863 int push)
864 {
865 const char *errmsg = 0;
866 int regno = 0;
867
868 *valuep = 0;
869 while (**strp && **strp != ')')
870 {
871 if (**strp == 'r' || **strp == 'R')
872 {
873 ++*strp;
874 regno = **strp - '0';
875 if (regno > 4)
876 errmsg = _("Register number is not valid");
877 }
878 else if (**strp == 'a' || **strp == 'A')
879 {
880 ++*strp;
881 regno = **strp - '0';
882 if (regno > 2)
883 errmsg = _("Register number is not valid");
884 regno = **strp - '0' + 4;
885 }
886
887 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
888 {
889 regno = 6;
890 ++*strp;
891 }
892
893 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
894 {
895 regno = 7;
896 ++*strp;
897 }
898
899 if (push) /* Mask is reversed for push. */
900 *valuep |= 0x80 >> regno;
901 else
902 *valuep |= 1 << regno;
903
904 ++*strp;
905 if (**strp == ',')
906 {
907 if (*(*strp + 1) == ')')
908 break;
909 ++*strp;
910 }
911 }
912
913 if (!*strp)
914 errmsg = _("Register list is not valid");
915
916 return errmsg;
917 }
918
919 #define POP 0
920 #define PUSH 1
921
922 static const char *
923 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
924 const char **strp,
925 int opindex ATTRIBUTE_UNUSED,
926 unsigned long *valuep)
927 {
928 return parse_regset (cd, strp, opindex, valuep, POP);
929 }
930
931 static const char *
932 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
933 const char **strp,
934 int opindex ATTRIBUTE_UNUSED,
935 unsigned long *valuep)
936 {
937 return parse_regset (cd, strp, opindex, valuep, PUSH);
938 }
939
940 /* -- dis.c */
941
942 const char * m32c_cgen_parse_operand
943 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
944
945 /* Main entry point for operand parsing.
946
947 This function is basically just a big switch statement. Earlier versions
948 used tables to look up the function to use, but
949 - if the table contains both assembler and disassembler functions then
950 the disassembler contains much of the assembler and vice-versa,
951 - there's a lot of inlining possibilities as things grow,
952 - using a switch statement avoids the function call overhead.
953
954 This function could be moved into `parse_insn_normal', but keeping it
955 separate makes clear the interface between `parse_insn_normal' and each of
956 the handlers. */
957
958 const char *
959 m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
960 int opindex,
961 const char ** strp,
962 CGEN_FIELDS * fields)
963 {
964 const char * errmsg = NULL;
965 /* Used by scalar operands that still need to be parsed. */
966 long junk ATTRIBUTE_UNUSED;
967
968 switch (opindex)
969 {
970 case M32C_OPERAND_A0 :
971 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
972 break;
973 case M32C_OPERAND_A1 :
974 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
975 break;
976 case M32C_OPERAND_AN16_PUSH_S :
977 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
978 break;
979 case M32C_OPERAND_BIT16AN :
980 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
981 break;
982 case M32C_OPERAND_BIT16RN :
983 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
984 break;
985 case M32C_OPERAND_BIT3_S :
986 errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S));
987 break;
988 case M32C_OPERAND_BIT32ANPREFIXED :
989 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
990 break;
991 case M32C_OPERAND_BIT32ANUNPREFIXED :
992 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
993 break;
994 case M32C_OPERAND_BIT32RNPREFIXED :
995 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
996 break;
997 case M32C_OPERAND_BIT32RNUNPREFIXED :
998 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
999 break;
1000 case M32C_OPERAND_BITBASE16_16_S8 :
1001 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
1002 break;
1003 case M32C_OPERAND_BITBASE16_16_U16 :
1004 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1005 break;
1006 case M32C_OPERAND_BITBASE16_16_U8 :
1007 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1008 break;
1009 case M32C_OPERAND_BITBASE16_8_U11_S :
1010 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
1011 break;
1012 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1013 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
1014 break;
1015 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1016 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
1017 break;
1018 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1019 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
1020 break;
1021 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1022 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
1023 break;
1024 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1025 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
1026 break;
1027 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1028 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
1029 break;
1030 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1031 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
1032 break;
1033 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1034 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
1035 break;
1036 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1037 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
1038 break;
1039 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1040 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
1041 break;
1042 case M32C_OPERAND_BITNO16R :
1043 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
1044 break;
1045 case M32C_OPERAND_BITNO32PREFIXED :
1046 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
1047 break;
1048 case M32C_OPERAND_BITNO32UNPREFIXED :
1049 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
1050 break;
1051 case M32C_OPERAND_DSP_10_U6 :
1052 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
1053 break;
1054 case M32C_OPERAND_DSP_16_S16 :
1055 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
1056 break;
1057 case M32C_OPERAND_DSP_16_S8 :
1058 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
1059 break;
1060 case M32C_OPERAND_DSP_16_U16 :
1061 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1062 break;
1063 case M32C_OPERAND_DSP_16_U20 :
1064 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
1065 break;
1066 case M32C_OPERAND_DSP_16_U24 :
1067 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
1068 break;
1069 case M32C_OPERAND_DSP_16_U8 :
1070 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1071 break;
1072 case M32C_OPERAND_DSP_24_S16 :
1073 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
1074 break;
1075 case M32C_OPERAND_DSP_24_S8 :
1076 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1077 break;
1078 case M32C_OPERAND_DSP_24_U16 :
1079 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1080 break;
1081 case M32C_OPERAND_DSP_24_U20 :
1082 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1083 break;
1084 case M32C_OPERAND_DSP_24_U24 :
1085 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1086 break;
1087 case M32C_OPERAND_DSP_24_U8 :
1088 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1089 break;
1090 case M32C_OPERAND_DSP_32_S16 :
1091 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1092 break;
1093 case M32C_OPERAND_DSP_32_S8 :
1094 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1095 break;
1096 case M32C_OPERAND_DSP_32_U16 :
1097 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1098 break;
1099 case M32C_OPERAND_DSP_32_U20 :
1100 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1101 break;
1102 case M32C_OPERAND_DSP_32_U24 :
1103 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1104 break;
1105 case M32C_OPERAND_DSP_32_U8 :
1106 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1107 break;
1108 case M32C_OPERAND_DSP_40_S16 :
1109 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1110 break;
1111 case M32C_OPERAND_DSP_40_S8 :
1112 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1113 break;
1114 case M32C_OPERAND_DSP_40_U16 :
1115 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1116 break;
1117 case M32C_OPERAND_DSP_40_U20 :
1118 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20));
1119 break;
1120 case M32C_OPERAND_DSP_40_U24 :
1121 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1122 break;
1123 case M32C_OPERAND_DSP_40_U8 :
1124 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1125 break;
1126 case M32C_OPERAND_DSP_48_S16 :
1127 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1128 break;
1129 case M32C_OPERAND_DSP_48_S8 :
1130 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1131 break;
1132 case M32C_OPERAND_DSP_48_U16 :
1133 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1134 break;
1135 case M32C_OPERAND_DSP_48_U20 :
1136 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20));
1137 break;
1138 case M32C_OPERAND_DSP_48_U24 :
1139 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1140 break;
1141 case M32C_OPERAND_DSP_48_U8 :
1142 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1143 break;
1144 case M32C_OPERAND_DSP_8_S24 :
1145 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24));
1146 break;
1147 case M32C_OPERAND_DSP_8_S8 :
1148 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1149 break;
1150 case M32C_OPERAND_DSP_8_U16 :
1151 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1152 break;
1153 case M32C_OPERAND_DSP_8_U24 :
1154 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1155 break;
1156 case M32C_OPERAND_DSP_8_U6 :
1157 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1158 break;
1159 case M32C_OPERAND_DSP_8_U8 :
1160 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1161 break;
1162 case M32C_OPERAND_DST16AN :
1163 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1164 break;
1165 case M32C_OPERAND_DST16AN_S :
1166 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1167 break;
1168 case M32C_OPERAND_DST16ANHI :
1169 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1170 break;
1171 case M32C_OPERAND_DST16ANQI :
1172 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1173 break;
1174 case M32C_OPERAND_DST16ANQI_S :
1175 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1176 break;
1177 case M32C_OPERAND_DST16ANSI :
1178 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1179 break;
1180 case M32C_OPERAND_DST16RNEXTQI :
1181 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1182 break;
1183 case M32C_OPERAND_DST16RNHI :
1184 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1185 break;
1186 case M32C_OPERAND_DST16RNQI :
1187 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1188 break;
1189 case M32C_OPERAND_DST16RNQI_S :
1190 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1191 break;
1192 case M32C_OPERAND_DST16RNSI :
1193 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1194 break;
1195 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1196 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1197 break;
1198 case M32C_OPERAND_DST32ANPREFIXED :
1199 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1200 break;
1201 case M32C_OPERAND_DST32ANPREFIXEDHI :
1202 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1203 break;
1204 case M32C_OPERAND_DST32ANPREFIXEDQI :
1205 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1206 break;
1207 case M32C_OPERAND_DST32ANPREFIXEDSI :
1208 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1209 break;
1210 case M32C_OPERAND_DST32ANUNPREFIXED :
1211 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1212 break;
1213 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1214 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1215 break;
1216 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1217 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1218 break;
1219 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1220 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1221 break;
1222 case M32C_OPERAND_DST32R0HI_S :
1223 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1224 break;
1225 case M32C_OPERAND_DST32R0QI_S :
1226 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1227 break;
1228 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1229 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1230 break;
1231 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1232 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1233 break;
1234 case M32C_OPERAND_DST32RNPREFIXEDHI :
1235 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1236 break;
1237 case M32C_OPERAND_DST32RNPREFIXEDQI :
1238 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1239 break;
1240 case M32C_OPERAND_DST32RNPREFIXEDSI :
1241 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1242 break;
1243 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1244 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1245 break;
1246 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1247 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1248 break;
1249 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1250 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1251 break;
1252 case M32C_OPERAND_G :
1253 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1254 break;
1255 case M32C_OPERAND_IMM_12_S4 :
1256 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1257 break;
1258 case M32C_OPERAND_IMM_12_S4N :
1259 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4));
1260 break;
1261 case M32C_OPERAND_IMM_13_U3 :
1262 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1263 break;
1264 case M32C_OPERAND_IMM_16_HI :
1265 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1266 break;
1267 case M32C_OPERAND_IMM_16_QI :
1268 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1269 break;
1270 case M32C_OPERAND_IMM_16_SI :
1271 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1272 break;
1273 case M32C_OPERAND_IMM_20_S4 :
1274 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1275 break;
1276 case M32C_OPERAND_IMM_24_HI :
1277 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1278 break;
1279 case M32C_OPERAND_IMM_24_QI :
1280 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1281 break;
1282 case M32C_OPERAND_IMM_24_SI :
1283 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1284 break;
1285 case M32C_OPERAND_IMM_32_HI :
1286 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1287 break;
1288 case M32C_OPERAND_IMM_32_QI :
1289 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1290 break;
1291 case M32C_OPERAND_IMM_32_SI :
1292 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1293 break;
1294 case M32C_OPERAND_IMM_40_HI :
1295 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1296 break;
1297 case M32C_OPERAND_IMM_40_QI :
1298 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1299 break;
1300 case M32C_OPERAND_IMM_40_SI :
1301 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1302 break;
1303 case M32C_OPERAND_IMM_48_HI :
1304 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1305 break;
1306 case M32C_OPERAND_IMM_48_QI :
1307 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1308 break;
1309 case M32C_OPERAND_IMM_48_SI :
1310 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1311 break;
1312 case M32C_OPERAND_IMM_56_HI :
1313 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1314 break;
1315 case M32C_OPERAND_IMM_56_QI :
1316 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1317 break;
1318 case M32C_OPERAND_IMM_64_HI :
1319 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1320 break;
1321 case M32C_OPERAND_IMM_8_HI :
1322 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1323 break;
1324 case M32C_OPERAND_IMM_8_QI :
1325 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1326 break;
1327 case M32C_OPERAND_IMM_8_S4 :
1328 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1329 break;
1330 case M32C_OPERAND_IMM_8_S4N :
1331 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4));
1332 break;
1333 case M32C_OPERAND_IMM_SH_12_S4 :
1334 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1335 break;
1336 case M32C_OPERAND_IMM_SH_20_S4 :
1337 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1338 break;
1339 case M32C_OPERAND_IMM_SH_8_S4 :
1340 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1341 break;
1342 case M32C_OPERAND_IMM1_S :
1343 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1344 break;
1345 case M32C_OPERAND_IMM3_S :
1346 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1347 break;
1348 case M32C_OPERAND_LAB_16_8 :
1349 {
1350 bfd_vma value = 0;
1351 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value);
1352 fields->f_lab_16_8 = value;
1353 }
1354 break;
1355 case M32C_OPERAND_LAB_24_8 :
1356 {
1357 bfd_vma value = 0;
1358 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value);
1359 fields->f_lab_24_8 = value;
1360 }
1361 break;
1362 case M32C_OPERAND_LAB_32_8 :
1363 {
1364 bfd_vma value = 0;
1365 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value);
1366 fields->f_lab_32_8 = value;
1367 }
1368 break;
1369 case M32C_OPERAND_LAB_40_8 :
1370 {
1371 bfd_vma value = 0;
1372 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value);
1373 fields->f_lab_40_8 = value;
1374 }
1375 break;
1376 case M32C_OPERAND_LAB_5_3 :
1377 {
1378 bfd_vma value = 0;
1379 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value);
1380 fields->f_lab_5_3 = value;
1381 }
1382 break;
1383 case M32C_OPERAND_LAB_8_16 :
1384 {
1385 bfd_vma value = 0;
1386 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value);
1387 fields->f_lab_8_16 = value;
1388 }
1389 break;
1390 case M32C_OPERAND_LAB_8_24 :
1391 {
1392 bfd_vma value = 0;
1393 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value);
1394 fields->f_lab_8_24 = value;
1395 }
1396 break;
1397 case M32C_OPERAND_LAB_8_8 :
1398 {
1399 bfd_vma value = 0;
1400 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value);
1401 fields->f_lab_8_8 = value;
1402 }
1403 break;
1404 case M32C_OPERAND_LAB32_JMP_S :
1405 {
1406 bfd_vma value = 0;
1407 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value);
1408 fields->f_lab32_jmp_s = value;
1409 }
1410 break;
1411 case M32C_OPERAND_Q :
1412 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1413 break;
1414 case M32C_OPERAND_R0 :
1415 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1416 break;
1417 case M32C_OPERAND_R0H :
1418 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1419 break;
1420 case M32C_OPERAND_R0L :
1421 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1422 break;
1423 case M32C_OPERAND_R1 :
1424 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1425 break;
1426 case M32C_OPERAND_R1R2R0 :
1427 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1428 break;
1429 case M32C_OPERAND_R2 :
1430 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1431 break;
1432 case M32C_OPERAND_R2R0 :
1433 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1434 break;
1435 case M32C_OPERAND_R3 :
1436 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1437 break;
1438 case M32C_OPERAND_R3R1 :
1439 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1440 break;
1441 case M32C_OPERAND_REGSETPOP :
1442 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1443 break;
1444 case M32C_OPERAND_REGSETPUSH :
1445 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1446 break;
1447 case M32C_OPERAND_RN16_PUSH_S :
1448 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1449 break;
1450 case M32C_OPERAND_S :
1451 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1452 break;
1453 case M32C_OPERAND_SRC16AN :
1454 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1455 break;
1456 case M32C_OPERAND_SRC16ANHI :
1457 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1458 break;
1459 case M32C_OPERAND_SRC16ANQI :
1460 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1461 break;
1462 case M32C_OPERAND_SRC16RNHI :
1463 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1464 break;
1465 case M32C_OPERAND_SRC16RNQI :
1466 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1467 break;
1468 case M32C_OPERAND_SRC32ANPREFIXED :
1469 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1470 break;
1471 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1472 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1473 break;
1474 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1475 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1476 break;
1477 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1478 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1479 break;
1480 case M32C_OPERAND_SRC32ANUNPREFIXED :
1481 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1482 break;
1483 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1484 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1485 break;
1486 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1487 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1488 break;
1489 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1490 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1491 break;
1492 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1493 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1494 break;
1495 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1496 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1497 break;
1498 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1499 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1500 break;
1501 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1502 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1503 break;
1504 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1505 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1506 break;
1507 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1508 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1509 break;
1510 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1511 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1512 break;
1513 case M32C_OPERAND_X :
1514 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1515 break;
1516 case M32C_OPERAND_Z :
1517 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1518 break;
1519 case M32C_OPERAND_COND16_16 :
1520 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1521 break;
1522 case M32C_OPERAND_COND16_24 :
1523 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1524 break;
1525 case M32C_OPERAND_COND16_32 :
1526 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1527 break;
1528 case M32C_OPERAND_COND16C :
1529 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1530 break;
1531 case M32C_OPERAND_COND16J :
1532 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1533 break;
1534 case M32C_OPERAND_COND16J5 :
1535 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1536 break;
1537 case M32C_OPERAND_COND32 :
1538 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1539 break;
1540 case M32C_OPERAND_COND32_16 :
1541 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1542 break;
1543 case M32C_OPERAND_COND32_24 :
1544 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1545 break;
1546 case M32C_OPERAND_COND32_32 :
1547 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1548 break;
1549 case M32C_OPERAND_COND32_40 :
1550 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1551 break;
1552 case M32C_OPERAND_COND32J :
1553 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1554 break;
1555 case M32C_OPERAND_CR1_PREFIXED_32 :
1556 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1557 break;
1558 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1559 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1560 break;
1561 case M32C_OPERAND_CR16 :
1562 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1563 break;
1564 case M32C_OPERAND_CR2_32 :
1565 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1566 break;
1567 case M32C_OPERAND_CR3_PREFIXED_32 :
1568 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1569 break;
1570 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1571 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1572 break;
1573 case M32C_OPERAND_FLAGS16 :
1574 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1575 break;
1576 case M32C_OPERAND_FLAGS32 :
1577 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1578 break;
1579 case M32C_OPERAND_SCCOND32 :
1580 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1581 break;
1582 case M32C_OPERAND_SIZE :
1583 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1584 break;
1585
1586 default :
1587 /* xgettext:c-format */
1588 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1589 abort ();
1590 }
1591
1592 return errmsg;
1593 }
1594
1595 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1596 {
1597 parse_insn_normal,
1598 };
1599
1600 void
1601 m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1602 {
1603 m32c_cgen_init_opcode_table (cd);
1604 m32c_cgen_init_ibld_table (cd);
1605 cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1606 cd->parse_operand = m32c_cgen_parse_operand;
1607 #ifdef CGEN_ASM_INIT_HOOK
1608 CGEN_ASM_INIT_HOOK
1609 #endif
1610 }
1611
1612 \f
1613
1614 /* Regex construction routine.
1615
1616 This translates an opcode syntax string into a regex string,
1617 by replacing any non-character syntax element (such as an
1618 opcode) with the pattern '.*'
1619
1620 It then compiles the regex and stores it in the opcode, for
1621 later use by m32c_cgen_assemble_insn
1622
1623 Returns NULL for success, an error message for failure. */
1624
1625 char *
1626 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1627 {
1628 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1629 const char *mnem = CGEN_INSN_MNEMONIC (insn);
1630 char rxbuf[CGEN_MAX_RX_ELEMENTS];
1631 char *rx = rxbuf;
1632 const CGEN_SYNTAX_CHAR_TYPE *syn;
1633 int reg_err;
1634
1635 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1636
1637 /* Mnemonics come first in the syntax string. */
1638 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1639 return _("missing mnemonic in syntax string");
1640 ++syn;
1641
1642 /* Generate a case sensitive regular expression that emulates case
1643 insensitive matching in the "C" locale. We cannot generate a case
1644 insensitive regular expression because in Turkish locales, 'i' and 'I'
1645 are not equal modulo case conversion. */
1646
1647 /* Copy the literal mnemonic out of the insn. */
1648 for (; *mnem; mnem++)
1649 {
1650 char c = *mnem;
1651
1652 if (ISALPHA (c))
1653 {
1654 *rx++ = '[';
1655 *rx++ = TOLOWER (c);
1656 *rx++ = TOUPPER (c);
1657 *rx++ = ']';
1658 }
1659 else
1660 *rx++ = c;
1661 }
1662
1663 /* Copy any remaining literals from the syntax string into the rx. */
1664 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1665 {
1666 if (CGEN_SYNTAX_CHAR_P (* syn))
1667 {
1668 char c = CGEN_SYNTAX_CHAR (* syn);
1669
1670 switch (c)
1671 {
1672 /* Escape any regex metacharacters in the syntax. */
1673 case '.': case '[': case '\\':
1674 case '*': case '^': case '$':
1675
1676 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1677 case '?': case '{': case '}':
1678 case '(': case ')': case '*':
1679 case '|': case '+': case ']':
1680 #endif
1681 *rx++ = '\\';
1682 *rx++ = c;
1683 break;
1684
1685 default:
1686 if (ISALPHA (c))
1687 {
1688 *rx++ = '[';
1689 *rx++ = TOLOWER (c);
1690 *rx++ = TOUPPER (c);
1691 *rx++ = ']';
1692 }
1693 else
1694 *rx++ = c;
1695 break;
1696 }
1697 }
1698 else
1699 {
1700 /* Replace non-syntax fields with globs. */
1701 *rx++ = '.';
1702 *rx++ = '*';
1703 }
1704 }
1705
1706 /* Trailing whitespace ok. */
1707 * rx++ = '[';
1708 * rx++ = ' ';
1709 * rx++ = '\t';
1710 * rx++ = ']';
1711 * rx++ = '*';
1712
1713 /* But anchor it after that. */
1714 * rx++ = '$';
1715 * rx = '\0';
1716
1717 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1718 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1719
1720 if (reg_err == 0)
1721 return NULL;
1722 else
1723 {
1724 static char msg[80];
1725
1726 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1727 regfree ((regex_t *) CGEN_INSN_RX (insn));
1728 free (CGEN_INSN_RX (insn));
1729 (CGEN_INSN_RX (insn)) = NULL;
1730 return msg;
1731 }
1732 }
1733
1734 \f
1735 /* Default insn parser.
1736
1737 The syntax string is scanned and operands are parsed and stored in FIELDS.
1738 Relocs are queued as we go via other callbacks.
1739
1740 ??? Note that this is currently an all-or-nothing parser. If we fail to
1741 parse the instruction, we return 0 and the caller will start over from
1742 the beginning. Backtracking will be necessary in parsing subexpressions,
1743 but that can be handled there. Not handling backtracking here may get
1744 expensive in the case of the m68k. Deal with later.
1745
1746 Returns NULL for success, an error message for failure. */
1747
1748 static const char *
1749 parse_insn_normal (CGEN_CPU_DESC cd,
1750 const CGEN_INSN *insn,
1751 const char **strp,
1752 CGEN_FIELDS *fields)
1753 {
1754 /* ??? Runtime added insns not handled yet. */
1755 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1756 const char *str = *strp;
1757 const char *errmsg;
1758 const char *p;
1759 const CGEN_SYNTAX_CHAR_TYPE * syn;
1760 #ifdef CGEN_MNEMONIC_OPERANDS
1761 /* FIXME: wip */
1762 int past_opcode_p;
1763 #endif
1764
1765 /* For now we assume the mnemonic is first (there are no leading operands).
1766 We can parse it without needing to set up operand parsing.
1767 GAS's input scrubber will ensure mnemonics are lowercase, but we may
1768 not be called from GAS. */
1769 p = CGEN_INSN_MNEMONIC (insn);
1770 while (*p && TOLOWER (*p) == TOLOWER (*str))
1771 ++p, ++str;
1772
1773 if (* p)
1774 return _("unrecognized instruction");
1775
1776 #ifndef CGEN_MNEMONIC_OPERANDS
1777 if (* str && ! ISSPACE (* str))
1778 return _("unrecognized instruction");
1779 #endif
1780
1781 CGEN_INIT_PARSE (cd);
1782 cgen_init_parse_operand (cd);
1783 #ifdef CGEN_MNEMONIC_OPERANDS
1784 past_opcode_p = 0;
1785 #endif
1786
1787 /* We don't check for (*str != '\0') here because we want to parse
1788 any trailing fake arguments in the syntax string. */
1789 syn = CGEN_SYNTAX_STRING (syntax);
1790
1791 /* Mnemonics come first for now, ensure valid string. */
1792 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1793 abort ();
1794
1795 ++syn;
1796
1797 while (* syn != 0)
1798 {
1799 /* Non operand chars must match exactly. */
1800 if (CGEN_SYNTAX_CHAR_P (* syn))
1801 {
1802 /* FIXME: While we allow for non-GAS callers above, we assume the
1803 first char after the mnemonic part is a space. */
1804 /* FIXME: We also take inappropriate advantage of the fact that
1805 GAS's input scrubber will remove extraneous blanks. */
1806 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1807 {
1808 #ifdef CGEN_MNEMONIC_OPERANDS
1809 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1810 past_opcode_p = 1;
1811 #endif
1812 ++ syn;
1813 ++ str;
1814 }
1815 else if (*str)
1816 {
1817 /* Syntax char didn't match. Can't be this insn. */
1818 static char msg [80];
1819
1820 /* xgettext:c-format */
1821 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1822 CGEN_SYNTAX_CHAR(*syn), *str);
1823 return msg;
1824 }
1825 else
1826 {
1827 /* Ran out of input. */
1828 static char msg [80];
1829
1830 /* xgettext:c-format */
1831 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1832 CGEN_SYNTAX_CHAR(*syn));
1833 return msg;
1834 }
1835 continue;
1836 }
1837
1838 /* We have an operand of some sort. */
1839 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1840 &str, fields);
1841 if (errmsg)
1842 return errmsg;
1843
1844 /* Done with this operand, continue with next one. */
1845 ++ syn;
1846 }
1847
1848 /* If we're at the end of the syntax string, we're done. */
1849 if (* syn == 0)
1850 {
1851 /* FIXME: For the moment we assume a valid `str' can only contain
1852 blanks now. IE: We needn't try again with a longer version of
1853 the insn and it is assumed that longer versions of insns appear
1854 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1855 while (ISSPACE (* str))
1856 ++ str;
1857
1858 if (* str != '\0')
1859 return _("junk at end of line"); /* FIXME: would like to include `str' */
1860
1861 return NULL;
1862 }
1863
1864 /* We couldn't parse it. */
1865 return _("unrecognized instruction");
1866 }
1867 \f
1868 /* Main entry point.
1869 This routine is called for each instruction to be assembled.
1870 STR points to the insn to be assembled.
1871 We assume all necessary tables have been initialized.
1872 The assembled instruction, less any fixups, is stored in BUF.
1873 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1874 still needs to be converted to target byte order, otherwise BUF is an array
1875 of bytes in target byte order.
1876 The result is a pointer to the insn's entry in the opcode table,
1877 or NULL if an error occured (an error message will have already been
1878 printed).
1879
1880 Note that when processing (non-alias) macro-insns,
1881 this function recurses.
1882
1883 ??? It's possible to make this cpu-independent.
1884 One would have to deal with a few minor things.
1885 At this point in time doing so would be more of a curiosity than useful
1886 [for example this file isn't _that_ big], but keeping the possibility in
1887 mind helps keep the design clean. */
1888
1889 const CGEN_INSN *
1890 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1891 const char *str,
1892 CGEN_FIELDS *fields,
1893 CGEN_INSN_BYTES_PTR buf,
1894 char **errmsg)
1895 {
1896 const char *start;
1897 CGEN_INSN_LIST *ilist;
1898 const char *parse_errmsg = NULL;
1899 const char *insert_errmsg = NULL;
1900 int recognized_mnemonic = 0;
1901
1902 /* Skip leading white space. */
1903 while (ISSPACE (* str))
1904 ++ str;
1905
1906 /* The instructions are stored in hashed lists.
1907 Get the first in the list. */
1908 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1909
1910 /* Keep looking until we find a match. */
1911 start = str;
1912 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1913 {
1914 const CGEN_INSN *insn = ilist->insn;
1915 recognized_mnemonic = 1;
1916
1917 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1918 /* Not usually needed as unsupported opcodes
1919 shouldn't be in the hash lists. */
1920 /* Is this insn supported by the selected cpu? */
1921 if (! m32c_cgen_insn_supported (cd, insn))
1922 continue;
1923 #endif
1924 /* If the RELAXED attribute is set, this is an insn that shouldn't be
1925 chosen immediately. Instead, it is used during assembler/linker
1926 relaxation if possible. */
1927 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1928 continue;
1929
1930 str = start;
1931
1932 /* Skip this insn if str doesn't look right lexically. */
1933 if (CGEN_INSN_RX (insn) != NULL &&
1934 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1935 continue;
1936
1937 /* Allow parse/insert handlers to obtain length of insn. */
1938 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1939
1940 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1941 if (parse_errmsg != NULL)
1942 continue;
1943
1944 /* ??? 0 is passed for `pc'. */
1945 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1946 (bfd_vma) 0);
1947 if (insert_errmsg != NULL)
1948 continue;
1949
1950 /* It is up to the caller to actually output the insn and any
1951 queued relocs. */
1952 return insn;
1953 }
1954
1955 {
1956 static char errbuf[150];
1957 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1958 const char *tmp_errmsg;
1959
1960 /* If requesting verbose error messages, use insert_errmsg.
1961 Failing that, use parse_errmsg. */
1962 tmp_errmsg = (insert_errmsg ? insert_errmsg :
1963 parse_errmsg ? parse_errmsg :
1964 recognized_mnemonic ?
1965 _("unrecognized form of instruction") :
1966 _("unrecognized instruction"));
1967
1968 if (strlen (start) > 50)
1969 /* xgettext:c-format */
1970 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1971 else
1972 /* xgettext:c-format */
1973 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1974 #else
1975 if (strlen (start) > 50)
1976 /* xgettext:c-format */
1977 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1978 else
1979 /* xgettext:c-format */
1980 sprintf (errbuf, _("bad instruction `%.50s'"), start);
1981 #endif
1982
1983 *errmsg = errbuf;
1984 return NULL;
1985 }
1986 }
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