opcodes/m68k-dis.c

   1 /* Print Motorola 68k instructions.
   2    Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
   3    1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
   4    Free Software Foundation, Inc.
   5
   6    This file is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 #include "sysdep.h"
  22 #include "dis-asm.h"
  23 #include "floatformat.h"
  24 #include "libiberty.h"
  25 #include "opintl.h"
  26
  27 #include "opcode/m68k.h"
  28
  29 /* Local function prototypes.  */
  30
  31 const char * const fpcr_names[] =
  32 {
  33   "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
  34   "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
  35 };
  36
  37 static char *const reg_names[] =
  38 {
  39   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
  40   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
  41   "%ps", "%pc"
  42 };
  43
  44 /* Name of register halves for MAC/EMAC.
  45    Seperate from reg_names since 'spu', 'fpl' look weird.  */
  46 static char *const reg_half_names[] =
  47 {
  48   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
  49   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
  50   "%ps", "%pc"
  51 };
  52
  53 /* Sign-extend an (unsigned char).  */
  54 #if __STDC__ == 1
  55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
  56 #else
  57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
  58 #endif
  59
  60 /* Get a 1 byte signed integer.  */
  61 #define NEXTBYTE(p)  (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
  62
  63 /* Get a 2 byte signed integer.  */
  64 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
  65 #define NEXTWORD(p)  \
  66   (p += 2, FETCH_DATA (info, p), \
  67    COERCE16 ((p[-2] << 8) + p[-1]))
  68
  69 /* Get a 4 byte signed integer.  */
  70 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
  71 #define NEXTLONG(p)  \
  72   (p += 4, FETCH_DATA (info, p), \
  73    (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
  74
  75 /* Get a 4 byte unsigned integer.  */
  76 #define NEXTULONG(p)  \
  77   (p += 4, FETCH_DATA (info, p), \
  78    (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
  79
  80 /* Get a single precision float.  */
  81 #define NEXTSINGLE(val, p) \
  82   (p += 4, FETCH_DATA (info, p), \
  83    floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
  84
  85 /* Get a double precision float.  */
  86 #define NEXTDOUBLE(val, p) \
  87   (p += 8, FETCH_DATA (info, p), \
  88    floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
  89
  90 /* Get an extended precision float.  */
  91 #define NEXTEXTEND(val, p) \
  92   (p += 12, FETCH_DATA (info, p), \
  93    floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
  94
  95 /* Need a function to convert from packed to double
  96    precision.   Actually, it's easier to print a
  97    packed number than a double anyway, so maybe
  98    there should be a special case to handle this... */
  99 #define NEXTPACKED(p) \
 100   (p += 12, FETCH_DATA (info, p), 0.0)
 101 \f
 102 /* Maximum length of an instruction.  */
 103 #define MAXLEN 22
 104
 105 #include <setjmp.h>
 106
 107 struct private
 108 {
 109   /* Points to first byte not fetched.  */
 110   bfd_byte *max_fetched;
 111   bfd_byte the_buffer[MAXLEN];
 112   bfd_vma insn_start;
 113   jmp_buf bailout;
 114 };
 115
 116 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 117    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 118    on error.  */
 119 #define FETCH_DATA(info, addr) \
 120   ((addr) <= ((struct private *) (info->private_data))->max_fetched \
 121    ? 1 : fetch_data ((info), (addr)))
 122
 123 static int
 124 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 125 {
 126   int status;
 127   struct private *priv = (struct private *)info->private_data;
 128   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 129
 130   status = (*info->read_memory_func) (start,
 131                                       priv->max_fetched,
 132                                       addr - priv->max_fetched,
 133                                       info);
 134   if (status != 0)
 135     {
 136       (*info->memory_error_func) (status, start, info);
 137       longjmp (priv->bailout, 1);
 138     }
 139   else
 140     priv->max_fetched = addr;
 141   return 1;
 142 }
 143 \f
 144 /* This function is used to print to the bit-bucket.  */
 145 static int
 146 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
 147                const char *format ATTRIBUTE_UNUSED,
 148                ...)
 149 {
 150   return 0;
 151 }
 152
 153 static void
 154 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
 155                      struct disassemble_info *info ATTRIBUTE_UNUSED)
 156 {
 157 }
 158
 159 /* Fetch BITS bits from a position in the instruction specified by CODE.
 160    CODE is a "place to put an argument", or 'x' for a destination
 161    that is a general address (mode and register).
 162    BUFFER contains the instruction.  */
 163
 164 static int
 165 fetch_arg (unsigned char *buffer,
 166            int code,
 167            int bits,
 168            disassemble_info *info)
 169 {
 170   int val = 0;
 171
 172   switch (code)
 173     {
 174     case '/': /* MAC/EMAC mask bit.  */
 175       val = buffer[3] >> 5;
 176       break;
 177
 178     case 'G': /* EMAC ACC load.  */
 179       val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
 180       break;
 181
 182     case 'H': /* EMAC ACC !load.  */
 183       val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
 184       break;
 185
 186     case ']': /* EMAC ACCEXT bit.  */
 187       val = buffer[0] >> 2;
 188       break;
 189
 190     case 'I': /* MAC/EMAC scale factor.  */
 191       val = buffer[2] >> 1;
 192       break;
 193
 194     case 'F': /* EMAC ACCx.  */
 195       val = buffer[0] >> 1;
 196       break;
 197
 198     case 'f':
 199       val = buffer[1];
 200       break;
 201
 202     case 's':
 203       val = buffer[1];
 204       break;
 205
 206     case 'd':                   /* Destination, for register or quick.  */
 207       val = (buffer[0] << 8) + buffer[1];
 208       val >>= 9;
 209       break;
 210
 211     case 'x':                   /* Destination, for general arg.  */
 212       val = (buffer[0] << 8) + buffer[1];
 213       val >>= 6;
 214       break;
 215
 216     case 'k':
 217       FETCH_DATA (info, buffer + 3);
 218       val = (buffer[3] >> 4);
 219       break;
 220
 221     case 'C':
 222       FETCH_DATA (info, buffer + 3);
 223       val = buffer[3];
 224       break;
 225
 226     case '1':
 227       FETCH_DATA (info, buffer + 3);
 228       val = (buffer[2] << 8) + buffer[3];
 229       val >>= 12;
 230       break;
 231
 232     case '2':
 233       FETCH_DATA (info, buffer + 3);
 234       val = (buffer[2] << 8) + buffer[3];
 235       val >>= 6;
 236       break;
 237
 238     case '3':
 239     case 'j':
 240       FETCH_DATA (info, buffer + 3);
 241       val = (buffer[2] << 8) + buffer[3];
 242       break;
 243
 244     case '4':
 245       FETCH_DATA (info, buffer + 5);
 246       val = (buffer[4] << 8) + buffer[5];
 247       val >>= 12;
 248       break;
 249
 250     case '5':
 251       FETCH_DATA (info, buffer + 5);
 252       val = (buffer[4] << 8) + buffer[5];
 253       val >>= 6;
 254       break;
 255
 256     case '6':
 257       FETCH_DATA (info, buffer + 5);
 258       val = (buffer[4] << 8) + buffer[5];
 259       break;
 260
 261     case '7':
 262       FETCH_DATA (info, buffer + 3);
 263       val = (buffer[2] << 8) + buffer[3];
 264       val >>= 7;
 265       break;
 266
 267     case '8':
 268       FETCH_DATA (info, buffer + 3);
 269       val = (buffer[2] << 8) + buffer[3];
 270       val >>= 10;
 271       break;
 272
 273     case '9':
 274       FETCH_DATA (info, buffer + 3);
 275       val = (buffer[2] << 8) + buffer[3];
 276       val >>= 5;
 277       break;
 278
 279     case 'e':
 280       val = (buffer[1] >> 6);
 281       break;
 282
 283     case 'm':
 284       val = (buffer[1] & 0x40 ? 0x8 : 0)
 285         | ((buffer[0] >> 1) & 0x7)
 286         | (buffer[3] & 0x80 ? 0x10 : 0);
 287       break;
 288
 289     case 'n':
 290       val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
 291       break;
 292
 293     case 'o':
 294       val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
 295       break;
 296
 297     case 'M':
 298       val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
 299       break;
 300
 301     case 'N':
 302       val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
 303       break;
 304
 305     case 'h':
 306       val = buffer[2] >> 2;
 307       break;
 308
 309     default:
 310       abort ();
 311     }
 312
 313   switch (bits)
 314     {
 315     case 1:
 316       return val & 1;
 317     case 2:
 318       return val & 3;
 319     case 3:
 320       return val & 7;
 321     case 4:
 322       return val & 017;
 323     case 5:
 324       return val & 037;
 325     case 6:
 326       return val & 077;
 327     case 7:
 328       return val & 0177;
 329     case 8:
 330       return val & 0377;
 331     case 12:
 332       return val & 07777;
 333     default:
 334       abort ();
 335     }
 336 }
 337
 338 /* Check if an EA is valid for a particular code.  This is required
 339    for the EMAC instructions since the type of source address determines
 340    if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
 341    is a non-load EMAC instruction and the bits mean register Ry.
 342    A similar case exists for the movem instructions where the register
 343    mask is interpreted differently for different EAs.  */
 344
 345 static bfd_boolean
 346 m68k_valid_ea (char code, int val)
 347 {
 348   int mode, mask;
 349 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
 350   (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
 351    | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
 352
 353   switch (code)
 354     {
 355     case '*':
 356       mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
 357       break;
 358     case '~':
 359       mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
 360       break;
 361     case '%':
 362       mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
 363       break;
 364     case ';':
 365       mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
 366       break;
 367     case '@':
 368       mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
 369       break;
 370     case '!':
 371       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
 372       break;
 373     case '&':
 374       mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
 375       break;
 376     case '$':
 377       mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
 378       break;
 379     case '?':
 380       mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
 381       break;
 382     case '/':
 383       mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
 384       break;
 385     case '|':
 386       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
 387       break;
 388     case '>':
 389       mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
 390       break;
 391     case '<':
 392       mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
 393       break;
 394     case 'm':
 395       mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
 396       break;
 397     case 'n':
 398       mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
 399       break;
 400     case 'o':
 401       mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
 402       break;
 403     case 'p':
 404       mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
 405       break;
 406     case 'q':
 407       mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
 408       break;
 409     case 'v':
 410       mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
 411       break;
 412     case 'b':
 413       mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
 414       break;
 415     case 'w':
 416       mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
 417       break;
 418     case 'y':
 419       mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
 420       break;
 421     case 'z':
 422       mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
 423       break;
 424     case '4':
 425       mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
 426       break;
 427     default:
 428       abort ();
 429     }
 430 #undef M
 431
 432   mode = (val >> 3) & 7;
 433   if (mode == 7)
 434     mode += val & 7;
 435   return (mask & (1 << mode)) != 0;
 436 }
 437
 438 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
 439    REGNO = -1 for pc, -2 for none (suppressed).  */
 440
 441 static void
 442 print_base (int regno, bfd_vma disp, disassemble_info *info)
 443 {
 444   if (regno == -1)
 445     {
 446       (*info->fprintf_func) (info->stream, "%%pc@(");
 447       (*info->print_address_func) (disp, info);
 448     }
 449   else
 450     {
 451       char buf[50];
 452
 453       if (regno == -2)
 454         (*info->fprintf_func) (info->stream, "@(");
 455       else if (regno == -3)
 456         (*info->fprintf_func) (info->stream, "%%zpc@(");
 457       else
 458         (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
 459
 460       sprintf_vma (buf, disp);
 461       (*info->fprintf_func) (info->stream, "%s", buf);
 462     }
 463 }
 464
 465 /* Print an indexed argument.  The base register is BASEREG (-1 for pc).
 466    P points to extension word, in buffer.
 467    ADDR is the nominal core address of that extension word.  */
 468
 469 static unsigned char *
 470 print_indexed (int basereg,
 471                unsigned char *p,
 472                bfd_vma addr,
 473                disassemble_info *info)
 474 {
 475   int word;
 476   static char *const scales[] = { "", ":2", ":4", ":8" };
 477   bfd_vma base_disp;
 478   bfd_vma outer_disp;
 479   char buf[40];
 480   char vmabuf[50];
 481
 482   word = NEXTWORD (p);
 483
 484   /* Generate the text for the index register.
 485      Where this will be output is not yet determined.  */
 486   sprintf (buf, "%s:%c%s",
 487            reg_names[(word >> 12) & 0xf],
 488            (word & 0x800) ? 'l' : 'w',
 489            scales[(word >> 9) & 3]);
 490
 491   /* Handle the 68000 style of indexing.  */
 492
 493   if ((word & 0x100) == 0)
 494     {
 495       base_disp = word & 0xff;
 496       if ((base_disp & 0x80) != 0)
 497         base_disp -= 0x100;
 498       if (basereg == -1)
 499         base_disp += addr;
 500       print_base (basereg, base_disp, info);
 501       (*info->fprintf_func) (info->stream, ",%s)", buf);
 502       return p;
 503     }
 504
 505   /* Handle the generalized kind.  */
 506   /* First, compute the displacement to add to the base register.  */
 507   if (word & 0200)
 508     {
 509       if (basereg == -1)
 510         basereg = -3;
 511       else
 512         basereg = -2;
 513     }
 514   if (word & 0100)
 515     buf[0] = '\0';
 516   base_disp = 0;
 517   switch ((word >> 4) & 3)
 518     {
 519     case 2:
 520       base_disp = NEXTWORD (p);
 521       break;
 522     case 3:
 523       base_disp = NEXTLONG (p);
 524     }
 525   if (basereg == -1)
 526     base_disp += addr;
 527
 528   /* Handle single-level case (not indirect).  */
 529   if ((word & 7) == 0)
 530     {
 531       print_base (basereg, base_disp, info);
 532       if (buf[0] != '\0')
 533         (*info->fprintf_func) (info->stream, ",%s", buf);
 534       (*info->fprintf_func) (info->stream, ")");
 535       return p;
 536     }
 537
 538   /* Two level.  Compute displacement to add after indirection.  */
 539   outer_disp = 0;
 540   switch (word & 3)
 541     {
 542     case 2:
 543       outer_disp = NEXTWORD (p);
 544       break;
 545     case 3:
 546       outer_disp = NEXTLONG (p);
 547     }
 548
 549   print_base (basereg, base_disp, info);
 550   if ((word & 4) == 0 && buf[0] != '\0')
 551     {
 552       (*info->fprintf_func) (info->stream, ",%s", buf);
 553       buf[0] = '\0';
 554     }
 555   sprintf_vma (vmabuf, outer_disp);
 556   (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
 557   if (buf[0] != '\0')
 558     (*info->fprintf_func) (info->stream, ",%s", buf);
 559   (*info->fprintf_func) (info->stream, ")");
 560
 561   return p;
 562 }
 563
 564 /* Returns number of bytes "eaten" by the operand, or
 565    return -1 if an invalid operand was found, or -2 if
 566    an opcode tabe error was found.
 567    ADDR is the pc for this arg to be relative to.  */
 568
 569 static int
 570 print_insn_arg (const char *d,
 571                 unsigned char *buffer,
 572                 unsigned char *p0,
 573                 bfd_vma addr,
 574                 disassemble_info *info)
 575 {
 576   int val = 0;
 577   int place = d[1];
 578   unsigned char *p = p0;
 579   int regno;
 580   const char *regname;
 581   unsigned char *p1;
 582   double flval;
 583   int flt_p;
 584   bfd_signed_vma disp;
 585   unsigned int uval;
 586
 587   switch (*d)
 588     {
 589     case 'c':           /* Cache identifier.  */
 590       {
 591         static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
 592         val = fetch_arg (buffer, place, 2, info);
 593         (*info->fprintf_func) (info->stream, cacheFieldName[val]);
 594         break;
 595       }
 596
 597     case 'a':           /* Address register indirect only. Cf. case '+'.  */
 598       {
 599         (*info->fprintf_func)
 600           (info->stream,
 601            "%s@",
 602            reg_names[fetch_arg (buffer, place, 3, info) + 8]);
 603         break;
 604       }
 605
 606     case '_':           /* 32-bit absolute address for move16.  */
 607       {
 608         uval = NEXTULONG (p);
 609         (*info->print_address_func) (uval, info);
 610         break;
 611       }
 612
 613     case 'C':
 614       (*info->fprintf_func) (info->stream, "%%ccr");
 615       break;
 616
 617     case 'S':
 618       (*info->fprintf_func) (info->stream, "%%sr");
 619       break;
 620
 621     case 'U':
 622       (*info->fprintf_func) (info->stream, "%%usp");
 623       break;
 624
 625     case 'E':
 626       (*info->fprintf_func) (info->stream, "%%acc");
 627       break;
 628
 629     case 'G':
 630       (*info->fprintf_func) (info->stream, "%%macsr");
 631       break;
 632
 633     case 'H':
 634       (*info->fprintf_func) (info->stream, "%%mask");
 635       break;
 636
 637     case 'J':
 638       {
 639         /* FIXME: There's a problem here, different m68k processors call the
 640            same address different names. This table can't get it right
 641            because it doesn't know which processor it's disassembling for.  */
 642         static const struct { char *name; int value; } names[]
 643           = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
 644              {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
 645              {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
 646              {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
 647              {"%msp", 0x803}, {"%isp", 0x804},
 648              /* reg c04 is sometimes called flashbar or rambar.
 649                 rec c05 is also sometimes called rambar.  */
 650              {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
 651
 652              /* Should we be calling this psr like we do in case 'Y'?  */
 653              {"%mmusr",0x805},
 654
 655              {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
 656
 657              /* Fido added these.  */
 658              {"%cac", 0xffe}, {"%mbb", 0xfff}};
 659
 660         val = fetch_arg (buffer, place, 12, info);
 661         for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
 662           if (names[regno].value == val)
 663             {
 664               (*info->fprintf_func) (info->stream, "%s", names[regno].name);
 665               break;
 666             }
 667         if (regno < 0)
 668           (*info->fprintf_func) (info->stream, "%d", val);
 669       }
 670       break;
 671
 672     case 'Q':
 673       val = fetch_arg (buffer, place, 3, info);
 674       /* 0 means 8, except for the bkpt instruction... */
 675       if (val == 0 && d[1] != 's')
 676         val = 8;
 677       (*info->fprintf_func) (info->stream, "#%d", val);
 678       break;
 679
 680     case 'x':
 681       val = fetch_arg (buffer, place, 3, info);
 682       /* 0 means -1.  */
 683       if (val == 0)
 684         val = -1;
 685       (*info->fprintf_func) (info->stream, "#%d", val);
 686       break;
 687
 688     case 'M':
 689       if (place == 'h')
 690         {
 691           static char *const scalefactor_name[] = { "<<", ">>" };
 692           val = fetch_arg (buffer, place, 1, info);
 693           (*info->fprintf_func) (info->stream, scalefactor_name[val]);
 694         }
 695       else
 696         {
 697           val = fetch_arg (buffer, place, 8, info);
 698           if (val & 0x80)
 699             val = val - 0x100;
 700           (*info->fprintf_func) (info->stream, "#%d", val);
 701         }
 702       break;
 703
 704     case 'T':
 705       val = fetch_arg (buffer, place, 4, info);
 706       (*info->fprintf_func) (info->stream, "#%d", val);
 707       break;
 708
 709     case 'D':
 710       (*info->fprintf_func) (info->stream, "%s",
 711                              reg_names[fetch_arg (buffer, place, 3, info)]);
 712       break;
 713
 714     case 'A':
 715       (*info->fprintf_func)
 716         (info->stream, "%s",
 717          reg_names[fetch_arg (buffer, place, 3, info) + 010]);
 718       break;
 719
 720     case 'R':
 721       (*info->fprintf_func)
 722         (info->stream, "%s",
 723          reg_names[fetch_arg (buffer, place, 4, info)]);
 724       break;
 725
 726     case 'r':
 727       regno = fetch_arg (buffer, place, 4, info);
 728       if (regno > 7)
 729         (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
 730       else
 731         (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
 732       break;
 733
 734     case 'F':
 735       (*info->fprintf_func)
 736         (info->stream, "%%fp%d",
 737          fetch_arg (buffer, place, 3, info));
 738       break;
 739
 740     case 'O':
 741       val = fetch_arg (buffer, place, 6, info);
 742       if (val & 0x20)
 743         (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
 744       else
 745         (*info->fprintf_func) (info->stream, "%d", val);
 746       break;
 747
 748     case '+':
 749       (*info->fprintf_func)
 750         (info->stream, "%s@+",
 751          reg_names[fetch_arg (buffer, place, 3, info) + 8]);
 752       break;
 753
 754     case '-':
 755       (*info->fprintf_func)
 756         (info->stream, "%s@-",
 757          reg_names[fetch_arg (buffer, place, 3, info) + 8]);
 758       break;
 759
 760     case 'k':
 761       if (place == 'k')
 762         (*info->fprintf_func)
 763           (info->stream, "{%s}",
 764            reg_names[fetch_arg (buffer, place, 3, info)]);
 765       else if (place == 'C')
 766         {
 767           val = fetch_arg (buffer, place, 7, info);
 768           if (val > 63)         /* This is a signed constant.  */
 769             val -= 128;
 770           (*info->fprintf_func) (info->stream, "{#%d}", val);
 771         }
 772       else
 773         return -2;
 774       break;
 775
 776     case '#':
 777     case '^':
 778       p1 = buffer + (*d == '#' ? 2 : 4);
 779       if (place == 's')
 780         val = fetch_arg (buffer, place, 4, info);
 781       else if (place == 'C')
 782         val = fetch_arg (buffer, place, 7, info);
 783       else if (place == '8')
 784         val = fetch_arg (buffer, place, 3, info);
 785       else if (place == '3')
 786         val = fetch_arg (buffer, place, 8, info);
 787       else if (place == 'b')
 788         val = NEXTBYTE (p1);
 789       else if (place == 'w' || place == 'W')
 790         val = NEXTWORD (p1);
 791       else if (place == 'l')
 792         val = NEXTLONG (p1);
 793       else
 794         return -2;
 795       (*info->fprintf_func) (info->stream, "#%d", val);
 796       break;
 797
 798     case 'B':
 799       if (place == 'b')
 800         disp = NEXTBYTE (p);
 801       else if (place == 'B')
 802         disp = COERCE_SIGNED_CHAR (buffer[1]);
 803       else if (place == 'w' || place == 'W')
 804         disp = NEXTWORD (p);
 805       else if (place == 'l' || place == 'L' || place == 'C')
 806         disp = NEXTLONG (p);
 807       else if (place == 'g')
 808         {
 809           disp = NEXTBYTE (buffer);
 810           if (disp == 0)
 811             disp = NEXTWORD (p);
 812           else if (disp == -1)
 813             disp = NEXTLONG (p);
 814         }
 815       else if (place == 'c')
 816         {
 817           if (buffer[1] & 0x40)         /* If bit six is one, long offset.  */
 818             disp = NEXTLONG (p);
 819           else
 820             disp = NEXTWORD (p);
 821         }
 822       else
 823         return -2;
 824
 825       (*info->print_address_func) (addr + disp, info);
 826       break;
 827
 828     case 'd':
 829       val = NEXTWORD (p);
 830       (*info->fprintf_func)
 831         (info->stream, "%s@(%d)",
 832          reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
 833       break;
 834
 835     case 's':
 836       (*info->fprintf_func) (info->stream, "%s",
 837                              fpcr_names[fetch_arg (buffer, place, 3, info)]);
 838       break;
 839
 840     case 'e':
 841       val = fetch_arg(buffer, place, 2, info);
 842       (*info->fprintf_func) (info->stream, "%%acc%d", val);
 843       break;
 844
 845     case 'g':
 846       val = fetch_arg(buffer, place, 1, info);
 847       (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23");
 848       break;
 849
 850     case 'i':
 851       val = fetch_arg(buffer, place, 2, info);
 852       if (val == 1)
 853         (*info->fprintf_func) (info->stream, "<<");
 854       else if (val == 3)
 855         (*info->fprintf_func) (info->stream, ">>");
 856       else
 857         return -1;
 858       break;
 859
 860     case 'I':
 861       /* Get coprocessor ID... */
 862       val = fetch_arg (buffer, 'd', 3, info);
 863
 864       if (val != 1)                             /* Unusual coprocessor ID?  */
 865         (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
 866       break;
 867
 868     case '4':
 869     case '*':
 870     case '~':
 871     case '%':
 872     case ';':
 873     case '@':
 874     case '!':
 875     case '$':
 876     case '?':
 877     case '/':
 878     case '&':
 879     case '|':
 880     case '<':
 881     case '>':
 882     case 'm':
 883     case 'n':
 884     case 'o':
 885     case 'p':
 886     case 'q':
 887     case 'v':
 888     case 'b':
 889     case 'w':
 890     case 'y':
 891     case 'z':
 892       if (place == 'd')
 893         {
 894           val = fetch_arg (buffer, 'x', 6, info);
 895           val = ((val & 7) << 3) + ((val >> 3) & 7);
 896         }
 897       else
 898         val = fetch_arg (buffer, 's', 6, info);
 899
 900       /* If the <ea> is invalid for *d, then reject this match.  */
 901       if (!m68k_valid_ea (*d, val))
 902         return -1;
 903
 904       /* Get register number assuming address register.  */
 905       regno = (val & 7) + 8;
 906       regname = reg_names[regno];
 907       switch (val >> 3)
 908         {
 909         case 0:
 910           (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
 911           break;
 912
 913         case 1:
 914           (*info->fprintf_func) (info->stream, "%s", regname);
 915           break;
 916
 917         case 2:
 918           (*info->fprintf_func) (info->stream, "%s@", regname);
 919           break;
 920
 921         case 3:
 922           (*info->fprintf_func) (info->stream, "%s@+", regname);
 923           break;
 924
 925         case 4:
 926           (*info->fprintf_func) (info->stream, "%s@-", regname);
 927           break;
 928
 929         case 5:
 930           val = NEXTWORD (p);
 931           (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
 932           break;
 933
 934         case 6:
 935           p = print_indexed (regno, p, addr, info);
 936           break;
 937
 938         case 7:
 939           switch (val & 7)
 940             {
 941             case 0:
 942               val = NEXTWORD (p);
 943               (*info->print_address_func) (val, info);
 944               break;
 945
 946             case 1:
 947               uval = NEXTULONG (p);
 948               (*info->print_address_func) (uval, info);
 949               break;
 950
 951             case 2:
 952               val = NEXTWORD (p);
 953               (*info->fprintf_func) (info->stream, "%%pc@(");
 954               (*info->print_address_func) (addr + val, info);
 955               (*info->fprintf_func) (info->stream, ")");
 956               break;
 957
 958             case 3:
 959               p = print_indexed (-1, p, addr, info);
 960               break;
 961
 962             case 4:
 963               flt_p = 1;        /* Assume it's a float... */
 964               switch (place)
 965               {
 966                 case 'b':
 967                   val = NEXTBYTE (p);
 968                   flt_p = 0;
 969                   break;
 970
 971                 case 'w':
 972                   val = NEXTWORD (p);
 973                   flt_p = 0;
 974                   break;
 975
 976                 case 'l':
 977                   val = NEXTLONG (p);
 978                   flt_p = 0;
 979                   break;
 980
 981                 case 'f':
 982                   NEXTSINGLE (flval, p);
 983                   break;
 984
 985                 case 'F':
 986                   NEXTDOUBLE (flval, p);
 987                   break;
 988
 989                 case 'x':
 990                   NEXTEXTEND (flval, p);
 991                   break;
 992
 993                 case 'p':
 994                   flval = NEXTPACKED (p);
 995                   break;
 996
 997                 default:
 998                   return -1;
 999               }
1000               if (flt_p)        /* Print a float? */
1001                 (*info->fprintf_func) (info->stream, "#%g", flval);
1002               else
1003                 (*info->fprintf_func) (info->stream, "#%d", val);
1004               break;
1005
1006             default:
1007               return -1;
1008             }
1009         }
1010
1011       /* If place is '/', then this is the case of the mask bit for
1012          mac/emac loads. Now that the arg has been printed, grab the
1013          mask bit and if set, add a '&' to the arg.  */
1014       if (place == '/')
1015         {
1016           val = fetch_arg (buffer, place, 1, info);
1017           if (val)
1018             info->fprintf_func (info->stream, "&");
1019         }
1020       break;
1021
1022     case 'L':
1023     case 'l':
1024         if (place == 'w')
1025           {
1026             char doneany;
1027             p1 = buffer + 2;
1028             val = NEXTWORD (p1);
1029             /* Move the pointer ahead if this point is farther ahead
1030                than the last.  */
1031             p = p1 > p ? p1 : p;
1032             if (val == 0)
1033               {
1034                 (*info->fprintf_func) (info->stream, "#0");
1035                 break;
1036               }
1037             if (*d == 'l')
1038               {
1039                 int newval = 0;
1040
1041                 for (regno = 0; regno < 16; ++regno)
1042                   if (val & (0x8000 >> regno))
1043                     newval |= 1 << regno;
1044                 val = newval;
1045               }
1046             val &= 0xffff;
1047             doneany = 0;
1048             for (regno = 0; regno < 16; ++regno)
1049               if (val & (1 << regno))
1050                 {
1051                   int first_regno;
1052
1053                   if (doneany)
1054                     (*info->fprintf_func) (info->stream, "/");
1055                   doneany = 1;
1056                   (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1057                   first_regno = regno;
1058                   while (val & (1 << (regno + 1)))
1059                     ++regno;
1060                   if (regno > first_regno)
1061                     (*info->fprintf_func) (info->stream, "-%s",
1062                                            reg_names[regno]);
1063                 }
1064           }
1065         else if (place == '3')
1066           {
1067             /* `fmovem' insn.  */
1068             char doneany;
1069             val = fetch_arg (buffer, place, 8, info);
1070             if (val == 0)
1071               {
1072                 (*info->fprintf_func) (info->stream, "#0");
1073                 break;
1074               }
1075             if (*d == 'l')
1076               {
1077                 int newval = 0;
1078
1079                 for (regno = 0; regno < 8; ++regno)
1080                   if (val & (0x80 >> regno))
1081                     newval |= 1 << regno;
1082                 val = newval;
1083               }
1084             val &= 0xff;
1085             doneany = 0;
1086             for (regno = 0; regno < 8; ++regno)
1087               if (val & (1 << regno))
1088                 {
1089                   int first_regno;
1090                   if (doneany)
1091                     (*info->fprintf_func) (info->stream, "/");
1092                   doneany = 1;
1093                   (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1094                   first_regno = regno;
1095                   while (val & (1 << (regno + 1)))
1096                     ++regno;
1097                   if (regno > first_regno)
1098                     (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1099                 }
1100           }
1101         else if (place == '8')
1102           {
1103             /* fmoveml for FP status registers.  */
1104             (*info->fprintf_func) (info->stream, "%s",
1105                                    fpcr_names[fetch_arg (buffer, place, 3,
1106                                                          info)]);
1107           }
1108         else
1109           return -2;
1110       break;
1111
1112     case 'X':
1113       place = '8';
1114     case 'Y':
1115     case 'Z':
1116     case 'W':
1117     case '0':
1118     case '1':
1119     case '2':
1120     case '3':
1121       {
1122         int val = fetch_arg (buffer, place, 5, info);
1123         char *name = 0;
1124
1125         switch (val)
1126           {
1127           case 2: name = "%tt0"; break;
1128           case 3: name = "%tt1"; break;
1129           case 0x10: name = "%tc"; break;
1130           case 0x11: name = "%drp"; break;
1131           case 0x12: name = "%srp"; break;
1132           case 0x13: name = "%crp"; break;
1133           case 0x14: name = "%cal"; break;
1134           case 0x15: name = "%val"; break;
1135           case 0x16: name = "%scc"; break;
1136           case 0x17: name = "%ac"; break;
1137           case 0x18: name = "%psr"; break;
1138           case 0x19: name = "%pcsr"; break;
1139           case 0x1c:
1140           case 0x1d:
1141             {
1142               int break_reg = ((buffer[3] >> 2) & 7);
1143
1144               (*info->fprintf_func)
1145                 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1146                  break_reg);
1147             }
1148             break;
1149           default:
1150             (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1151           }
1152         if (name)
1153           (*info->fprintf_func) (info->stream, "%s", name);
1154       }
1155       break;
1156
1157     case 'f':
1158       {
1159         int fc = fetch_arg (buffer, place, 5, info);
1160
1161         if (fc == 1)
1162           (*info->fprintf_func) (info->stream, "%%dfc");
1163         else if (fc == 0)
1164           (*info->fprintf_func) (info->stream, "%%sfc");
1165         else
1166           /* xgettext:c-format */
1167           (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1168       }
1169       break;
1170
1171     case 'V':
1172       (*info->fprintf_func) (info->stream, "%%val");
1173       break;
1174
1175     case 't':
1176       {
1177         int level = fetch_arg (buffer, place, 3, info);
1178
1179         (*info->fprintf_func) (info->stream, "%d", level);
1180       }
1181       break;
1182
1183     case 'u':
1184       {
1185         short is_upper = 0;
1186         int reg = fetch_arg (buffer, place, 5, info);
1187
1188         if (reg & 0x10)
1189           {
1190             is_upper = 1;
1191             reg &= 0xf;
1192           }
1193         (*info->fprintf_func) (info->stream, "%s%s",
1194                                reg_half_names[reg],
1195                                is_upper ? "u" : "l");
1196       }
1197       break;
1198
1199     default:
1200       return -2;
1201     }
1202
1203   return p - p0;
1204 }
1205
1206 /* Try to match the current instruction to best and if so, return the
1207    number of bytes consumed from the instruction stream, else zero.  */
1208
1209 static int
1210 match_insn_m68k (bfd_vma memaddr,
1211                  disassemble_info * info,
1212                  const struct m68k_opcode * best)
1213 {
1214   unsigned char *save_p;
1215   unsigned char *p;
1216   const char *d;
1217
1218   struct private *priv = (struct private *) info->private_data;
1219   bfd_byte *buffer = priv->the_buffer;
1220   fprintf_ftype save_printer = info->fprintf_func;
1221   void (* save_print_address) (bfd_vma, struct disassemble_info *)
1222     = info->print_address_func;
1223
1224   /* Point at first word of argument data,
1225      and at descriptor for first argument.  */
1226   p = buffer + 2;
1227
1228   /* Figure out how long the fixed-size portion of the instruction is.
1229      The only place this is stored in the opcode table is
1230      in the arguments--look for arguments which specify fields in the 2nd
1231      or 3rd words of the instruction.  */
1232   for (d = best->args; *d; d += 2)
1233     {
1234       /* I don't think it is necessary to be checking d[0] here;
1235          I suspect all this could be moved to the case statement below.  */
1236       if (d[0] == '#')
1237         {
1238           if (d[1] == 'l' && p - buffer < 6)
1239             p = buffer + 6;
1240           else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1241             p = buffer + 4;
1242         }
1243
1244       if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1245         p = buffer + 4;
1246
1247       switch (d[1])
1248         {
1249         case '1':
1250         case '2':
1251         case '3':
1252         case '7':
1253         case '8':
1254         case '9':
1255         case 'i':
1256           if (p - buffer < 4)
1257             p = buffer + 4;
1258           break;
1259         case '4':
1260         case '5':
1261         case '6':
1262           if (p - buffer < 6)
1263             p = buffer + 6;
1264           break;
1265         default:
1266           break;
1267         }
1268     }
1269
1270   /* pflusha is an exceptions.  It takes no arguments but is two words
1271      long.  Recognize it by looking at the lower 16 bits of the mask.  */
1272   if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1273     p = buffer + 4;
1274
1275   /* lpstop is another exception.  It takes a one word argument but is
1276      three words long.  */
1277   if (p - buffer < 6
1278       && (best->match & 0xffff) == 0xffff
1279       && best->args[0] == '#'
1280       && best->args[1] == 'w')
1281     {
1282       /* Copy the one word argument into the usual location for a one
1283          word argument, to simplify printing it.  We can get away with
1284          this because we know exactly what the second word is, and we
1285          aren't going to print anything based on it.  */
1286       p = buffer + 6;
1287       FETCH_DATA (info, p);
1288       buffer[2] = buffer[4];
1289       buffer[3] = buffer[5];
1290     }
1291
1292   FETCH_DATA (info, p);
1293
1294   d = best->args;
1295
1296   save_p = p;
1297   info->print_address_func = dummy_print_address;
1298   info->fprintf_func = (fprintf_ftype) dummy_printer;
1299
1300   /* We scan the operands twice.  The first time we don't print anything,
1301      but look for errors.  */
1302   for (; *d; d += 2)
1303     {
1304       int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1305
1306       if (eaten >= 0)
1307         p += eaten;
1308       else if (eaten == -1)
1309         {
1310           info->fprintf_func = save_printer;
1311           info->print_address_func = save_print_address;
1312           return 0;
1313         }
1314       else
1315         {
1316           /* We must restore the print functions before trying to print the
1317              error message.  */
1318           info->fprintf_func = save_printer;
1319           info->print_address_func = save_print_address;
1320           info->fprintf_func (info->stream,
1321                               /* xgettext:c-format */
1322                               _("<internal error in opcode table: %s %s>\n"),
1323                               best->name,  best->args);
1324           return 2;
1325         }
1326     }
1327
1328   p = save_p;
1329   info->fprintf_func = save_printer;
1330   info->print_address_func = save_print_address;
1331
1332   d = best->args;
1333
1334   info->fprintf_func (info->stream, "%s", best->name);
1335
1336   if (*d)
1337     info->fprintf_func (info->stream, " ");
1338
1339   while (*d)
1340     {
1341       p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1342       d += 2;
1343
1344       if (*d && *(d - 2) != 'I' && *d != 'k')
1345         info->fprintf_func (info->stream, ",");
1346     }
1347
1348   return p - buffer;
1349 }
1350
1351 /* Try to interpret the instruction at address MEMADDR as one that
1352    can execute on a processor with the features given by ARCH_MASK.
1353    If successful, print the instruction to INFO->STREAM and return
1354    its length in bytes.  Return 0 otherwise.  */
1355
1356 static int
1357 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1358                 unsigned int arch_mask)
1359 {
1360   int i;
1361   const char *d;
1362   static const struct m68k_opcode **opcodes[16];
1363   static int numopcodes[16];
1364   int val;
1365   int major_opcode;
1366
1367   struct private *priv = (struct private *) info->private_data;
1368   bfd_byte *buffer = priv->the_buffer;
1369
1370   if (!opcodes[0])
1371     {
1372       /* Speed up the matching by sorting the opcode
1373          table on the upper four bits of the opcode.  */
1374       const struct m68k_opcode **opc_pointer[16];
1375
1376       /* First count how many opcodes are in each of the sixteen buckets.  */
1377       for (i = 0; i < m68k_numopcodes; i++)
1378         numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1379
1380       /* Then create a sorted table of pointers
1381          that point into the unsorted table.  */
1382       opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1383                                 * m68k_numopcodes);
1384       opcodes[0] = opc_pointer[0];
1385
1386       for (i = 1; i < 16; i++)
1387         {
1388           opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1389           opcodes[i] = opc_pointer[i];
1390         }
1391
1392       for (i = 0; i < m68k_numopcodes; i++)
1393         *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1394     }
1395
1396   FETCH_DATA (info, buffer + 2);
1397   major_opcode = (buffer[0] >> 4) & 15;
1398
1399   for (i = 0; i < numopcodes[major_opcode]; i++)
1400     {
1401       const struct m68k_opcode *opc = opcodes[major_opcode][i];
1402       unsigned long opcode = opc->opcode;
1403       unsigned long match = opc->match;
1404
1405       if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1406           && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1407           /* Only fetch the next two bytes if we need to.  */
1408           && (((0xffff & match) == 0)
1409               ||
1410               (FETCH_DATA (info, buffer + 4)
1411                && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1412                && ((0xff & buffer[3] & match) == (0xff & opcode)))
1413               )
1414           && (opc->arch & arch_mask) != 0)
1415         {
1416           /* Don't use for printout the variants of divul and divsl
1417              that have the same register number in two places.
1418              The more general variants will match instead.  */
1419           for (d = opc->args; *d; d += 2)
1420             if (d[1] == 'D')
1421               break;
1422
1423           /* Don't use for printout the variants of most floating
1424              point coprocessor instructions which use the same
1425              register number in two places, as above.  */
1426           if (*d == '\0')
1427             for (d = opc->args; *d; d += 2)
1428               if (d[1] == 't')
1429                 break;
1430
1431           /* Don't match fmovel with more than one register;
1432              wait for fmoveml.  */
1433           if (*d == '\0')
1434             {
1435               for (d = opc->args; *d; d += 2)
1436                 {
1437                   if (d[0] == 's' && d[1] == '8')
1438                     {
1439                       val = fetch_arg (buffer, d[1], 3, info);
1440                       if ((val & (val - 1)) != 0)
1441                         break;
1442                     }
1443                 }
1444             }
1445
1446           /* Don't match FPU insns with non-default coprocessor ID.  */
1447           if (*d == '\0')
1448             {
1449               for (d = opc->args; *d; d += 2)
1450                 {
1451                   if (d[0] == 'I')
1452                     {
1453                       val = fetch_arg (buffer, 'd', 3, info);
1454                       if (val != 1)
1455                         break;
1456                     }
1457                 }
1458             }
1459
1460           if (*d == '\0')
1461             if ((val = match_insn_m68k (memaddr, info, opc)))
1462               return val;
1463         }
1464     }
1465   return 0;
1466 }
1467
1468 /* Print the m68k instruction at address MEMADDR in debugged memory,
1469    on INFO->STREAM.  Returns length of the instruction, in bytes.  */
1470
1471 int
1472 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1473 {
1474   unsigned int arch_mask;
1475   struct private priv;
1476   int val;
1477
1478   bfd_byte *buffer = priv.the_buffer;
1479
1480   /* Save these printing functions in case we need to restore them
1481      later.  */
1482   fprintf_ftype save_printer = info->fprintf_func;
1483   void (* save_print_address) (bfd_vma, struct disassemble_info *)
1484     = info->print_address_func;
1485
1486   info->private_data = (PTR) &priv;
1487   /* Tell objdump to use two bytes per chunk
1488      and six bytes per line for displaying raw data.  */
1489   info->bytes_per_chunk = 2;
1490   info->bytes_per_line = 6;
1491   info->display_endian = BFD_ENDIAN_BIG;
1492   priv.max_fetched = priv.the_buffer;
1493   priv.insn_start = memaddr;
1494
1495   if (setjmp (priv.bailout) != 0)
1496     {
1497       /* longjmp may be called while these printing functions are
1498          temporarily replaced with dummy functions.  Restore them
1499          before we leave.
1500
1501          Admittedly, this save-and-restore operation is somewhat ugly
1502          in that we are exposing the fact that match_insn_m68k
1503          temporarily replaces insn->fprintf_func and
1504          insn->print_address_func.  Perhaps, a real fix is to report a
1505          FETCH_DATA failure with a return value of some sort, without
1506          using setjmp/longjmp.  A better fix may be to teach the m68k
1507          disassembler do its job without temporarily replacing
1508          insn->fprintf_func and insn->print_address_func, but that's a
1509          task for another day.  */
1510       info->fprintf_func = save_printer;
1511       info->print_address_func = save_print_address;
1512
1513       /* Error return.  */
1514       return -1;
1515     }
1516
1517   arch_mask = bfd_m68k_mach_to_features (info->mach);
1518   if (!arch_mask)
1519     {
1520       /* First try printing an m680x0 instruction.  Try printing a Coldfire
1521          one if that fails.  */
1522       val = m68k_scan_mask (memaddr, info, m68k_mask);
1523       if (val)
1524         return val;
1525
1526       val = m68k_scan_mask (memaddr, info, mcf_mask);
1527       if (val)
1528         return val;
1529     }
1530   else
1531     {
1532       val = m68k_scan_mask (memaddr, info, arch_mask);
1533       if (val)
1534         return val;
1535     }
1536
1537   /* Handle undefined instructions.  */
1538   info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
1539   return 2;
1540 }