1 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
3 Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dwarf2dbg.h"
27 const struct spu_opcode spu_opcodes
[] = {
28 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
29 { MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
30 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
31 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
32 #include "opcode/spu-insns.h"
37 static const int spu_num_opcodes
=
38 sizeof (spu_opcodes
) / sizeof (spu_opcodes
[0]);
45 expressionS exp
[MAX_RELOCS
];
46 int reloc_arg
[MAX_RELOCS
];
47 bfd_reloc_code_real_type reloc
[MAX_RELOCS
];
51 static const char *get_imm (const char *param
, struct spu_insn
*insn
, int arg
);
52 static const char *get_reg (const char *param
, struct spu_insn
*insn
, int arg
,
54 static int calcop (struct spu_opcode
*format
, const char *param
,
55 struct spu_insn
*insn
);
56 static void spu_brinfo (int);
57 static void spu_cons (int);
60 static struct hash_control
*op_hash
= NULL
;
62 /* These bits should be turned off in the first address of every segment */
65 /* These chars start a comment anywhere in a source file (except inside
67 const char comment_chars
[] = "#";
69 /* These chars only start a comment at the beginning of a line. */
70 const char line_comment_chars
[] = "#";
72 /* gods own line continuation char */
73 const char line_separator_chars
[] = ";";
75 /* Chars that can be used to separate mant from exp in floating point nums */
76 const char EXP_CHARS
[] = "eE";
78 /* Chars that mean this number is a floating point constant */
80 /* or 0H1.234E-12 (see exp chars above) */
81 const char FLT_CHARS
[] = "dDfF";
83 const pseudo_typeS md_pseudo_table
[] =
85 {"align", s_align_ptwo
, 4},
86 {"brinfo", spu_brinfo
, 0},
87 {"bss", s_lcomm_bytes
, 1},
89 {"dfloat", float_cons
, 'd'},
90 {"ffloat", float_cons
, 'f'},
91 {"global", s_globl
, 0},
94 {"long", spu_cons
, 4},
95 {"quad", spu_cons
, 8},
96 {"string", stringer
, 8 + 1},
97 {"word", spu_cons
, 4},
98 /* Force set to be treated as an instruction. */
101 /* Likewise for eqv. */
107 /* Bits plugged into branch instruction offset field. */
113 const char *retval
= NULL
;
116 /* initialize hash table */
118 op_hash
= hash_new ();
120 /* loop until you see the end of the list */
122 for (i
= 0; i
< spu_num_opcodes
; i
++)
124 /* hash each mnemonic and record its position */
126 retval
= hash_insert (op_hash
, spu_opcodes
[i
].mnemonic
,
127 (void *) &spu_opcodes
[i
]);
129 if (retval
!= NULL
&& strcmp (retval
, "exists") != 0)
130 as_fatal (_("Can't hash instruction '%s':%s"),
131 spu_opcodes
[i
].mnemonic
, retval
);
135 const char *md_shortopts
= "";
136 struct option md_longopts
[] = {
137 #define OPTION_APUASM (OPTION_MD_BASE)
138 {"apuasm", no_argument
, NULL
, OPTION_APUASM
},
139 #define OPTION_DD2 (OPTION_MD_BASE+1)
140 {"mdd2.0", no_argument
, NULL
, OPTION_DD2
},
141 #define OPTION_DD1 (OPTION_MD_BASE+2)
142 {"mdd1.0", no_argument
, NULL
, OPTION_DD1
},
143 #define OPTION_DD3 (OPTION_MD_BASE+3)
144 {"mdd3.0", no_argument
, NULL
, OPTION_DD3
},
145 { NULL
, no_argument
, NULL
, 0 }
147 size_t md_longopts_size
= sizeof (md_longopts
);
149 /* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
150 * e.g. don't add bias to float conversion and don't right shift
151 * immediate values. */
152 static int emulate_apuasm
;
154 /* Use the dd2.0 instructions set. The only differences are some new
155 * register names and the orx insn */
156 static int use_dd2
= 1;
159 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
182 md_show_usage (FILE *stream
)
186 --apuasm emulate behaviour of apuasm\n"),
197 bfd_reloc_code_real_type reloc
;
200 static struct arg_encode arg_encode
[A_MAX
] = {
201 { 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */
202 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */
203 { 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */
204 { 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */
205 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */
206 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */
207 { 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */
208 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_S3 */
209 { 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7
}, /* A_S6 */
210 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_S7N */
211 { 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7
}, /* A_S7 */
212 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8
}, /* A_U7A */
213 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8
}, /* A_U7B */
214 { 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10
}, /* A_S10B */
215 { 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10
}, /* A_S10 */
216 { 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a
}, /* A_S11 */
217 { 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b
}, /* A_S11I */
218 { 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W
}, /* A_S14 */
219 { 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16
}, /* A_S16 */
220 { 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W
}, /* A_S18 */
221 { 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16
}, /* A_R18 */
222 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_U3 */
223 { 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7
}, /* A_U5 */
224 { 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7
}, /* A_U6 */
225 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_U7 */
226 { 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */
227 { 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16
}, /* A_X16 */
228 { 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18
}, /* A_U18 */
231 /* Some flags for handling errors. This is very hackish and added after
233 static int syntax_error_arg
;
234 static const char *syntax_error_param
;
235 static int syntax_reg
;
238 insn_fmt_string (struct spu_opcode
*format
)
244 len
+= sprintf (&buf
[len
], "%s\t", format
->mnemonic
);
245 for (i
= 1; i
<= format
->arg
[0]; i
++)
247 int arg
= format
->arg
[i
];
249 if (i
> 1 && arg
!= A_P
&& format
->arg
[i
-1] != A_P
)
254 exp
= i
== syntax_error_arg
? "REG" : "reg";
256 exp
= i
== syntax_error_arg
? "IMM" : "imm";
257 len
+= sprintf (&buf
[len
], "%s", exp
);
258 if (i
> 1 && format
->arg
[i
-1] == A_P
)
266 md_assemble (char *op
)
268 char *param
, *thisfrag
;
270 struct spu_opcode
*format
;
271 struct spu_insn insn
;
276 /* skip over instruction to find parameters */
278 for (param
= op
; *param
!= 0 && !ISSPACE (*param
); param
++)
283 if (c
!= 0 && c
!= '\n')
286 /* try to find the instruction in the hash table */
288 if ((format
= (struct spu_opcode
*) hash_find (op_hash
, op
)) == NULL
)
290 as_bad (_("Invalid mnemonic '%s'"), op
);
294 if (!use_dd2
&& strcmp (format
->mnemonic
, "orx") == 0)
296 as_bad (_("'%s' is only available in DD2.0 or higher."), op
);
302 /* try parsing this instruction into insn */
303 for (i
= 0; i
< MAX_RELOCS
; i
++)
305 insn
.exp
[i
].X_add_symbol
= 0;
306 insn
.exp
[i
].X_op_symbol
= 0;
307 insn
.exp
[i
].X_add_number
= 0;
308 insn
.exp
[i
].X_op
= O_illegal
;
309 insn
.reloc_arg
[i
] = -1;
310 insn
.reloc
[i
] = BFD_RELOC_NONE
;
312 insn
.opcode
= format
->opcode
;
313 insn
.tag
= (enum spu_insns
) (format
- spu_opcodes
);
315 syntax_error_arg
= 0;
316 syntax_error_param
= 0;
318 if (calcop (format
, param
, &insn
))
321 /* if it doesn't parse try the next instruction */
322 if (!strcmp (format
[0].mnemonic
, format
[1].mnemonic
))
326 int parg
= format
[0].arg
[syntax_error_arg
-1];
328 as_fatal (_("Error in argument %d. Expecting: \"%s\""),
329 syntax_error_arg
- (parg
== A_P
),
330 insn_fmt_string (format
));
336 && ! (insn
.tag
== M_RDCH
337 || insn
.tag
== M_RCHCNT
338 || insn
.tag
== M_WRCH
))
339 as_warn (_("Mixing register syntax, with and without '$'."));
340 if (syntax_error_param
)
342 const char *d
= syntax_error_param
;
345 as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param
- d
), d
);
349 && (insn
.tag
<= M_BRASL
350 || (insn
.tag
>= M_BRZ
&& insn
.tag
<= M_BRHNZ
))
351 && (insn
.opcode
& 0x7ff80) == 0
352 && (insn
.reloc_arg
[0] == A_R18
353 || insn
.reloc_arg
[0] == A_S18
354 || insn
.reloc_arg
[1] == A_R18
355 || insn
.reloc_arg
[1] == A_S18
))
356 insn
.opcode
|= brinfo
<< 7;
358 /* grow the current frag and plop in the opcode */
360 thisfrag
= frag_more (4);
361 md_number_to_chars (thisfrag
, insn
.opcode
, 4);
363 /* if this instruction requires labels mark it for later */
365 for (i
= 0; i
< MAX_RELOCS
; i
++)
366 if (insn
.reloc_arg
[i
] >= 0)
369 bfd_reloc_code_real_type reloc
= insn
.reloc
[i
];
372 if (reloc
== BFD_RELOC_SPU_PCREL9a
373 || reloc
== BFD_RELOC_SPU_PCREL9b
374 || reloc
== BFD_RELOC_SPU_PCREL16
)
376 fixP
= fix_new_exp (frag_now
,
377 thisfrag
- frag_now
->fr_literal
,
382 fixP
->tc_fix_data
.arg_format
= insn
.reloc_arg
[i
];
383 fixP
->tc_fix_data
.insn_tag
= insn
.tag
;
385 dwarf2_emit_insn (4);
387 /* .brinfo lasts exactly one instruction. */
392 calcop (struct spu_opcode
*format
, const char *param
, struct spu_insn
*insn
)
398 for (i
= 1; i
<= format
->arg
[0]; i
++)
400 arg
= format
->arg
[i
];
401 syntax_error_arg
= i
;
403 while (ISSPACE (*param
))
405 if (*param
== 0 || *param
== ',')
408 param
= get_reg (param
, insn
, arg
, 1);
410 param
= get_imm (param
, insn
, arg
);
421 while (ISSPACE (*param
))
424 if (arg
!= A_P
&& paren
)
430 else if (i
< format
->arg
[0]
431 && format
->arg
[i
] != A_P
432 && format
->arg
[i
+1] != A_P
)
441 while (ISSPACE (*param
))
443 return !paren
&& (*param
== 0 || *param
== '\n');
452 #define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
454 static struct reg_name reg_name
[] = {
455 REG_NAME (0, "lr"), /* link register */
456 REG_NAME (1, "sp"), /* stack pointer */
457 REG_NAME (0, "rp"), /* link register */
458 REG_NAME (127, "fp"), /* frame pointer */
461 static struct reg_name sp_reg_name
[] = {
464 static struct reg_name ch_reg_name
[] = {
465 REG_NAME ( 0, "SPU_RdEventStat"),
466 REG_NAME ( 1, "SPU_WrEventMask"),
467 REG_NAME ( 2, "SPU_WrEventAck"),
468 REG_NAME ( 3, "SPU_RdSigNotify1"),
469 REG_NAME ( 4, "SPU_RdSigNotify2"),
470 REG_NAME ( 7, "SPU_WrDec"),
471 REG_NAME ( 8, "SPU_RdDec"),
472 REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
473 REG_NAME ( 13, "SPU_RdMachStat"),
474 REG_NAME ( 14, "SPU_WrSRR0"),
475 REG_NAME ( 15, "SPU_RdSRR0"),
476 REG_NAME ( 28, "SPU_WrOutMbox"),
477 REG_NAME ( 29, "SPU_RdInMbox"),
478 REG_NAME ( 30, "SPU_WrOutIntrMbox"),
479 REG_NAME ( 9, "MFC_WrMSSyncReq"),
480 REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */
481 REG_NAME ( 16, "MFC_LSA"),
482 REG_NAME ( 17, "MFC_EAH"),
483 REG_NAME ( 18, "MFC_EAL"),
484 REG_NAME ( 19, "MFC_Size"),
485 REG_NAME ( 20, "MFC_TagID"),
486 REG_NAME ( 21, "MFC_Cmd"),
487 REG_NAME ( 22, "MFC_WrTagMask"),
488 REG_NAME ( 23, "MFC_WrTagUpdate"),
489 REG_NAME ( 24, "MFC_RdTagStat"),
490 REG_NAME ( 25, "MFC_RdListStallStat"),
491 REG_NAME ( 26, "MFC_WrListStallAck"),
492 REG_NAME ( 27, "MFC_RdAtomicStat"),
497 get_reg (const char *param
, struct spu_insn
*insn
, int arg
, int accept_expr
)
508 if (arg
== A_H
) /* Channel */
510 if ((param
[0] == 'c' || param
[0] == 'C')
511 && (param
[1] == 'h' || param
[1] == 'H')
512 && ISDIGIT (param
[2]))
515 else if (arg
== A_S
) /* Special purpose register */
517 if ((param
[0] == 's' || param
[0] == 'S')
518 && (param
[1] == 'p' || param
[1] == 'P')
519 && ISDIGIT (param
[2]))
523 if (ISDIGIT (*param
))
526 while (ISDIGIT (*param
))
527 regno
= regno
* 10 + *param
++ - '0';
532 unsigned int i
, n
, l
= 0;
534 if (arg
== A_H
) /* Channel */
537 n
= sizeof (ch_reg_name
) / sizeof (*ch_reg_name
);
539 else if (arg
== A_S
) /* Special purpose register */
542 n
= sizeof (sp_reg_name
) / sizeof (*sp_reg_name
);
547 n
= sizeof (reg_name
) / sizeof (*reg_name
);
550 for (i
= 0; i
< n
; i
++)
552 && 0 == strncasecmp (param
, rn
[i
].name
, rn
[i
].length
))
564 as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
565 else if (regno
== 12)
566 as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
571 insn
->opcode
|= regno
<< arg_encode
[arg
].pos
;
572 if ((!saw_prefix
&& syntax_reg
== 1)
573 || (saw_prefix
&& syntax_reg
== 2))
575 syntax_reg
|= saw_prefix
? 1 : 2;
583 save_ptr
= input_line_pointer
;
584 input_line_pointer
= (char *)param
;
586 param
= input_line_pointer
;
587 input_line_pointer
= save_ptr
;
588 if (ex
.X_op
== O_register
|| ex
.X_op
== O_constant
)
590 insn
->opcode
|= ex
.X_add_number
<< arg_encode
[arg
].pos
;
598 get_imm (const char *param
, struct spu_insn
*insn
, int arg
)
602 int low
= 0, high
= 0;
603 int reloc_i
= insn
->reloc_arg
[0] >= 0 ? 1 : 0;
605 if (strncasecmp (param
, "%lo(", 4) == 0)
609 as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
611 else if (strncasecmp (param
, "%hi(", 4) == 0)
615 as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
617 else if (strncasecmp (param
, "%pic(", 5) == 0)
619 /* Currently we expect %pic(expr) == expr, so do nothing here.
620 i.e. for code loaded at address 0 $toc will be 0. */
626 /* Symbols can start with $, but if this symbol matches a register
627 name, it's probably a mistake. The only way to avoid this
628 warning is to rename the symbol. */
629 struct spu_insn tmp_insn
;
630 const char *np
= get_reg (param
, &tmp_insn
, arg
, 0);
633 syntax_error_param
= np
;
636 save_ptr
= input_line_pointer
;
637 input_line_pointer
= (char *) param
;
638 expression (&insn
->exp
[reloc_i
]);
639 param
= input_line_pointer
;
640 input_line_pointer
= save_ptr
;
642 /* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to
643 handle we do it inlined here. */
644 if (param
[0] == '@' && !ISALNUM (param
[2]) && param
[2] != '@')
646 if (param
[1] == 'h' || param
[1] == 'H')
651 else if (param
[1] == 'l' || param
[1] == 'L')
658 if (insn
->exp
[reloc_i
].X_op
== O_constant
)
660 val
= insn
->exp
[reloc_i
].X_add_number
;
664 /* Convert the value to a format we expect. */
665 val
<<= arg_encode
[arg
].rshift
;
668 else if (arg
== A_U7B
)
677 /* Warn about out of range expressions. */
679 int hi
= arg_encode
[arg
].hi
;
680 int lo
= arg_encode
[arg
].lo
;
681 int whi
= arg_encode
[arg
].whi
;
682 int wlo
= arg_encode
[arg
].wlo
;
684 if (hi
> lo
&& (val
< lo
|| val
> hi
))
685 as_fatal (_("Constant expression %d out of range, [%d, %d]."),
687 else if (whi
> wlo
&& (val
< wlo
|| val
> whi
))
688 as_warn (_("Constant expression %d out of range, [%d, %d]."),
694 else if (arg
== A_U7B
)
697 /* Branch hints have a split encoding. Do the bottom part. */
698 if (arg
== A_S11
|| arg
== A_S11I
)
699 insn
->opcode
|= ((val
>> 2) & 0x7f);
701 insn
->opcode
|= (((val
>> arg_encode
[arg
].rshift
)
702 & ((1 << arg_encode
[arg
].size
) - 1))
703 << arg_encode
[arg
].pos
);
707 insn
->reloc_arg
[reloc_i
] = arg
;
709 insn
->reloc
[reloc_i
] = BFD_RELOC_SPU_HI16
;
711 insn
->reloc
[reloc_i
] = BFD_RELOC_SPU_LO16
;
713 insn
->reloc
[reloc_i
] = arg_encode
[arg
].reloc
;
720 md_atof (int type
, char *litP
, int *sizeP
)
722 return ieee_md_atof (type
, litP
, sizeP
, TRUE
);
725 #ifndef WORKING_DOT_WORD
726 int md_short_jump_size
= 4;
729 md_create_short_jump (char *ptr
,
730 addressT from_addr ATTRIBUTE_UNUSED
,
731 addressT to_addr ATTRIBUTE_UNUSED
,
735 ptr
[0] = (char) 0xc0;
740 ptr
- frag
->fr_literal
,
745 BFD_RELOC_SPU_PCREL16
);
748 int md_long_jump_size
= 4;
751 md_create_long_jump (char *ptr
,
752 addressT from_addr ATTRIBUTE_UNUSED
,
753 addressT to_addr ATTRIBUTE_UNUSED
,
757 ptr
[0] = (char) 0xc0;
762 ptr
- frag
->fr_literal
,
767 BFD_RELOC_SPU_PCREL16
);
771 /* Handle .brinfo <priority>,<lrlive>. */
773 spu_brinfo (int ignore ATTRIBUTE_UNUSED
)
778 priority
= get_absolute_expression ();
782 if (*input_line_pointer
== ',')
784 ++input_line_pointer
;
785 lrlive
= get_absolute_expression ();
788 if (priority
> 0x1fff)
790 as_bad (_("invalid priority '%lu'"), (unsigned long) priority
);
796 as_bad (_("invalid lrlive '%lu'"), (unsigned long) lrlive
);
800 brinfo
= (lrlive
<< 13) | priority
;
801 demand_empty_rest_of_line ();
804 /* Support @ppu on symbols referenced in .int/.long/.word/.quad. */
806 spu_cons (int nbytes
)
810 if (is_it_end_of_statement ())
812 demand_empty_rest_of_line ();
818 deferred_expression (&exp
);
819 if ((exp
.X_op
== O_symbol
820 || exp
.X_op
== O_constant
)
821 && strncasecmp (input_line_pointer
, "@ppu", 4) == 0)
823 char *p
= frag_more (nbytes
);
824 enum bfd_reloc_code_real reloc
;
826 /* Check for identifier@suffix+constant. */
827 input_line_pointer
+= 4;
828 if (*input_line_pointer
== '-' || *input_line_pointer
== '+')
832 expression (&new_exp
);
833 if (new_exp
.X_op
== O_constant
)
834 exp
.X_add_number
+= new_exp
.X_add_number
;
837 reloc
= nbytes
== 4 ? BFD_RELOC_SPU_PPU32
: BFD_RELOC_SPU_PPU64
;
838 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, nbytes
,
842 emit_expr (&exp
, nbytes
);
844 while (*input_line_pointer
++ == ',');
846 /* Put terminator back into stream. */
847 input_line_pointer
--;
848 demand_empty_rest_of_line ();
852 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
853 segT segment_type ATTRIBUTE_UNUSED
)
855 as_fatal (_("Relaxation should never occur"));
859 /* If while processing a fixup, a reloc really needs to be created,
860 then it is done here. */
863 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
866 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
867 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
869 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
870 else if (fixp
->fx_subsy
)
871 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
874 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
875 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
876 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
878 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
879 _("reloc %d not supported by object file format"),
880 (int) fixp
->fx_r_type
);
883 reloc
->addend
= fixp
->fx_addnumber
;
887 /* Round up a section's size to the appropriate boundary. */
890 md_section_align (segT seg
, valueT size
)
892 int align
= bfd_get_section_alignment (stdoutput
, seg
);
893 valueT mask
= ((valueT
) 1 << align
) - 1;
895 return (size
+ mask
) & ~mask
;
898 /* Where a PC relative offset is calculated from. On the spu they
899 are calculated from the beginning of the branch instruction. */
902 md_pcrel_from (fixS
*fixp
)
904 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
907 /* Fill in rs_align_code fragments. */
910 spu_handle_align (fragS
*fragp
)
912 static const unsigned char nop_pattern
[8] = {
913 0x40, 0x20, 0x00, 0x00, /* even nop */
914 0x00, 0x20, 0x00, 0x00, /* odd nop */
920 if (fragp
->fr_type
!= rs_align_code
)
923 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
924 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
932 fragp
->fr_fix
+= fix
;
936 memcpy (p
, &nop_pattern
[4], 4);
942 memcpy (p
, nop_pattern
, 8);
947 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
952 char *place
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
954 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
956 /* We can't actually support subtracting a symbol. */
957 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
960 if (fixP
->fx_addsy
!= NULL
)
964 /* Hack around bfd_install_relocation brain damage. */
965 val
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
967 switch (fixP
->fx_r_type
)
970 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
973 case BFD_RELOC_SPU_PCREL16
:
974 case BFD_RELOC_SPU_PCREL9a
:
975 case BFD_RELOC_SPU_PCREL9b
:
976 case BFD_RELOC_32_PCREL
:
980 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
981 _("expression too complex"));
987 fixP
->fx_addnumber
= val
;
989 if (fixP
->fx_r_type
== BFD_RELOC_SPU_PPU32
990 || fixP
->fx_r_type
== BFD_RELOC_SPU_PPU64
991 || fixP
->fx_r_type
== BFD_RELOC_SPU_ADD_PIC
)
994 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
999 if (fixP
->tc_fix_data
.arg_format
> A_P
)
1001 int hi
= arg_encode
[fixP
->tc_fix_data
.arg_format
].hi
;
1002 int lo
= arg_encode
[fixP
->tc_fix_data
.arg_format
].lo
;
1003 if (hi
> lo
&& ((offsetT
) val
< lo
|| (offsetT
) val
> hi
))
1004 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1005 _("Relocation doesn't fit. (relocation value = 0x%lx)"),
1009 switch (fixP
->fx_r_type
)
1012 md_number_to_chars (place
, val
, 1);
1016 md_number_to_chars (place
, val
, 2);
1020 case BFD_RELOC_32_PCREL
:
1021 md_number_to_chars (place
, val
, 4);
1025 md_number_to_chars (place
, val
, 8);
1028 case BFD_RELOC_SPU_IMM7
:
1033 case BFD_RELOC_SPU_IMM8
:
1038 case BFD_RELOC_SPU_IMM10
:
1043 case BFD_RELOC_SPU_IMM10W
:
1045 mask
= 0x3ff0 << 10;
1048 case BFD_RELOC_SPU_IMM16
:
1053 case BFD_RELOC_SPU_IMM16W
:
1055 mask
= 0x3fffc << 5;
1058 case BFD_RELOC_SPU_IMM18
:
1060 mask
= 0x3ffff << 7;
1063 case BFD_RELOC_SPU_PCREL9a
:
1064 res
= ((val
& 0x1fc) >> 2) | ((val
& 0x600) << 14);
1065 mask
= (0x1fc >> 2) | (0x600 << 14);
1068 case BFD_RELOC_SPU_PCREL9b
:
1069 res
= ((val
& 0x1fc) >> 2) | ((val
& 0x600) << 5);
1070 mask
= (0x1fc >> 2) | (0x600 << 5);
1073 case BFD_RELOC_SPU_PCREL16
:
1075 mask
= 0x3fffc << 5;
1078 case BFD_RELOC_SPU_HI16
:
1083 case BFD_RELOC_SPU_LO16
:
1089 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1090 _("reloc %d not supported by object file format"),
1091 (int) fixP
->fx_r_type
);
1095 place
[0] = (place
[0] & (~mask
>> 24)) | ((res
>> 24) & 0xff);
1096 place
[1] = (place
[1] & (~mask
>> 16)) | ((res
>> 16) & 0xff);
1097 place
[2] = (place
[2] & (~mask
>> 8)) | ((res
>> 8) & 0xff);
1098 place
[3] = (place
[3] & ~mask
) | (res
& 0xff);