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* Makefile.tpl: Rename [+target+] to [+make_target+].
[binutils.git] / bfd / elf32-m32r.c
blob3116ace867a9b86bfa8834fb3545dde903df3e01
1 /* M32R-specific support for 32-bit ELF.
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "bfd.h"
22 #include "sysdep.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/m32r.h"
26
27 static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
28 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
29 static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
30 PARAMS ((bfd *, reloc_howto_type *, asection *,
31 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
32 static bfd_reloc_status_type m32r_elf_hi16_reloc
33 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
34 static void m32r_elf_relocate_hi16
35 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
36 bfd_byte *, bfd_vma));
37 bfd_reloc_status_type m32r_elf_lo16_reloc
38 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
39 bfd_reloc_status_type m32r_elf_generic_reloc
40 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
41 static bfd_reloc_status_type m32r_elf_sda16_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
43 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
44 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
45 static void m32r_info_to_howto_rel
46 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
47 bfd_boolean _bfd_m32r_elf_section_from_bfd_section
48 PARAMS ((bfd *, asection *, int *));
49 void _bfd_m32r_elf_symbol_processing
50 PARAMS ((bfd *, asymbol *));
51 static bfd_boolean m32r_elf_add_symbol_hook
52 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
53 const char **, flagword *, asection **, bfd_vma *));
54 static bfd_boolean m32r_elf_relocate_section
55 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
56 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
57 #if 0 /* not yet */
58 static bfd_boolean m32r_elf_relax_delete_bytes
59 PARAMS ((bfd *, asection *, bfd_vma, int));
60 #endif
61 static bfd_reloc_status_type m32r_elf_final_sda_base
62 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
63 static bfd_boolean m32r_elf_object_p
64 PARAMS ((bfd *));
65 static void m32r_elf_final_write_processing
66 PARAMS ((bfd *, bfd_boolean));
67 static bfd_boolean m32r_elf_set_private_flags
68 PARAMS ((bfd *, flagword));
69 static bfd_boolean m32r_elf_merge_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71 static bfd_boolean m32r_elf_print_private_bfd_data
72 PARAMS ((bfd *, PTR));
73 static bfd_boolean m32r_elf_gc_sweep_hook
74 PARAMS ((bfd *, struct bfd_link_info *, asection *,
75 const Elf_Internal_Rela *));
76 static bfd_boolean m32r_elf_check_relocs
77 PARAMS ((bfd *, struct bfd_link_info *, asection *,
78 const Elf_Internal_Rela *));
79
80 asection * m32r_elf_gc_mark_hook
81 PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *,
82 struct elf_link_hash_entry *, Elf_Internal_Sym *));
83
84 #define NOP_INSN 0x7000
85 #define MAKE_PARALLEL(insn) ((insn) | 0x8000)
86
87 /* Use REL instead of RELA to save space.
88 This only saves space in libraries and object files, but perhaps
89 relocs will be put in ROM? All in all though, REL relocs are a pain
90 to work with. */
91 #define USE_REL 1
92
93 #ifndef USE_REL
94 #define USE_REL 0
95 #endif
96
97 static reloc_howto_type m32r_elf_howto_table[] =
98 {
99 /* This reloc does nothing. */
100 HOWTO (R_M32R_NONE, /* type */
101 0, /* rightshift */
102 2, /* size (0 = byte, 1 = short, 2 = long) */
103 32, /* bitsize */
104 FALSE, /* pc_relative */
105 0, /* bitpos */
106 complain_overflow_bitfield, /* complain_on_overflow */
107 bfd_elf_generic_reloc, /* special_function */
108 "R_M32R_NONE", /* name */
109 FALSE, /* partial_inplace */
110 0, /* src_mask */
111 0, /* dst_mask */
112 FALSE), /* pcrel_offset */
113
114 /* A 16 bit absolute relocation. */
115 HOWTO (R_M32R_16, /* type */
116 0, /* rightshift */
117 1, /* size (0 = byte, 1 = short, 2 = long) */
118 16, /* bitsize */
119 FALSE, /* pc_relative */
120 0, /* bitpos */
121 complain_overflow_bitfield, /* complain_on_overflow */
122 m32r_elf_generic_reloc,/* special_function */
123 "R_M32R_16", /* name */
124 TRUE, /* partial_inplace */
125 0xffff, /* src_mask */
126 0xffff, /* dst_mask */
127 FALSE), /* pcrel_offset */
128
129 /* A 32 bit absolute relocation. */
130 HOWTO (R_M32R_32, /* type */
131 0, /* rightshift */
132 2, /* size (0 = byte, 1 = short, 2 = long) */
133 32, /* bitsize */
134 FALSE, /* pc_relative */
135 0, /* bitpos */
136 complain_overflow_bitfield, /* complain_on_overflow */
137 m32r_elf_generic_reloc,/* special_function */
138 "R_M32R_32", /* name */
139 TRUE, /* partial_inplace */
140 0xffffffff, /* src_mask */
141 0xffffffff, /* dst_mask */
142 FALSE), /* pcrel_offset */
143
144 /* A 24 bit address. */
145 HOWTO (R_M32R_24, /* type */
146 0, /* rightshift */
147 2, /* size (0 = byte, 1 = short, 2 = long) */
148 24, /* bitsize */
149 FALSE, /* pc_relative */
150 0, /* bitpos */
151 complain_overflow_unsigned, /* complain_on_overflow */
152 m32r_elf_generic_reloc,/* special_function */
153 "R_M32R_24", /* name */
154 TRUE, /* partial_inplace */
155 0xffffff, /* src_mask */
156 0xffffff, /* dst_mask */
157 FALSE), /* pcrel_offset */
158
159 /* An PC Relative 10-bit relocation, shifted by 2.
160 This reloc is complicated because relocations are relative to pc & -4.
161 i.e. branches in the right insn slot use the address of the left insn
162 slot for pc. */
163 /* ??? It's not clear whether this should have partial_inplace set or not.
164 Branch relaxing in the assembler can store the addend in the insn,
165 and if bfd_install_relocation gets called the addend may get added
166 again. */
167 HOWTO (R_M32R_10_PCREL, /* type */
168 2, /* rightshift */
169 1, /* size (0 = byte, 1 = short, 2 = long) */
170 10, /* bitsize */
171 TRUE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_signed, /* complain_on_overflow */
174 m32r_elf_10_pcrel_reloc, /* special_function */
175 "R_M32R_10_PCREL", /* name */
176 FALSE, /* partial_inplace */
177 0xff, /* src_mask */
178 0xff, /* dst_mask */
179 TRUE), /* pcrel_offset */
180
181 /* A relative 18 bit relocation, right shifted by 2. */
182 HOWTO (R_M32R_18_PCREL, /* type */
183 2, /* rightshift */
184 2, /* size (0 = byte, 1 = short, 2 = long) */
185 16, /* bitsize */
186 TRUE, /* pc_relative */
187 0, /* bitpos */
188 complain_overflow_signed, /* complain_on_overflow */
189 bfd_elf_generic_reloc, /* special_function */
190 "R_M32R_18_PCREL", /* name */
191 FALSE, /* partial_inplace */
192 0xffff, /* src_mask */
193 0xffff, /* dst_mask */
194 TRUE), /* pcrel_offset */
195
196 /* A relative 26 bit relocation, right shifted by 2. */
197 /* ??? It's not clear whether this should have partial_inplace set or not.
198 Branch relaxing in the assembler can store the addend in the insn,
199 and if bfd_install_relocation gets called the addend may get added
200 again. */
201 HOWTO (R_M32R_26_PCREL, /* type */
202 2, /* rightshift */
203 2, /* size (0 = byte, 1 = short, 2 = long) */
204 26, /* bitsize */
205 TRUE, /* pc_relative */
206 0, /* bitpos */
207 complain_overflow_signed, /* complain_on_overflow */
208 bfd_elf_generic_reloc, /* special_function */
209 "R_M32R_26_PCREL", /* name */
210 FALSE, /* partial_inplace */
211 0xffffff, /* src_mask */
212 0xffffff, /* dst_mask */
213 TRUE), /* pcrel_offset */
214
215 /* High 16 bits of address when lower 16 is or'd in. */
216 HOWTO (R_M32R_HI16_ULO, /* type */
217 16, /* rightshift */
218 2, /* size (0 = byte, 1 = short, 2 = long) */
219 16, /* bitsize */
220 FALSE, /* pc_relative */
221 0, /* bitpos */
222 complain_overflow_dont, /* complain_on_overflow */
223 m32r_elf_hi16_reloc, /* special_function */
224 "R_M32R_HI16_ULO", /* name */
225 TRUE, /* partial_inplace */
226 0x0000ffff, /* src_mask */
227 0x0000ffff, /* dst_mask */
228 FALSE), /* pcrel_offset */
229
230 /* High 16 bits of address when lower 16 is added in. */
231 HOWTO (R_M32R_HI16_SLO, /* type */
232 16, /* rightshift */
233 2, /* size (0 = byte, 1 = short, 2 = long) */
234 16, /* bitsize */
235 FALSE, /* pc_relative */
236 0, /* bitpos */
237 complain_overflow_dont, /* complain_on_overflow */
238 m32r_elf_hi16_reloc, /* special_function */
239 "R_M32R_HI16_SLO", /* name */
240 TRUE, /* partial_inplace */
241 0x0000ffff, /* src_mask */
242 0x0000ffff, /* dst_mask */
243 FALSE), /* pcrel_offset */
244
245 /* Lower 16 bits of address. */
246 HOWTO (R_M32R_LO16, /* type */
247 0, /* rightshift */
248 2, /* size (0 = byte, 1 = short, 2 = long) */
249 16, /* bitsize */
250 FALSE, /* pc_relative */
251 0, /* bitpos */
252 complain_overflow_dont, /* complain_on_overflow */
253 m32r_elf_lo16_reloc, /* special_function */
254 "R_M32R_LO16", /* name */
255 TRUE, /* partial_inplace */
256 0x0000ffff, /* src_mask */
257 0x0000ffff, /* dst_mask */
258 FALSE), /* pcrel_offset */
259
260 /* Small data area 16 bits offset. */
261 HOWTO (R_M32R_SDA16, /* type */
262 0, /* rightshift */
263 2, /* size (0 = byte, 1 = short, 2 = long) */
264 16, /* bitsize */
265 FALSE, /* pc_relative */
266 0, /* bitpos */
267 complain_overflow_signed, /* complain_on_overflow */
268 m32r_elf_sda16_reloc, /* special_function */
269 "R_M32R_SDA16", /* name */
270 TRUE, /* partial_inplace */ /* FIXME: correct? */
271 0x0000ffff, /* src_mask */
272 0x0000ffff, /* dst_mask */
273 FALSE), /* pcrel_offset */
274
275 /* GNU extension to record C++ vtable hierarchy */
276 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
277 0, /* rightshift */
278 2, /* size (0 = byte, 1 = short, 2 = long) */
279 0, /* bitsize */
280 FALSE, /* pc_relative */
281 0, /* bitpos */
282 complain_overflow_dont, /* complain_on_overflow */
283 NULL, /* special_function */
284 "R_M32R_GNU_VTINHERIT", /* name */
285 FALSE, /* partial_inplace */
286 0, /* src_mask */
287 0, /* dst_mask */
288 FALSE), /* pcrel_offset */
289
290 /* GNU extension to record C++ vtable member usage */
291 HOWTO (R_M32R_GNU_VTENTRY, /* type */
292 0, /* rightshift */
293 2, /* size (0 = byte, 1 = short, 2 = long) */
294 0, /* bitsize */
295 FALSE, /* pc_relative */
296 0, /* bitpos */
297 complain_overflow_dont, /* complain_on_overflow */
298 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
299 "R_M32R_GNU_VTENTRY", /* name */
300 FALSE, /* partial_inplace */
301 0, /* src_mask */
302 0, /* dst_mask */
303 FALSE), /* pcrel_offset */
304
305 };
306 \f
307 /* Handle the R_M32R_10_PCREL reloc. */
308
309 static bfd_reloc_status_type
310 m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
311 input_section, output_bfd, error_message)
312 bfd * abfd;
313 arelent * reloc_entry;
314 asymbol * symbol;
315 PTR data;
316 asection * input_section;
317 bfd * output_bfd;
318 char ** error_message ATTRIBUTE_UNUSED;
319 {
320 /* This part is from bfd_elf_generic_reloc. */
321 if (output_bfd != (bfd *) NULL
322 && (symbol->flags & BSF_SECTION_SYM) == 0
323 && (! reloc_entry->howto->partial_inplace
324 || reloc_entry->addend == 0))
325 {
326 reloc_entry->address += input_section->output_offset;
327 return bfd_reloc_ok;
328 }
329
330 if (output_bfd != NULL)
331 {
332 /* FIXME: See bfd_perform_relocation. Is this right? */
333 return bfd_reloc_continue;
334 }
335
336 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
337 input_section,
338 data, reloc_entry->address,
339 symbol->section,
340 (symbol->value
341 + symbol->section->output_section->vma
342 + symbol->section->output_offset),
343 reloc_entry->addend);
344 }
345
346 /* Utility to actually perform an R_M32R_10_PCREL reloc. */
347
348 static bfd_reloc_status_type
349 m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
350 symbol_section, symbol_value, addend)
351 bfd *abfd;
352 reloc_howto_type *howto;
353 asection *input_section;
354 bfd_byte *data;
355 bfd_vma offset;
356 asection *symbol_section ATTRIBUTE_UNUSED;
357 bfd_vma symbol_value;
358 bfd_vma addend;
359 {
360 bfd_signed_vma relocation;
361 unsigned long x;
362 bfd_reloc_status_type status;
363
364 /* Sanity check the address (offset in section). */
365 if (offset > input_section->_cooked_size)
366 return bfd_reloc_outofrange;
367
368 relocation = symbol_value + addend;
369 /* Make it pc relative. */
370 relocation -= (input_section->output_section->vma
371 + input_section->output_offset);
372 /* These jumps mask off the lower two bits of the current address
373 before doing pcrel calculations. */
374 relocation -= (offset & -(bfd_vma) 4);
375
376 if (relocation < -0x200 || relocation > 0x1ff)
377 status = bfd_reloc_overflow;
378 else
379 status = bfd_reloc_ok;
380
381 x = bfd_get_16 (abfd, data + offset);
382 relocation >>= howto->rightshift;
383 relocation <<= howto->bitpos;
384 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
385 bfd_put_16 (abfd, (bfd_vma) x, data + offset);
386
387 return status;
388 }
389
390 /* Handle the R_M32R_HI16_[SU]LO relocs.
391 HI16_SLO is for the add3 and load/store with displacement instructions.
392 HI16_ULO is for the or3 instruction.
393 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
394 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
395 we must add one to the high 16 bytes (which will get subtracted off when
396 the low 16 bits are added).
397 These relocs have to be done in combination with an R_M32R_LO16 reloc
398 because there is a carry from the LO16 to the HI16. Here we just save
399 the information we need; we do the actual relocation when we see the LO16.
400 This code is copied from the elf32-mips.c. We also support an arbitrary
401 number of HI16 relocs to be associated with a single LO16 reloc. The
402 assembler sorts the relocs to ensure each HI16 immediately precedes its
403 LO16. However if there are multiple copies, the assembler may not find
404 the real LO16 so it picks the first one it finds. */
405
406 struct m32r_hi16
407 {
408 struct m32r_hi16 *next;
409 bfd_byte *addr;
410 bfd_vma addend;
411 };
412
413 /* FIXME: This should not be a static variable. */
414
415 static struct m32r_hi16 *m32r_hi16_list;
416
417 static bfd_reloc_status_type
418 m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
419 input_section, output_bfd, error_message)
420 bfd *abfd ATTRIBUTE_UNUSED;
421 arelent *reloc_entry;
422 asymbol *symbol;
423 PTR data;
424 asection *input_section;
425 bfd *output_bfd;
426 char **error_message ATTRIBUTE_UNUSED;
427 {
428 bfd_reloc_status_type ret;
429 bfd_vma relocation;
430 struct m32r_hi16 *n;
431
432 /* This part is from bfd_elf_generic_reloc.
433 If we're relocating, and this an external symbol, we don't want
434 to change anything. */
435 if (output_bfd != (bfd *) NULL
436 && (symbol->flags & BSF_SECTION_SYM) == 0
437 && reloc_entry->addend == 0)
438 {
439 reloc_entry->address += input_section->output_offset;
440 return bfd_reloc_ok;
441 }
442
443 /* Sanity check the address (offset in section). */
444 if (reloc_entry->address > input_section->_cooked_size)
445 return bfd_reloc_outofrange;
446
447 ret = bfd_reloc_ok;
448 if (bfd_is_und_section (symbol->section)
449 && output_bfd == (bfd *) NULL)
450 ret = bfd_reloc_undefined;
451
452 if (bfd_is_com_section (symbol->section))
453 relocation = 0;
454 else
455 relocation = symbol->value;
456
457 relocation += symbol->section->output_section->vma;
458 relocation += symbol->section->output_offset;
459 relocation += reloc_entry->addend;
460
461 /* Save the information, and let LO16 do the actual relocation. */
462 n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n);
463 if (n == NULL)
464 return bfd_reloc_outofrange;
465 n->addr = (bfd_byte *) data + reloc_entry->address;
466 n->addend = relocation;
467 n->next = m32r_hi16_list;
468 m32r_hi16_list = n;
469
470 if (output_bfd != (bfd *) NULL)
471 reloc_entry->address += input_section->output_offset;
472
473 return ret;
474 }
475
476 /* Handle an M32R ELF HI16 reloc. */
477
478 static void
479 m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
480 bfd *input_bfd;
481 int type;
482 Elf_Internal_Rela *relhi;
483 Elf_Internal_Rela *rello;
484 bfd_byte *contents;
485 bfd_vma addend;
486 {
487 unsigned long insn;
488 bfd_vma addlo;
489
490 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
491
492 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
493 if (type == R_M32R_HI16_SLO)
494 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
495 else
496 addlo &= 0xffff;
497
498 addend += ((insn & 0xffff) << 16) + addlo;
499
500 /* Reaccount for sign extension of low part. */
501 if (type == R_M32R_HI16_SLO
502 && (addend & 0x8000) != 0)
503 addend += 0x10000;
504
505 bfd_put_32 (input_bfd,
506 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
507 contents + relhi->r_offset);
508 }
509
510 /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
511 inplace relocation; this function exists in order to do the
512 R_M32R_HI16_[SU]LO relocation described above. */
513
514 bfd_reloc_status_type
515 m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data,
516 input_section, output_bfd, error_message)
517 bfd *input_bfd;
518 arelent *reloc_entry;
519 asymbol *symbol;
520 PTR data;
521 asection *input_section;
522 bfd *output_bfd;
523 char **error_message;
524 {
525 /* This part is from bfd_elf_generic_reloc.
526 If we're relocating, and this an external symbol, we don't want
527 to change anything. */
528 if (output_bfd != (bfd *) NULL
529 && (symbol->flags & BSF_SECTION_SYM) == 0
530 && reloc_entry->addend == 0)
531 {
532 reloc_entry->address += input_section->output_offset;
533 return bfd_reloc_ok;
534 }
535
536 if (m32r_hi16_list != NULL)
537 {
538 struct m32r_hi16 *l;
539
540 l = m32r_hi16_list;
541 while (l != NULL)
542 {
543 unsigned long insn;
544 unsigned long val;
545 unsigned long vallo;
546 struct m32r_hi16 *next;
547
548 /* Do the HI16 relocation. Note that we actually don't need
549 to know anything about the LO16 itself, except where to
550 find the low 16 bits of the addend needed by the LO16. */
551 insn = bfd_get_32 (input_bfd, l->addr);
552 vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address)
553 & 0xffff) ^ 0x8000) - 0x8000;
554 val = ((insn & 0xffff) << 16) + vallo;
555 val += l->addend;
556
557 /* Reaccount for sign extension of low part. */
558 if ((val & 0x8000) != 0)
559 val += 0x10000;
560
561 insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff);
562 bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr);
563
564 next = l->next;
565 free (l);
566 l = next;
567 }
568
569 m32r_hi16_list = NULL;
570 }
571
572 /* Now do the LO16 reloc in the usual way.
573 ??? It would be nice to call bfd_elf_generic_reloc here,
574 but we have partial_inplace set. bfd_elf_generic_reloc will
575 pass the handling back to bfd_install_relocation which will install
576 a section relative addend which is wrong. */
577 return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
578 input_section, output_bfd, error_message);
579 }
580
581 /* Do generic partial_inplace relocation.
582 This is a local replacement for bfd_elf_generic_reloc. */
583
584 bfd_reloc_status_type
585 m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
586 input_section, output_bfd, error_message)
587 bfd *input_bfd;
588 arelent *reloc_entry;
589 asymbol *symbol;
590 PTR data;
591 asection *input_section;
592 bfd *output_bfd;
593 char **error_message ATTRIBUTE_UNUSED;
594 {
595 bfd_reloc_status_type ret;
596 bfd_vma relocation;
597 bfd_byte *inplace_address;
598
599 /* This part is from bfd_elf_generic_reloc.
600 If we're relocating, and this an external symbol, we don't want
601 to change anything. */
602 if (output_bfd != (bfd *) NULL
603 && (symbol->flags & BSF_SECTION_SYM) == 0
604 && reloc_entry->addend == 0)
605 {
606 reloc_entry->address += input_section->output_offset;
607 return bfd_reloc_ok;
608 }
609
610 /* Now do the reloc in the usual way.
611 ??? It would be nice to call bfd_elf_generic_reloc here,
612 but we have partial_inplace set. bfd_elf_generic_reloc will
613 pass the handling back to bfd_install_relocation which will install
614 a section relative addend which is wrong. */
615
616 /* Sanity check the address (offset in section). */
617 if (reloc_entry->address > input_section->_cooked_size)
618 return bfd_reloc_outofrange;
619
620 ret = bfd_reloc_ok;
621 if (bfd_is_und_section (symbol->section)
622 && output_bfd == (bfd *) NULL)
623 ret = bfd_reloc_undefined;
624
625 if (bfd_is_com_section (symbol->section)
626 || output_bfd != (bfd *) NULL)
627 relocation = 0;
628 else
629 relocation = symbol->value;
630
631 /* Only do this for a final link. */
632 if (output_bfd == (bfd *) NULL)
633 {
634 relocation += symbol->section->output_section->vma;
635 relocation += symbol->section->output_offset;
636 }
637
638 relocation += reloc_entry->addend;
639 inplace_address = (bfd_byte *) data + reloc_entry->address;
640
641 #define DOIT(x) \
642 x = ( (x & ~reloc_entry->howto->dst_mask) | \
643 (((x & reloc_entry->howto->src_mask) + relocation) & \
644 reloc_entry->howto->dst_mask))
645
646 switch (reloc_entry->howto->size)
647 {
648 case 1:
649 {
650 short x = bfd_get_16 (input_bfd, inplace_address);
651 DOIT (x);
652 bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address);
653 }
654 break;
655 case 2:
656 {
657 unsigned long x = bfd_get_32 (input_bfd, inplace_address);
658 DOIT (x);
659 bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address);
660 }
661 break;
662 default:
663 BFD_ASSERT (0);
664 }
665
666 if (output_bfd != (bfd *) NULL)
667 reloc_entry->address += input_section->output_offset;
668
669 return ret;
670 }
671
672 /* Handle the R_M32R_SDA16 reloc.
673 This reloc is used to compute the address of objects in the small data area
674 and to perform loads and stores from that area.
675 The lower 16 bits are sign extended and added to the register specified
676 in the instruction, which is assumed to point to _SDA_BASE_. */
677
678 static bfd_reloc_status_type
679 m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
680 input_section, output_bfd, error_message)
681 bfd *abfd ATTRIBUTE_UNUSED;
682 arelent *reloc_entry;
683 asymbol *symbol;
684 PTR data ATTRIBUTE_UNUSED;
685 asection *input_section;
686 bfd *output_bfd;
687 char **error_message ATTRIBUTE_UNUSED;
688 {
689 /* This part is from bfd_elf_generic_reloc. */
690 if (output_bfd != (bfd *) NULL
691 && (symbol->flags & BSF_SECTION_SYM) == 0
692 && (! reloc_entry->howto->partial_inplace
693 || reloc_entry->addend == 0))
694 {
695 reloc_entry->address += input_section->output_offset;
696 return bfd_reloc_ok;
697 }
698
699 if (output_bfd != NULL)
700 {
701 /* FIXME: See bfd_perform_relocation. Is this right? */
702 return bfd_reloc_continue;
703 }
704
705 /* FIXME: not sure what to do here yet. But then again, the linker
706 may never call us. */
707 abort ();
708 }
709 \f
710 /* Map BFD reloc types to M32R ELF reloc types. */
711
712 struct m32r_reloc_map
713 {
714 bfd_reloc_code_real_type bfd_reloc_val;
715 unsigned char elf_reloc_val;
716 };
717
718 static const struct m32r_reloc_map m32r_reloc_map[] =
719 {
720 { BFD_RELOC_NONE, R_M32R_NONE },
721 { BFD_RELOC_16, R_M32R_16 },
722 { BFD_RELOC_32, R_M32R_32 },
723 { BFD_RELOC_M32R_24, R_M32R_24 },
724 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
725 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
726 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
727 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
728 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
729 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
730 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
731 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
732 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
733 };
734
735 static reloc_howto_type *
736 bfd_elf32_bfd_reloc_type_lookup (abfd, code)
737 bfd *abfd ATTRIBUTE_UNUSED;
738 bfd_reloc_code_real_type code;
739 {
740 unsigned int i;
741
742 for (i = 0;
743 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
744 i++)
745 {
746 if (m32r_reloc_map[i].bfd_reloc_val == code)
747 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
748 }
749
750 return NULL;
751 }
752
753 /* Set the howto pointer for an M32R ELF reloc. */
754
755 static void
756 m32r_info_to_howto_rel (abfd, cache_ptr, dst)
757 bfd *abfd ATTRIBUTE_UNUSED;
758 arelent *cache_ptr;
759 Elf_Internal_Rela *dst;
760 {
761 unsigned int r_type;
762
763 r_type = ELF32_R_TYPE (dst->r_info);
764 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
765 cache_ptr->howto = &m32r_elf_howto_table[r_type];
766 }
767 \f
768 /* Given a BFD section, try to locate the corresponding ELF section
769 index. */
770
771 bfd_boolean
772 _bfd_m32r_elf_section_from_bfd_section (abfd, sec, retval)
773 bfd *abfd ATTRIBUTE_UNUSED;
774 asection *sec;
775 int *retval;
776 {
777 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
778 {
779 *retval = SHN_M32R_SCOMMON;
780 return TRUE;
781 }
782 return FALSE;
783 }
784
785 /* M32R ELF uses two common sections. One is the usual one, and the other
786 is for small objects. All the small objects are kept together, and then
787 referenced via one register, which yields faster assembler code. It is
788 up to the compiler to emit an instruction to load the register with
789 _SDA_BASE. This is what we use for the small common section. This
790 approach is copied from elf32-mips.c. */
791 static asection m32r_elf_scom_section;
792 static asymbol m32r_elf_scom_symbol;
793 static asymbol *m32r_elf_scom_symbol_ptr;
794
795 /* Handle the special M32R section numbers that a symbol may use. */
796
797 void
798 _bfd_m32r_elf_symbol_processing (abfd, asym)
799 bfd *abfd ATTRIBUTE_UNUSED;
800 asymbol *asym;
801 {
802 elf_symbol_type *elfsym;
803
804 elfsym = (elf_symbol_type *) asym;
805
806 switch (elfsym->internal_elf_sym.st_shndx)
807 {
808 case SHN_M32R_SCOMMON:
809 if (m32r_elf_scom_section.name == NULL)
810 {
811 /* Initialize the small common section. */
812 m32r_elf_scom_section.name = ".scommon";
813 m32r_elf_scom_section.flags = SEC_IS_COMMON;
814 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
815 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
816 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
817 m32r_elf_scom_symbol.name = ".scommon";
818 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
819 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
820 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
821 }
822 asym->section = &m32r_elf_scom_section;
823 asym->value = elfsym->internal_elf_sym.st_size;
824 break;
825 }
826 }
827
828 /* Hook called by the linker routine which adds symbols from an object
829 file. We must handle the special M32R section numbers here.
830 We also keep watching for whether we need to create the sdata special
831 linker sections. */
832
833 static bfd_boolean
834 m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
835 bfd *abfd;
836 struct bfd_link_info *info;
837 const Elf_Internal_Sym *sym;
838 const char **namep;
839 flagword *flagsp ATTRIBUTE_UNUSED;
840 asection **secp;
841 bfd_vma *valp;
842 {
843 if (! info->relocateable
844 && (*namep)[0] == '_' && (*namep)[1] == 'S'
845 && strcmp (*namep, "_SDA_BASE_") == 0
846 && info->hash->creator->flavour == bfd_target_elf_flavour)
847 {
848 /* This is simpler than using _bfd_elf_create_linker_section
849 (our needs are simpler than ppc's needs). Also
850 _bfd_elf_create_linker_section currently has a bug where if a .sdata
851 section already exists a new one is created that follows it which
852 screws of _SDA_BASE_ address calcs because output_offset != 0. */
853 struct elf_link_hash_entry *h;
854 struct bfd_link_hash_entry *bh;
855 asection *s = bfd_get_section_by_name (abfd, ".sdata");
856
857 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
858
859 if (s == NULL)
860 {
861 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
862 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
863
864 s = bfd_make_section_anyway (abfd, ".sdata");
865 if (s == NULL)
866 return FALSE;
867 bfd_set_section_flags (abfd, s, flags);
868 bfd_set_section_alignment (abfd, s, 2);
869 }
870
871 bh = bfd_link_hash_lookup (info->hash, "_SDA_BASE_",
872 FALSE, FALSE, FALSE);
873
874 if ((bh == NULL || bh->type == bfd_link_hash_undefined)
875 && !(_bfd_generic_link_add_one_symbol (info,
876 abfd,
877 "_SDA_BASE_",
878 BSF_GLOBAL,
879 s,
880 (bfd_vma) 32768,
881 (const char *) NULL,
882 FALSE,
883 get_elf_backend_data (abfd)->collect,
884 &bh)))
885 return FALSE;
886 h = (struct elf_link_hash_entry *) bh;
887 h->type = STT_OBJECT;
888 }
889
890 switch (sym->st_shndx)
891 {
892 case SHN_M32R_SCOMMON:
893 *secp = bfd_make_section_old_way (abfd, ".scommon");
894 (*secp)->flags |= SEC_IS_COMMON;
895 *valp = sym->st_size;
896 break;
897 }
898
899 return TRUE;
900 }
901
902 /* We have to figure out the SDA_BASE value, so that we can adjust the
903 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
904 BFD. If we can't find it, we're stuck. We cache it in the ELF
905 target data. We don't need to adjust the symbol value for an
906 external symbol if we are producing relocateable output. */
907
908 static bfd_reloc_status_type
909 m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
910 bfd *output_bfd;
911 struct bfd_link_info *info;
912 const char **error_message;
913 bfd_vma *psb;
914 {
915 if (elf_gp (output_bfd) == 0)
916 {
917 struct bfd_link_hash_entry *h;
918
919 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
920 if (h != (struct bfd_link_hash_entry *) NULL
921 && h->type == bfd_link_hash_defined)
922 elf_gp (output_bfd) = (h->u.def.value
923 + h->u.def.section->output_section->vma
924 + h->u.def.section->output_offset);
925 else
926 {
927 /* Only get the error once. */
928 *psb = elf_gp (output_bfd) = 4;
929 *error_message =
930 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
931 return bfd_reloc_dangerous;
932 }
933 }
934 *psb = elf_gp (output_bfd);
935 return bfd_reloc_ok;
936 }
937 \f
938 /* Relocate an M32R/D ELF section.
939 There is some attempt to make this function usable for many architectures,
940 both for RELA and REL type relocs, if only to serve as a learning tool.
941
942 The RELOCATE_SECTION function is called by the new ELF backend linker
943 to handle the relocations for a section.
944
945 The relocs are always passed as Rela structures; if the section
946 actually uses Rel structures, the r_addend field will always be
947 zero.
948
949 This function is responsible for adjust the section contents as
950 necessary, and (if using Rela relocs and generating a
951 relocateable output file) adjusting the reloc addend as
952 necessary.
953
954 This function does not have to worry about setting the reloc
955 address or the reloc symbol index.
956
957 LOCAL_SYMS is a pointer to the swapped in local symbols.
958
959 LOCAL_SECTIONS is an array giving the section in the input file
960 corresponding to the st_shndx field of each local symbol.
961
962 The global hash table entry for the global symbols can be found
963 via elf_sym_hashes (input_bfd).
964
965 When generating relocateable output, this function must handle
966 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
967 going to be the section symbol corresponding to the output
968 section, which means that the addend must be adjusted
969 accordingly. */
970
971 static bfd_boolean
972 m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
973 contents, relocs, local_syms, local_sections)
974 bfd *output_bfd ATTRIBUTE_UNUSED;
975 struct bfd_link_info *info;
976 bfd *input_bfd;
977 asection *input_section;
978 bfd_byte *contents;
979 Elf_Internal_Rela *relocs;
980 Elf_Internal_Sym *local_syms;
981 asection **local_sections;
982 {
983 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
984 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
985 Elf_Internal_Rela *rel, *relend;
986 /* Assume success. */
987 bfd_boolean ret = TRUE;
988
989 #if !USE_REL
990 if (info->relocateable)
991 return TRUE;
992 #endif
993
994 rel = relocs;
995 relend = relocs + input_section->reloc_count;
996 for (; rel < relend; rel++)
997 {
998 int r_type;
999 reloc_howto_type *howto;
1000 unsigned long r_symndx;
1001 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
1002 ensure it's zero (we use REL relocs, not RELA). Therefore this
1003 should be assigning zero to `addend', but for clarity we use
1004 `r_addend'. */
1005 bfd_vma addend = rel->r_addend;
1006 bfd_vma offset = rel->r_offset;
1007 struct elf_link_hash_entry *h;
1008 Elf_Internal_Sym *sym;
1009 asection *sec;
1010 const char *sym_name;
1011 bfd_reloc_status_type r;
1012 const char *errmsg = NULL;
1013
1014 h = NULL;
1015 r_type = ELF32_R_TYPE (rel->r_info);
1016 if (r_type < 0 || r_type >= (int) R_M32R_max)
1017 {
1018 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
1019 bfd_archive_filename (input_bfd),
1020 (int) r_type);
1021 bfd_set_error (bfd_error_bad_value);
1022 ret = FALSE;
1023 continue;
1024 }
1025
1026 if (r_type == R_M32R_GNU_VTENTRY
1027 || r_type == R_M32R_GNU_VTINHERIT)
1028 continue;
1029
1030 howto = m32r_elf_howto_table + r_type;
1031 r_symndx = ELF32_R_SYM (rel->r_info);
1032
1033 #if USE_REL
1034 if (info->relocateable)
1035 {
1036 /* This is a relocateable link. We don't have to change
1037 anything, unless the reloc is against a section symbol,
1038 in which case we have to adjust according to where the
1039 section symbol winds up in the output section. */
1040 sec = NULL;
1041 if (r_symndx >= symtab_hdr->sh_info)
1042 {
1043 /* External symbol. */
1044 continue;
1045 }
1046
1047 /* Local symbol. */
1048 sym = local_syms + r_symndx;
1049 sym_name = "<local symbol>";
1050 /* STT_SECTION: symbol is associated with a section. */
1051 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
1052 {
1053 /* Symbol isn't associated with a section. Nothing to do. */
1054 continue;
1055 }
1056
1057 sec = local_sections[r_symndx];
1058 addend += sec->output_offset + sym->st_value;
1059
1060 /* If partial_inplace, we need to store any additional addend
1061 back in the section. */
1062 if (! howto->partial_inplace)
1063 continue;
1064 /* ??? Here is a nice place to call a special_function
1065 like handler. */
1066 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
1067 r = _bfd_relocate_contents (howto, input_bfd,
1068 addend, contents + offset);
1069 else
1070 {
1071 Elf_Internal_Rela *lorel;
1072
1073 /* We allow an arbitrary number of HI16 relocs before the
1074 LO16 reloc. This permits gcc to emit the HI and LO relocs
1075 itself. */
1076 for (lorel = rel + 1;
1077 (lorel < relend
1078 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1079 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1080 lorel++)
1081 continue;
1082 if (lorel < relend
1083 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1084 {
1085 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1086 contents, addend);
1087 r = bfd_reloc_ok;
1088 }
1089 else
1090 r = _bfd_relocate_contents (howto, input_bfd,
1091 addend, contents + offset);
1092 }
1093 }
1094 else
1095 #endif /* USE_REL */
1096 {
1097 bfd_vma relocation;
1098
1099 /* This is a final link. */
1100 sym = NULL;
1101 sec = NULL;
1102
1103 if (r_symndx < symtab_hdr->sh_info)
1104 {
1105 /* Local symbol. */
1106 sym = local_syms + r_symndx;
1107 sec = local_sections[r_symndx];
1108 sym_name = "<local symbol>";
1109 #if !USE_REL
1110 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel);
1111 addend = rel->r_addend;
1112 #else
1113 /* FIXME: This won't handle local relocations against SEC_MERGE
1114 symbols. See elf32-i386.c for how to do this. */
1115 relocation = (sec->output_section->vma
1116 + sec->output_offset
1117 + sym->st_value);
1118 #endif
1119 }
1120 else
1121 {
1122 /* External symbol. */
1123 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1124 while (h->root.type == bfd_link_hash_indirect
1125 || h->root.type == bfd_link_hash_warning)
1126 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1127 sym_name = h->root.root.string;
1128
1129 if (h->root.type == bfd_link_hash_defined
1130 || h->root.type == bfd_link_hash_defweak)
1131 {
1132 sec = h->root.u.def.section;
1133 if (sec->output_section == NULL)
1134 relocation = 0;
1135 else
1136 relocation = (h->root.u.def.value
1137 + sec->output_section->vma
1138 + sec->output_offset);
1139 }
1140 else if (h->root.type == bfd_link_hash_undefweak)
1141 relocation = 0;
1142 else
1143 {
1144 if (! ((*info->callbacks->undefined_symbol)
1145 (info, h->root.root.string, input_bfd,
1146 input_section, offset, TRUE)))
1147 return FALSE;
1148 relocation = 0;
1149 }
1150 }
1151
1152 /* Sanity check the address. */
1153 if (offset > input_section->_raw_size)
1154 {
1155 r = bfd_reloc_outofrange;
1156 goto check_reloc;
1157 }
1158
1159 switch ((int) r_type)
1160 {
1161 case (int) R_M32R_10_PCREL :
1162 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1163 contents, offset,
1164 sec, relocation, addend);
1165 break;
1166
1167 case (int) R_M32R_HI16_SLO :
1168 case (int) R_M32R_HI16_ULO :
1169 {
1170 Elf_Internal_Rela *lorel;
1171
1172 /* We allow an arbitrary number of HI16 relocs before the
1173 LO16 reloc. This permits gcc to emit the HI and LO relocs
1174 itself. */
1175 for (lorel = rel + 1;
1176 (lorel < relend
1177 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1178 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1179 lorel++)
1180 continue;
1181 if (lorel < relend
1182 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1183 {
1184 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1185 contents, relocation + addend);
1186 r = bfd_reloc_ok;
1187 }
1188 else
1189 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1190 contents, offset,
1191 relocation, addend);
1192 }
1193 break;
1194
1195 case (int) R_M32R_SDA16 :
1196 {
1197 const char *name;
1198
1199 BFD_ASSERT (sec != NULL);
1200 name = bfd_get_section_name (abfd, sec);
1201
1202 if (strcmp (name, ".sdata") == 0
1203 || strcmp (name, ".sbss") == 0
1204 || strcmp (name, ".scommon") == 0)
1205 {
1206 bfd_vma sda_base;
1207 bfd *out_bfd = sec->output_section->owner;
1208
1209 r = m32r_elf_final_sda_base (out_bfd, info,
1210 &errmsg,
1211 &sda_base);
1212 if (r != bfd_reloc_ok)
1213 {
1214 ret = FALSE;
1215 goto check_reloc;
1216 }
1217
1218 /* At this point `relocation' contains the object's
1219 address. */
1220 relocation -= sda_base;
1221 /* Now it contains the offset from _SDA_BASE_. */
1222 }
1223 else
1224 {
1225 (*_bfd_error_handler)
1226 (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1227 bfd_archive_filename (input_bfd),
1228 sym_name,
1229 m32r_elf_howto_table[(int) r_type].name,
1230 bfd_get_section_name (abfd, sec));
1231 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1232 ret = FALSE;
1233 continue;
1234 }
1235 }
1236 /* fall through */
1237
1238 default :
1239 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1240 contents, offset,
1241 relocation, addend);
1242 break;
1243 }
1244 }
1245
1246 check_reloc:
1247
1248 if (r != bfd_reloc_ok)
1249 {
1250 /* FIXME: This should be generic enough to go in a utility. */
1251 const char *name;
1252
1253 if (h != NULL)
1254 name = h->root.root.string;
1255 else
1256 {
1257 name = (bfd_elf_string_from_elf_section
1258 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1259 if (name == NULL || *name == '\0')
1260 name = bfd_section_name (input_bfd, sec);
1261 }
1262
1263 if (errmsg != NULL)
1264 goto common_error;
1265
1266 switch (r)
1267 {
1268 case bfd_reloc_overflow:
1269 if (! ((*info->callbacks->reloc_overflow)
1270 (info, name, howto->name, (bfd_vma) 0,
1271 input_bfd, input_section, offset)))
1272 return FALSE;
1273 break;
1274
1275 case bfd_reloc_undefined:
1276 if (! ((*info->callbacks->undefined_symbol)
1277 (info, name, input_bfd, input_section,
1278 offset, TRUE)))
1279 return FALSE;
1280 break;
1281
1282 case bfd_reloc_outofrange:
1283 errmsg = _("internal error: out of range error");
1284 goto common_error;
1285
1286 case bfd_reloc_notsupported:
1287 errmsg = _("internal error: unsupported relocation error");
1288 goto common_error;
1289
1290 case bfd_reloc_dangerous:
1291 errmsg = _("internal error: dangerous error");
1292 goto common_error;
1293
1294 default:
1295 errmsg = _("internal error: unknown error");
1296 /* fall through */
1297
1298 common_error:
1299 if (!((*info->callbacks->warning)
1300 (info, errmsg, name, input_bfd, input_section,
1301 offset)))
1302 return FALSE;
1303 break;
1304 }
1305 }
1306 }
1307
1308 return ret;
1309 }
1310 \f
1311 #if 0 /* relaxing not supported yet */
1312
1313 /* This function handles relaxing for the m32r.
1314 Relaxing on the m32r is tricky because of instruction alignment
1315 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1316
1317 The following relaxing opportunities are handled:
1318
1319 seth/add3/jl -> bl24 or bl8
1320 seth/add3 -> ld24
1321
1322 It would be nice to handle bl24 -> bl8 but given:
1323
1324 - 4 byte insns must be on 4 byte boundaries
1325 - branch instructions only branch to insns on 4 byte boundaries
1326
1327 this isn't much of a win because the insn in the 2 "deleted" bytes
1328 must become a nop. With some complexity some real relaxation could be
1329 done but the frequency just wouldn't make it worth it; it's better to
1330 try to do all the code compaction one can elsewhere.
1331 When the chip supports parallel 16 bit insns, things may change.
1332 */
1333
1334 static bfd_boolean
1335 m32r_elf_relax_section (abfd, sec, link_info, again)
1336 bfd *abfd;
1337 asection *sec;
1338 struct bfd_link_info *link_info;
1339 bfd_boolean *again;
1340 {
1341 Elf_Internal_Shdr *symtab_hdr;
1342 /* The Rela structures are used here because that's what
1343 _bfd_elf_link_read_relocs uses [for convenience - it sets the addend
1344 field to 0]. */
1345 Elf_Internal_Rela *internal_relocs = NULL;
1346 Elf_Internal_Rela *irel, *irelend;
1347 bfd_byte *contents = NULL;
1348 Elf_Internal_Sym *isymbuf = NULL;
1349
1350 /* Assume nothing changes. */
1351 *again = FALSE;
1352
1353 /* We don't have to do anything for a relocateable link, if
1354 this section does not have relocs, or if this is not a
1355 code section. */
1356 if (link_info->relocateable
1357 || (sec->flags & SEC_RELOC) == 0
1358 || sec->reloc_count == 0
1359 || (sec->flags & SEC_CODE) == 0
1360 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1361 return TRUE;
1362
1363 /* If this is the first time we have been called for this section,
1364 initialize the cooked size. */
1365 if (sec->_cooked_size == 0)
1366 sec->_cooked_size = sec->_raw_size;
1367
1368 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1369
1370 /* Get a copy of the native relocations. */
1371 internal_relocs = (_bfd_elf_link_read_relocs
1372 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1373 link_info->keep_memory));
1374 if (internal_relocs == NULL)
1375 goto error_return;
1376
1377 /* Walk through them looking for relaxing opportunities. */
1378 irelend = internal_relocs + sec->reloc_count;
1379 for (irel = internal_relocs; irel < irelend; irel++)
1380 {
1381 bfd_vma symval;
1382
1383 /* If this isn't something that can be relaxed, then ignore
1384 this reloc. */
1385 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1386 continue;
1387
1388 /* Get the section contents if we haven't done so already. */
1389 if (contents == NULL)
1390 {
1391 /* Get cached copy if it exists. */
1392 if (elf_section_data (sec)->this_hdr.contents != NULL)
1393 contents = elf_section_data (sec)->this_hdr.contents;
1394 else
1395 {
1396 /* Go get them off disk. */
1397 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1398 if (contents == NULL)
1399 goto error_return;
1400
1401 if (! bfd_get_section_contents (abfd, sec, contents,
1402 (file_ptr) 0, sec->_raw_size))
1403 goto error_return;
1404 }
1405 }
1406
1407 /* Read this BFD's local symbols if we haven't done so already. */
1408 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
1409 {
1410 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1411 if (isymbuf == NULL)
1412 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1413 symtab_hdr->sh_info, 0,
1414 NULL, NULL, NULL);
1415 if (isymbuf == NULL)
1416 goto error_return;
1417 }
1418
1419 /* Get the value of the symbol referred to by the reloc. */
1420 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1421 {
1422 /* A local symbol. */
1423 Elf_Internal_Sym *isym;
1424 asection *sym_sec;
1425
1426 isym = isymbuf + ELF32_R_SYM (irel->r_info),
1427 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1428 symval = (isym->st_value
1429 + sym_sec->output_section->vma
1430 + sym_sec->output_offset);
1431 }
1432 else
1433 {
1434 unsigned long indx;
1435 struct elf_link_hash_entry *h;
1436
1437 /* An external symbol. */
1438 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1439 h = elf_sym_hashes (abfd)[indx];
1440 BFD_ASSERT (h != NULL);
1441 if (h->root.type != bfd_link_hash_defined
1442 && h->root.type != bfd_link_hash_defweak)
1443 {
1444 /* This appears to be a reference to an undefined
1445 symbol. Just ignore it--it will be caught by the
1446 regular reloc processing. */
1447 continue;
1448 }
1449
1450 symval = (h->root.u.def.value
1451 + h->root.u.def.section->output_section->vma
1452 + h->root.u.def.section->output_offset);
1453 }
1454
1455 /* For simplicity of coding, we are going to modify the section
1456 contents, the section relocs, and the BFD symbol table. We
1457 must tell the rest of the code not to free up this
1458 information. It would be possible to instead create a table
1459 of changes which have to be made, as is done in coff-mips.c;
1460 that would be more work, but would require less memory when
1461 the linker is run. */
1462
1463 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1464 This sequence is generated by the compiler when compiling in
1465 32 bit mode. Also look for seth/add3 -> ld24. */
1466
1467 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1468 {
1469 Elf_Internal_Rela *nrel;
1470 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1471 + irel->r_offset);
1472 bfd_signed_vma pcrel_value = symval - pc;
1473 unsigned int code,reg;
1474 int addend,nop_p,bl8_p,to_delete;
1475
1476 /* The tests are ordered so that we get out as quickly as possible
1477 if this isn't something we can relax, taking into account that
1478 we are looking for two separate possibilities (jl/ld24). */
1479
1480 /* Do nothing if no room in the section for this to be what we're
1481 looking for. */
1482 if (irel->r_offset > sec->_cooked_size - 8)
1483 continue;
1484
1485 /* Make sure the next relocation applies to the next
1486 instruction and that it's the add3's reloc. */
1487 nrel = irel + 1;
1488 if (nrel == irelend
1489 || irel->r_offset + 4 != nrel->r_offset
1490 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1491 continue;
1492
1493 /* See if the instructions are seth/add3. */
1494 /* FIXME: This is where macros from cgen can come in. */
1495 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1496 if ((code & 0xf0ff) != 0xd0c0)
1497 continue; /* not seth rN,foo */
1498 reg = (code & 0x0f00) >> 8;
1499 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1500 if (code != (0x80a0 | reg | (reg << 8)))
1501 continue; /* not add3 rN,rN,foo */
1502
1503 /* At this point we've confirmed we have seth/add3. Now check
1504 whether the next insn is a jl, in which case try to change this
1505 to bl24 or bl8. */
1506
1507 /* Ensure the branch target is in range.
1508 The bl24 instruction has a 24 bit operand which is the target
1509 address right shifted by 2, giving a signed range of 26 bits.
1510 Note that 4 bytes are added to the high value because the target
1511 will be at least 4 bytes closer if we can relax. It'll actually
1512 be 4 or 8 bytes closer, but we don't know which just yet and
1513 the difference isn't significant enough to worry about. */
1514 #if !USE_REL /* put in for learning purposes */
1515 pcrel_value += irel->r_addend;
1516 #else
1517 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1518 pcrel_value += addend;
1519 #endif
1520
1521 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1522 /* Do nothing if no room in the section for this to be what we're
1523 looking for. */
1524 && (irel->r_offset <= sec->_cooked_size - 12)
1525 /* Ensure the next insn is "jl rN". */
1526 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1527 code != (0x1ec0 | reg)))
1528 {
1529 /* We can relax to bl24/bl8. */
1530
1531 /* See if there's a nop following the jl.
1532 Also see if we can use a bl8 insn. */
1533 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1534 nop_p = (code & 0x7fff) == NOP_INSN;
1535 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1536
1537 if (bl8_p)
1538 {
1539 /* Change "seth rN,foo" to "bl8 foo || nop".
1540 We OR in CODE just in case it's not a nop (technically,
1541 CODE currently must be a nop, but for cleanness we
1542 allow it to be anything). */
1543 #if !USE_REL /* put in for learning purposes */
1544 code = 0x7e000000 | MAKE_PARALLEL (code);
1545 #else
1546 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1547 #endif
1548 to_delete = 8;
1549 }
1550 else
1551 {
1552 /* Change the seth rN,foo to a bl24 foo. */
1553 #if !USE_REL /* put in for learning purposes */
1554 code = 0xfe000000;
1555 #else
1556 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1557 #endif
1558 to_delete = nop_p ? 8 : 4;
1559 }
1560
1561 bfd_put_32 (abfd, code, contents + irel->r_offset);
1562
1563 /* Set the new reloc type. */
1564 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1565 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1566
1567 /* Delete the add3 reloc by making it a null reloc. */
1568 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1569 R_M32R_NONE);
1570 }
1571 else if (addend >= 0
1572 && symval + addend <= 0xffffff)
1573 {
1574 /* We can relax to ld24. */
1575
1576 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1577 bfd_put_32 (abfd, code, contents + irel->r_offset);
1578 to_delete = 4;
1579 /* Tell the following code a nop filler isn't needed. */
1580 nop_p = 1;
1581 }
1582 else
1583 {
1584 /* Can't do anything here. */
1585 continue;
1586 }
1587
1588 /* Note that we've changed the relocs, section contents, etc. */
1589 elf_section_data (sec)->relocs = internal_relocs;
1590 elf_section_data (sec)->this_hdr.contents = contents;
1591 symtab_hdr->contents = (unsigned char *) isymbuf;
1592
1593 /* Delete TO_DELETE bytes of data. */
1594 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1595 irel->r_offset + 4, to_delete))
1596 goto error_return;
1597
1598 /* Now that the following bytes have been moved into place, see if
1599 we need to replace the jl with a nop. This happens when we had
1600 to use a bl24 insn and the insn following the jl isn't a nop.
1601 Technically, this situation can't happen (since the insn can
1602 never be executed) but to be clean we do this. When the chip
1603 supports parallel 16 bit insns things may change.
1604 We don't need to do this in the case of relaxing to ld24,
1605 and the above code sets nop_p so this isn't done. */
1606 if (! nop_p && to_delete == 4)
1607 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1608
1609 /* That will change things, so we should relax again.
1610 Note that this is not required, and it may be slow. */
1611 *again = TRUE;
1612
1613 continue;
1614 }
1615
1616 /* loop to try the next reloc */
1617 }
1618
1619 if (isymbuf != NULL
1620 && symtab_hdr->contents != (unsigned char *) isymbuf)
1621 {
1622 if (! link_info->keep_memory)
1623 free (isymbuf);
1624 else
1625 {
1626 /* Cache the symbols for elf_link_input_bfd. */
1627 symtab_hdr->contents = (unsigned char *) isymbuf;
1628 }
1629 }
1630
1631 if (contents != NULL
1632 && elf_section_data (sec)->this_hdr.contents != contents)
1633 {
1634 if (! link_info->keep_memory)
1635 free (contents);
1636 else
1637 {
1638 /* Cache the section contents for elf_link_input_bfd. */
1639 elf_section_data (sec)->this_hdr.contents = contents;
1640 }
1641 }
1642
1643 if (internal_relocs != NULL
1644 && elf_section_data (sec)->relocs != internal_relocs)
1645 free (internal_relocs);
1646
1647 return TRUE;
1648
1649 error_return:
1650 if (isymbuf != NULL
1651 && symtab_hdr->contents != (unsigned char *) isymbuf)
1652 free (isymbuf);
1653 if (contents != NULL
1654 && elf_section_data (sec)->this_hdr.contents != contents)
1655 free (contents);
1656 if (internal_relocs != NULL
1657 && elf_section_data (sec)->relocs != internal_relocs)
1658 free (internal_relocs);
1659
1660 return FALSE;
1661 }
1662
1663 /* Delete some bytes from a section while relaxing. */
1664
1665 static bfd_boolean
1666 m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1667 bfd *abfd;
1668 asection *sec;
1669 bfd_vma addr;
1670 int count;
1671 {
1672 Elf_Internal_Shdr *symtab_hdr;
1673 int shndx;
1674 bfd_byte *contents;
1675 Elf_Internal_Rela *irel, *irelend;
1676 Elf_Internal_Rela *irelalign;
1677 bfd_vma toaddr;
1678 Elf_Internal_Sym *isym, *isymend;
1679 struct elf_link_hash_entry **sym_hashes;
1680 struct elf_link_hash_entry **end_hashes;
1681 unsigned int symcount;
1682
1683 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1684
1685 contents = elf_section_data (sec)->this_hdr.contents;
1686
1687 /* The deletion must stop at the next ALIGN reloc for an aligment
1688 power larger than the number of bytes we are deleting. */
1689
1690 irelalign = NULL;
1691 toaddr = sec->_cooked_size;
1692
1693 irel = elf_section_data (sec)->relocs;
1694 irelend = irel + sec->reloc_count;
1695
1696 /* Actually delete the bytes. */
1697 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1698 sec->_cooked_size -= count;
1699
1700 /* Adjust all the relocs. */
1701 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1702 {
1703 /* Get the new reloc address. */
1704 if ((irel->r_offset > addr
1705 && irel->r_offset < toaddr))
1706 irel->r_offset -= count;
1707 }
1708
1709 /* Adjust the local symbols defined in this section. */
1710 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1711 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1712 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
1713 {
1714 if (isym->st_shndx == shndx
1715 && isym->st_value > addr
1716 && isym->st_value < toaddr)
1717 isym->st_value -= count;
1718 }
1719
1720 /* Now adjust the global symbols defined in this section. */
1721 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1722 - symtab_hdr->sh_info);
1723 sym_hashes = elf_sym_hashes (abfd);
1724 end_hashes = sym_hashes + symcount;
1725 for (; sym_hashes < end_hashes; sym_hashes++)
1726 {
1727 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1728
1729 if ((sym_hash->root.type == bfd_link_hash_defined
1730 || sym_hash->root.type == bfd_link_hash_defweak)
1731 && sym_hash->root.u.def.section == sec
1732 && sym_hash->root.u.def.value > addr
1733 && sym_hash->root.u.def.value < toaddr)
1734 {
1735 sym_hash->root.u.def.value -= count;
1736 }
1737 }
1738
1739 return TRUE;
1740 }
1741
1742 /* This is a version of bfd_generic_get_relocated_section_contents
1743 which uses m32r_elf_relocate_section. */
1744
1745 static bfd_byte *
1746 m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1747 data, relocateable, symbols)
1748 bfd *output_bfd;
1749 struct bfd_link_info *link_info;
1750 struct bfd_link_order *link_order;
1751 bfd_byte *data;
1752 bfd_boolean relocateable;
1753 asymbol **symbols;
1754 {
1755 Elf_Internal_Shdr *symtab_hdr;
1756 asection *input_section = link_order->u.indirect.section;
1757 bfd *input_bfd = input_section->owner;
1758 asection **sections = NULL;
1759 Elf_Internal_Rela *internal_relocs = NULL;
1760 Elf_Internal_Sym *isymbuf = NULL;
1761 bfd_size_type amt;
1762
1763 /* We only need to handle the case of relaxing, or of having a
1764 particular set of section contents, specially. */
1765 if (relocateable
1766 || elf_section_data (input_section)->this_hdr.contents == NULL)
1767 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1768 link_order, data,
1769 relocateable,
1770 symbols);
1771
1772 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1773
1774 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1775 input_section->_raw_size);
1776
1777 if ((input_section->flags & SEC_RELOC) != 0
1778 && input_section->reloc_count > 0)
1779 {
1780 Elf_Internal_Sym *isymp;
1781 asection **secpp;
1782 Elf32_External_Sym *esym, *esymend;
1783
1784 internal_relocs = (_bfd_elf_link_read_relocs
1785 (input_bfd, input_section, (PTR) NULL,
1786 (Elf_Internal_Rela *) NULL, FALSE));
1787 if (internal_relocs == NULL)
1788 goto error_return;
1789
1790 if (symtab_hdr->sh_info != 0)
1791 {
1792 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1793 if (isymbuf == NULL)
1794 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1795 symtab_hdr->sh_info, 0,
1796 NULL, NULL, NULL);
1797 if (isymbuf == NULL)
1798 goto error_return;
1799 }
1800
1801 amt = symtab_hdr->sh_info;
1802 amt *= sizeof (asection *);
1803 sections = (asection **) bfd_malloc (amt);
1804 if (sections == NULL && symtab_hdr->sh_info > 0)
1805 goto error_return;
1806
1807 isymend = isymbuf + symtab_hdr->sh_info;
1808 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
1809 {
1810 asection *isec;
1811
1812 if (isym->st_shndx == SHN_UNDEF)
1813 isec = bfd_und_section_ptr;
1814 else if (isym->st_shndx == SHN_ABS)
1815 isec = bfd_abs_section_ptr;
1816 else if (isym->st_shndx == SHN_COMMON)
1817 isec = bfd_com_section_ptr;
1818 else if (isym->st_shndx == SHN_M32R_SCOMMON)
1819 isec = &m32r_elf_scom_section;
1820 else
1821 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
1822
1823 *secpp = isec;
1824 }
1825
1826 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1827 input_section, data, internal_relocs,
1828 isymbuf, sections))
1829 goto error_return;
1830
1831 if (sections != NULL)
1832 free (sections);
1833 if (isymbuf != NULL
1834 && symtab_hdr->contents != (unsigned char *) isymbuf)
1835 free (isymbuf);
1836 if (elf_section_data (input_section)->relocs != internal_relocs)
1837 free (internal_relocs);
1838 }
1839
1840 return data;
1841
1842 error_return:
1843 if (sections != NULL)
1844 free (sections);
1845 if (isymbuf != NULL
1846 && symtab_hdr->contents != (unsigned char *) isymbuf)
1847 free (isymbuf);
1848 if (internal_relocs != NULL
1849 && elf_section_data (input_section)->relocs != internal_relocs)
1850 free (internal_relocs);
1851 return NULL;
1852 }
1853
1854 #endif /* #if 0 */
1855 \f
1856 /* Set the right machine number. */
1857 static bfd_boolean
1858 m32r_elf_object_p (abfd)
1859 bfd *abfd;
1860 {
1861 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1862 {
1863 default:
1864 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
1865 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
1866 }
1867 return TRUE;
1868 }
1869
1870 /* Store the machine number in the flags field. */
1871 static void
1872 m32r_elf_final_write_processing (abfd, linker)
1873 bfd *abfd;
1874 bfd_boolean linker ATTRIBUTE_UNUSED;
1875 {
1876 unsigned long val;
1877
1878 switch (bfd_get_mach (abfd))
1879 {
1880 default:
1881 case bfd_mach_m32r: val = E_M32R_ARCH; break;
1882 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
1883 }
1884
1885 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1886 elf_elfheader (abfd)->e_flags |= val;
1887 }
1888
1889 /* Function to keep M32R specific file flags. */
1890 static bfd_boolean
1891 m32r_elf_set_private_flags (abfd, flags)
1892 bfd *abfd;
1893 flagword flags;
1894 {
1895 BFD_ASSERT (!elf_flags_init (abfd)
1896 || elf_elfheader (abfd)->e_flags == flags);
1897
1898 elf_elfheader (abfd)->e_flags = flags;
1899 elf_flags_init (abfd) = TRUE;
1900 return TRUE;
1901 }
1902
1903 /* Merge backend specific data from an object file to the output
1904 object file when linking. */
1905 static bfd_boolean
1906 m32r_elf_merge_private_bfd_data (ibfd, obfd)
1907 bfd *ibfd;
1908 bfd *obfd;
1909 {
1910 flagword out_flags;
1911 flagword in_flags;
1912
1913 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1914 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1915 return TRUE;
1916
1917 in_flags = elf_elfheader (ibfd)->e_flags;
1918 out_flags = elf_elfheader (obfd)->e_flags;
1919
1920 if (! elf_flags_init (obfd))
1921 {
1922 /* If the input is the default architecture then do not
1923 bother setting the flags for the output architecture,
1924 instead allow future merges to do this. If no future
1925 merges ever set these flags then they will retain their
1926 unitialised values, which surprise surprise, correspond
1927 to the default values. */
1928 if (bfd_get_arch_info (ibfd)->the_default)
1929 return TRUE;
1930
1931 elf_flags_init (obfd) = TRUE;
1932 elf_elfheader (obfd)->e_flags = in_flags;
1933
1934 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1935 && bfd_get_arch_info (obfd)->the_default)
1936 {
1937 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
1938 }
1939
1940 return TRUE;
1941 }
1942
1943 /* Check flag compatibility. */
1944 if (in_flags == out_flags)
1945 return TRUE;
1946
1947 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
1948 {
1949 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
1950 {
1951 (*_bfd_error_handler)
1952 (_("%s: Instruction set mismatch with previous modules"),
1953 bfd_archive_filename (ibfd));
1954
1955 bfd_set_error (bfd_error_bad_value);
1956 return FALSE;
1957 }
1958 }
1959
1960 return TRUE;
1961 }
1962
1963 /* Display the flags field */
1964 static bfd_boolean
1965 m32r_elf_print_private_bfd_data (abfd, ptr)
1966 bfd *abfd;
1967 PTR ptr;
1968 {
1969 FILE * file = (FILE *) ptr;
1970
1971 BFD_ASSERT (abfd != NULL && ptr != NULL)
1972
1973 _bfd_elf_print_private_bfd_data (abfd, ptr);
1974
1975 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
1976
1977 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1978 {
1979 default:
1980 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
1981 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
1982 }
1983
1984 fputc ('\n', file);
1985
1986 return TRUE;
1987 }
1988
1989 asection *
1990 m32r_elf_gc_mark_hook (sec, info, rel, h, sym)
1991 asection *sec;
1992 struct bfd_link_info *info ATTRIBUTE_UNUSED;
1993 Elf_Internal_Rela *rel;
1994 struct elf_link_hash_entry *h;
1995 Elf_Internal_Sym *sym;
1996 {
1997 if (h != NULL)
1998 {
1999 switch (ELF32_R_TYPE (rel->r_info))
2000 {
2001 case R_M32R_GNU_VTINHERIT:
2002 case R_M32R_GNU_VTENTRY:
2003 break;
2004
2005 default:
2006 switch (h->root.type)
2007 {
2008 case bfd_link_hash_defined:
2009 case bfd_link_hash_defweak:
2010 return h->root.u.def.section;
2011
2012 case bfd_link_hash_common:
2013 return h->root.u.c.p->section;
2014
2015 default:
2016 break;
2017 }
2018 }
2019 }
2020 else
2021 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
2022
2023 return NULL;
2024 }
2025
2026 static bfd_boolean
2027 m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
2028 bfd *abfd ATTRIBUTE_UNUSED;
2029 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2030 asection *sec ATTRIBUTE_UNUSED;
2031 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
2032 {
2033 /* we don't use got and plt entries for m32r */
2034 return TRUE;
2035 }
2036
2037 /* Look through the relocs for a section during the first phase.
2038 Since we don't do .gots or .plts, we just need to consider the
2039 virtual table relocs for gc. */
2040
2041 static bfd_boolean
2042 m32r_elf_check_relocs (abfd, info, sec, relocs)
2043 bfd *abfd;
2044 struct bfd_link_info *info;
2045 asection *sec;
2046 const Elf_Internal_Rela *relocs;
2047 {
2048 Elf_Internal_Shdr *symtab_hdr;
2049 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2050 const Elf_Internal_Rela *rel;
2051 const Elf_Internal_Rela *rel_end;
2052
2053 if (info->relocateable)
2054 return TRUE;
2055
2056 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2057 sym_hashes = elf_sym_hashes (abfd);
2058 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
2059 if (!elf_bad_symtab (abfd))
2060 sym_hashes_end -= symtab_hdr->sh_info;
2061
2062 rel_end = relocs + sec->reloc_count;
2063 for (rel = relocs; rel < rel_end; rel++)
2064 {
2065 struct elf_link_hash_entry *h;
2066 unsigned long r_symndx;
2067
2068 r_symndx = ELF32_R_SYM (rel->r_info);
2069 if (r_symndx < symtab_hdr->sh_info)
2070 h = NULL;
2071 else
2072 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
2073
2074 switch (ELF32_R_TYPE (rel->r_info))
2075 {
2076 /* This relocation describes the C++ object vtable hierarchy.
2077 Reconstruct it for later use during GC. */
2078 case R_M32R_GNU_VTINHERIT:
2079 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2080 return FALSE;
2081 break;
2082
2083 /* This relocation describes which C++ vtable entries are actually
2084 used. Record for later use during GC. */
2085 case R_M32R_GNU_VTENTRY:
2086 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2087 return FALSE;
2088 break;
2089 }
2090 }
2091
2092 return TRUE;
2093 }
2094 \f
2095 #define ELF_ARCH bfd_arch_m32r
2096 #define ELF_MACHINE_CODE EM_M32R
2097 #define ELF_MACHINE_ALT1 EM_CYGNUS_M32R
2098 #define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
2099
2100 #define TARGET_BIG_SYM bfd_elf32_m32r_vec
2101 #define TARGET_BIG_NAME "elf32-m32r"
2102
2103 #define elf_info_to_howto 0
2104 #define elf_info_to_howto_rel m32r_info_to_howto_rel
2105 #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2106 #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2107 #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2108 #define elf_backend_relocate_section m32r_elf_relocate_section
2109 #define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2110 #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2111 #define elf_backend_check_relocs m32r_elf_check_relocs
2112
2113 #define elf_backend_can_gc_sections 1
2114 #if !USE_REL
2115 #define elf_backend_rela_normal 1
2116 #endif
2117 #if 0 /* not yet */
2118 /* relax support */
2119 #define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2120 #define bfd_elf32_bfd_get_relocated_section_contents \
2121 m32r_elf_get_relocated_section_contents
2122 #endif
2123
2124 #define elf_backend_object_p m32r_elf_object_p
2125 #define elf_backend_final_write_processing m32r_elf_final_write_processing
2126 #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2127 #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2128 #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
2129
2130 #include "elf32-target.h"
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