1 2005-08-30 Paul Brook <paul@codesourcery.com>
3 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
5 2005-08-26 Jan Beulich <jbeulich@novell.com>
7 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
9 (OP_E): Call intel_operand_size, move call site out of mode
11 (OP_OFF): Call intel_operand_size if suffix_always. Remove
12 ATTRIBUTE_UNUSED from parameters.
14 (OP_ESreg): Call intel_operand_size.
16 (OP_DIR): Use colon rather than semicolon as separator of far
19 2005-08-25 Chao-ying Fu <fu@mips.com>
21 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
22 (mips_builtin_opcodes): Add DSP instructions.
23 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
25 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
28 2005-08-23 David Ung <davidu@mips.com>
30 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
31 instructions to the table.
33 2005-08-18 Alan Modra <amodra@bigpond.net.au>
36 * Makefile.am: Remove a29k support.
37 * configure.in: Likewise.
38 * disassemble.c: Likewise.
39 * Makefile.in: Regenerate.
40 * configure: Regenerate.
41 * po/POTFILES.in: Regenerate.
43 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
45 * ppc-dis.c (powerpc_dialect): Handle e300.
46 (print_ppc_disassembler_options): Likewise.
47 * ppc-opc.c (PPCE300): Define.
48 (powerpc_opcodes): Mark icbt as available for the e300.
50 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
52 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
53 Use "rp" instead of "%r2" in "b,l" insns.
55 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
57 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
58 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
60 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
61 and 4 bit optional masks.
62 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
63 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
64 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
65 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
66 (s390_opformats): Likewise.
67 * s390-opc.txt: Add new instructions for cpu type z9-109.
69 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
71 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
73 2005-07-29 Paul Brook <paul@codesourcery.com>
75 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
77 2005-07-29 Paul Brook <paul@codesourcery.com>
79 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
80 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
82 2005-07-25 DJ Delorie <dj@redhat.com>
84 * m32c-asm.c Regenerate.
85 * m32c-dis.c Regenerate.
87 2005-07-20 DJ Delorie <dj@redhat.com>
89 * disassemble.c (disassemble_init_for_target): M32C ISAs are
90 enums, so convert them to bit masks, which attributes are.
92 2005-07-18 Nick Clifton <nickc@redhat.com>
94 * configure.in: Restore alpha ordering to list of arches.
95 * configure: Regenerate.
96 * disassemble.c: Restore alpha ordering to list of arches.
98 2005-07-18 Nick Clifton <nickc@redhat.com>
100 * m32c-asm.c: Regenerate.
101 * m32c-desc.c: Regenerate.
102 * m32c-desc.h: Regenerate.
103 * m32c-dis.c: Regenerate.
104 * m32c-ibld.h: Regenerate.
105 * m32c-opc.c: Regenerate.
106 * m32c-opc.h: Regenerate.
108 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
110 * i386-dis.c (PNI_Fixup): Update comment.
111 (VMX_Fixup): Properly handle the suffix check.
113 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
115 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
118 2005-07-16 Alan Modra <amodra@bigpond.net.au>
120 * Makefile.am: Run "make dep-am".
121 (stamp-m32c): Fix cpu dependencies.
122 * Makefile.in: Regenerate.
123 * ip2k-dis.c: Regenerate.
125 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
127 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
128 (VMX_Fixup): New. Fix up Intel VMX Instructions.
132 (dis386_twobyte): Updated entries 0x78 and 0x79.
133 (twobyte_has_modrm): Likewise.
134 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
135 (OP_G): Handle m_mode.
137 2005-07-14 Jim Blandy <jimb@redhat.com>
139 Add support for the Renesas M32C and M16C.
140 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
141 * m32c-desc.h, m32c-opc.h: New.
142 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
143 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
145 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
146 m32c-ibld.lo, m32c-opc.lo.
147 (CLEANFILES): List stamp-m32c.
148 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
149 (CGEN_CPUS): Add m32c.
150 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
151 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
152 (m32c_opc_h): New variable.
153 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
154 (m32c-opc.lo): New rules.
155 * Makefile.in: Regenerated.
156 * configure.in: Add case for bfd_m32c_arch.
157 * configure: Regenerated.
158 * disassemble.c (ARCH_m32c): New.
159 [ARCH_m32c]: #include "m32c-desc.h".
160 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
161 (disassemble_init_for_target) [ARCH_m32c]: Same.
163 * cgen-ops.h, cgen-types.h: New files.
164 * Makefile.am (HFILES): List them.
165 * Makefile.in: Regenerated.
167 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
169 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
170 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
171 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
172 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
173 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
174 v850-dis.c: Fix format bugs.
175 * ia64-gen.c (fail, warn): Add format attribute.
176 * or32-opc.c (debug): Likewise.
178 2005-07-07 Khem Raj <kraj@mvista.com>
180 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
183 2005-07-06 Alan Modra <amodra@bigpond.net.au>
185 * Makefile.am (stamp-m32r): Fix path to cpu files.
186 (stamp-m32r, stamp-iq2000): Likewise.
187 * Makefile.in: Regenerate.
188 * m32r-asm.c: Regenerate.
189 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
190 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
192 2005-07-05 Nick Clifton <nickc@redhat.com>
194 * iq2000-asm.c: Regenerate.
195 * ms1-asm.c: Regenerate.
197 2005-07-05 Jan Beulich <jbeulich@novell.com>
199 * i386-dis.c (SVME_Fixup): New.
200 (grps): Use it for the lidt entry.
201 (PNI_Fixup): Call OP_M rather than OP_E.
202 (INVLPG_Fixup): Likewise.
204 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
206 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
208 2005-07-01 Nick Clifton <nickc@redhat.com>
210 * a29k-dis.c: Update to ISO C90 style function declarations and
212 * alpha-opc.c: Likewise.
213 * arc-dis.c: Likewise.
214 * arc-opc.c: Likewise.
215 * avr-dis.c: Likewise.
216 * cgen-asm.in: Likewise.
217 * cgen-dis.in: Likewise.
218 * cgen-ibld.in: Likewise.
219 * cgen-opc.c: Likewise.
220 * cris-dis.c: Likewise.
221 * d10v-dis.c: Likewise.
222 * d30v-dis.c: Likewise.
223 * d30v-opc.c: Likewise.
224 * dis-buf.c: Likewise.
225 * dlx-dis.c: Likewise.
226 * h8300-dis.c: Likewise.
227 * h8500-dis.c: Likewise.
228 * hppa-dis.c: Likewise.
229 * i370-dis.c: Likewise.
230 * i370-opc.c: Likewise.
231 * m10200-dis.c: Likewise.
232 * m10300-dis.c: Likewise.
233 * m68k-dis.c: Likewise.
234 * m88k-dis.c: Likewise.
235 * mips-dis.c: Likewise.
236 * mmix-dis.c: Likewise.
237 * msp430-dis.c: Likewise.
238 * ns32k-dis.c: Likewise.
239 * or32-dis.c: Likewise.
240 * or32-opc.c: Likewise.
241 * pdp11-dis.c: Likewise.
242 * pj-dis.c: Likewise.
243 * s390-dis.c: Likewise.
244 * sh-dis.c: Likewise.
245 * sh64-dis.c: Likewise.
246 * sparc-dis.c: Likewise.
247 * sparc-opc.c: Likewise.
248 * sysdep.h: Likewise.
249 * tic30-dis.c: Likewise.
250 * tic4x-dis.c: Likewise.
251 * tic80-dis.c: Likewise.
252 * v850-dis.c: Likewise.
253 * v850-opc.c: Likewise.
254 * vax-dis.c: Likewise.
255 * w65-dis.c: Likewise.
256 * z8kgen.c: Likewise.
258 * fr30-*: Regenerate.
260 * ip2k-*: Regenerate.
261 * iq2000-*: Regenerate.
262 * m32r-*: Regenerate.
264 * openrisc-*: Regenerate.
265 * xstormy16-*: Regenerate.
267 2005-06-23 Ben Elliston <bje@gnu.org>
269 * m68k-dis.c: Use ISC C90.
270 * m68k-opc.c: Formatting fixes.
272 2005-06-16 David Ung <davidu@mips.com>
274 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
275 instructions to the table; seb/seh/sew/zeb/zeh/zew.
277 2005-06-15 Dave Brolley <brolley@redhat.com>
279 Contribute Morpho ms1 on behalf of Red Hat
280 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
281 ms1-opc.h: New files, Morpho ms1 target.
283 2004-05-14 Stan Cox <scox@redhat.com>
285 * disassemble.c (ARCH_ms1): Define.
286 (disassembler): Handle bfd_arch_ms1
288 2004-05-13 Michael Snyder <msnyder@redhat.com>
290 * Makefile.am, Makefile.in: Add ms1 target.
291 * configure.in: Ditto.
293 2005-06-08 Zack Weinberg <zack@codesourcery.com>
295 * arm-opc.h: Delete; fold contents into ...
296 * arm-dis.c: ... here. Move includes of internal COFF headers
297 next to includes of internal ELF headers.
298 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
299 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
300 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
301 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
302 (iwmmxt_wwnames, iwmmxt_wwssnames):
304 (regnames): Remove iWMMXt coprocessor register sets.
305 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
306 (get_arm_regnames): Adjust fourth argument to match above changes.
307 (set_iwmmxt_regnames): Delete.
308 (print_insn_arm): Constify 'c'. Use ISO syntax for function
309 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
310 and iwmmxt_cregnames, not set_iwmmxt_regnames.
311 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
312 ISO syntax for function pointer calls.
314 2005-06-07 Zack Weinberg <zack@codesourcery.com>
316 * arm-dis.c: Split up the comments describing the format codes, so
317 that the ARM and 16-bit Thumb opcode tables each have comments
318 preceding them that describe all the codes, and only the codes,
319 valid in those tables. (32-bit Thumb table is already like this.)
320 Reorder the lists in all three comments to match the order in
321 which the codes are implemented.
322 Remove all forward declarations of static functions. Convert all
323 function definitions to ISO C format.
324 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
326 (print_insn_thumb16): Remove unused case 'I'.
327 (print_insn): Update for changed calling convention of subroutines.
329 2005-05-25 Jan Beulich <jbeulich@novell.com>
331 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
332 hex (but retain it being displayed as signed). Remove redundant
333 checks. Add handling of displacements for 16-bit addressing in Intel
336 2005-05-25 Jan Beulich <jbeulich@novell.com>
338 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
339 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
340 masking of 'rm' in 16-bit memory address handling.
342 2005-05-19 Anton Blanchard <anton@samba.org>
344 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
345 (print_ppc_disassembler_options): Document it.
346 * ppc-opc.c (SVC_LEV): Define.
347 (LEV): Allow optional operand.
349 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
350 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
352 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
354 * Makefile.in: Regenerate.
356 2005-05-17 Zack Weinberg <zack@codesourcery.com>
358 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
359 instructions. Adjust disassembly of some opcodes to match
361 (thumb32_opcodes): New table.
362 (print_insn_thumb): Rename print_insn_thumb16; don't handle
363 two-halfword branches here.
364 (print_insn_thumb32): New function.
365 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
366 and print_insn_thumb32. Be consistent about order of
367 halfwords when printing 32-bit instructions.
369 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
372 * i386-dis.c (branch_v_mode): New.
373 (indirEv): Use branch_v_mode instead of v_mode.
374 (OP_E): Handle branch_v_mode.
376 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
378 * d10v-dis.c (dis_2_short): Support 64bit host.
380 2005-05-07 Nick Clifton <nickc@redhat.com>
382 * po/nl.po: Updated translation.
384 2005-05-07 Nick Clifton <nickc@redhat.com>
386 * Update the address and phone number of the FSF organization in
387 the GPL notices in the following files:
388 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
389 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
390 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
391 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
392 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
393 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
394 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
395 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
396 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
397 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
398 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
399 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
400 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
401 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
402 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
403 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
404 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
405 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
406 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
407 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
408 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
409 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
410 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
411 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
412 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
413 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
414 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
415 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
416 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
417 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
418 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
419 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
420 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
422 2005-05-05 James E Wilson <wilson@specifixinc.com>
424 * ia64-opc.c: Include sysdep.h before libiberty.h.
426 2005-05-05 Nick Clifton <nickc@redhat.com>
428 * configure.in (ALL_LINGUAS): Add vi.
429 * configure: Regenerate.
432 2005-04-26 Jerome Guitton <guitton@gnat.com>
434 * configure.in: Fix the check for basename declaration.
435 * configure: Regenerate.
437 2005-04-19 Alan Modra <amodra@bigpond.net.au>
439 * ppc-opc.c (RTO): Define.
440 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
441 entries to suit PPC440.
443 2005-04-18 Mark Kettenis <kettenis@gnu.org>
445 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
448 2005-04-14 Nick Clifton <nickc@redhat.com>
450 * po/fi.po: New translation: Finnish.
451 * configure.in (ALL_LINGUAS): Add fi.
452 * configure: Regenerate.
454 2005-04-14 Alan Modra <amodra@bigpond.net.au>
456 * Makefile.am (NO_WERROR): Define.
457 * configure.in: Invoke AM_BINUTILS_WARNINGS.
458 * Makefile.in: Regenerate.
459 * aclocal.m4: Regenerate.
460 * configure: Regenerate.
462 2005-04-04 Nick Clifton <nickc@redhat.com>
464 * fr30-asm.c: Regenerate.
465 * frv-asm.c: Regenerate.
466 * iq2000-asm.c: Regenerate.
467 * m32r-asm.c: Regenerate.
468 * openrisc-asm.c: Regenerate.
470 2005-04-01 Jan Beulich <jbeulich@novell.com>
472 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
473 visible operands in Intel mode. The first operand of monitor is
476 2005-04-01 Jan Beulich <jbeulich@novell.com>
478 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
479 easier future additions.
481 2005-03-31 Jerome Guitton <guitton@gnat.com>
483 * configure.in: Check for basename.
484 * configure: Regenerate.
487 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
489 * i386-dis.c (SEG_Fixup): New.
491 (dis386): Use "Sv" for 0x8c and 0x8e.
493 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
494 Nick Clifton <nickc@redhat.com>
496 * vax-dis.c: (entry_addr): New varible: An array of user supplied
497 function entry mask addresses.
498 (entry_addr_occupied_slots): New variable: The number of occupied
499 elements in entry_addr.
500 (entry_addr_total_slots): New variable: The total number of
501 elements in entry_addr.
502 (parse_disassembler_options): New function. Fills in the entry_addr
504 (free_entry_array): New function. Release the memory used by the
505 entry addr array. Suppressed because there is no way to call it.
506 (is_function_entry): Check if a given address is a function's
507 start address by looking at supplied entry mask addresses and
508 symbol information, if available.
509 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
511 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
513 * cris-dis.c (print_with_operands): Use ~31L for long instead
516 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
518 * mmix-opc.c (O): Revert the last change.
521 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
523 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
526 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
528 * mmix-opc.c (O, Z): Force expression as unsigned long.
530 2005-03-18 Nick Clifton <nickc@redhat.com>
532 * ip2k-asm.c: Regenerate.
533 * op/opcodes.pot: Regenerate.
535 2005-03-16 Nick Clifton <nickc@redhat.com>
536 Ben Elliston <bje@au.ibm.com>
538 * configure.in (werror): New switch: Add -Werror to the
539 compiler command line. Enabled by default. Disable via
541 * configure: Regenerate.
543 2005-03-16 Alan Modra <amodra@bigpond.net.au>
545 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
548 2005-03-15 Alan Modra <amodra@bigpond.net.au>
550 * po/es.po: Commit new Spanish translation.
552 * po/fr.po: Commit new French translation.
554 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
556 * vax-dis.c: Fix spelling error
557 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
558 of just "Entry mask: < r1 ... >"
560 2005-03-12 Zack Weinberg <zack@codesourcery.com>
562 * arm-dis.c (arm_opcodes): Document %E and %V.
563 Add entries for v6T2 ARM instructions:
564 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
565 (print_insn_arm): Add support for %E and %V.
566 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
568 2005-03-10 Jeff Baker <jbaker@qnx.com>
569 Alan Modra <amodra@bigpond.net.au>
571 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
572 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
574 (XSPRG_MASK): Mask off extra bits now part of sprg field.
575 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
576 mfsprg4..7 after msprg and consolidate.
578 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
580 * vax-dis.c (entry_mask_bit): New array.
581 (print_insn_vax): Decode function entry mask.
583 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
585 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
587 2005-03-05 Alan Modra <amodra@bigpond.net.au>
589 * po/opcodes.pot: Regenerate.
591 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
593 * arc-dis.c (a4_decoding_class): New enum.
594 (dsmOneArcInst): Use the enum values for the decoding class.
595 Remove redundant case in the switch for decodingClass value 11.
597 2005-03-02 Jan Beulich <jbeulich@novell.com>
599 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
601 (OP_C): Consider lock prefix in non-64-bit modes.
603 2005-02-24 Alan Modra <amodra@bigpond.net.au>
605 * cris-dis.c (format_hex): Remove ineffective warning fix.
606 * crx-dis.c (make_instruction): Warning fix.
607 * frv-asm.c: Regenerate.
609 2005-02-23 Nick Clifton <nickc@redhat.com>
611 * cgen-dis.in: Use bfd_byte for buffers that are passed to
614 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
616 * crx-dis.c (make_instruction): Move argument structure into inner
617 scope and ensure that all of its fields are initialised before
620 * fr30-asm.c: Regenerate.
621 * fr30-dis.c: Regenerate.
622 * frv-asm.c: Regenerate.
623 * frv-dis.c: Regenerate.
624 * ip2k-asm.c: Regenerate.
625 * ip2k-dis.c: Regenerate.
626 * iq2000-asm.c: Regenerate.
627 * iq2000-dis.c: Regenerate.
628 * m32r-asm.c: Regenerate.
629 * m32r-dis.c: Regenerate.
630 * openrisc-asm.c: Regenerate.
631 * openrisc-dis.c: Regenerate.
632 * xstormy16-asm.c: Regenerate.
633 * xstormy16-dis.c: Regenerate.
635 2005-02-22 Alan Modra <amodra@bigpond.net.au>
637 * arc-ext.c: Warning fixes.
638 * arc-ext.h: Likewise.
639 * cgen-opc.c: Likewise.
640 * ia64-gen.c: Likewise.
641 * maxq-dis.c: Likewise.
642 * ns32k-dis.c: Likewise.
643 * w65-dis.c: Likewise.
644 * ia64-asmtab.c: Regenerate.
646 2005-02-22 Alan Modra <amodra@bigpond.net.au>
648 * fr30-desc.c: Regenerate.
649 * fr30-desc.h: Regenerate.
650 * fr30-opc.c: Regenerate.
651 * fr30-opc.h: Regenerate.
652 * frv-desc.c: Regenerate.
653 * frv-desc.h: Regenerate.
654 * frv-opc.c: Regenerate.
655 * frv-opc.h: Regenerate.
656 * ip2k-desc.c: Regenerate.
657 * ip2k-desc.h: Regenerate.
658 * ip2k-opc.c: Regenerate.
659 * ip2k-opc.h: Regenerate.
660 * iq2000-desc.c: Regenerate.
661 * iq2000-desc.h: Regenerate.
662 * iq2000-opc.c: Regenerate.
663 * iq2000-opc.h: Regenerate.
664 * m32r-desc.c: Regenerate.
665 * m32r-desc.h: Regenerate.
666 * m32r-opc.c: Regenerate.
667 * m32r-opc.h: Regenerate.
668 * m32r-opinst.c: Regenerate.
669 * openrisc-desc.c: Regenerate.
670 * openrisc-desc.h: Regenerate.
671 * openrisc-opc.c: Regenerate.
672 * openrisc-opc.h: Regenerate.
673 * xstormy16-desc.c: Regenerate.
674 * xstormy16-desc.h: Regenerate.
675 * xstormy16-opc.c: Regenerate.
676 * xstormy16-opc.h: Regenerate.
678 2005-02-21 Alan Modra <amodra@bigpond.net.au>
680 * Makefile.am: Run "make dep-am"
681 * Makefile.in: Regenerate.
683 2005-02-15 Nick Clifton <nickc@redhat.com>
685 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
686 compile time warnings.
687 (print_keyword): Likewise.
688 (default_print_insn): Likewise.
690 * fr30-desc.c: Regenerated.
691 * fr30-desc.h: Regenerated.
692 * fr30-dis.c: Regenerated.
693 * fr30-opc.c: Regenerated.
694 * fr30-opc.h: Regenerated.
695 * frv-desc.c: Regenerated.
696 * frv-dis.c: Regenerated.
697 * frv-opc.c: Regenerated.
698 * ip2k-asm.c: Regenerated.
699 * ip2k-desc.c: Regenerated.
700 * ip2k-desc.h: Regenerated.
701 * ip2k-dis.c: Regenerated.
702 * ip2k-opc.c: Regenerated.
703 * ip2k-opc.h: Regenerated.
704 * iq2000-desc.c: Regenerated.
705 * iq2000-dis.c: Regenerated.
706 * iq2000-opc.c: Regenerated.
707 * m32r-asm.c: Regenerated.
708 * m32r-desc.c: Regenerated.
709 * m32r-desc.h: Regenerated.
710 * m32r-dis.c: Regenerated.
711 * m32r-opc.c: Regenerated.
712 * m32r-opc.h: Regenerated.
713 * m32r-opinst.c: Regenerated.
714 * openrisc-desc.c: Regenerated.
715 * openrisc-desc.h: Regenerated.
716 * openrisc-dis.c: Regenerated.
717 * openrisc-opc.c: Regenerated.
718 * openrisc-opc.h: Regenerated.
719 * xstormy16-desc.c: Regenerated.
720 * xstormy16-desc.h: Regenerated.
721 * xstormy16-dis.c: Regenerated.
722 * xstormy16-opc.c: Regenerated.
723 * xstormy16-opc.h: Regenerated.
725 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
727 * dis-buf.c (perror_memory): Use sprintf_vma to print out
730 2005-02-11 Nick Clifton <nickc@redhat.com>
732 * iq2000-asm.c: Regenerate.
734 * frv-dis.c: Regenerate.
736 2005-02-07 Jim Blandy <jimb@redhat.com>
738 * Makefile.am (CGEN): Load guile.scm before calling the main
740 * Makefile.in: Regenerated.
741 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
742 Simply pass the cgen-opc.scm path to ${cgen} as its first
743 argument; ${cgen} itself now contains the '-s', or whatever is
744 appropriate for the Scheme being used.
746 2005-01-31 Andrew Cagney <cagney@gnu.org>
748 * configure: Regenerate to track ../gettext.m4.
750 2005-01-31 Jan Beulich <jbeulich@novell.com>
752 * ia64-gen.c (NELEMS): Define.
753 (shrink): Generate alias with missing second predicate register when
754 opcode has two outputs and these are both predicates.
755 * ia64-opc-i.c (FULL17): Define.
756 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
757 here to generate output template.
758 (TBITCM, TNATCM): Undefine after use.
759 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
760 first input. Add ld16 aliases without ar.csd as second output. Add
761 st16 aliases without ar.csd as second input. Add cmpxchg aliases
762 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
763 ar.ccv as third/fourth inputs. Consolidate through...
764 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
765 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
766 * ia64-asmtab.c: Regenerate.
768 2005-01-27 Andrew Cagney <cagney@gnu.org>
770 * configure: Regenerate to track ../gettext.m4 change.
772 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
774 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
775 * frv-asm.c: Rebuilt.
776 * frv-desc.c: Rebuilt.
777 * frv-desc.h: Rebuilt.
778 * frv-dis.c: Rebuilt.
779 * frv-ibld.c: Rebuilt.
780 * frv-opc.c: Rebuilt.
781 * frv-opc.h: Rebuilt.
783 2005-01-24 Andrew Cagney <cagney@gnu.org>
785 * configure: Regenerate, ../gettext.m4 was updated.
787 2005-01-21 Fred Fish <fnf@specifixinc.com>
789 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
790 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
791 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
794 2005-01-20 Alan Modra <amodra@bigpond.net.au>
796 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
798 2005-01-19 Fred Fish <fnf@specifixinc.com>
800 * mips-dis.c (no_aliases): New disassembly option flag.
801 (set_default_mips_dis_options): Init no_aliases to zero.
802 (parse_mips_dis_option): Handle no-aliases option.
803 (print_insn_mips): Ignore table entries that are aliases
804 if no_aliases is set.
805 (print_insn_mips16): Ditto.
806 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
807 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
808 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
809 * mips16-opc.c (mips16_opcodes): Ditto.
811 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
813 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
814 (inheritance diagram): Add missing edge.
815 (arch_sh1_up): Rename arch_sh_up to match external name to make life
816 easier for the testsuite.
817 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
818 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
819 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
820 arch_sh2a_or_sh4_up child.
821 (sh_table): Do renaming as above.
822 Correct comment for ldc.l for gas testsuite to read.
823 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
824 Correct comments for movy.w and movy.l for gas testsuite to read.
825 Correct comments for fmov.d and fmov.s for gas testsuite to read.
827 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
829 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
831 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
833 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
835 2005-01-10 Andreas Schwab <schwab@suse.de>
837 * disassemble.c (disassemble_init_for_target) <case
838 bfd_arch_ia64>: Set skip_zeroes to 16.
839 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
841 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
843 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
845 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
847 * avr-dis.c: Prettyprint. Added printing of symbol names in all
848 memory references. Convert avr_operand() to C90 formatting.
850 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
852 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
854 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
856 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
857 (no_op_insn): Initialize array with instructions that have no
859 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
861 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
863 * arm-dis.c: Correct top-level comment.
865 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
867 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
868 architecuture defining the insn.
869 (arm_opcodes, thumb_opcodes): Delete. Move to ...
870 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
872 Also include opcode/arm.h.
873 * Makefile.am (arm-dis.lo): Update dependency list.
874 * Makefile.in: Regenerate.
876 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
878 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
879 reflect the change to the short immediate syntax.
881 2004-11-19 Alan Modra <amodra@bigpond.net.au>
883 * or32-opc.c (debug): Warning fix.
884 * po/POTFILES.in: Regenerate.
886 * maxq-dis.c: Formatting.
887 (print_insn): Warning fix.
889 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
891 * arm-dis.c (WORD_ADDRESS): Define.
892 (print_insn): Use it. Correct big-endian end-of-section handling.
894 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
895 Vineet Sharma <vineets@noida.hcltech.com>
897 * maxq-dis.c: New file.
898 * disassemble.c (ARCH_maxq): Define.
899 (disassembler): Add 'print_insn_maxq_little' for handling maxq
901 * configure.in: Add case for bfd_maxq_arch.
902 * configure: Regenerate.
903 * Makefile.am: Add support for maxq-dis.c
904 * Makefile.in: Regenerate.
905 * aclocal.m4: Regenerate.
907 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
909 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
911 * crx-dis.c: Likewise.
913 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
915 Generally, handle CRISv32.
916 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
917 (struct cris_disasm_data): New type.
918 (format_reg, format_hex, cris_constraint, print_flags)
919 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
921 (format_sup_reg, print_insn_crisv32_with_register_prefix)
922 (print_insn_crisv32_without_register_prefix)
923 (print_insn_crisv10_v32_with_register_prefix)
924 (print_insn_crisv10_v32_without_register_prefix)
925 (cris_parse_disassembler_options): New functions.
926 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
927 parameter. All callers changed.
928 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
930 (cris_constraint) <case 'Y', 'U'>: New cases.
931 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
933 (print_with_operands) <case 'Y'>: New case.
934 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
935 <case 'N', 'Y', 'Q'>: New cases.
936 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
937 (print_insn_cris_with_register_prefix)
938 (print_insn_cris_without_register_prefix): Call
939 cris_parse_disassembler_options.
940 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
941 for CRISv32 and the size of immediate operands. New v32-only
942 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
943 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
944 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
945 Change brp to be v3..v10.
946 (cris_support_regs): New vector.
947 (cris_opcodes): Update head comment. New format characters '[',
948 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
949 Add new opcodes for v32 and adjust existing opcodes to accommodate
950 differences to earlier variants.
951 (cris_cond15s): New vector.
953 2004-11-04 Jan Beulich <jbeulich@novell.com>
955 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
957 (Mp): Use f_mode rather than none at all.
958 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
959 replaces what previously was x_mode; x_mode now means 128-bit SSE
961 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
962 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
963 pinsrw's second operand is Edqw.
964 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
965 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
966 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
967 mode when an operand size override is present or always suffixing.
968 More instructions will need to be added to this group.
969 (putop): Handle new macro chars 'C' (short/long suffix selector),
970 'I' (Intel mode override for following macro char), and 'J' (for
971 adding the 'l' prefix to far branches in AT&T mode). When an
972 alternative was specified in the template, honor macro character when
973 specified for Intel mode.
974 (OP_E): Handle new *_mode values. Correct pointer specifications for
975 memory operands. Consolidate output of index register.
976 (OP_G): Handle new *_mode values.
977 (OP_I): Handle const_1_mode.
978 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
979 respective opcode prefix bits have been consumed.
980 (OP_EM, OP_EX): Provide some default handling for generating pointer
983 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
985 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
988 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
990 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
991 (getregliststring): Support HI/LO and user registers.
992 * crx-opc.c (crx_instruction): Update data structure according to the
993 rearrangement done in CRX opcode header file.
994 (crx_regtab): Likewise.
995 (crx_optab): Likewise.
996 (crx_instruction): Reorder load/stor instructions, remove unsupported
998 support new Co-Processor instruction 'cpi'.
1000 2004-10-27 Nick Clifton <nickc@redhat.com>
1002 * opcodes/iq2000-asm.c: Regenerate.
1003 * opcodes/iq2000-desc.c: Regenerate.
1004 * opcodes/iq2000-desc.h: Regenerate.
1005 * opcodes/iq2000-dis.c: Regenerate.
1006 * opcodes/iq2000-ibld.c: Regenerate.
1007 * opcodes/iq2000-opc.c: Regenerate.
1008 * opcodes/iq2000-opc.h: Regenerate.
1010 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1012 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1013 us4, us5 (respectively).
1014 Remove unsupported 'popa' instruction.
1015 Reverse operands order in store co-processor instructions.
1017 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1019 * Makefile.am: Run "make dep-am"
1020 * Makefile.in: Regenerate.
1022 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1024 * xtensa-dis.c: Use ISO C90 formatting.
1026 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1028 * ppc-opc.c: Revert 2004-09-09 change.
1030 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1032 * xtensa-dis.c (state_names): Delete.
1033 (fetch_data): Use xtensa_isa_maxlength.
1034 (print_xtensa_operand): Replace operand parameter with opcode/operand
1035 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1036 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1037 instruction bundles. Use xmalloc instead of malloc.
1039 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1041 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1044 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1046 * crx-opc.c (crx_instruction): Support Co-processor insns.
1047 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1048 (getregliststring): Change function to use the above enum.
1049 (print_arg): Handle CO-Processor insns.
1050 (crx_cinvs): Add 'b' option to invalidate the branch-target
1053 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1055 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1056 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1057 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1058 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1059 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1061 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1063 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1066 2004-09-30 Paul Brook <paul@codesourcery.com>
1068 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1069 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1071 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1073 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1074 (CONFIG_STATUS_DEPENDENCIES): New.
1075 (Makefile): Removed.
1076 (config.status): Likewise.
1077 * Makefile.in: Regenerated.
1079 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1081 * Makefile.am: Run "make dep-am".
1082 * Makefile.in: Regenerate.
1083 * aclocal.m4: Regenerate.
1084 * configure: Regenerate.
1085 * po/POTFILES.in: Regenerate.
1086 * po/opcodes.pot: Regenerate.
1088 2004-09-11 Andreas Schwab <schwab@suse.de>
1090 * configure: Rebuild.
1092 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1094 * ppc-opc.c (L): Make this field not optional.
1096 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1098 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1099 Fix parameter to 'm[t|f]csr' insns.
1101 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1103 * configure.in: Autoupdate to autoconf 2.59.
1104 * aclocal.m4: Rebuild with aclocal 1.4p6.
1105 * configure: Rebuild with autoconf 2.59.
1106 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1107 bfd changes for autoconf 2.59 on the way).
1108 * config.in: Rebuild with autoheader 2.59.
1110 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1112 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1114 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1116 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1117 (GRPPADLCK2): New define.
1118 (twobyte_has_modrm): True for 0xA6.
1119 (grps): GRPPADLCK2 for opcode 0xA6.
1121 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1123 Introduce SH2a support.
1124 * sh-opc.h (arch_sh2a_base): Renumber.
1125 (arch_sh2a_nofpu_base): Remove.
1126 (arch_sh_base_mask): Adjust.
1127 (arch_opann_mask): New.
1128 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1129 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1130 (sh_table): Adjust whitespace.
1131 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1132 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1133 instruction list throughout.
1134 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1135 of arch_sh2a in instruction list throughout.
1136 (arch_sh2e_up): Accomodate above changes.
1137 (arch_sh2_up): Ditto.
1138 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1139 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1140 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1141 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1142 * sh-opc.h (arch_sh2a_nofpu): New.
1143 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1144 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1146 2004-01-20 DJ Delorie <dj@redhat.com>
1147 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1148 2003-12-29 DJ Delorie <dj@redhat.com>
1149 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1150 sh_opcode_info, sh_table): Add sh2a support.
1151 (arch_op32): New, to tag 32-bit opcodes.
1152 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1153 2003-12-02 Michael Snyder <msnyder@redhat.com>
1154 * sh-opc.h (arch_sh2a): Add.
1155 * sh-dis.c (arch_sh2a): Handle.
1156 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1158 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1160 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1162 2004-07-22 Nick Clifton <nickc@redhat.com>
1165 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1166 insns - this is done by objdump itself.
1167 * h8500-dis.c (print_insn_h8500): Likewise.
1169 2004-07-21 Jan Beulich <jbeulich@novell.com>
1171 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1172 regardless of address size prefix in effect.
1173 (ptr_reg): Size or address registers does not depend on rex64, but
1174 on the presence of an address size override.
1175 (OP_MMX): Use rex.x only for xmm registers.
1176 (OP_EM): Use rex.z only for xmm registers.
1178 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1180 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1181 move/branch operations to the bottom so that VR5400 multimedia
1182 instructions take precedence in disassembly.
1184 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1186 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1187 ISA-specific "break" encoding.
1189 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1191 * arm-opc.h: Fix typo in comment.
1193 2004-07-11 Andreas Schwab <schwab@suse.de>
1195 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1197 2004-07-09 Andreas Schwab <schwab@suse.de>
1199 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1201 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1203 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1204 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1205 (crx-dis.lo): New target.
1206 (crx-opc.lo): Likewise.
1207 * Makefile.in: Regenerate.
1208 * configure.in: Handle bfd_crx_arch.
1209 * configure: Regenerate.
1210 * crx-dis.c: New file.
1211 * crx-opc.c: New file.
1212 * disassemble.c (ARCH_crx): Define.
1213 (disassembler): Handle ARCH_crx.
1215 2004-06-29 James E Wilson <wilson@specifixinc.com>
1217 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1218 * ia64-asmtab.c: Regnerate.
1220 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1222 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1223 (extract_fxm): Don't test dialect.
1224 (XFXFXM_MASK): Include the power4 bit.
1225 (XFXM): Add p4 param.
1226 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1228 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1230 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1231 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1233 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1235 * ppc-opc.c (BH, XLBH_MASK): Define.
1236 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1238 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1240 * i386-dis.c (x_mode): Comment.
1241 (two_source_ops): File scope.
1242 (float_mem): Correct fisttpll and fistpll.
1243 (float_mem_mode): New table.
1245 (OP_E): Correct intel mode PTR output.
1246 (ptr_reg): Use open_char and close_char.
1247 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1248 operands. Set two_source_ops.
1250 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1252 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1253 instead of _raw_size.
1255 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1257 * ia64-gen.c (in_iclass): Handle more postinc st
1259 * ia64-asmtab.c: Rebuilt.
1261 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1263 * s390-opc.txt: Correct architecture mask for some opcodes.
1264 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1265 in the esa mode as well.
1267 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1269 * sh-dis.c (target_arch): Make unsigned.
1270 (print_insn_sh): Replace (most of) switch with a call to
1271 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1272 * sh-opc.h: Redefine architecture flags values.
1273 Add sh3-nommu architecture.
1274 Reorganise <arch>_up macros so they make more visual sense.
1275 (SH_MERGE_ARCH_SET): Define new macro.
1276 (SH_VALID_BASE_ARCH_SET): Likewise.
1277 (SH_VALID_MMU_ARCH_SET): Likewise.
1278 (SH_VALID_CO_ARCH_SET): Likewise.
1279 (SH_VALID_ARCH_SET): Likewise.
1280 (SH_MERGE_ARCH_SET_VALID): Likewise.
1281 (SH_ARCH_SET_HAS_FPU): Likewise.
1282 (SH_ARCH_SET_HAS_DSP): Likewise.
1283 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1284 (sh_get_arch_from_bfd_mach): Add prototype.
1285 (sh_get_arch_up_from_bfd_mach): Likewise.
1286 (sh_get_bfd_mach_from_arch_set): Likewise.
1287 (sh_merge_bfd_arc): Likewise.
1289 2004-05-24 Peter Barada <peter@the-baradas.com>
1291 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1292 into new match_insn_m68k function. Loop over canidate
1293 matches and select first that completely matches.
1294 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1295 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1296 to verify addressing for MAC/EMAC.
1297 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1298 reigster halves since 'fpu' and 'spl' look misleading.
1299 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1300 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1301 first, tighten up match masks.
1302 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1303 'size' from special case code in print_insn_m68k to
1304 determine decode size of insns.
1306 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1308 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1309 well as when -mpower4.
1311 2004-05-13 Nick Clifton <nickc@redhat.com>
1313 * po/fr.po: Updated French translation.
1315 2004-05-05 Peter Barada <peter@the-baradas.com>
1317 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1318 variants in arch_mask. Only set m68881/68851 for 68k chips.
1319 * m68k-op.c: Switch from ColdFire chips to core variants.
1321 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1324 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1326 2004-04-29 Ben Elliston <bje@au.ibm.com>
1328 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1329 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1331 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1333 * sh-dis.c (print_insn_sh): Print the value in constant pool
1334 as a symbol if it looks like a symbol.
1336 2004-04-22 Peter Barada <peter@the-baradas.com>
1338 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1339 appropriate ColdFire architectures.
1340 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1342 Add EMAC instructions, fix MAC instructions. Remove
1343 macmw/macml/msacmw/msacml instructions since mask addressing now
1346 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1348 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1349 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1350 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1351 macro. Adjust all users.
1353 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1355 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1358 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1360 * m32r-asm.c: Regenerate.
1362 2004-03-29 Stan Shebs <shebs@apple.com>
1364 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1367 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1369 * aclocal.m4: Regenerate.
1370 * config.in: Regenerate.
1371 * configure: Regenerate.
1372 * po/POTFILES.in: Regenerate.
1373 * po/opcodes.pot: Regenerate.
1375 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1377 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1379 * ppc-opc.c (RA0): Define.
1380 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1381 (RAOPT): Rename from RAO. Update all uses.
1382 (powerpc_opcodes): Use RA0 as appropriate.
1384 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1386 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1388 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1390 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1392 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1394 * i386-dis.c (GRPPLOCK): Delete.
1395 (grps): Delete GRPPLOCK entry.
1397 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1399 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1401 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1402 (GRPPADLCK): Define.
1403 (dis386): Use NOP_Fixup on "nop".
1404 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1405 (twobyte_has_modrm): Set for 0xa7.
1406 (padlock_table): Delete. Move to..
1407 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1409 (print_insn): Revert PADLOCK_SPECIAL code.
1410 (OP_E): Delete sfence, lfence, mfence checks.
1412 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1414 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1415 (INVLPG_Fixup): New function.
1416 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1418 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1420 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1421 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1422 (padlock_table): New struct with PadLock instructions.
1423 (print_insn): Handle PADLOCK_SPECIAL.
1425 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1427 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1428 (OP_E): Twiddle clflush to sfence here.
1430 2004-03-08 Nick Clifton <nickc@redhat.com>
1432 * po/de.po: Updated German translation.
1434 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1436 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1437 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1438 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1441 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1443 * frv-asm.c: Regenerate.
1444 * frv-desc.c: Regenerate.
1445 * frv-desc.h: Regenerate.
1446 * frv-dis.c: Regenerate.
1447 * frv-ibld.c: Regenerate.
1448 * frv-opc.c: Regenerate.
1449 * frv-opc.h: Regenerate.
1451 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1453 * frv-desc.c, frv-opc.c: Regenerate.
1455 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1457 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1459 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1461 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1462 Also correct mistake in the comment.
1464 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1466 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1467 ensure that double registers have even numbers.
1468 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1469 that reserved instruction 0xfffd does not decode the same
1471 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1472 REG_N refers to a double register.
1473 Add REG_N_B01 nibble type and use it instead of REG_NM
1475 Adjust the bit patterns in a few comments.
1477 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1479 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1481 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1483 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1485 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1487 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1489 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1491 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1492 mtivor32, mtivor33, mtivor34.
1494 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1496 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1498 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1500 * arm-opc.h Maverick accumulator register opcode fixes.
1502 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1504 * m32r-dis.c: Regenerate.
1506 2004-01-27 Michael Snyder <msnyder@redhat.com>
1508 * sh-opc.h (sh_table): "fsrra", not "fssra".
1510 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1512 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1515 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1517 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1519 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1521 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1522 1. Don't print scale factor on AT&T mode when index missing.
1524 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1526 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1527 when loaded into XR registers.
1529 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1531 * frv-desc.h: Regenerate.
1532 * frv-desc.c: Regenerate.
1533 * frv-opc.c: Regenerate.
1535 2004-01-13 Michael Snyder <msnyder@redhat.com>
1537 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1539 2004-01-09 Paul Brook <paul@codesourcery.com>
1541 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1544 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1546 * Makefile.am (libopcodes_la_DEPENDENCIES)
1547 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1548 comment about the problem.
1549 * Makefile.in: Regenerate.
1551 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1553 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1554 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1555 cut&paste errors in shifting/truncating numerical operands.
1556 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1557 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1558 (parse_uslo16): Likewise.
1559 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1560 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1561 (parse_s12): Likewise.
1562 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1563 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1564 (parse_uslo16): Likewise.
1565 (parse_uhi16): Parse gothi and gotfuncdeschi.
1566 (parse_d12): Parse got12 and gotfuncdesc12.
1567 (parse_s12): Likewise.
1569 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1571 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1572 instruction which looks similar to an 'rla' instruction.
1574 For older changes see ChangeLog-0203
1580 version-control: never