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2005-09-01 Dmitry Diky <diwil@spec.ru>
[binutils.git] / opcodes / i386-dis.c
blobe7fff65ae02b72e8912a4f6968fb54c6c73128bc
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "dis-asm.h"
35 #include "sysdep.h"
36 #include "opintl.h"
37
38 #define MAXLEN 20
39
40 #include <setjmp.h>
41
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
46 #endif
47
48 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma, disassemble_info *);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_VMX (int, int);
92 static void OP_0fae (int, int);
93 static void OP_0f07 (int, int);
94 static void NOP_Fixup (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void PNI_Fixup (int, int);
99 static void SVME_Fixup (int, int);
100 static void INVLPG_Fixup (int, int);
101 static void BadOp (void);
102 static void SEG_Fixup (int, int);
103 static void VMX_Fixup (int, int);
104
105 struct dis_private {
106 /* Points to first byte not fetched. */
107 bfd_byte *max_fetched;
108 bfd_byte the_buffer[MAXLEN];
109 bfd_vma insn_start;
110 int orig_sizeflag;
111 jmp_buf bailout;
112 };
113
114 /* The opcode for the fwait instruction, which we treat as a prefix
115 when we can. */
116 #define FWAIT_OPCODE (0x9b)
117
118 /* Set to 1 for 64bit mode disassembly. */
119 static int mode_64bit;
120
121 /* Flags for the prefixes for the current instruction. See below. */
122 static int prefixes;
123
124 /* REX prefix the current instruction. See below. */
125 static int rex;
126 /* Bits of REX we've already used. */
127 static int rex_used;
128 #define REX_MODE64 8
129 #define REX_EXTX 4
130 #define REX_EXTY 2
131 #define REX_EXTZ 1
132 /* Mark parts used in the REX prefix. When we are testing for
133 empty prefix (for 8bit register REX extension), just mask it
134 out. Otherwise test for REX bit is excuse for existence of REX
135 only in case value is nonzero. */
136 #define USED_REX(value) \
137 { \
138 if (value) \
139 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
140 else \
141 rex_used |= 0x40; \
142 }
143
144 /* Flags for prefixes which we somehow handled when printing the
145 current instruction. */
146 static int used_prefixes;
147
148 /* Flags stored in PREFIXES. */
149 #define PREFIX_REPZ 1
150 #define PREFIX_REPNZ 2
151 #define PREFIX_LOCK 4
152 #define PREFIX_CS 8
153 #define PREFIX_SS 0x10
154 #define PREFIX_DS 0x20
155 #define PREFIX_ES 0x40
156 #define PREFIX_FS 0x80
157 #define PREFIX_GS 0x100
158 #define PREFIX_DATA 0x200
159 #define PREFIX_ADDR 0x400
160 #define PREFIX_FWAIT 0x800
161
162 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
163 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
164 on error. */
165 #define FETCH_DATA(info, addr) \
166 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
167 ? 1 : fetch_data ((info), (addr)))
168
169 static int
170 fetch_data (struct disassemble_info *info, bfd_byte *addr)
171 {
172 int status;
173 struct dis_private *priv = (struct dis_private *) info->private_data;
174 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
175
176 status = (*info->read_memory_func) (start,
177 priv->max_fetched,
178 addr - priv->max_fetched,
179 info);
180 if (status != 0)
181 {
182 /* If we did manage to read at least one byte, then
183 print_insn_i386 will do something sensible. Otherwise, print
184 an error. We do that here because this is where we know
185 STATUS. */
186 if (priv->max_fetched == priv->the_buffer)
187 (*info->memory_error_func) (status, start, info);
188 longjmp (priv->bailout, 1);
189 }
190 else
191 priv->max_fetched = addr;
192 return 1;
193 }
194
195 #define XX NULL, 0
196
197 #define Eb OP_E, b_mode
198 #define Ev OP_E, v_mode
199 #define Ed OP_E, d_mode
200 #define Eq OP_E, q_mode
201 #define Edq OP_E, dq_mode
202 #define Edqw OP_E, dqw_mode
203 #define indirEv OP_indirE, branch_v_mode
204 #define indirEp OP_indirE, f_mode
205 #define Em OP_E, m_mode
206 #define Ew OP_E, w_mode
207 #define Ma OP_E, v_mode
208 #define M OP_M, 0 /* lea, lgdt, etc. */
209 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
210 #define Gb OP_G, b_mode
211 #define Gv OP_G, v_mode
212 #define Gd OP_G, d_mode
213 #define Gdq OP_G, dq_mode
214 #define Gm OP_G, m_mode
215 #define Gw OP_G, w_mode
216 #define Rd OP_Rd, d_mode
217 #define Rm OP_Rd, m_mode
218 #define Ib OP_I, b_mode
219 #define sIb OP_sI, b_mode /* sign extened byte */
220 #define Iv OP_I, v_mode
221 #define Iq OP_I, q_mode
222 #define Iv64 OP_I64, v_mode
223 #define Iw OP_I, w_mode
224 #define I1 OP_I, const_1_mode
225 #define Jb OP_J, b_mode
226 #define Jv OP_J, v_mode
227 #define Cm OP_C, m_mode
228 #define Dm OP_D, m_mode
229 #define Td OP_T, d_mode
230 #define Sv SEG_Fixup, v_mode
231
232 #define RMeAX OP_REG, eAX_reg
233 #define RMeBX OP_REG, eBX_reg
234 #define RMeCX OP_REG, eCX_reg
235 #define RMeDX OP_REG, eDX_reg
236 #define RMeSP OP_REG, eSP_reg
237 #define RMeBP OP_REG, eBP_reg
238 #define RMeSI OP_REG, eSI_reg
239 #define RMeDI OP_REG, eDI_reg
240 #define RMrAX OP_REG, rAX_reg
241 #define RMrBX OP_REG, rBX_reg
242 #define RMrCX OP_REG, rCX_reg
243 #define RMrDX OP_REG, rDX_reg
244 #define RMrSP OP_REG, rSP_reg
245 #define RMrBP OP_REG, rBP_reg
246 #define RMrSI OP_REG, rSI_reg
247 #define RMrDI OP_REG, rDI_reg
248 #define RMAL OP_REG, al_reg
249 #define RMAL OP_REG, al_reg
250 #define RMCL OP_REG, cl_reg
251 #define RMDL OP_REG, dl_reg
252 #define RMBL OP_REG, bl_reg
253 #define RMAH OP_REG, ah_reg
254 #define RMCH OP_REG, ch_reg
255 #define RMDH OP_REG, dh_reg
256 #define RMBH OP_REG, bh_reg
257 #define RMAX OP_REG, ax_reg
258 #define RMDX OP_REG, dx_reg
259
260 #define eAX OP_IMREG, eAX_reg
261 #define eBX OP_IMREG, eBX_reg
262 #define eCX OP_IMREG, eCX_reg
263 #define eDX OP_IMREG, eDX_reg
264 #define eSP OP_IMREG, eSP_reg
265 #define eBP OP_IMREG, eBP_reg
266 #define eSI OP_IMREG, eSI_reg
267 #define eDI OP_IMREG, eDI_reg
268 #define AL OP_IMREG, al_reg
269 #define AL OP_IMREG, al_reg
270 #define CL OP_IMREG, cl_reg
271 #define DL OP_IMREG, dl_reg
272 #define BL OP_IMREG, bl_reg
273 #define AH OP_IMREG, ah_reg
274 #define CH OP_IMREG, ch_reg
275 #define DH OP_IMREG, dh_reg
276 #define BH OP_IMREG, bh_reg
277 #define AX OP_IMREG, ax_reg
278 #define DX OP_IMREG, dx_reg
279 #define indirDX OP_IMREG, indir_dx_reg
280
281 #define Sw OP_SEG, w_mode
282 #define Ap OP_DIR, 0
283 #define Ob OP_OFF, b_mode
284 #define Ob64 OP_OFF64, b_mode
285 #define Ov OP_OFF, v_mode
286 #define Ov64 OP_OFF64, v_mode
287 #define Xb OP_DSreg, eSI_reg
288 #define Xv OP_DSreg, eSI_reg
289 #define Yb OP_ESreg, eDI_reg
290 #define Yv OP_ESreg, eDI_reg
291 #define DSBX OP_DSreg, eBX_reg
292
293 #define es OP_REG, es_reg
294 #define ss OP_REG, ss_reg
295 #define cs OP_REG, cs_reg
296 #define ds OP_REG, ds_reg
297 #define fs OP_REG, fs_reg
298 #define gs OP_REG, gs_reg
299
300 #define MX OP_MMX, 0
301 #define XM OP_XMM, 0
302 #define EM OP_EM, v_mode
303 #define EX OP_EX, v_mode
304 #define MS OP_MS, v_mode
305 #define XS OP_XS, v_mode
306 #define VM OP_VMX, q_mode
307 #define OPSUF OP_3DNowSuffix, 0
308 #define OPSIMD OP_SIMD_Suffix, 0
309
310 #define cond_jump_flag NULL, cond_jump_mode
311 #define loop_jcxz_flag NULL, loop_jcxz_mode
312
313 /* bits in sizeflag */
314 #define SUFFIX_ALWAYS 4
315 #define AFLAG 2
316 #define DFLAG 1
317
318 #define b_mode 1 /* byte operand */
319 #define v_mode 2 /* operand size depends on prefixes */
320 #define w_mode 3 /* word operand */
321 #define d_mode 4 /* double word operand */
322 #define q_mode 5 /* quad word operand */
323 #define t_mode 6 /* ten-byte operand */
324 #define x_mode 7 /* 16-byte XMM operand */
325 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
326 #define cond_jump_mode 9
327 #define loop_jcxz_mode 10
328 #define dq_mode 11 /* operand size depends on REX prefixes. */
329 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
330 #define f_mode 13 /* 4- or 6-byte pointer operand */
331 #define const_1_mode 14
332 #define branch_v_mode 15 /* v_mode for branch. */
333
334 #define es_reg 100
335 #define cs_reg 101
336 #define ss_reg 102
337 #define ds_reg 103
338 #define fs_reg 104
339 #define gs_reg 105
340
341 #define eAX_reg 108
342 #define eCX_reg 109
343 #define eDX_reg 110
344 #define eBX_reg 111
345 #define eSP_reg 112
346 #define eBP_reg 113
347 #define eSI_reg 114
348 #define eDI_reg 115
349
350 #define al_reg 116
351 #define cl_reg 117
352 #define dl_reg 118
353 #define bl_reg 119
354 #define ah_reg 120
355 #define ch_reg 121
356 #define dh_reg 122
357 #define bh_reg 123
358
359 #define ax_reg 124
360 #define cx_reg 125
361 #define dx_reg 126
362 #define bx_reg 127
363 #define sp_reg 128
364 #define bp_reg 129
365 #define si_reg 130
366 #define di_reg 131
367
368 #define rAX_reg 132
369 #define rCX_reg 133
370 #define rDX_reg 134
371 #define rBX_reg 135
372 #define rSP_reg 136
373 #define rBP_reg 137
374 #define rSI_reg 138
375 #define rDI_reg 139
376
377 #define indir_dx_reg 150
378
379 #define FLOATCODE 1
380 #define USE_GROUPS 2
381 #define USE_PREFIX_USER_TABLE 3
382 #define X86_64_SPECIAL 4
383
384 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
385
386 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
387 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
388 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
389 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
390 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
391 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
392 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
393 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
394 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
395 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
396 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
397 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
398 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
399 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
400 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
401 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
402 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
403 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
404 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
405 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
406 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
407 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
408 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
409 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
410 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
411
412 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
413 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
414 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
415 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
416 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
417 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
418 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
419 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
420 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
421 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
422 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
423 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
424 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
425 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
426 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
427 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
428 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
429 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
430 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
431 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
432 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
433 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
434 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
435 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
436 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
437 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
438 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
439 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
440 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
441 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
442 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
443 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
444 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
445
446 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
447
448 typedef void (*op_rtn) (int bytemode, int sizeflag);
449
450 struct dis386 {
451 const char *name;
452 op_rtn op1;
453 int bytemode1;
454 op_rtn op2;
455 int bytemode2;
456 op_rtn op3;
457 int bytemode3;
458 };
459
460 /* Upper case letters in the instruction names here are macros.
461 'A' => print 'b' if no register operands or suffix_always is true
462 'B' => print 'b' if suffix_always is true
463 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
464 . size prefix
465 'E' => print 'e' if 32-bit form of jcxz
466 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
467 'H' => print ",pt" or ",pn" branch hint
468 'I' => honor following macro letter even in Intel mode (implemented only
469 . for some of the macro letters)
470 'J' => print 'l'
471 'L' => print 'l' if suffix_always is true
472 'N' => print 'n' if instruction has no wait "prefix"
473 'O' => print 'd', or 'o'
474 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
475 . or suffix_always is true. print 'q' if rex prefix is present.
476 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
477 . is true
478 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
479 'S' => print 'w', 'l' or 'q' if suffix_always is true
480 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
481 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
482 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
483 'X' => print 's', 'd' depending on data16 prefix (for XMM)
484 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
485
486 Many of the above letters print nothing in Intel mode. See "putop"
487 for the details.
488
489 Braces '{' and '}', and vertical bars '|', indicate alternative
490 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
491 modes. In cases where there are only two alternatives, the X86_64
492 instruction is reserved, and "(bad)" is printed.
493 */
494
495 static const struct dis386 dis386[] = {
496 /* 00 */
497 { "addB", Eb, Gb, XX },
498 { "addS", Ev, Gv, XX },
499 { "addB", Gb, Eb, XX },
500 { "addS", Gv, Ev, XX },
501 { "addB", AL, Ib, XX },
502 { "addS", eAX, Iv, XX },
503 { "push{T|}", es, XX, XX },
504 { "pop{T|}", es, XX, XX },
505 /* 08 */
506 { "orB", Eb, Gb, XX },
507 { "orS", Ev, Gv, XX },
508 { "orB", Gb, Eb, XX },
509 { "orS", Gv, Ev, XX },
510 { "orB", AL, Ib, XX },
511 { "orS", eAX, Iv, XX },
512 { "push{T|}", cs, XX, XX },
513 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
514 /* 10 */
515 { "adcB", Eb, Gb, XX },
516 { "adcS", Ev, Gv, XX },
517 { "adcB", Gb, Eb, XX },
518 { "adcS", Gv, Ev, XX },
519 { "adcB", AL, Ib, XX },
520 { "adcS", eAX, Iv, XX },
521 { "push{T|}", ss, XX, XX },
522 { "popT|}", ss, XX, XX },
523 /* 18 */
524 { "sbbB", Eb, Gb, XX },
525 { "sbbS", Ev, Gv, XX },
526 { "sbbB", Gb, Eb, XX },
527 { "sbbS", Gv, Ev, XX },
528 { "sbbB", AL, Ib, XX },
529 { "sbbS", eAX, Iv, XX },
530 { "push{T|}", ds, XX, XX },
531 { "pop{T|}", ds, XX, XX },
532 /* 20 */
533 { "andB", Eb, Gb, XX },
534 { "andS", Ev, Gv, XX },
535 { "andB", Gb, Eb, XX },
536 { "andS", Gv, Ev, XX },
537 { "andB", AL, Ib, XX },
538 { "andS", eAX, Iv, XX },
539 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
540 { "daa{|}", XX, XX, XX },
541 /* 28 */
542 { "subB", Eb, Gb, XX },
543 { "subS", Ev, Gv, XX },
544 { "subB", Gb, Eb, XX },
545 { "subS", Gv, Ev, XX },
546 { "subB", AL, Ib, XX },
547 { "subS", eAX, Iv, XX },
548 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
549 { "das{|}", XX, XX, XX },
550 /* 30 */
551 { "xorB", Eb, Gb, XX },
552 { "xorS", Ev, Gv, XX },
553 { "xorB", Gb, Eb, XX },
554 { "xorS", Gv, Ev, XX },
555 { "xorB", AL, Ib, XX },
556 { "xorS", eAX, Iv, XX },
557 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
558 { "aaa{|}", XX, XX, XX },
559 /* 38 */
560 { "cmpB", Eb, Gb, XX },
561 { "cmpS", Ev, Gv, XX },
562 { "cmpB", Gb, Eb, XX },
563 { "cmpS", Gv, Ev, XX },
564 { "cmpB", AL, Ib, XX },
565 { "cmpS", eAX, Iv, XX },
566 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
567 { "aas{|}", XX, XX, XX },
568 /* 40 */
569 { "inc{S|}", RMeAX, XX, XX },
570 { "inc{S|}", RMeCX, XX, XX },
571 { "inc{S|}", RMeDX, XX, XX },
572 { "inc{S|}", RMeBX, XX, XX },
573 { "inc{S|}", RMeSP, XX, XX },
574 { "inc{S|}", RMeBP, XX, XX },
575 { "inc{S|}", RMeSI, XX, XX },
576 { "inc{S|}", RMeDI, XX, XX },
577 /* 48 */
578 { "dec{S|}", RMeAX, XX, XX },
579 { "dec{S|}", RMeCX, XX, XX },
580 { "dec{S|}", RMeDX, XX, XX },
581 { "dec{S|}", RMeBX, XX, XX },
582 { "dec{S|}", RMeSP, XX, XX },
583 { "dec{S|}", RMeBP, XX, XX },
584 { "dec{S|}", RMeSI, XX, XX },
585 { "dec{S|}", RMeDI, XX, XX },
586 /* 50 */
587 { "pushS", RMrAX, XX, XX },
588 { "pushS", RMrCX, XX, XX },
589 { "pushS", RMrDX, XX, XX },
590 { "pushS", RMrBX, XX, XX },
591 { "pushS", RMrSP, XX, XX },
592 { "pushS", RMrBP, XX, XX },
593 { "pushS", RMrSI, XX, XX },
594 { "pushS", RMrDI, XX, XX },
595 /* 58 */
596 { "popS", RMrAX, XX, XX },
597 { "popS", RMrCX, XX, XX },
598 { "popS", RMrDX, XX, XX },
599 { "popS", RMrBX, XX, XX },
600 { "popS", RMrSP, XX, XX },
601 { "popS", RMrBP, XX, XX },
602 { "popS", RMrSI, XX, XX },
603 { "popS", RMrDI, XX, XX },
604 /* 60 */
605 { "pusha{P|}", XX, XX, XX },
606 { "popa{P|}", XX, XX, XX },
607 { "bound{S|}", Gv, Ma, XX },
608 { X86_64_0 },
609 { "(bad)", XX, XX, XX }, /* seg fs */
610 { "(bad)", XX, XX, XX }, /* seg gs */
611 { "(bad)", XX, XX, XX }, /* op size prefix */
612 { "(bad)", XX, XX, XX }, /* adr size prefix */
613 /* 68 */
614 { "pushT", Iq, XX, XX },
615 { "imulS", Gv, Ev, Iv },
616 { "pushT", sIb, XX, XX },
617 { "imulS", Gv, Ev, sIb },
618 { "ins{b||b|}", Yb, indirDX, XX },
619 { "ins{R||R|}", Yv, indirDX, XX },
620 { "outs{b||b|}", indirDX, Xb, XX },
621 { "outs{R||R|}", indirDX, Xv, XX },
622 /* 70 */
623 { "joH", Jb, XX, cond_jump_flag },
624 { "jnoH", Jb, XX, cond_jump_flag },
625 { "jbH", Jb, XX, cond_jump_flag },
626 { "jaeH", Jb, XX, cond_jump_flag },
627 { "jeH", Jb, XX, cond_jump_flag },
628 { "jneH", Jb, XX, cond_jump_flag },
629 { "jbeH", Jb, XX, cond_jump_flag },
630 { "jaH", Jb, XX, cond_jump_flag },
631 /* 78 */
632 { "jsH", Jb, XX, cond_jump_flag },
633 { "jnsH", Jb, XX, cond_jump_flag },
634 { "jpH", Jb, XX, cond_jump_flag },
635 { "jnpH", Jb, XX, cond_jump_flag },
636 { "jlH", Jb, XX, cond_jump_flag },
637 { "jgeH", Jb, XX, cond_jump_flag },
638 { "jleH", Jb, XX, cond_jump_flag },
639 { "jgH", Jb, XX, cond_jump_flag },
640 /* 80 */
641 { GRP1b },
642 { GRP1S },
643 { "(bad)", XX, XX, XX },
644 { GRP1Ss },
645 { "testB", Eb, Gb, XX },
646 { "testS", Ev, Gv, XX },
647 { "xchgB", Eb, Gb, XX },
648 { "xchgS", Ev, Gv, XX },
649 /* 88 */
650 { "movB", Eb, Gb, XX },
651 { "movS", Ev, Gv, XX },
652 { "movB", Gb, Eb, XX },
653 { "movS", Gv, Ev, XX },
654 { "movQ", Sv, Sw, XX },
655 { "leaS", Gv, M, XX },
656 { "movQ", Sw, Sv, XX },
657 { "popU", Ev, XX, XX },
658 /* 90 */
659 { "nop", NOP_Fixup, 0, XX, XX },
660 { "xchgS", RMeCX, eAX, XX },
661 { "xchgS", RMeDX, eAX, XX },
662 { "xchgS", RMeBX, eAX, XX },
663 { "xchgS", RMeSP, eAX, XX },
664 { "xchgS", RMeBP, eAX, XX },
665 { "xchgS", RMeSI, eAX, XX },
666 { "xchgS", RMeDI, eAX, XX },
667 /* 98 */
668 { "cW{tR||tR|}", XX, XX, XX },
669 { "cR{tO||tO|}", XX, XX, XX },
670 { "Jcall{T|}", Ap, XX, XX },
671 { "(bad)", XX, XX, XX }, /* fwait */
672 { "pushfT", XX, XX, XX },
673 { "popfT", XX, XX, XX },
674 { "sahf{|}", XX, XX, XX },
675 { "lahf{|}", XX, XX, XX },
676 /* a0 */
677 { "movB", AL, Ob64, XX },
678 { "movS", eAX, Ov64, XX },
679 { "movB", Ob64, AL, XX },
680 { "movS", Ov64, eAX, XX },
681 { "movs{b||b|}", Yb, Xb, XX },
682 { "movs{R||R|}", Yv, Xv, XX },
683 { "cmps{b||b|}", Xb, Yb, XX },
684 { "cmps{R||R|}", Xv, Yv, XX },
685 /* a8 */
686 { "testB", AL, Ib, XX },
687 { "testS", eAX, Iv, XX },
688 { "stosB", Yb, AL, XX },
689 { "stosS", Yv, eAX, XX },
690 { "lodsB", AL, Xb, XX },
691 { "lodsS", eAX, Xv, XX },
692 { "scasB", AL, Yb, XX },
693 { "scasS", eAX, Yv, XX },
694 /* b0 */
695 { "movB", RMAL, Ib, XX },
696 { "movB", RMCL, Ib, XX },
697 { "movB", RMDL, Ib, XX },
698 { "movB", RMBL, Ib, XX },
699 { "movB", RMAH, Ib, XX },
700 { "movB", RMCH, Ib, XX },
701 { "movB", RMDH, Ib, XX },
702 { "movB", RMBH, Ib, XX },
703 /* b8 */
704 { "movS", RMeAX, Iv64, XX },
705 { "movS", RMeCX, Iv64, XX },
706 { "movS", RMeDX, Iv64, XX },
707 { "movS", RMeBX, Iv64, XX },
708 { "movS", RMeSP, Iv64, XX },
709 { "movS", RMeBP, Iv64, XX },
710 { "movS", RMeSI, Iv64, XX },
711 { "movS", RMeDI, Iv64, XX },
712 /* c0 */
713 { GRP2b },
714 { GRP2S },
715 { "retT", Iw, XX, XX },
716 { "retT", XX, XX, XX },
717 { "les{S|}", Gv, Mp, XX },
718 { "ldsS", Gv, Mp, XX },
719 { "movA", Eb, Ib, XX },
720 { "movQ", Ev, Iv, XX },
721 /* c8 */
722 { "enterT", Iw, Ib, XX },
723 { "leaveT", XX, XX, XX },
724 { "lretP", Iw, XX, XX },
725 { "lretP", XX, XX, XX },
726 { "int3", XX, XX, XX },
727 { "int", Ib, XX, XX },
728 { "into{|}", XX, XX, XX },
729 { "iretP", XX, XX, XX },
730 /* d0 */
731 { GRP2b_one },
732 { GRP2S_one },
733 { GRP2b_cl },
734 { GRP2S_cl },
735 { "aam{|}", sIb, XX, XX },
736 { "aad{|}", sIb, XX, XX },
737 { "(bad)", XX, XX, XX },
738 { "xlat", DSBX, XX, XX },
739 /* d8 */
740 { FLOAT },
741 { FLOAT },
742 { FLOAT },
743 { FLOAT },
744 { FLOAT },
745 { FLOAT },
746 { FLOAT },
747 { FLOAT },
748 /* e0 */
749 { "loopneFH", Jb, XX, loop_jcxz_flag },
750 { "loopeFH", Jb, XX, loop_jcxz_flag },
751 { "loopFH", Jb, XX, loop_jcxz_flag },
752 { "jEcxzH", Jb, XX, loop_jcxz_flag },
753 { "inB", AL, Ib, XX },
754 { "inS", eAX, Ib, XX },
755 { "outB", Ib, AL, XX },
756 { "outS", Ib, eAX, XX },
757 /* e8 */
758 { "callT", Jv, XX, XX },
759 { "jmpT", Jv, XX, XX },
760 { "Jjmp{T|}", Ap, XX, XX },
761 { "jmp", Jb, XX, XX },
762 { "inB", AL, indirDX, XX },
763 { "inS", eAX, indirDX, XX },
764 { "outB", indirDX, AL, XX },
765 { "outS", indirDX, eAX, XX },
766 /* f0 */
767 { "(bad)", XX, XX, XX }, /* lock prefix */
768 { "icebp", XX, XX, XX },
769 { "(bad)", XX, XX, XX }, /* repne */
770 { "(bad)", XX, XX, XX }, /* repz */
771 { "hlt", XX, XX, XX },
772 { "cmc", XX, XX, XX },
773 { GRP3b },
774 { GRP3S },
775 /* f8 */
776 { "clc", XX, XX, XX },
777 { "stc", XX, XX, XX },
778 { "cli", XX, XX, XX },
779 { "sti", XX, XX, XX },
780 { "cld", XX, XX, XX },
781 { "std", XX, XX, XX },
782 { GRP4 },
783 { GRP5 },
784 };
785
786 static const struct dis386 dis386_twobyte[] = {
787 /* 00 */
788 { GRP6 },
789 { GRP7 },
790 { "larS", Gv, Ew, XX },
791 { "lslS", Gv, Ew, XX },
792 { "(bad)", XX, XX, XX },
793 { "syscall", XX, XX, XX },
794 { "clts", XX, XX, XX },
795 { "sysretP", XX, XX, XX },
796 /* 08 */
797 { "invd", XX, XX, XX },
798 { "wbinvd", XX, XX, XX },
799 { "(bad)", XX, XX, XX },
800 { "ud2a", XX, XX, XX },
801 { "(bad)", XX, XX, XX },
802 { GRPAMD },
803 { "femms", XX, XX, XX },
804 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
805 /* 10 */
806 { PREGRP8 },
807 { PREGRP9 },
808 { PREGRP30 },
809 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
810 { "unpcklpX", XM, EX, XX },
811 { "unpckhpX", XM, EX, XX },
812 { PREGRP31 },
813 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
814 /* 18 */
815 { GRP14 },
816 { "(bad)", XX, XX, XX },
817 { "(bad)", XX, XX, XX },
818 { "(bad)", XX, XX, XX },
819 { "(bad)", XX, XX, XX },
820 { "(bad)", XX, XX, XX },
821 { "(bad)", XX, XX, XX },
822 { "(bad)", XX, XX, XX },
823 /* 20 */
824 { "movL", Rm, Cm, XX },
825 { "movL", Rm, Dm, XX },
826 { "movL", Cm, Rm, XX },
827 { "movL", Dm, Rm, XX },
828 { "movL", Rd, Td, XX },
829 { "(bad)", XX, XX, XX },
830 { "movL", Td, Rd, XX },
831 { "(bad)", XX, XX, XX },
832 /* 28 */
833 { "movapX", XM, EX, XX },
834 { "movapX", EX, XM, XX },
835 { PREGRP2 },
836 { "movntpX", Ev, XM, XX },
837 { PREGRP4 },
838 { PREGRP3 },
839 { "ucomisX", XM,EX, XX },
840 { "comisX", XM,EX, XX },
841 /* 30 */
842 { "wrmsr", XX, XX, XX },
843 { "rdtsc", XX, XX, XX },
844 { "rdmsr", XX, XX, XX },
845 { "rdpmc", XX, XX, XX },
846 { "sysenter", XX, XX, XX },
847 { "sysexit", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
850 /* 38 */
851 { "(bad)", XX, XX, XX },
852 { "(bad)", XX, XX, XX },
853 { "(bad)", XX, XX, XX },
854 { "(bad)", XX, XX, XX },
855 { "(bad)", XX, XX, XX },
856 { "(bad)", XX, XX, XX },
857 { "(bad)", XX, XX, XX },
858 { "(bad)", XX, XX, XX },
859 /* 40 */
860 { "cmovo", Gv, Ev, XX },
861 { "cmovno", Gv, Ev, XX },
862 { "cmovb", Gv, Ev, XX },
863 { "cmovae", Gv, Ev, XX },
864 { "cmove", Gv, Ev, XX },
865 { "cmovne", Gv, Ev, XX },
866 { "cmovbe", Gv, Ev, XX },
867 { "cmova", Gv, Ev, XX },
868 /* 48 */
869 { "cmovs", Gv, Ev, XX },
870 { "cmovns", Gv, Ev, XX },
871 { "cmovp", Gv, Ev, XX },
872 { "cmovnp", Gv, Ev, XX },
873 { "cmovl", Gv, Ev, XX },
874 { "cmovge", Gv, Ev, XX },
875 { "cmovle", Gv, Ev, XX },
876 { "cmovg", Gv, Ev, XX },
877 /* 50 */
878 { "movmskpX", Gdq, XS, XX },
879 { PREGRP13 },
880 { PREGRP12 },
881 { PREGRP11 },
882 { "andpX", XM, EX, XX },
883 { "andnpX", XM, EX, XX },
884 { "orpX", XM, EX, XX },
885 { "xorpX", XM, EX, XX },
886 /* 58 */
887 { PREGRP0 },
888 { PREGRP10 },
889 { PREGRP17 },
890 { PREGRP16 },
891 { PREGRP14 },
892 { PREGRP7 },
893 { PREGRP5 },
894 { PREGRP6 },
895 /* 60 */
896 { "punpcklbw", MX, EM, XX },
897 { "punpcklwd", MX, EM, XX },
898 { "punpckldq", MX, EM, XX },
899 { "packsswb", MX, EM, XX },
900 { "pcmpgtb", MX, EM, XX },
901 { "pcmpgtw", MX, EM, XX },
902 { "pcmpgtd", MX, EM, XX },
903 { "packuswb", MX, EM, XX },
904 /* 68 */
905 { "punpckhbw", MX, EM, XX },
906 { "punpckhwd", MX, EM, XX },
907 { "punpckhdq", MX, EM, XX },
908 { "packssdw", MX, EM, XX },
909 { PREGRP26 },
910 { PREGRP24 },
911 { "movd", MX, Edq, XX },
912 { PREGRP19 },
913 /* 70 */
914 { PREGRP22 },
915 { GRP10 },
916 { GRP11 },
917 { GRP12 },
918 { "pcmpeqb", MX, EM, XX },
919 { "pcmpeqw", MX, EM, XX },
920 { "pcmpeqd", MX, EM, XX },
921 { "emms", XX, XX, XX },
922 /* 78 */
923 { "vmread", Em, Gm, XX },
924 { "vmwrite", Gm, Em, XX },
925 { "(bad)", XX, XX, XX },
926 { "(bad)", XX, XX, XX },
927 { PREGRP28 },
928 { PREGRP29 },
929 { PREGRP23 },
930 { PREGRP20 },
931 /* 80 */
932 { "joH", Jv, XX, cond_jump_flag },
933 { "jnoH", Jv, XX, cond_jump_flag },
934 { "jbH", Jv, XX, cond_jump_flag },
935 { "jaeH", Jv, XX, cond_jump_flag },
936 { "jeH", Jv, XX, cond_jump_flag },
937 { "jneH", Jv, XX, cond_jump_flag },
938 { "jbeH", Jv, XX, cond_jump_flag },
939 { "jaH", Jv, XX, cond_jump_flag },
940 /* 88 */
941 { "jsH", Jv, XX, cond_jump_flag },
942 { "jnsH", Jv, XX, cond_jump_flag },
943 { "jpH", Jv, XX, cond_jump_flag },
944 { "jnpH", Jv, XX, cond_jump_flag },
945 { "jlH", Jv, XX, cond_jump_flag },
946 { "jgeH", Jv, XX, cond_jump_flag },
947 { "jleH", Jv, XX, cond_jump_flag },
948 { "jgH", Jv, XX, cond_jump_flag },
949 /* 90 */
950 { "seto", Eb, XX, XX },
951 { "setno", Eb, XX, XX },
952 { "setb", Eb, XX, XX },
953 { "setae", Eb, XX, XX },
954 { "sete", Eb, XX, XX },
955 { "setne", Eb, XX, XX },
956 { "setbe", Eb, XX, XX },
957 { "seta", Eb, XX, XX },
958 /* 98 */
959 { "sets", Eb, XX, XX },
960 { "setns", Eb, XX, XX },
961 { "setp", Eb, XX, XX },
962 { "setnp", Eb, XX, XX },
963 { "setl", Eb, XX, XX },
964 { "setge", Eb, XX, XX },
965 { "setle", Eb, XX, XX },
966 { "setg", Eb, XX, XX },
967 /* a0 */
968 { "pushT", fs, XX, XX },
969 { "popT", fs, XX, XX },
970 { "cpuid", XX, XX, XX },
971 { "btS", Ev, Gv, XX },
972 { "shldS", Ev, Gv, Ib },
973 { "shldS", Ev, Gv, CL },
974 { GRPPADLCK2 },
975 { GRPPADLCK1 },
976 /* a8 */
977 { "pushT", gs, XX, XX },
978 { "popT", gs, XX, XX },
979 { "rsm", XX, XX, XX },
980 { "btsS", Ev, Gv, XX },
981 { "shrdS", Ev, Gv, Ib },
982 { "shrdS", Ev, Gv, CL },
983 { GRP13 },
984 { "imulS", Gv, Ev, XX },
985 /* b0 */
986 { "cmpxchgB", Eb, Gb, XX },
987 { "cmpxchgS", Ev, Gv, XX },
988 { "lssS", Gv, Mp, XX },
989 { "btrS", Ev, Gv, XX },
990 { "lfsS", Gv, Mp, XX },
991 { "lgsS", Gv, Mp, XX },
992 { "movz{bR|x|bR|x}", Gv, Eb, XX },
993 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
994 /* b8 */
995 { "(bad)", XX, XX, XX },
996 { "ud2b", XX, XX, XX },
997 { GRP8 },
998 { "btcS", Ev, Gv, XX },
999 { "bsfS", Gv, Ev, XX },
1000 { "bsrS", Gv, Ev, XX },
1001 { "movs{bR|x|bR|x}", Gv, Eb, XX },
1002 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
1003 /* c0 */
1004 { "xaddB", Eb, Gb, XX },
1005 { "xaddS", Ev, Gv, XX },
1006 { PREGRP1 },
1007 { "movntiS", Ev, Gv, XX },
1008 { "pinsrw", MX, Edqw, Ib },
1009 { "pextrw", Gdq, MS, Ib },
1010 { "shufpX", XM, EX, Ib },
1011 { GRP9 },
1012 /* c8 */
1013 { "bswap", RMeAX, XX, XX },
1014 { "bswap", RMeCX, XX, XX },
1015 { "bswap", RMeDX, XX, XX },
1016 { "bswap", RMeBX, XX, XX },
1017 { "bswap", RMeSP, XX, XX },
1018 { "bswap", RMeBP, XX, XX },
1019 { "bswap", RMeSI, XX, XX },
1020 { "bswap", RMeDI, XX, XX },
1021 /* d0 */
1022 { PREGRP27 },
1023 { "psrlw", MX, EM, XX },
1024 { "psrld", MX, EM, XX },
1025 { "psrlq", MX, EM, XX },
1026 { "paddq", MX, EM, XX },
1027 { "pmullw", MX, EM, XX },
1028 { PREGRP21 },
1029 { "pmovmskb", Gdq, MS, XX },
1030 /* d8 */
1031 { "psubusb", MX, EM, XX },
1032 { "psubusw", MX, EM, XX },
1033 { "pminub", MX, EM, XX },
1034 { "pand", MX, EM, XX },
1035 { "paddusb", MX, EM, XX },
1036 { "paddusw", MX, EM, XX },
1037 { "pmaxub", MX, EM, XX },
1038 { "pandn", MX, EM, XX },
1039 /* e0 */
1040 { "pavgb", MX, EM, XX },
1041 { "psraw", MX, EM, XX },
1042 { "psrad", MX, EM, XX },
1043 { "pavgw", MX, EM, XX },
1044 { "pmulhuw", MX, EM, XX },
1045 { "pmulhw", MX, EM, XX },
1046 { PREGRP15 },
1047 { PREGRP25 },
1048 /* e8 */
1049 { "psubsb", MX, EM, XX },
1050 { "psubsw", MX, EM, XX },
1051 { "pminsw", MX, EM, XX },
1052 { "por", MX, EM, XX },
1053 { "paddsb", MX, EM, XX },
1054 { "paddsw", MX, EM, XX },
1055 { "pmaxsw", MX, EM, XX },
1056 { "pxor", MX, EM, XX },
1057 /* f0 */
1058 { PREGRP32 },
1059 { "psllw", MX, EM, XX },
1060 { "pslld", MX, EM, XX },
1061 { "psllq", MX, EM, XX },
1062 { "pmuludq", MX, EM, XX },
1063 { "pmaddwd", MX, EM, XX },
1064 { "psadbw", MX, EM, XX },
1065 { PREGRP18 },
1066 /* f8 */
1067 { "psubb", MX, EM, XX },
1068 { "psubw", MX, EM, XX },
1069 { "psubd", MX, EM, XX },
1070 { "psubq", MX, EM, XX },
1071 { "paddb", MX, EM, XX },
1072 { "paddw", MX, EM, XX },
1073 { "paddd", MX, EM, XX },
1074 { "(bad)", XX, XX, XX }
1075 };
1076
1077 static const unsigned char onebyte_has_modrm[256] = {
1078 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1079 /* ------------------------------- */
1080 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1081 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1082 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1083 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1084 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1085 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1086 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1087 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1088 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1089 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1090 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1091 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1092 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1093 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1094 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1095 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1096 /* ------------------------------- */
1097 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1098 };
1099
1100 static const unsigned char twobyte_has_modrm[256] = {
1101 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1102 /* ------------------------------- */
1103 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1104 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1105 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1106 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1107 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1108 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1109 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1110 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1111 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1112 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1113 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1114 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1115 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1116 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1117 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1118 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1119 /* ------------------------------- */
1120 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1121 };
1122
1123 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1124 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1125 /* ------------------------------- */
1126 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1127 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1128 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1129 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1130 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1131 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1132 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1133 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1134 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1135 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1136 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1137 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1138 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1139 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1140 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1141 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1142 /* ------------------------------- */
1143 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1144 };
1145
1146 static char obuf[100];
1147 static char *obufp;
1148 static char scratchbuf[100];
1149 static unsigned char *start_codep;
1150 static unsigned char *insn_codep;
1151 static unsigned char *codep;
1152 static disassemble_info *the_info;
1153 static int mod;
1154 static int rm;
1155 static int reg;
1156 static unsigned char need_modrm;
1157
1158 /* If we are accessing mod/rm/reg without need_modrm set, then the
1159 values are stale. Hitting this abort likely indicates that you
1160 need to update onebyte_has_modrm or twobyte_has_modrm. */
1161 #define MODRM_CHECK if (!need_modrm) abort ()
1162
1163 static const char **names64;
1164 static const char **names32;
1165 static const char **names16;
1166 static const char **names8;
1167 static const char **names8rex;
1168 static const char **names_seg;
1169 static const char **index16;
1170
1171 static const char *intel_names64[] = {
1172 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1173 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1174 };
1175 static const char *intel_names32[] = {
1176 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1177 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1178 };
1179 static const char *intel_names16[] = {
1180 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1181 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1182 };
1183 static const char *intel_names8[] = {
1184 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1185 };
1186 static const char *intel_names8rex[] = {
1187 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1188 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1189 };
1190 static const char *intel_names_seg[] = {
1191 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1192 };
1193 static const char *intel_index16[] = {
1194 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1195 };
1196
1197 static const char *att_names64[] = {
1198 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1199 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1200 };
1201 static const char *att_names32[] = {
1202 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1203 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1204 };
1205 static const char *att_names16[] = {
1206 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1207 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1208 };
1209 static const char *att_names8[] = {
1210 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1211 };
1212 static const char *att_names8rex[] = {
1213 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1214 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1215 };
1216 static const char *att_names_seg[] = {
1217 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1218 };
1219 static const char *att_index16[] = {
1220 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1221 };
1222
1223 static const struct dis386 grps[][8] = {
1224 /* GRP1b */
1225 {
1226 { "addA", Eb, Ib, XX },
1227 { "orA", Eb, Ib, XX },
1228 { "adcA", Eb, Ib, XX },
1229 { "sbbA", Eb, Ib, XX },
1230 { "andA", Eb, Ib, XX },
1231 { "subA", Eb, Ib, XX },
1232 { "xorA", Eb, Ib, XX },
1233 { "cmpA", Eb, Ib, XX }
1234 },
1235 /* GRP1S */
1236 {
1237 { "addQ", Ev, Iv, XX },
1238 { "orQ", Ev, Iv, XX },
1239 { "adcQ", Ev, Iv, XX },
1240 { "sbbQ", Ev, Iv, XX },
1241 { "andQ", Ev, Iv, XX },
1242 { "subQ", Ev, Iv, XX },
1243 { "xorQ", Ev, Iv, XX },
1244 { "cmpQ", Ev, Iv, XX }
1245 },
1246 /* GRP1Ss */
1247 {
1248 { "addQ", Ev, sIb, XX },
1249 { "orQ", Ev, sIb, XX },
1250 { "adcQ", Ev, sIb, XX },
1251 { "sbbQ", Ev, sIb, XX },
1252 { "andQ", Ev, sIb, XX },
1253 { "subQ", Ev, sIb, XX },
1254 { "xorQ", Ev, sIb, XX },
1255 { "cmpQ", Ev, sIb, XX }
1256 },
1257 /* GRP2b */
1258 {
1259 { "rolA", Eb, Ib, XX },
1260 { "rorA", Eb, Ib, XX },
1261 { "rclA", Eb, Ib, XX },
1262 { "rcrA", Eb, Ib, XX },
1263 { "shlA", Eb, Ib, XX },
1264 { "shrA", Eb, Ib, XX },
1265 { "(bad)", XX, XX, XX },
1266 { "sarA", Eb, Ib, XX },
1267 },
1268 /* GRP2S */
1269 {
1270 { "rolQ", Ev, Ib, XX },
1271 { "rorQ", Ev, Ib, XX },
1272 { "rclQ", Ev, Ib, XX },
1273 { "rcrQ", Ev, Ib, XX },
1274 { "shlQ", Ev, Ib, XX },
1275 { "shrQ", Ev, Ib, XX },
1276 { "(bad)", XX, XX, XX },
1277 { "sarQ", Ev, Ib, XX },
1278 },
1279 /* GRP2b_one */
1280 {
1281 { "rolA", Eb, I1, XX },
1282 { "rorA", Eb, I1, XX },
1283 { "rclA", Eb, I1, XX },
1284 { "rcrA", Eb, I1, XX },
1285 { "shlA", Eb, I1, XX },
1286 { "shrA", Eb, I1, XX },
1287 { "(bad)", XX, XX, XX },
1288 { "sarA", Eb, I1, XX },
1289 },
1290 /* GRP2S_one */
1291 {
1292 { "rolQ", Ev, I1, XX },
1293 { "rorQ", Ev, I1, XX },
1294 { "rclQ", Ev, I1, XX },
1295 { "rcrQ", Ev, I1, XX },
1296 { "shlQ", Ev, I1, XX },
1297 { "shrQ", Ev, I1, XX },
1298 { "(bad)", XX, XX, XX},
1299 { "sarQ", Ev, I1, XX },
1300 },
1301 /* GRP2b_cl */
1302 {
1303 { "rolA", Eb, CL, XX },
1304 { "rorA", Eb, CL, XX },
1305 { "rclA", Eb, CL, XX },
1306 { "rcrA", Eb, CL, XX },
1307 { "shlA", Eb, CL, XX },
1308 { "shrA", Eb, CL, XX },
1309 { "(bad)", XX, XX, XX },
1310 { "sarA", Eb, CL, XX },
1311 },
1312 /* GRP2S_cl */
1313 {
1314 { "rolQ", Ev, CL, XX },
1315 { "rorQ", Ev, CL, XX },
1316 { "rclQ", Ev, CL, XX },
1317 { "rcrQ", Ev, CL, XX },
1318 { "shlQ", Ev, CL, XX },
1319 { "shrQ", Ev, CL, XX },
1320 { "(bad)", XX, XX, XX },
1321 { "sarQ", Ev, CL, XX }
1322 },
1323 /* GRP3b */
1324 {
1325 { "testA", Eb, Ib, XX },
1326 { "(bad)", Eb, XX, XX },
1327 { "notA", Eb, XX, XX },
1328 { "negA", Eb, XX, XX },
1329 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1330 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1331 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1332 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1333 },
1334 /* GRP3S */
1335 {
1336 { "testQ", Ev, Iv, XX },
1337 { "(bad)", XX, XX, XX },
1338 { "notQ", Ev, XX, XX },
1339 { "negQ", Ev, XX, XX },
1340 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1341 { "imulQ", Ev, XX, XX },
1342 { "divQ", Ev, XX, XX },
1343 { "idivQ", Ev, XX, XX },
1344 },
1345 /* GRP4 */
1346 {
1347 { "incA", Eb, XX, XX },
1348 { "decA", Eb, XX, XX },
1349 { "(bad)", XX, XX, XX },
1350 { "(bad)", XX, XX, XX },
1351 { "(bad)", XX, XX, XX },
1352 { "(bad)", XX, XX, XX },
1353 { "(bad)", XX, XX, XX },
1354 { "(bad)", XX, XX, XX },
1355 },
1356 /* GRP5 */
1357 {
1358 { "incQ", Ev, XX, XX },
1359 { "decQ", Ev, XX, XX },
1360 { "callT", indirEv, XX, XX },
1361 { "JcallT", indirEp, XX, XX },
1362 { "jmpT", indirEv, XX, XX },
1363 { "JjmpT", indirEp, XX, XX },
1364 { "pushU", Ev, XX, XX },
1365 { "(bad)", XX, XX, XX },
1366 },
1367 /* GRP6 */
1368 {
1369 { "sldtQ", Ev, XX, XX },
1370 { "strQ", Ev, XX, XX },
1371 { "lldt", Ew, XX, XX },
1372 { "ltr", Ew, XX, XX },
1373 { "verr", Ew, XX, XX },
1374 { "verw", Ew, XX, XX },
1375 { "(bad)", XX, XX, XX },
1376 { "(bad)", XX, XX, XX }
1377 },
1378 /* GRP7 */
1379 {
1380 { "sgdtIQ", VMX_Fixup, 0, XX, XX },
1381 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1382 { "lgdt{Q|Q||}", M, XX, XX },
1383 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
1384 { "smswQ", Ev, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "lmsw", Ew, XX, XX },
1387 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1388 },
1389 /* GRP8 */
1390 {
1391 { "(bad)", XX, XX, XX },
1392 { "(bad)", XX, XX, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "btQ", Ev, Ib, XX },
1396 { "btsQ", Ev, Ib, XX },
1397 { "btrQ", Ev, Ib, XX },
1398 { "btcQ", Ev, Ib, XX },
1399 },
1400 /* GRP9 */
1401 {
1402 { "(bad)", XX, XX, XX },
1403 { "cmpxchg8b", Eq, XX, XX },
1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "", VM, XX, XX }, /* See OP_VMX. */
1409 { "vmptrst", Eq, XX, XX },
1410 },
1411 /* GRP10 */
1412 {
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "psrlw", MS, Ib, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psraw", MS, Ib, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "psllw", MS, Ib, XX },
1420 { "(bad)", XX, XX, XX },
1421 },
1422 /* GRP11 */
1423 {
1424 { "(bad)", XX, XX, XX },
1425 { "(bad)", XX, XX, XX },
1426 { "psrld", MS, Ib, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "psrad", MS, Ib, XX },
1429 { "(bad)", XX, XX, XX },
1430 { "pslld", MS, Ib, XX },
1431 { "(bad)", XX, XX, XX },
1432 },
1433 /* GRP12 */
1434 {
1435 { "(bad)", XX, XX, XX },
1436 { "(bad)", XX, XX, XX },
1437 { "psrlq", MS, Ib, XX },
1438 { "psrldq", MS, Ib, XX },
1439 { "(bad)", XX, XX, XX },
1440 { "(bad)", XX, XX, XX },
1441 { "psllq", MS, Ib, XX },
1442 { "pslldq", MS, Ib, XX },
1443 },
1444 /* GRP13 */
1445 {
1446 { "fxsave", Ev, XX, XX },
1447 { "fxrstor", Ev, XX, XX },
1448 { "ldmxcsr", Ev, XX, XX },
1449 { "stmxcsr", Ev, XX, XX },
1450 { "(bad)", XX, XX, XX },
1451 { "lfence", OP_0fae, 0, XX, XX },
1452 { "mfence", OP_0fae, 0, XX, XX },
1453 { "clflush", OP_0fae, 0, XX, XX },
1454 },
1455 /* GRP14 */
1456 {
1457 { "prefetchnta", Ev, XX, XX },
1458 { "prefetcht0", Ev, XX, XX },
1459 { "prefetcht1", Ev, XX, XX },
1460 { "prefetcht2", Ev, XX, XX },
1461 { "(bad)", XX, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 },
1466 /* GRPAMD */
1467 {
1468 { "prefetch", Eb, XX, XX },
1469 { "prefetchw", Eb, XX, XX },
1470 { "(bad)", XX, XX, XX },
1471 { "(bad)", XX, XX, XX },
1472 { "(bad)", XX, XX, XX },
1473 { "(bad)", XX, XX, XX },
1474 { "(bad)", XX, XX, XX },
1475 { "(bad)", XX, XX, XX },
1476 },
1477 /* GRPPADLCK1 */
1478 {
1479 { "xstore-rng", OP_0f07, 0, XX, XX },
1480 { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1481 { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1482 { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1483 { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1484 { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1487 },
1488 /* GRPPADLCK2 */
1489 {
1490 { "montmul", OP_0f07, 0, XX, XX },
1491 { "xsha1", OP_0f07, 0, XX, XX },
1492 { "xsha256", OP_0f07, 0, XX, XX },
1493 { "(bad)", OP_0f07, 0, XX, XX },
1494 { "(bad)", OP_0f07, 0, XX, XX },
1495 { "(bad)", OP_0f07, 0, XX, XX },
1496 { "(bad)", OP_0f07, 0, XX, XX },
1497 { "(bad)", OP_0f07, 0, XX, XX },
1498 }
1499 };
1500
1501 static const struct dis386 prefix_user_table[][4] = {
1502 /* PREGRP0 */
1503 {
1504 { "addps", XM, EX, XX },
1505 { "addss", XM, EX, XX },
1506 { "addpd", XM, EX, XX },
1507 { "addsd", XM, EX, XX },
1508 },
1509 /* PREGRP1 */
1510 {
1511 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1512 { "", XM, EX, OPSIMD },
1513 { "", XM, EX, OPSIMD },
1514 { "", XM, EX, OPSIMD },
1515 },
1516 /* PREGRP2 */
1517 {
1518 { "cvtpi2ps", XM, EM, XX },
1519 { "cvtsi2ssY", XM, Ev, XX },
1520 { "cvtpi2pd", XM, EM, XX },
1521 { "cvtsi2sdY", XM, Ev, XX },
1522 },
1523 /* PREGRP3 */
1524 {
1525 { "cvtps2pi", MX, EX, XX },
1526 { "cvtss2siY", Gv, EX, XX },
1527 { "cvtpd2pi", MX, EX, XX },
1528 { "cvtsd2siY", Gv, EX, XX },
1529 },
1530 /* PREGRP4 */
1531 {
1532 { "cvttps2pi", MX, EX, XX },
1533 { "cvttss2siY", Gv, EX, XX },
1534 { "cvttpd2pi", MX, EX, XX },
1535 { "cvttsd2siY", Gv, EX, XX },
1536 },
1537 /* PREGRP5 */
1538 {
1539 { "divps", XM, EX, XX },
1540 { "divss", XM, EX, XX },
1541 { "divpd", XM, EX, XX },
1542 { "divsd", XM, EX, XX },
1543 },
1544 /* PREGRP6 */
1545 {
1546 { "maxps", XM, EX, XX },
1547 { "maxss", XM, EX, XX },
1548 { "maxpd", XM, EX, XX },
1549 { "maxsd", XM, EX, XX },
1550 },
1551 /* PREGRP7 */
1552 {
1553 { "minps", XM, EX, XX },
1554 { "minss", XM, EX, XX },
1555 { "minpd", XM, EX, XX },
1556 { "minsd", XM, EX, XX },
1557 },
1558 /* PREGRP8 */
1559 {
1560 { "movups", XM, EX, XX },
1561 { "movss", XM, EX, XX },
1562 { "movupd", XM, EX, XX },
1563 { "movsd", XM, EX, XX },
1564 },
1565 /* PREGRP9 */
1566 {
1567 { "movups", EX, XM, XX },
1568 { "movss", EX, XM, XX },
1569 { "movupd", EX, XM, XX },
1570 { "movsd", EX, XM, XX },
1571 },
1572 /* PREGRP10 */
1573 {
1574 { "mulps", XM, EX, XX },
1575 { "mulss", XM, EX, XX },
1576 { "mulpd", XM, EX, XX },
1577 { "mulsd", XM, EX, XX },
1578 },
1579 /* PREGRP11 */
1580 {
1581 { "rcpps", XM, EX, XX },
1582 { "rcpss", XM, EX, XX },
1583 { "(bad)", XM, EX, XX },
1584 { "(bad)", XM, EX, XX },
1585 },
1586 /* PREGRP12 */
1587 {
1588 { "rsqrtps", XM, EX, XX },
1589 { "rsqrtss", XM, EX, XX },
1590 { "(bad)", XM, EX, XX },
1591 { "(bad)", XM, EX, XX },
1592 },
1593 /* PREGRP13 */
1594 {
1595 { "sqrtps", XM, EX, XX },
1596 { "sqrtss", XM, EX, XX },
1597 { "sqrtpd", XM, EX, XX },
1598 { "sqrtsd", XM, EX, XX },
1599 },
1600 /* PREGRP14 */
1601 {
1602 { "subps", XM, EX, XX },
1603 { "subss", XM, EX, XX },
1604 { "subpd", XM, EX, XX },
1605 { "subsd", XM, EX, XX },
1606 },
1607 /* PREGRP15 */
1608 {
1609 { "(bad)", XM, EX, XX },
1610 { "cvtdq2pd", XM, EX, XX },
1611 { "cvttpd2dq", XM, EX, XX },
1612 { "cvtpd2dq", XM, EX, XX },
1613 },
1614 /* PREGRP16 */
1615 {
1616 { "cvtdq2ps", XM, EX, XX },
1617 { "cvttps2dq",XM, EX, XX },
1618 { "cvtps2dq",XM, EX, XX },
1619 { "(bad)", XM, EX, XX },
1620 },
1621 /* PREGRP17 */
1622 {
1623 { "cvtps2pd", XM, EX, XX },
1624 { "cvtss2sd", XM, EX, XX },
1625 { "cvtpd2ps", XM, EX, XX },
1626 { "cvtsd2ss", XM, EX, XX },
1627 },
1628 /* PREGRP18 */
1629 {
1630 { "maskmovq", MX, MS, XX },
1631 { "(bad)", XM, EX, XX },
1632 { "maskmovdqu", XM, EX, XX },
1633 { "(bad)", XM, EX, XX },
1634 },
1635 /* PREGRP19 */
1636 {
1637 { "movq", MX, EM, XX },
1638 { "movdqu", XM, EX, XX },
1639 { "movdqa", XM, EX, XX },
1640 { "(bad)", XM, EX, XX },
1641 },
1642 /* PREGRP20 */
1643 {
1644 { "movq", EM, MX, XX },
1645 { "movdqu", EX, XM, XX },
1646 { "movdqa", EX, XM, XX },
1647 { "(bad)", EX, XM, XX },
1648 },
1649 /* PREGRP21 */
1650 {
1651 { "(bad)", EX, XM, XX },
1652 { "movq2dq", XM, MS, XX },
1653 { "movq", EX, XM, XX },
1654 { "movdq2q", MX, XS, XX },
1655 },
1656 /* PREGRP22 */
1657 {
1658 { "pshufw", MX, EM, Ib },
1659 { "pshufhw", XM, EX, Ib },
1660 { "pshufd", XM, EX, Ib },
1661 { "pshuflw", XM, EX, Ib },
1662 },
1663 /* PREGRP23 */
1664 {
1665 { "movd", Edq, MX, XX },
1666 { "movq", XM, EX, XX },
1667 { "movd", Edq, XM, XX },
1668 { "(bad)", Ed, XM, XX },
1669 },
1670 /* PREGRP24 */
1671 {
1672 { "(bad)", MX, EX, XX },
1673 { "(bad)", XM, EX, XX },
1674 { "punpckhqdq", XM, EX, XX },
1675 { "(bad)", XM, EX, XX },
1676 },
1677 /* PREGRP25 */
1678 {
1679 { "movntq", EM, MX, XX },
1680 { "(bad)", EM, XM, XX },
1681 { "movntdq", EM, XM, XX },
1682 { "(bad)", EM, XM, XX },
1683 },
1684 /* PREGRP26 */
1685 {
1686 { "(bad)", MX, EX, XX },
1687 { "(bad)", XM, EX, XX },
1688 { "punpcklqdq", XM, EX, XX },
1689 { "(bad)", XM, EX, XX },
1690 },
1691 /* PREGRP27 */
1692 {
1693 { "(bad)", MX, EX, XX },
1694 { "(bad)", XM, EX, XX },
1695 { "addsubpd", XM, EX, XX },
1696 { "addsubps", XM, EX, XX },
1697 },
1698 /* PREGRP28 */
1699 {
1700 { "(bad)", MX, EX, XX },
1701 { "(bad)", XM, EX, XX },
1702 { "haddpd", XM, EX, XX },
1703 { "haddps", XM, EX, XX },
1704 },
1705 /* PREGRP29 */
1706 {
1707 { "(bad)", MX, EX, XX },
1708 { "(bad)", XM, EX, XX },
1709 { "hsubpd", XM, EX, XX },
1710 { "hsubps", XM, EX, XX },
1711 },
1712 /* PREGRP30 */
1713 {
1714 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1715 { "movsldup", XM, EX, XX },
1716 { "movlpd", XM, EX, XX },
1717 { "movddup", XM, EX, XX },
1718 },
1719 /* PREGRP31 */
1720 {
1721 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1722 { "movshdup", XM, EX, XX },
1723 { "movhpd", XM, EX, XX },
1724 { "(bad)", XM, EX, XX },
1725 },
1726 /* PREGRP32 */
1727 {
1728 { "(bad)", XM, EX, XX },
1729 { "(bad)", XM, EX, XX },
1730 { "(bad)", XM, EX, XX },
1731 { "lddqu", XM, M, XX },
1732 },
1733 };
1734
1735 static const struct dis386 x86_64_table[][2] = {
1736 {
1737 { "arpl", Ew, Gw, XX },
1738 { "movs{||lq|xd}", Gv, Ed, XX },
1739 },
1740 };
1741
1742 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1743
1744 static void
1745 ckprefix (void)
1746 {
1747 int newrex;
1748 rex = 0;
1749 prefixes = 0;
1750 used_prefixes = 0;
1751 rex_used = 0;
1752 while (1)
1753 {
1754 FETCH_DATA (the_info, codep + 1);
1755 newrex = 0;
1756 switch (*codep)
1757 {
1758 /* REX prefixes family. */
1759 case 0x40:
1760 case 0x41:
1761 case 0x42:
1762 case 0x43:
1763 case 0x44:
1764 case 0x45:
1765 case 0x46:
1766 case 0x47:
1767 case 0x48:
1768 case 0x49:
1769 case 0x4a:
1770 case 0x4b:
1771 case 0x4c:
1772 case 0x4d:
1773 case 0x4e:
1774 case 0x4f:
1775 if (mode_64bit)
1776 newrex = *codep;
1777 else
1778 return;
1779 break;
1780 case 0xf3:
1781 prefixes |= PREFIX_REPZ;
1782 break;
1783 case 0xf2:
1784 prefixes |= PREFIX_REPNZ;
1785 break;
1786 case 0xf0:
1787 prefixes |= PREFIX_LOCK;
1788 break;
1789 case 0x2e:
1790 prefixes |= PREFIX_CS;
1791 break;
1792 case 0x36:
1793 prefixes |= PREFIX_SS;
1794 break;
1795 case 0x3e:
1796 prefixes |= PREFIX_DS;
1797 break;
1798 case 0x26:
1799 prefixes |= PREFIX_ES;
1800 break;
1801 case 0x64:
1802 prefixes |= PREFIX_FS;
1803 break;
1804 case 0x65:
1805 prefixes |= PREFIX_GS;
1806 break;
1807 case 0x66:
1808 prefixes |= PREFIX_DATA;
1809 break;
1810 case 0x67:
1811 prefixes |= PREFIX_ADDR;
1812 break;
1813 case FWAIT_OPCODE:
1814 /* fwait is really an instruction. If there are prefixes
1815 before the fwait, they belong to the fwait, *not* to the
1816 following instruction. */
1817 if (prefixes)
1818 {
1819 prefixes |= PREFIX_FWAIT;
1820 codep++;
1821 return;
1822 }
1823 prefixes = PREFIX_FWAIT;
1824 break;
1825 default:
1826 return;
1827 }
1828 /* Rex is ignored when followed by another prefix. */
1829 if (rex)
1830 {
1831 oappend (prefix_name (rex, 0));
1832 oappend (" ");
1833 }
1834 rex = newrex;
1835 codep++;
1836 }
1837 }
1838
1839 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1840 prefix byte. */
1841
1842 static const char *
1843 prefix_name (int pref, int sizeflag)
1844 {
1845 switch (pref)
1846 {
1847 /* REX prefixes family. */
1848 case 0x40:
1849 return "rex";
1850 case 0x41:
1851 return "rexZ";
1852 case 0x42:
1853 return "rexY";
1854 case 0x43:
1855 return "rexYZ";
1856 case 0x44:
1857 return "rexX";
1858 case 0x45:
1859 return "rexXZ";
1860 case 0x46:
1861 return "rexXY";
1862 case 0x47:
1863 return "rexXYZ";
1864 case 0x48:
1865 return "rex64";
1866 case 0x49:
1867 return "rex64Z";
1868 case 0x4a:
1869 return "rex64Y";
1870 case 0x4b:
1871 return "rex64YZ";
1872 case 0x4c:
1873 return "rex64X";
1874 case 0x4d:
1875 return "rex64XZ";
1876 case 0x4e:
1877 return "rex64XY";
1878 case 0x4f:
1879 return "rex64XYZ";
1880 case 0xf3:
1881 return "repz";
1882 case 0xf2:
1883 return "repnz";
1884 case 0xf0:
1885 return "lock";
1886 case 0x2e:
1887 return "cs";
1888 case 0x36:
1889 return "ss";
1890 case 0x3e:
1891 return "ds";
1892 case 0x26:
1893 return "es";
1894 case 0x64:
1895 return "fs";
1896 case 0x65:
1897 return "gs";
1898 case 0x66:
1899 return (sizeflag & DFLAG) ? "data16" : "data32";
1900 case 0x67:
1901 if (mode_64bit)
1902 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1903 else
1904 return (sizeflag & AFLAG) ? "addr16" : "addr32";
1905 case FWAIT_OPCODE:
1906 return "fwait";
1907 default:
1908 return NULL;
1909 }
1910 }
1911
1912 static char op1out[100], op2out[100], op3out[100];
1913 static int op_ad, op_index[3];
1914 static int two_source_ops;
1915 static bfd_vma op_address[3];
1916 static bfd_vma op_riprel[3];
1917 static bfd_vma start_pc;
1918 \f
1919 /*
1920 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1921 * (see topic "Redundant prefixes" in the "Differences from 8086"
1922 * section of the "Virtual 8086 Mode" chapter.)
1923 * 'pc' should be the address of this instruction, it will
1924 * be used to print the target address if this is a relative jump or call
1925 * The function returns the length of this instruction in bytes.
1926 */
1927
1928 static char intel_syntax;
1929 static char open_char;
1930 static char close_char;
1931 static char separator_char;
1932 static char scale_char;
1933
1934 /* Here for backwards compatibility. When gdb stops using
1935 print_insn_i386_att and print_insn_i386_intel these functions can
1936 disappear, and print_insn_i386 be merged into print_insn. */
1937 int
1938 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1939 {
1940 intel_syntax = 0;
1941
1942 return print_insn (pc, info);
1943 }
1944
1945 int
1946 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1947 {
1948 intel_syntax = 1;
1949
1950 return print_insn (pc, info);
1951 }
1952
1953 int
1954 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1955 {
1956 intel_syntax = -1;
1957
1958 return print_insn (pc, info);
1959 }
1960
1961 static int
1962 print_insn (bfd_vma pc, disassemble_info *info)
1963 {
1964 const struct dis386 *dp;
1965 int i;
1966 char *first, *second, *third;
1967 int needcomma;
1968 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1969 int sizeflag;
1970 const char *p;
1971 struct dis_private priv;
1972
1973 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1974 || info->mach == bfd_mach_x86_64);
1975
1976 if (intel_syntax == (char) -1)
1977 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1978 || info->mach == bfd_mach_x86_64_intel_syntax);
1979
1980 if (info->mach == bfd_mach_i386_i386
1981 || info->mach == bfd_mach_x86_64
1982 || info->mach == bfd_mach_i386_i386_intel_syntax
1983 || info->mach == bfd_mach_x86_64_intel_syntax)
1984 priv.orig_sizeflag = AFLAG | DFLAG;
1985 else if (info->mach == bfd_mach_i386_i8086)
1986 priv.orig_sizeflag = 0;
1987 else
1988 abort ();
1989
1990 for (p = info->disassembler_options; p != NULL; )
1991 {
1992 if (strncmp (p, "x86-64", 6) == 0)
1993 {
1994 mode_64bit = 1;
1995 priv.orig_sizeflag = AFLAG | DFLAG;
1996 }
1997 else if (strncmp (p, "i386", 4) == 0)
1998 {
1999 mode_64bit = 0;
2000 priv.orig_sizeflag = AFLAG | DFLAG;
2001 }
2002 else if (strncmp (p, "i8086", 5) == 0)
2003 {
2004 mode_64bit = 0;
2005 priv.orig_sizeflag = 0;
2006 }
2007 else if (strncmp (p, "intel", 5) == 0)
2008 {
2009 intel_syntax = 1;
2010 }
2011 else if (strncmp (p, "att", 3) == 0)
2012 {
2013 intel_syntax = 0;
2014 }
2015 else if (strncmp (p, "addr", 4) == 0)
2016 {
2017 if (p[4] == '1' && p[5] == '6')
2018 priv.orig_sizeflag &= ~AFLAG;
2019 else if (p[4] == '3' && p[5] == '2')
2020 priv.orig_sizeflag |= AFLAG;
2021 }
2022 else if (strncmp (p, "data", 4) == 0)
2023 {
2024 if (p[4] == '1' && p[5] == '6')
2025 priv.orig_sizeflag &= ~DFLAG;
2026 else if (p[4] == '3' && p[5] == '2')
2027 priv.orig_sizeflag |= DFLAG;
2028 }
2029 else if (strncmp (p, "suffix", 6) == 0)
2030 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2031
2032 p = strchr (p, ',');
2033 if (p != NULL)
2034 p++;
2035 }
2036
2037 if (intel_syntax)
2038 {
2039 names64 = intel_names64;
2040 names32 = intel_names32;
2041 names16 = intel_names16;
2042 names8 = intel_names8;
2043 names8rex = intel_names8rex;
2044 names_seg = intel_names_seg;
2045 index16 = intel_index16;
2046 open_char = '[';
2047 close_char = ']';
2048 separator_char = '+';
2049 scale_char = '*';
2050 }
2051 else
2052 {
2053 names64 = att_names64;
2054 names32 = att_names32;
2055 names16 = att_names16;
2056 names8 = att_names8;
2057 names8rex = att_names8rex;
2058 names_seg = att_names_seg;
2059 index16 = att_index16;
2060 open_char = '(';
2061 close_char = ')';
2062 separator_char = ',';
2063 scale_char = ',';
2064 }
2065
2066 /* The output looks better if we put 7 bytes on a line, since that
2067 puts most long word instructions on a single line. */
2068 info->bytes_per_line = 7;
2069
2070 info->private_data = &priv;
2071 priv.max_fetched = priv.the_buffer;
2072 priv.insn_start = pc;
2073
2074 obuf[0] = 0;
2075 op1out[0] = 0;
2076 op2out[0] = 0;
2077 op3out[0] = 0;
2078
2079 op_index[0] = op_index[1] = op_index[2] = -1;
2080
2081 the_info = info;
2082 start_pc = pc;
2083 start_codep = priv.the_buffer;
2084 codep = priv.the_buffer;
2085
2086 if (setjmp (priv.bailout) != 0)
2087 {
2088 const char *name;
2089
2090 /* Getting here means we tried for data but didn't get it. That
2091 means we have an incomplete instruction of some sort. Just
2092 print the first byte as a prefix or a .byte pseudo-op. */
2093 if (codep > priv.the_buffer)
2094 {
2095 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2096 if (name != NULL)
2097 (*info->fprintf_func) (info->stream, "%s", name);
2098 else
2099 {
2100 /* Just print the first byte as a .byte instruction. */
2101 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2102 (unsigned int) priv.the_buffer[0]);
2103 }
2104
2105 return 1;
2106 }
2107
2108 return -1;
2109 }
2110
2111 obufp = obuf;
2112 ckprefix ();
2113
2114 insn_codep = codep;
2115 sizeflag = priv.orig_sizeflag;
2116
2117 FETCH_DATA (info, codep + 1);
2118 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2119
2120 if ((prefixes & PREFIX_FWAIT)
2121 && ((*codep < 0xd8) || (*codep > 0xdf)))
2122 {
2123 const char *name;
2124
2125 /* fwait not followed by floating point instruction. Print the
2126 first prefix, which is probably fwait itself. */
2127 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2128 if (name == NULL)
2129 name = INTERNAL_DISASSEMBLER_ERROR;
2130 (*info->fprintf_func) (info->stream, "%s", name);
2131 return 1;
2132 }
2133
2134 if (*codep == 0x0f)
2135 {
2136 FETCH_DATA (info, codep + 2);
2137 dp = &dis386_twobyte[*++codep];
2138 need_modrm = twobyte_has_modrm[*codep];
2139 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2140 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2141 }
2142 else
2143 {
2144 dp = &dis386[*codep];
2145 need_modrm = onebyte_has_modrm[*codep];
2146 uses_SSE_prefix = 0;
2147 uses_LOCK_prefix = 0;
2148 }
2149 codep++;
2150
2151 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2152 {
2153 oappend ("repz ");
2154 used_prefixes |= PREFIX_REPZ;
2155 }
2156 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2157 {
2158 oappend ("repnz ");
2159 used_prefixes |= PREFIX_REPNZ;
2160 }
2161 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2162 {
2163 oappend ("lock ");
2164 used_prefixes |= PREFIX_LOCK;
2165 }
2166
2167 if (prefixes & PREFIX_ADDR)
2168 {
2169 sizeflag ^= AFLAG;
2170 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2171 {
2172 if ((sizeflag & AFLAG) || mode_64bit)
2173 oappend ("addr32 ");
2174 else
2175 oappend ("addr16 ");
2176 used_prefixes |= PREFIX_ADDR;
2177 }
2178 }
2179
2180 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2181 {
2182 sizeflag ^= DFLAG;
2183 if (dp->bytemode3 == cond_jump_mode
2184 && dp->bytemode1 == v_mode
2185 && !intel_syntax)
2186 {
2187 if (sizeflag & DFLAG)
2188 oappend ("data32 ");
2189 else
2190 oappend ("data16 ");
2191 used_prefixes |= PREFIX_DATA;
2192 }
2193 }
2194
2195 if (need_modrm)
2196 {
2197 FETCH_DATA (info, codep + 1);
2198 mod = (*codep >> 6) & 3;
2199 reg = (*codep >> 3) & 7;
2200 rm = *codep & 7;
2201 }
2202
2203 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2204 {
2205 dofloat (sizeflag);
2206 }
2207 else
2208 {
2209 int index;
2210 if (dp->name == NULL)
2211 {
2212 switch (dp->bytemode1)
2213 {
2214 case USE_GROUPS:
2215 dp = &grps[dp->bytemode2][reg];
2216 break;
2217
2218 case USE_PREFIX_USER_TABLE:
2219 index = 0;
2220 used_prefixes |= (prefixes & PREFIX_REPZ);
2221 if (prefixes & PREFIX_REPZ)
2222 index = 1;
2223 else
2224 {
2225 used_prefixes |= (prefixes & PREFIX_DATA);
2226 if (prefixes & PREFIX_DATA)
2227 index = 2;
2228 else
2229 {
2230 used_prefixes |= (prefixes & PREFIX_REPNZ);
2231 if (prefixes & PREFIX_REPNZ)
2232 index = 3;
2233 }
2234 }
2235 dp = &prefix_user_table[dp->bytemode2][index];
2236 break;
2237
2238 case X86_64_SPECIAL:
2239 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2240 break;
2241
2242 default:
2243 oappend (INTERNAL_DISASSEMBLER_ERROR);
2244 break;
2245 }
2246 }
2247
2248 if (putop (dp->name, sizeflag) == 0)
2249 {
2250 obufp = op1out;
2251 op_ad = 2;
2252 if (dp->op1)
2253 (*dp->op1) (dp->bytemode1, sizeflag);
2254
2255 obufp = op2out;
2256 op_ad = 1;
2257 if (dp->op2)
2258 (*dp->op2) (dp->bytemode2, sizeflag);
2259
2260 obufp = op3out;
2261 op_ad = 0;
2262 if (dp->op3)
2263 (*dp->op3) (dp->bytemode3, sizeflag);
2264 }
2265 }
2266
2267 /* See if any prefixes were not used. If so, print the first one
2268 separately. If we don't do this, we'll wind up printing an
2269 instruction stream which does not precisely correspond to the
2270 bytes we are disassembling. */
2271 if ((prefixes & ~used_prefixes) != 0)
2272 {
2273 const char *name;
2274
2275 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2276 if (name == NULL)
2277 name = INTERNAL_DISASSEMBLER_ERROR;
2278 (*info->fprintf_func) (info->stream, "%s", name);
2279 return 1;
2280 }
2281 if (rex & ~rex_used)
2282 {
2283 const char *name;
2284 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2285 if (name == NULL)
2286 name = INTERNAL_DISASSEMBLER_ERROR;
2287 (*info->fprintf_func) (info->stream, "%s ", name);
2288 }
2289
2290 obufp = obuf + strlen (obuf);
2291 for (i = strlen (obuf); i < 6; i++)
2292 oappend (" ");
2293 oappend (" ");
2294 (*info->fprintf_func) (info->stream, "%s", obuf);
2295
2296 /* The enter and bound instructions are printed with operands in the same
2297 order as the intel book; everything else is printed in reverse order. */
2298 if (intel_syntax || two_source_ops)
2299 {
2300 first = op1out;
2301 second = op2out;
2302 third = op3out;
2303 op_ad = op_index[0];
2304 op_index[0] = op_index[2];
2305 op_index[2] = op_ad;
2306 }
2307 else
2308 {
2309 first = op3out;
2310 second = op2out;
2311 third = op1out;
2312 }
2313 needcomma = 0;
2314 if (*first)
2315 {
2316 if (op_index[0] != -1 && !op_riprel[0])
2317 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2318 else
2319 (*info->fprintf_func) (info->stream, "%s", first);
2320 needcomma = 1;
2321 }
2322 if (*second)
2323 {
2324 if (needcomma)
2325 (*info->fprintf_func) (info->stream, ",");
2326 if (op_index[1] != -1 && !op_riprel[1])
2327 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2328 else
2329 (*info->fprintf_func) (info->stream, "%s", second);
2330 needcomma = 1;
2331 }
2332 if (*third)
2333 {
2334 if (needcomma)
2335 (*info->fprintf_func) (info->stream, ",");
2336 if (op_index[2] != -1 && !op_riprel[2])
2337 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2338 else
2339 (*info->fprintf_func) (info->stream, "%s", third);
2340 }
2341 for (i = 0; i < 3; i++)
2342 if (op_index[i] != -1 && op_riprel[i])
2343 {
2344 (*info->fprintf_func) (info->stream, " # ");
2345 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2346 + op_address[op_index[i]]), info);
2347 }
2348 return codep - priv.the_buffer;
2349 }
2350
2351 static const char *float_mem[] = {
2352 /* d8 */
2353 "fadd{s||s|}",
2354 "fmul{s||s|}",
2355 "fcom{s||s|}",
2356 "fcomp{s||s|}",
2357 "fsub{s||s|}",
2358 "fsubr{s||s|}",
2359 "fdiv{s||s|}",
2360 "fdivr{s||s|}",
2361 /* d9 */
2362 "fld{s||s|}",
2363 "(bad)",
2364 "fst{s||s|}",
2365 "fstp{s||s|}",
2366 "fldenvIC",
2367 "fldcw",
2368 "fNstenvIC",
2369 "fNstcw",
2370 /* da */
2371 "fiadd{l||l|}",
2372 "fimul{l||l|}",
2373 "ficom{l||l|}",
2374 "ficomp{l||l|}",
2375 "fisub{l||l|}",
2376 "fisubr{l||l|}",
2377 "fidiv{l||l|}",
2378 "fidivr{l||l|}",
2379 /* db */
2380 "fild{l||l|}",
2381 "fisttp{l||l|}",
2382 "fist{l||l|}",
2383 "fistp{l||l|}",
2384 "(bad)",
2385 "fld{t||t|}",
2386 "(bad)",
2387 "fstp{t||t|}",
2388 /* dc */
2389 "fadd{l||l|}",
2390 "fmul{l||l|}",
2391 "fcom{l||l|}",
2392 "fcomp{l||l|}",
2393 "fsub{l||l|}",
2394 "fsubr{l||l|}",
2395 "fdiv{l||l|}",
2396 "fdivr{l||l|}",
2397 /* dd */
2398 "fld{l||l|}",
2399 "fisttp{ll||ll|}",
2400 "fst{l||l|}",
2401 "fstp{l||l|}",
2402 "frstorIC",
2403 "(bad)",
2404 "fNsaveIC",
2405 "fNstsw",
2406 /* de */
2407 "fiadd",
2408 "fimul",
2409 "ficom",
2410 "ficomp",
2411 "fisub",
2412 "fisubr",
2413 "fidiv",
2414 "fidivr",
2415 /* df */
2416 "fild",
2417 "fisttp",
2418 "fist",
2419 "fistp",
2420 "fbld",
2421 "fild{ll||ll|}",
2422 "fbstp",
2423 "fistp{ll||ll|}",
2424 };
2425
2426 static const unsigned char float_mem_mode[] = {
2427 /* d8 */
2428 d_mode,
2429 d_mode,
2430 d_mode,
2431 d_mode,
2432 d_mode,
2433 d_mode,
2434 d_mode,
2435 d_mode,
2436 /* d9 */
2437 d_mode,
2438 0,
2439 d_mode,
2440 d_mode,
2441 0,
2442 w_mode,
2443 0,
2444 w_mode,
2445 /* da */
2446 d_mode,
2447 d_mode,
2448 d_mode,
2449 d_mode,
2450 d_mode,
2451 d_mode,
2452 d_mode,
2453 d_mode,
2454 /* db */
2455 d_mode,
2456 d_mode,
2457 d_mode,
2458 d_mode,
2459 0,
2460 t_mode,
2461 0,
2462 t_mode,
2463 /* dc */
2464 q_mode,
2465 q_mode,
2466 q_mode,
2467 q_mode,
2468 q_mode,
2469 q_mode,
2470 q_mode,
2471 q_mode,
2472 /* dd */
2473 q_mode,
2474 q_mode,
2475 q_mode,
2476 q_mode,
2477 0,
2478 0,
2479 0,
2480 w_mode,
2481 /* de */
2482 w_mode,
2483 w_mode,
2484 w_mode,
2485 w_mode,
2486 w_mode,
2487 w_mode,
2488 w_mode,
2489 w_mode,
2490 /* df */
2491 w_mode,
2492 w_mode,
2493 w_mode,
2494 w_mode,
2495 t_mode,
2496 q_mode,
2497 t_mode,
2498 q_mode
2499 };
2500
2501 #define ST OP_ST, 0
2502 #define STi OP_STi, 0
2503
2504 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2505 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2506 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2507 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2508 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2509 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2510 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2511 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2512 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2513
2514 static const struct dis386 float_reg[][8] = {
2515 /* d8 */
2516 {
2517 { "fadd", ST, STi, XX },
2518 { "fmul", ST, STi, XX },
2519 { "fcom", STi, XX, XX },
2520 { "fcomp", STi, XX, XX },
2521 { "fsub", ST, STi, XX },
2522 { "fsubr", ST, STi, XX },
2523 { "fdiv", ST, STi, XX },
2524 { "fdivr", ST, STi, XX },
2525 },
2526 /* d9 */
2527 {
2528 { "fld", STi, XX, XX },
2529 { "fxch", STi, XX, XX },
2530 { FGRPd9_2 },
2531 { "(bad)", XX, XX, XX },
2532 { FGRPd9_4 },
2533 { FGRPd9_5 },
2534 { FGRPd9_6 },
2535 { FGRPd9_7 },
2536 },
2537 /* da */
2538 {
2539 { "fcmovb", ST, STi, XX },
2540 { "fcmove", ST, STi, XX },
2541 { "fcmovbe",ST, STi, XX },
2542 { "fcmovu", ST, STi, XX },
2543 { "(bad)", XX, XX, XX },
2544 { FGRPda_5 },
2545 { "(bad)", XX, XX, XX },
2546 { "(bad)", XX, XX, XX },
2547 },
2548 /* db */
2549 {
2550 { "fcmovnb",ST, STi, XX },
2551 { "fcmovne",ST, STi, XX },
2552 { "fcmovnbe",ST, STi, XX },
2553 { "fcmovnu",ST, STi, XX },
2554 { FGRPdb_4 },
2555 { "fucomi", ST, STi, XX },
2556 { "fcomi", ST, STi, XX },
2557 { "(bad)", XX, XX, XX },
2558 },
2559 /* dc */
2560 {
2561 { "fadd", STi, ST, XX },
2562 { "fmul", STi, ST, XX },
2563 { "(bad)", XX, XX, XX },
2564 { "(bad)", XX, XX, XX },
2565 #if UNIXWARE_COMPAT
2566 { "fsub", STi, ST, XX },
2567 { "fsubr", STi, ST, XX },
2568 { "fdiv", STi, ST, XX },
2569 { "fdivr", STi, ST, XX },
2570 #else
2571 { "fsubr", STi, ST, XX },
2572 { "fsub", STi, ST, XX },
2573 { "fdivr", STi, ST, XX },
2574 { "fdiv", STi, ST, XX },
2575 #endif
2576 },
2577 /* dd */
2578 {
2579 { "ffree", STi, XX, XX },
2580 { "(bad)", XX, XX, XX },
2581 { "fst", STi, XX, XX },
2582 { "fstp", STi, XX, XX },
2583 { "fucom", STi, XX, XX },
2584 { "fucomp", STi, XX, XX },
2585 { "(bad)", XX, XX, XX },
2586 { "(bad)", XX, XX, XX },
2587 },
2588 /* de */
2589 {
2590 { "faddp", STi, ST, XX },
2591 { "fmulp", STi, ST, XX },
2592 { "(bad)", XX, XX, XX },
2593 { FGRPde_3 },
2594 #if UNIXWARE_COMPAT
2595 { "fsubp", STi, ST, XX },
2596 { "fsubrp", STi, ST, XX },
2597 { "fdivp", STi, ST, XX },
2598 { "fdivrp", STi, ST, XX },
2599 #else
2600 { "fsubrp", STi, ST, XX },
2601 { "fsubp", STi, ST, XX },
2602 { "fdivrp", STi, ST, XX },
2603 { "fdivp", STi, ST, XX },
2604 #endif
2605 },
2606 /* df */
2607 {
2608 { "ffreep", STi, XX, XX },
2609 { "(bad)", XX, XX, XX },
2610 { "(bad)", XX, XX, XX },
2611 { "(bad)", XX, XX, XX },
2612 { FGRPdf_4 },
2613 { "fucomip",ST, STi, XX },
2614 { "fcomip", ST, STi, XX },
2615 { "(bad)", XX, XX, XX },
2616 },
2617 };
2618
2619 static char *fgrps[][8] = {
2620 /* d9_2 0 */
2621 {
2622 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2623 },
2624
2625 /* d9_4 1 */
2626 {
2627 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2628 },
2629
2630 /* d9_5 2 */
2631 {
2632 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2633 },
2634
2635 /* d9_6 3 */
2636 {
2637 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2638 },
2639
2640 /* d9_7 4 */
2641 {
2642 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2643 },
2644
2645 /* da_5 5 */
2646 {
2647 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2648 },
2649
2650 /* db_4 6 */
2651 {
2652 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2653 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2654 },
2655
2656 /* de_3 7 */
2657 {
2658 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2659 },
2660
2661 /* df_4 8 */
2662 {
2663 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2664 },
2665 };
2666
2667 static void
2668 dofloat (int sizeflag)
2669 {
2670 const struct dis386 *dp;
2671 unsigned char floatop;
2672
2673 floatop = codep[-1];
2674
2675 if (mod != 3)
2676 {
2677 int fp_indx = (floatop - 0xd8) * 8 + reg;
2678
2679 putop (float_mem[fp_indx], sizeflag);
2680 obufp = op1out;
2681 OP_E (float_mem_mode[fp_indx], sizeflag);
2682 return;
2683 }
2684 /* Skip mod/rm byte. */
2685 MODRM_CHECK;
2686 codep++;
2687
2688 dp = &float_reg[floatop - 0xd8][reg];
2689 if (dp->name == NULL)
2690 {
2691 putop (fgrps[dp->bytemode1][rm], sizeflag);
2692
2693 /* Instruction fnstsw is only one with strange arg. */
2694 if (floatop == 0xdf && codep[-1] == 0xe0)
2695 strcpy (op1out, names16[0]);
2696 }
2697 else
2698 {
2699 putop (dp->name, sizeflag);
2700
2701 obufp = op1out;
2702 if (dp->op1)
2703 (*dp->op1) (dp->bytemode1, sizeflag);
2704 obufp = op2out;
2705 if (dp->op2)
2706 (*dp->op2) (dp->bytemode2, sizeflag);
2707 }
2708 }
2709
2710 static void
2711 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2712 {
2713 oappend ("%st");
2714 }
2715
2716 static void
2717 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2718 {
2719 sprintf (scratchbuf, "%%st(%d)", rm);
2720 oappend (scratchbuf + intel_syntax);
2721 }
2722
2723 /* Capital letters in template are macros. */
2724 static int
2725 putop (const char *template, int sizeflag)
2726 {
2727 const char *p;
2728 int alt = 0;
2729
2730 for (p = template; *p; p++)
2731 {
2732 switch (*p)
2733 {
2734 default:
2735 *obufp++ = *p;
2736 break;
2737 case '{':
2738 alt = 0;
2739 if (intel_syntax)
2740 alt += 1;
2741 if (mode_64bit)
2742 alt += 2;
2743 while (alt != 0)
2744 {
2745 while (*++p != '|')
2746 {
2747 if (*p == '}')
2748 {
2749 /* Alternative not valid. */
2750 strcpy (obuf, "(bad)");
2751 obufp = obuf + 5;
2752 return 1;
2753 }
2754 else if (*p == '\0')
2755 abort ();
2756 }
2757 alt--;
2758 }
2759 /* Fall through. */
2760 case 'I':
2761 alt = 1;
2762 continue;
2763 case '|':
2764 while (*++p != '}')
2765 {
2766 if (*p == '\0')
2767 abort ();
2768 }
2769 break;
2770 case '}':
2771 break;
2772 case 'A':
2773 if (intel_syntax)
2774 break;
2775 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2776 *obufp++ = 'b';
2777 break;
2778 case 'B':
2779 if (intel_syntax)
2780 break;
2781 if (sizeflag & SUFFIX_ALWAYS)
2782 *obufp++ = 'b';
2783 break;
2784 case 'C':
2785 if (intel_syntax && !alt)
2786 break;
2787 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2788 {
2789 if (sizeflag & DFLAG)
2790 *obufp++ = intel_syntax ? 'd' : 'l';
2791 else
2792 *obufp++ = intel_syntax ? 'w' : 's';
2793 used_prefixes |= (prefixes & PREFIX_DATA);
2794 }
2795 break;
2796 case 'E': /* For jcxz/jecxz */
2797 if (mode_64bit)
2798 {
2799 if (sizeflag & AFLAG)
2800 *obufp++ = 'r';
2801 else
2802 *obufp++ = 'e';
2803 }
2804 else
2805 if (sizeflag & AFLAG)
2806 *obufp++ = 'e';
2807 used_prefixes |= (prefixes & PREFIX_ADDR);
2808 break;
2809 case 'F':
2810 if (intel_syntax)
2811 break;
2812 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2813 {
2814 if (sizeflag & AFLAG)
2815 *obufp++ = mode_64bit ? 'q' : 'l';
2816 else
2817 *obufp++ = mode_64bit ? 'l' : 'w';
2818 used_prefixes |= (prefixes & PREFIX_ADDR);
2819 }
2820 break;
2821 case 'H':
2822 if (intel_syntax)
2823 break;
2824 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2825 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2826 {
2827 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2828 *obufp++ = ',';
2829 *obufp++ = 'p';
2830 if (prefixes & PREFIX_DS)
2831 *obufp++ = 't';
2832 else
2833 *obufp++ = 'n';
2834 }
2835 break;
2836 case 'J':
2837 if (intel_syntax)
2838 break;
2839 *obufp++ = 'l';
2840 break;
2841 case 'L':
2842 if (intel_syntax)
2843 break;
2844 if (sizeflag & SUFFIX_ALWAYS)
2845 *obufp++ = 'l';
2846 break;
2847 case 'N':
2848 if ((prefixes & PREFIX_FWAIT) == 0)
2849 *obufp++ = 'n';
2850 else
2851 used_prefixes |= PREFIX_FWAIT;
2852 break;
2853 case 'O':
2854 USED_REX (REX_MODE64);
2855 if (rex & REX_MODE64)
2856 *obufp++ = 'o';
2857 else
2858 *obufp++ = 'd';
2859 break;
2860 case 'T':
2861 if (intel_syntax)
2862 break;
2863 if (mode_64bit)
2864 {
2865 *obufp++ = 'q';
2866 break;
2867 }
2868 /* Fall through. */
2869 case 'P':
2870 if (intel_syntax)
2871 break;
2872 if ((prefixes & PREFIX_DATA)
2873 || (rex & REX_MODE64)
2874 || (sizeflag & SUFFIX_ALWAYS))
2875 {
2876 USED_REX (REX_MODE64);
2877 if (rex & REX_MODE64)
2878 *obufp++ = 'q';
2879 else
2880 {
2881 if (sizeflag & DFLAG)
2882 *obufp++ = 'l';
2883 else
2884 *obufp++ = 'w';
2885 used_prefixes |= (prefixes & PREFIX_DATA);
2886 }
2887 }
2888 break;
2889 case 'U':
2890 if (intel_syntax)
2891 break;
2892 if (mode_64bit)
2893 {
2894 *obufp++ = 'q';
2895 break;
2896 }
2897 /* Fall through. */
2898 case 'Q':
2899 if (intel_syntax && !alt)
2900 break;
2901 USED_REX (REX_MODE64);
2902 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2903 {
2904 if (rex & REX_MODE64)
2905 *obufp++ = 'q';
2906 else
2907 {
2908 if (sizeflag & DFLAG)
2909 *obufp++ = intel_syntax ? 'd' : 'l';
2910 else
2911 *obufp++ = 'w';
2912 used_prefixes |= (prefixes & PREFIX_DATA);
2913 }
2914 }
2915 break;
2916 case 'R':
2917 USED_REX (REX_MODE64);
2918 if (intel_syntax)
2919 {
2920 if (rex & REX_MODE64)
2921 {
2922 *obufp++ = 'q';
2923 *obufp++ = 't';
2924 }
2925 else if (sizeflag & DFLAG)
2926 {
2927 *obufp++ = 'd';
2928 *obufp++ = 'q';
2929 }
2930 else
2931 {
2932 *obufp++ = 'w';
2933 *obufp++ = 'd';
2934 }
2935 }
2936 else
2937 {
2938 if (rex & REX_MODE64)
2939 *obufp++ = 'q';
2940 else if (sizeflag & DFLAG)
2941 *obufp++ = 'l';
2942 else
2943 *obufp++ = 'w';
2944 }
2945 if (!(rex & REX_MODE64))
2946 used_prefixes |= (prefixes & PREFIX_DATA);
2947 break;
2948 case 'S':
2949 if (intel_syntax)
2950 break;
2951 if (sizeflag & SUFFIX_ALWAYS)
2952 {
2953 if (rex & REX_MODE64)
2954 *obufp++ = 'q';
2955 else
2956 {
2957 if (sizeflag & DFLAG)
2958 *obufp++ = 'l';
2959 else
2960 *obufp++ = 'w';
2961 used_prefixes |= (prefixes & PREFIX_DATA);
2962 }
2963 }
2964 break;
2965 case 'X':
2966 if (prefixes & PREFIX_DATA)
2967 *obufp++ = 'd';
2968 else
2969 *obufp++ = 's';
2970 used_prefixes |= (prefixes & PREFIX_DATA);
2971 break;
2972 case 'Y':
2973 if (intel_syntax)
2974 break;
2975 if (rex & REX_MODE64)
2976 {
2977 USED_REX (REX_MODE64);
2978 *obufp++ = 'q';
2979 }
2980 break;
2981 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2982 case 'W':
2983 /* operand size flag for cwtl, cbtw */
2984 USED_REX (0);
2985 if (rex)
2986 *obufp++ = 'l';
2987 else if (sizeflag & DFLAG)
2988 *obufp++ = 'w';
2989 else
2990 *obufp++ = 'b';
2991 if (intel_syntax)
2992 {
2993 if (rex)
2994 {
2995 *obufp++ = 'q';
2996 *obufp++ = 'e';
2997 }
2998 if (sizeflag & DFLAG)
2999 {
3000 *obufp++ = 'd';
3001 *obufp++ = 'e';
3002 }
3003 else
3004 {
3005 *obufp++ = 'w';
3006 }
3007 }
3008 if (!rex)
3009 used_prefixes |= (prefixes & PREFIX_DATA);
3010 break;
3011 }
3012 alt = 0;
3013 }
3014 *obufp = 0;
3015 return 0;
3016 }
3017
3018 static void
3019 oappend (const char *s)
3020 {
3021 strcpy (obufp, s);
3022 obufp += strlen (s);
3023 }
3024
3025 static void
3026 append_seg (void)
3027 {
3028 if (prefixes & PREFIX_CS)
3029 {
3030 used_prefixes |= PREFIX_CS;
3031 oappend ("%cs:" + intel_syntax);
3032 }
3033 if (prefixes & PREFIX_DS)
3034 {
3035 used_prefixes |= PREFIX_DS;
3036 oappend ("%ds:" + intel_syntax);
3037 }
3038 if (prefixes & PREFIX_SS)
3039 {
3040 used_prefixes |= PREFIX_SS;
3041 oappend ("%ss:" + intel_syntax);
3042 }
3043 if (prefixes & PREFIX_ES)
3044 {
3045 used_prefixes |= PREFIX_ES;
3046 oappend ("%es:" + intel_syntax);
3047 }
3048 if (prefixes & PREFIX_FS)
3049 {
3050 used_prefixes |= PREFIX_FS;
3051 oappend ("%fs:" + intel_syntax);
3052 }
3053 if (prefixes & PREFIX_GS)
3054 {
3055 used_prefixes |= PREFIX_GS;
3056 oappend ("%gs:" + intel_syntax);
3057 }
3058 }
3059
3060 static void
3061 OP_indirE (int bytemode, int sizeflag)
3062 {
3063 if (!intel_syntax)
3064 oappend ("*");
3065 OP_E (bytemode, sizeflag);
3066 }
3067
3068 static void
3069 print_operand_value (char *buf, int hex, bfd_vma disp)
3070 {
3071 if (mode_64bit)
3072 {
3073 if (hex)
3074 {
3075 char tmp[30];
3076 int i;
3077 buf[0] = '0';
3078 buf[1] = 'x';
3079 sprintf_vma (tmp, disp);
3080 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3081 strcpy (buf + 2, tmp + i);
3082 }
3083 else
3084 {
3085 bfd_signed_vma v = disp;
3086 char tmp[30];
3087 int i;
3088 if (v < 0)
3089 {
3090 *(buf++) = '-';
3091 v = -disp;
3092 /* Check for possible overflow on 0x8000000000000000. */
3093 if (v < 0)
3094 {
3095 strcpy (buf, "9223372036854775808");
3096 return;
3097 }
3098 }
3099 if (!v)
3100 {
3101 strcpy (buf, "0");
3102 return;
3103 }
3104
3105 i = 0;
3106 tmp[29] = 0;
3107 while (v)
3108 {
3109 tmp[28 - i] = (v % 10) + '0';
3110 v /= 10;
3111 i++;
3112 }
3113 strcpy (buf, tmp + 29 - i);
3114 }
3115 }
3116 else
3117 {
3118 if (hex)
3119 sprintf (buf, "0x%x", (unsigned int) disp);
3120 else
3121 sprintf (buf, "%d", (int) disp);
3122 }
3123 }
3124
3125 static void
3126 intel_operand_size (int bytemode, int sizeflag)
3127 {
3128 switch (bytemode)
3129 {
3130 case b_mode:
3131 oappend ("BYTE PTR ");
3132 break;
3133 case w_mode:
3134 case dqw_mode:
3135 oappend ("WORD PTR ");
3136 break;
3137 case branch_v_mode:
3138 if (mode_64bit && (sizeflag & DFLAG))
3139 {
3140 oappend ("QWORD PTR ");
3141 used_prefixes |= (prefixes & PREFIX_DATA);
3142 break;
3143 }
3144 /* FALLTHRU */
3145 case v_mode:
3146 case dq_mode:
3147 USED_REX (REX_MODE64);
3148 if (rex & REX_MODE64)
3149 oappend ("QWORD PTR ");
3150 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3151 oappend ("DWORD PTR ");
3152 else
3153 oappend ("WORD PTR ");
3154 used_prefixes |= (prefixes & PREFIX_DATA);
3155 break;
3156 case d_mode:
3157 oappend ("DWORD PTR ");
3158 break;
3159 case q_mode:
3160 oappend ("QWORD PTR ");
3161 break;
3162 case m_mode:
3163 if (mode_64bit)
3164 oappend ("QWORD PTR ");
3165 else
3166 oappend ("DWORD PTR ");
3167 break;
3168 case f_mode:
3169 if (sizeflag & DFLAG)
3170 oappend ("FWORD PTR ");
3171 else
3172 oappend ("DWORD PTR ");
3173 used_prefixes |= (prefixes & PREFIX_DATA);
3174 break;
3175 case t_mode:
3176 oappend ("TBYTE PTR ");
3177 break;
3178 case x_mode:
3179 oappend ("XMMWORD PTR ");
3180 break;
3181 default:
3182 break;
3183 }
3184 }
3185
3186 static void
3187 OP_E (int bytemode, int sizeflag)
3188 {
3189 bfd_vma disp;
3190 int add = 0;
3191 int riprel = 0;
3192 USED_REX (REX_EXTZ);
3193 if (rex & REX_EXTZ)
3194 add += 8;
3195
3196 /* Skip mod/rm byte. */
3197 MODRM_CHECK;
3198 codep++;
3199
3200 if (mod == 3)
3201 {
3202 switch (bytemode)
3203 {
3204 case b_mode:
3205 USED_REX (0);
3206 if (rex)
3207 oappend (names8rex[rm + add]);
3208 else
3209 oappend (names8[rm + add]);
3210 break;
3211 case w_mode:
3212 oappend (names16[rm + add]);
3213 break;
3214 case d_mode:
3215 oappend (names32[rm + add]);
3216 break;
3217 case q_mode:
3218 oappend (names64[rm + add]);
3219 break;
3220 case m_mode:
3221 if (mode_64bit)
3222 oappend (names64[rm + add]);
3223 else
3224 oappend (names32[rm + add]);
3225 break;
3226 case branch_v_mode:
3227 if (mode_64bit)
3228 oappend (names64[rm + add]);
3229 else
3230 {
3231 if ((sizeflag & DFLAG) || bytemode != branch_v_mode)
3232 oappend (names32[rm + add]);
3233 else
3234 oappend (names16[rm + add]);
3235 used_prefixes |= (prefixes & PREFIX_DATA);
3236 }
3237 break;
3238 case v_mode:
3239 case dq_mode:
3240 case dqw_mode:
3241 USED_REX (REX_MODE64);
3242 if (rex & REX_MODE64)
3243 oappend (names64[rm + add]);
3244 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3245 oappend (names32[rm + add]);
3246 else
3247 oappend (names16[rm + add]);
3248 used_prefixes |= (prefixes & PREFIX_DATA);
3249 break;
3250 case 0:
3251 break;
3252 default:
3253 oappend (INTERNAL_DISASSEMBLER_ERROR);
3254 break;
3255 }
3256 return;
3257 }
3258
3259 disp = 0;
3260 if (intel_syntax)
3261 intel_operand_size (bytemode, sizeflag);
3262 append_seg ();
3263
3264 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3265 {
3266 int havesib;
3267 int havebase;
3268 int base;
3269 int index = 0;
3270 int scale = 0;
3271
3272 havesib = 0;
3273 havebase = 1;
3274 base = rm;
3275
3276 if (base == 4)
3277 {
3278 havesib = 1;
3279 FETCH_DATA (the_info, codep + 1);
3280 index = (*codep >> 3) & 7;
3281 if (mode_64bit || index != 0x4)
3282 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3283 scale = (*codep >> 6) & 3;
3284 base = *codep & 7;
3285 USED_REX (REX_EXTY);
3286 if (rex & REX_EXTY)
3287 index += 8;
3288 codep++;
3289 }
3290 base += add;
3291
3292 switch (mod)
3293 {
3294 case 0:
3295 if ((base & 7) == 5)
3296 {
3297 havebase = 0;
3298 if (mode_64bit && !havesib)
3299 riprel = 1;
3300 disp = get32s ();
3301 }
3302 break;
3303 case 1:
3304 FETCH_DATA (the_info, codep + 1);
3305 disp = *codep++;
3306 if ((disp & 0x80) != 0)
3307 disp -= 0x100;
3308 break;
3309 case 2:
3310 disp = get32s ();
3311 break;
3312 }
3313
3314 if (!intel_syntax)
3315 if (mod != 0 || (base & 7) == 5)
3316 {
3317 print_operand_value (scratchbuf, !riprel, disp);
3318 oappend (scratchbuf);
3319 if (riprel)
3320 {
3321 set_op (disp, 1);
3322 oappend ("(%rip)");
3323 }
3324 }
3325
3326 if (havebase || (havesib && (index != 4 || scale != 0)))
3327 {
3328 *obufp++ = open_char;
3329 if (intel_syntax && riprel)
3330 oappend ("rip + ");
3331 *obufp = '\0';
3332 if (havebase)
3333 oappend (mode_64bit && (sizeflag & AFLAG)
3334 ? names64[base] : names32[base]);
3335 if (havesib)
3336 {
3337 if (index != 4)
3338 {
3339 if (!intel_syntax || havebase)
3340 {
3341 *obufp++ = separator_char;
3342 *obufp = '\0';
3343 }
3344 oappend (mode_64bit && (sizeflag & AFLAG)
3345 ? names64[index] : names32[index]);
3346 }
3347 if (scale != 0 || (!intel_syntax && index != 4))
3348 {
3349 *obufp++ = scale_char;
3350 *obufp = '\0';
3351 sprintf (scratchbuf, "%d", 1 << scale);
3352 oappend (scratchbuf);
3353 }
3354 }
3355 if (intel_syntax && disp)
3356 {
3357 if ((bfd_signed_vma) disp > 0)
3358 {
3359 *obufp++ = '+';
3360 *obufp = '\0';
3361 }
3362 else if (mod != 1)
3363 {
3364 *obufp++ = '-';
3365 *obufp = '\0';
3366 disp = - (bfd_signed_vma) disp;
3367 }
3368
3369 print_operand_value (scratchbuf, mod != 1, disp);
3370 oappend (scratchbuf);
3371 }
3372
3373 *obufp++ = close_char;
3374 *obufp = '\0';
3375 }
3376 else if (intel_syntax)
3377 {
3378 if (mod != 0 || (base & 7) == 5)
3379 {
3380 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3381 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3382 ;
3383 else
3384 {
3385 oappend (names_seg[ds_reg - es_reg]);
3386 oappend (":");
3387 }
3388 print_operand_value (scratchbuf, 1, disp);
3389 oappend (scratchbuf);
3390 }
3391 }
3392 }
3393 else
3394 { /* 16 bit address mode */
3395 switch (mod)
3396 {
3397 case 0:
3398 if (rm == 6)
3399 {
3400 disp = get16 ();
3401 if ((disp & 0x8000) != 0)
3402 disp -= 0x10000;
3403 }
3404 break;
3405 case 1:
3406 FETCH_DATA (the_info, codep + 1);
3407 disp = *codep++;
3408 if ((disp & 0x80) != 0)
3409 disp -= 0x100;
3410 break;
3411 case 2:
3412 disp = get16 ();
3413 if ((disp & 0x8000) != 0)
3414 disp -= 0x10000;
3415 break;
3416 }
3417
3418 if (!intel_syntax)
3419 if (mod != 0 || rm == 6)
3420 {
3421 print_operand_value (scratchbuf, 0, disp);
3422 oappend (scratchbuf);
3423 }
3424
3425 if (mod != 0 || rm != 6)
3426 {
3427 *obufp++ = open_char;
3428 *obufp = '\0';
3429 oappend (index16[rm]);
3430 if (intel_syntax && disp)
3431 {
3432 if ((bfd_signed_vma) disp > 0)
3433 {
3434 *obufp++ = '+';
3435 *obufp = '\0';
3436 }
3437 else if (mod != 1)
3438 {
3439 *obufp++ = '-';
3440 *obufp = '\0';
3441 disp = - (bfd_signed_vma) disp;
3442 }
3443
3444 print_operand_value (scratchbuf, mod != 1, disp);
3445 oappend (scratchbuf);
3446 }
3447
3448 *obufp++ = close_char;
3449 *obufp = '\0';
3450 }
3451 else if (intel_syntax)
3452 {
3453 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3454 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3455 ;
3456 else
3457 {
3458 oappend (names_seg[ds_reg - es_reg]);
3459 oappend (":");
3460 }
3461 print_operand_value (scratchbuf, 1, disp & 0xffff);
3462 oappend (scratchbuf);
3463 }
3464 }
3465 }
3466
3467 static void
3468 OP_G (int bytemode, int sizeflag)
3469 {
3470 int add = 0;
3471 USED_REX (REX_EXTX);
3472 if (rex & REX_EXTX)
3473 add += 8;
3474 switch (bytemode)
3475 {
3476 case b_mode:
3477 USED_REX (0);
3478 if (rex)
3479 oappend (names8rex[reg + add]);
3480 else
3481 oappend (names8[reg + add]);
3482 break;
3483 case w_mode:
3484 oappend (names16[reg + add]);
3485 break;
3486 case d_mode:
3487 oappend (names32[reg + add]);
3488 break;
3489 case q_mode:
3490 oappend (names64[reg + add]);
3491 break;
3492 case v_mode:
3493 case dq_mode:
3494 case dqw_mode:
3495 USED_REX (REX_MODE64);
3496 if (rex & REX_MODE64)
3497 oappend (names64[reg + add]);
3498 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3499 oappend (names32[reg + add]);
3500 else
3501 oappend (names16[reg + add]);
3502 used_prefixes |= (prefixes & PREFIX_DATA);
3503 break;
3504 case m_mode:
3505 if (mode_64bit)
3506 oappend (names64[reg + add]);
3507 else
3508 oappend (names32[reg + add]);
3509 break;
3510 default:
3511 oappend (INTERNAL_DISASSEMBLER_ERROR);
3512 break;
3513 }
3514 }
3515
3516 static bfd_vma
3517 get64 (void)
3518 {
3519 bfd_vma x;
3520 #ifdef BFD64
3521 unsigned int a;
3522 unsigned int b;
3523
3524 FETCH_DATA (the_info, codep + 8);
3525 a = *codep++ & 0xff;
3526 a |= (*codep++ & 0xff) << 8;
3527 a |= (*codep++ & 0xff) << 16;
3528 a |= (*codep++ & 0xff) << 24;
3529 b = *codep++ & 0xff;
3530 b |= (*codep++ & 0xff) << 8;
3531 b |= (*codep++ & 0xff) << 16;
3532 b |= (*codep++ & 0xff) << 24;
3533 x = a + ((bfd_vma) b << 32);
3534 #else
3535 abort ();
3536 x = 0;
3537 #endif
3538 return x;
3539 }
3540
3541 static bfd_signed_vma
3542 get32 (void)
3543 {
3544 bfd_signed_vma x = 0;
3545
3546 FETCH_DATA (the_info, codep + 4);
3547 x = *codep++ & (bfd_signed_vma) 0xff;
3548 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3549 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3550 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3551 return x;
3552 }
3553
3554 static bfd_signed_vma
3555 get32s (void)
3556 {
3557 bfd_signed_vma x = 0;
3558
3559 FETCH_DATA (the_info, codep + 4);
3560 x = *codep++ & (bfd_signed_vma) 0xff;
3561 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3562 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3563 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3564
3565 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3566
3567 return x;
3568 }
3569
3570 static int
3571 get16 (void)
3572 {
3573 int x = 0;
3574
3575 FETCH_DATA (the_info, codep + 2);
3576 x = *codep++ & 0xff;
3577 x |= (*codep++ & 0xff) << 8;
3578 return x;
3579 }
3580
3581 static void
3582 set_op (bfd_vma op, int riprel)
3583 {
3584 op_index[op_ad] = op_ad;
3585 if (mode_64bit)
3586 {
3587 op_address[op_ad] = op;
3588 op_riprel[op_ad] = riprel;
3589 }
3590 else
3591 {
3592 /* Mask to get a 32-bit address. */
3593 op_address[op_ad] = op & 0xffffffff;
3594 op_riprel[op_ad] = riprel & 0xffffffff;
3595 }
3596 }
3597
3598 static void
3599 OP_REG (int code, int sizeflag)
3600 {
3601 const char *s;
3602 int add = 0;
3603 USED_REX (REX_EXTZ);
3604 if (rex & REX_EXTZ)
3605 add = 8;
3606
3607 switch (code)
3608 {
3609 case indir_dx_reg:
3610 if (intel_syntax)
3611 s = "[dx]";
3612 else
3613 s = "(%dx)";
3614 break;
3615 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3616 case sp_reg: case bp_reg: case si_reg: case di_reg:
3617 s = names16[code - ax_reg + add];
3618 break;
3619 case es_reg: case ss_reg: case cs_reg:
3620 case ds_reg: case fs_reg: case gs_reg:
3621 s = names_seg[code - es_reg + add];
3622 break;
3623 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3624 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3625 USED_REX (0);
3626 if (rex)
3627 s = names8rex[code - al_reg + add];
3628 else
3629 s = names8[code - al_reg];
3630 break;
3631 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3632 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3633 if (mode_64bit)
3634 {
3635 s = names64[code - rAX_reg + add];
3636 break;
3637 }
3638 code += eAX_reg - rAX_reg;
3639 /* Fall through. */
3640 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3641 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3642 USED_REX (REX_MODE64);
3643 if (rex & REX_MODE64)
3644 s = names64[code - eAX_reg + add];
3645 else if (sizeflag & DFLAG)
3646 s = names32[code - eAX_reg + add];
3647 else
3648 s = names16[code - eAX_reg + add];
3649 used_prefixes |= (prefixes & PREFIX_DATA);
3650 break;
3651 default:
3652 s = INTERNAL_DISASSEMBLER_ERROR;
3653 break;
3654 }
3655 oappend (s);
3656 }
3657
3658 static void
3659 OP_IMREG (int code, int sizeflag)
3660 {
3661 const char *s;
3662
3663 switch (code)
3664 {
3665 case indir_dx_reg:
3666 if (intel_syntax)
3667 s = "[dx]";
3668 else
3669 s = "(%dx)";
3670 break;
3671 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3672 case sp_reg: case bp_reg: case si_reg: case di_reg:
3673 s = names16[code - ax_reg];
3674 break;
3675 case es_reg: case ss_reg: case cs_reg:
3676 case ds_reg: case fs_reg: case gs_reg:
3677 s = names_seg[code - es_reg];
3678 break;
3679 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3680 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3681 USED_REX (0);
3682 if (rex)
3683 s = names8rex[code - al_reg];
3684 else
3685 s = names8[code - al_reg];
3686 break;
3687 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3688 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3689 USED_REX (REX_MODE64);
3690 if (rex & REX_MODE64)
3691 s = names64[code - eAX_reg];
3692 else if (sizeflag & DFLAG)
3693 s = names32[code - eAX_reg];
3694 else
3695 s = names16[code - eAX_reg];
3696 used_prefixes |= (prefixes & PREFIX_DATA);
3697 break;
3698 default:
3699 s = INTERNAL_DISASSEMBLER_ERROR;
3700 break;
3701 }
3702 oappend (s);
3703 }
3704
3705 static void
3706 OP_I (int bytemode, int sizeflag)
3707 {
3708 bfd_signed_vma op;
3709 bfd_signed_vma mask = -1;
3710
3711 switch (bytemode)
3712 {
3713 case b_mode:
3714 FETCH_DATA (the_info, codep + 1);
3715 op = *codep++;
3716 mask = 0xff;
3717 break;
3718 case q_mode:
3719 if (mode_64bit)
3720 {
3721 op = get32s ();
3722 break;
3723 }
3724 /* Fall through. */
3725 case v_mode:
3726 USED_REX (REX_MODE64);
3727 if (rex & REX_MODE64)
3728 op = get32s ();
3729 else if (sizeflag & DFLAG)
3730 {
3731 op = get32 ();
3732 mask = 0xffffffff;
3733 }
3734 else
3735 {
3736 op = get16 ();
3737 mask = 0xfffff;
3738 }
3739 used_prefixes |= (prefixes & PREFIX_DATA);
3740 break;
3741 case w_mode:
3742 mask = 0xfffff;
3743 op = get16 ();
3744 break;
3745 case const_1_mode:
3746 if (intel_syntax)
3747 oappend ("1");
3748 return;
3749 default:
3750 oappend (INTERNAL_DISASSEMBLER_ERROR);
3751 return;
3752 }
3753
3754 op &= mask;
3755 scratchbuf[0] = '$';
3756 print_operand_value (scratchbuf + 1, 1, op);
3757 oappend (scratchbuf + intel_syntax);
3758 scratchbuf[0] = '\0';
3759 }
3760
3761 static void
3762 OP_I64 (int bytemode, int sizeflag)
3763 {
3764 bfd_signed_vma op;
3765 bfd_signed_vma mask = -1;
3766
3767 if (!mode_64bit)
3768 {
3769 OP_I (bytemode, sizeflag);
3770 return;
3771 }
3772
3773 switch (bytemode)
3774 {
3775 case b_mode:
3776 FETCH_DATA (the_info, codep + 1);
3777 op = *codep++;
3778 mask = 0xff;
3779 break;
3780 case v_mode:
3781 USED_REX (REX_MODE64);
3782 if (rex & REX_MODE64)
3783 op = get64 ();
3784 else if (sizeflag & DFLAG)
3785 {
3786 op = get32 ();
3787 mask = 0xffffffff;
3788 }
3789 else
3790 {
3791 op = get16 ();
3792 mask = 0xfffff;
3793 }
3794 used_prefixes |= (prefixes & PREFIX_DATA);
3795 break;
3796 case w_mode:
3797 mask = 0xfffff;
3798 op = get16 ();
3799 break;
3800 default:
3801 oappend (INTERNAL_DISASSEMBLER_ERROR);
3802 return;
3803 }
3804
3805 op &= mask;
3806 scratchbuf[0] = '$';
3807 print_operand_value (scratchbuf + 1, 1, op);
3808 oappend (scratchbuf + intel_syntax);
3809 scratchbuf[0] = '\0';
3810 }
3811
3812 static void
3813 OP_sI (int bytemode, int sizeflag)
3814 {
3815 bfd_signed_vma op;
3816 bfd_signed_vma mask = -1;
3817
3818 switch (bytemode)
3819 {
3820 case b_mode:
3821 FETCH_DATA (the_info, codep + 1);
3822 op = *codep++;
3823 if ((op & 0x80) != 0)
3824 op -= 0x100;
3825 mask = 0xffffffff;
3826 break;
3827 case v_mode:
3828 USED_REX (REX_MODE64);
3829 if (rex & REX_MODE64)
3830 op = get32s ();
3831 else if (sizeflag & DFLAG)
3832 {
3833 op = get32s ();
3834 mask = 0xffffffff;
3835 }
3836 else
3837 {
3838 mask = 0xffffffff;
3839 op = get16 ();
3840 if ((op & 0x8000) != 0)
3841 op -= 0x10000;
3842 }
3843 used_prefixes |= (prefixes & PREFIX_DATA);
3844 break;
3845 case w_mode:
3846 op = get16 ();
3847 mask = 0xffffffff;
3848 if ((op & 0x8000) != 0)
3849 op -= 0x10000;
3850 break;
3851 default:
3852 oappend (INTERNAL_DISASSEMBLER_ERROR);
3853 return;
3854 }
3855
3856 scratchbuf[0] = '$';
3857 print_operand_value (scratchbuf + 1, 1, op);
3858 oappend (scratchbuf + intel_syntax);
3859 }
3860
3861 static void
3862 OP_J (int bytemode, int sizeflag)
3863 {
3864 bfd_vma disp;
3865 bfd_vma mask = -1;
3866
3867 switch (bytemode)
3868 {
3869 case b_mode:
3870 FETCH_DATA (the_info, codep + 1);
3871 disp = *codep++;
3872 if ((disp & 0x80) != 0)
3873 disp -= 0x100;
3874 break;
3875 case v_mode:
3876 if (sizeflag & DFLAG)
3877 disp = get32s ();
3878 else
3879 {
3880 disp = get16 ();
3881 /* For some reason, a data16 prefix on a jump instruction
3882 means that the pc is masked to 16 bits after the
3883 displacement is added! */
3884 mask = 0xffff;
3885 }
3886 break;
3887 default:
3888 oappend (INTERNAL_DISASSEMBLER_ERROR);
3889 return;
3890 }
3891 disp = (start_pc + codep - start_codep + disp) & mask;
3892 set_op (disp, 0);
3893 print_operand_value (scratchbuf, 1, disp);
3894 oappend (scratchbuf);
3895 }
3896
3897 static void
3898 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3899 {
3900 oappend (names_seg[reg]);
3901 }
3902
3903 static void
3904 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3905 {
3906 int seg, offset;
3907
3908 if (sizeflag & DFLAG)
3909 {
3910 offset = get32 ();
3911 seg = get16 ();
3912 }
3913 else
3914 {
3915 offset = get16 ();
3916 seg = get16 ();
3917 }
3918 used_prefixes |= (prefixes & PREFIX_DATA);
3919 if (intel_syntax)
3920 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
3921 else
3922 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3923 oappend (scratchbuf);
3924 }
3925
3926 static void
3927 OP_OFF (int bytemode, int sizeflag)
3928 {
3929 bfd_vma off;
3930
3931 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
3932 intel_operand_size (bytemode, sizeflag);
3933 append_seg ();
3934
3935 if ((sizeflag & AFLAG) || mode_64bit)
3936 off = get32 ();
3937 else
3938 off = get16 ();
3939
3940 if (intel_syntax)
3941 {
3942 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3943 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3944 {
3945 oappend (names_seg[ds_reg - es_reg]);
3946 oappend (":");
3947 }
3948 }
3949 print_operand_value (scratchbuf, 1, off);
3950 oappend (scratchbuf);
3951 }
3952
3953 static void
3954 OP_OFF64 (int bytemode, int sizeflag)
3955 {
3956 bfd_vma off;
3957
3958 if (!mode_64bit)
3959 {
3960 OP_OFF (bytemode, sizeflag);
3961 return;
3962 }
3963
3964 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
3965 intel_operand_size (bytemode, sizeflag);
3966 append_seg ();
3967
3968 off = get64 ();
3969
3970 if (intel_syntax)
3971 {
3972 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3973 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3974 {
3975 oappend (names_seg[ds_reg - es_reg]);
3976 oappend (":");
3977 }
3978 }
3979 print_operand_value (scratchbuf, 1, off);
3980 oappend (scratchbuf);
3981 }
3982
3983 static void
3984 ptr_reg (int code, int sizeflag)
3985 {
3986 const char *s;
3987
3988 *obufp++ = open_char;
3989 used_prefixes |= (prefixes & PREFIX_ADDR);
3990 if (mode_64bit)
3991 {
3992 if (!(sizeflag & AFLAG))
3993 s = names32[code - eAX_reg];
3994 else
3995 s = names64[code - eAX_reg];
3996 }
3997 else if (sizeflag & AFLAG)
3998 s = names32[code - eAX_reg];
3999 else
4000 s = names16[code - eAX_reg];
4001 oappend (s);
4002 *obufp++ = close_char;
4003 *obufp = 0;
4004 }
4005
4006 static void
4007 OP_ESreg (int code, int sizeflag)
4008 {
4009 if (intel_syntax)
4010 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
4011 oappend ("%es:" + intel_syntax);
4012 ptr_reg (code, sizeflag);
4013 }
4014
4015 static void
4016 OP_DSreg (int code, int sizeflag)
4017 {
4018 if (intel_syntax)
4019 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4020 ? v_mode
4021 : b_mode,
4022 sizeflag);
4023 if ((prefixes
4024 & (PREFIX_CS
4025 | PREFIX_DS
4026 | PREFIX_SS
4027 | PREFIX_ES
4028 | PREFIX_FS
4029 | PREFIX_GS)) == 0)
4030 prefixes |= PREFIX_DS;
4031 append_seg ();
4032 ptr_reg (code, sizeflag);
4033 }
4034
4035 static void
4036 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4037 {
4038 int add = 0;
4039 if (rex & REX_EXTX)
4040 {
4041 USED_REX (REX_EXTX);
4042 add = 8;
4043 }
4044 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4045 {
4046 used_prefixes |= PREFIX_LOCK;
4047 add = 8;
4048 }
4049 sprintf (scratchbuf, "%%cr%d", reg + add);
4050 oappend (scratchbuf + intel_syntax);
4051 }
4052
4053 static void
4054 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4055 {
4056 int add = 0;
4057 USED_REX (REX_EXTX);
4058 if (rex & REX_EXTX)
4059 add = 8;
4060 if (intel_syntax)
4061 sprintf (scratchbuf, "db%d", reg + add);
4062 else
4063 sprintf (scratchbuf, "%%db%d", reg + add);
4064 oappend (scratchbuf);
4065 }
4066
4067 static void
4068 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4069 {
4070 sprintf (scratchbuf, "%%tr%d", reg);
4071 oappend (scratchbuf + intel_syntax);
4072 }
4073
4074 static void
4075 OP_Rd (int bytemode, int sizeflag)
4076 {
4077 if (mod == 3)
4078 OP_E (bytemode, sizeflag);
4079 else
4080 BadOp ();
4081 }
4082
4083 static void
4084 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4085 {
4086 used_prefixes |= (prefixes & PREFIX_DATA);
4087 if (prefixes & PREFIX_DATA)
4088 {
4089 int add = 0;
4090 USED_REX (REX_EXTX);
4091 if (rex & REX_EXTX)
4092 add = 8;
4093 sprintf (scratchbuf, "%%xmm%d", reg + add);
4094 }
4095 else
4096 sprintf (scratchbuf, "%%mm%d", reg);
4097 oappend (scratchbuf + intel_syntax);
4098 }
4099
4100 static void
4101 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4102 {
4103 int add = 0;
4104 USED_REX (REX_EXTX);
4105 if (rex & REX_EXTX)
4106 add = 8;
4107 sprintf (scratchbuf, "%%xmm%d", reg + add);
4108 oappend (scratchbuf + intel_syntax);
4109 }
4110
4111 static void
4112 OP_EM (int bytemode, int sizeflag)
4113 {
4114 if (mod != 3)
4115 {
4116 if (intel_syntax && bytemode == v_mode)
4117 {
4118 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4119 used_prefixes |= (prefixes & PREFIX_DATA);
4120 }
4121 OP_E (bytemode, sizeflag);
4122 return;
4123 }
4124
4125 /* Skip mod/rm byte. */
4126 MODRM_CHECK;
4127 codep++;
4128 used_prefixes |= (prefixes & PREFIX_DATA);
4129 if (prefixes & PREFIX_DATA)
4130 {
4131 int add = 0;
4132
4133 USED_REX (REX_EXTZ);
4134 if (rex & REX_EXTZ)
4135 add = 8;
4136 sprintf (scratchbuf, "%%xmm%d", rm + add);
4137 }
4138 else
4139 sprintf (scratchbuf, "%%mm%d", rm);
4140 oappend (scratchbuf + intel_syntax);
4141 }
4142
4143 static void
4144 OP_EX (int bytemode, int sizeflag)
4145 {
4146 int add = 0;
4147 if (mod != 3)
4148 {
4149 if (intel_syntax && bytemode == v_mode)
4150 {
4151 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4152 {
4153 case 0: bytemode = x_mode; break;
4154 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4155 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4156 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4157 default: bytemode = 0; break;
4158 }
4159 }
4160 OP_E (bytemode, sizeflag);
4161 return;
4162 }
4163 USED_REX (REX_EXTZ);
4164 if (rex & REX_EXTZ)
4165 add = 8;
4166
4167 /* Skip mod/rm byte. */
4168 MODRM_CHECK;
4169 codep++;
4170 sprintf (scratchbuf, "%%xmm%d", rm + add);
4171 oappend (scratchbuf + intel_syntax);
4172 }
4173
4174 static void
4175 OP_MS (int bytemode, int sizeflag)
4176 {
4177 if (mod == 3)
4178 OP_EM (bytemode, sizeflag);
4179 else
4180 BadOp ();
4181 }
4182
4183 static void
4184 OP_XS (int bytemode, int sizeflag)
4185 {
4186 if (mod == 3)
4187 OP_EX (bytemode, sizeflag);
4188 else
4189 BadOp ();
4190 }
4191
4192 static void
4193 OP_M (int bytemode, int sizeflag)
4194 {
4195 if (mod == 3)
4196 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4197 else
4198 OP_E (bytemode, sizeflag);
4199 }
4200
4201 static void
4202 OP_0f07 (int bytemode, int sizeflag)
4203 {
4204 if (mod != 3 || rm != 0)
4205 BadOp ();
4206 else
4207 OP_E (bytemode, sizeflag);
4208 }
4209
4210 static void
4211 OP_0fae (int bytemode, int sizeflag)
4212 {
4213 if (mod == 3)
4214 {
4215 if (reg == 7)
4216 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4217
4218 if (reg < 5 || rm != 0)
4219 {
4220 BadOp (); /* bad sfence, mfence, or lfence */
4221 return;
4222 }
4223 }
4224 else if (reg != 7)
4225 {
4226 BadOp (); /* bad clflush */
4227 return;
4228 }
4229
4230 OP_E (bytemode, sizeflag);
4231 }
4232
4233 static void
4234 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4235 {
4236 /* NOP with REPZ prefix is called PAUSE. */
4237 if (prefixes == PREFIX_REPZ)
4238 strcpy (obuf, "pause");
4239 }
4240
4241 static const char *const Suffix3DNow[] = {
4242 /* 00 */ NULL, NULL, NULL, NULL,
4243 /* 04 */ NULL, NULL, NULL, NULL,
4244 /* 08 */ NULL, NULL, NULL, NULL,
4245 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4246 /* 10 */ NULL, NULL, NULL, NULL,
4247 /* 14 */ NULL, NULL, NULL, NULL,
4248 /* 18 */ NULL, NULL, NULL, NULL,
4249 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4250 /* 20 */ NULL, NULL, NULL, NULL,
4251 /* 24 */ NULL, NULL, NULL, NULL,
4252 /* 28 */ NULL, NULL, NULL, NULL,
4253 /* 2C */ NULL, NULL, NULL, NULL,
4254 /* 30 */ NULL, NULL, NULL, NULL,
4255 /* 34 */ NULL, NULL, NULL, NULL,
4256 /* 38 */ NULL, NULL, NULL, NULL,
4257 /* 3C */ NULL, NULL, NULL, NULL,
4258 /* 40 */ NULL, NULL, NULL, NULL,
4259 /* 44 */ NULL, NULL, NULL, NULL,
4260 /* 48 */ NULL, NULL, NULL, NULL,
4261 /* 4C */ NULL, NULL, NULL, NULL,
4262 /* 50 */ NULL, NULL, NULL, NULL,
4263 /* 54 */ NULL, NULL, NULL, NULL,
4264 /* 58 */ NULL, NULL, NULL, NULL,
4265 /* 5C */ NULL, NULL, NULL, NULL,
4266 /* 60 */ NULL, NULL, NULL, NULL,
4267 /* 64 */ NULL, NULL, NULL, NULL,
4268 /* 68 */ NULL, NULL, NULL, NULL,
4269 /* 6C */ NULL, NULL, NULL, NULL,
4270 /* 70 */ NULL, NULL, NULL, NULL,
4271 /* 74 */ NULL, NULL, NULL, NULL,
4272 /* 78 */ NULL, NULL, NULL, NULL,
4273 /* 7C */ NULL, NULL, NULL, NULL,
4274 /* 80 */ NULL, NULL, NULL, NULL,
4275 /* 84 */ NULL, NULL, NULL, NULL,
4276 /* 88 */ NULL, NULL, "pfnacc", NULL,
4277 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4278 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4279 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4280 /* 98 */ NULL, NULL, "pfsub", NULL,
4281 /* 9C */ NULL, NULL, "pfadd", NULL,
4282 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4283 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4284 /* A8 */ NULL, NULL, "pfsubr", NULL,
4285 /* AC */ NULL, NULL, "pfacc", NULL,
4286 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4287 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4288 /* B8 */ NULL, NULL, NULL, "pswapd",
4289 /* BC */ NULL, NULL, NULL, "pavgusb",
4290 /* C0 */ NULL, NULL, NULL, NULL,
4291 /* C4 */ NULL, NULL, NULL, NULL,
4292 /* C8 */ NULL, NULL, NULL, NULL,
4293 /* CC */ NULL, NULL, NULL, NULL,
4294 /* D0 */ NULL, NULL, NULL, NULL,
4295 /* D4 */ NULL, NULL, NULL, NULL,
4296 /* D8 */ NULL, NULL, NULL, NULL,
4297 /* DC */ NULL, NULL, NULL, NULL,
4298 /* E0 */ NULL, NULL, NULL, NULL,
4299 /* E4 */ NULL, NULL, NULL, NULL,
4300 /* E8 */ NULL, NULL, NULL, NULL,
4301 /* EC */ NULL, NULL, NULL, NULL,
4302 /* F0 */ NULL, NULL, NULL, NULL,
4303 /* F4 */ NULL, NULL, NULL, NULL,
4304 /* F8 */ NULL, NULL, NULL, NULL,
4305 /* FC */ NULL, NULL, NULL, NULL,
4306 };
4307
4308 static void
4309 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4310 {
4311 const char *mnemonic;
4312
4313 FETCH_DATA (the_info, codep + 1);
4314 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4315 place where an 8-bit immediate would normally go. ie. the last
4316 byte of the instruction. */
4317 obufp = obuf + strlen (obuf);
4318 mnemonic = Suffix3DNow[*codep++ & 0xff];
4319 if (mnemonic)
4320 oappend (mnemonic);
4321 else
4322 {
4323 /* Since a variable sized modrm/sib chunk is between the start
4324 of the opcode (0x0f0f) and the opcode suffix, we need to do
4325 all the modrm processing first, and don't know until now that
4326 we have a bad opcode. This necessitates some cleaning up. */
4327 op1out[0] = '\0';
4328 op2out[0] = '\0';
4329 BadOp ();
4330 }
4331 }
4332
4333 static const char *simd_cmp_op[] = {
4334 "eq",
4335 "lt",
4336 "le",
4337 "unord",
4338 "neq",
4339 "nlt",
4340 "nle",
4341 "ord"
4342 };
4343
4344 static void
4345 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4346 {
4347 unsigned int cmp_type;
4348
4349 FETCH_DATA (the_info, codep + 1);
4350 obufp = obuf + strlen (obuf);
4351 cmp_type = *codep++ & 0xff;
4352 if (cmp_type < 8)
4353 {
4354 char suffix1 = 'p', suffix2 = 's';
4355 used_prefixes |= (prefixes & PREFIX_REPZ);
4356 if (prefixes & PREFIX_REPZ)
4357 suffix1 = 's';
4358 else
4359 {
4360 used_prefixes |= (prefixes & PREFIX_DATA);
4361 if (prefixes & PREFIX_DATA)
4362 suffix2 = 'd';
4363 else
4364 {
4365 used_prefixes |= (prefixes & PREFIX_REPNZ);
4366 if (prefixes & PREFIX_REPNZ)
4367 suffix1 = 's', suffix2 = 'd';
4368 }
4369 }
4370 sprintf (scratchbuf, "cmp%s%c%c",
4371 simd_cmp_op[cmp_type], suffix1, suffix2);
4372 used_prefixes |= (prefixes & PREFIX_REPZ);
4373 oappend (scratchbuf);
4374 }
4375 else
4376 {
4377 /* We have a bad extension byte. Clean up. */
4378 op1out[0] = '\0';
4379 op2out[0] = '\0';
4380 BadOp ();
4381 }
4382 }
4383
4384 static void
4385 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4386 {
4387 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4388 forms of these instructions. */
4389 if (mod == 3)
4390 {
4391 char *p = obuf + strlen (obuf);
4392 *(p + 1) = '\0';
4393 *p = *(p - 1);
4394 *(p - 1) = *(p - 2);
4395 *(p - 2) = *(p - 3);
4396 *(p - 3) = extrachar;
4397 }
4398 }
4399
4400 static void
4401 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4402 {
4403 if (mod == 3 && reg == 1 && rm <= 1)
4404 {
4405 /* Override "sidt". */
4406 char *p = obuf + strlen (obuf) - 4;
4407
4408 /* We might have a suffix when disassembling with -Msuffix. */
4409 if (*p == 'i')
4410 --p;
4411
4412 if (rm)
4413 {
4414 /* mwait %eax,%ecx */
4415 strcpy (p, "mwait");
4416 if (!intel_syntax)
4417 strcpy (op1out, names32[0]);
4418 }
4419 else
4420 {
4421 /* monitor %eax,%ecx,%edx" */
4422 strcpy (p, "monitor");
4423 if (!intel_syntax)
4424 {
4425 if (!mode_64bit)
4426 strcpy (op1out, names32[0]);
4427 else if (!(prefixes & PREFIX_ADDR))
4428 strcpy (op1out, names64[0]);
4429 else
4430 {
4431 strcpy (op1out, names32[0]);
4432 used_prefixes |= PREFIX_ADDR;
4433 }
4434 strcpy (op3out, names32[2]);
4435 }
4436 }
4437 if (!intel_syntax)
4438 {
4439 strcpy (op2out, names32[1]);
4440 two_source_ops = 1;
4441 }
4442
4443 codep++;
4444 }
4445 else
4446 OP_M (0, sizeflag);
4447 }
4448
4449 static void
4450 SVME_Fixup (int bytemode, int sizeflag)
4451 {
4452 const char *alt;
4453 char *p;
4454
4455 switch (*codep)
4456 {
4457 case 0xd8:
4458 alt = "vmrun";
4459 break;
4460 case 0xd9:
4461 alt = "vmmcall";
4462 break;
4463 case 0xda:
4464 alt = "vmload";
4465 break;
4466 case 0xdb:
4467 alt = "vmsave";
4468 break;
4469 case 0xdc:
4470 alt = "stgi";
4471 break;
4472 case 0xdd:
4473 alt = "clgi";
4474 break;
4475 case 0xde:
4476 alt = "skinit";
4477 break;
4478 case 0xdf:
4479 alt = "invlpga";
4480 break;
4481 default:
4482 OP_M (bytemode, sizeflag);
4483 return;
4484 }
4485 /* Override "lidt". */
4486 p = obuf + strlen (obuf) - 4;
4487 /* We might have a suffix. */
4488 if (*p == 'i')
4489 --p;
4490 strcpy (p, alt);
4491 if (!(prefixes & PREFIX_ADDR))
4492 {
4493 ++codep;
4494 return;
4495 }
4496 used_prefixes |= PREFIX_ADDR;
4497 switch (*codep++)
4498 {
4499 case 0xdf:
4500 strcpy (op2out, names32[1]);
4501 two_source_ops = 1;
4502 /* Fall through. */
4503 case 0xd8:
4504 case 0xda:
4505 case 0xdb:
4506 *obufp++ = open_char;
4507 if (mode_64bit || (sizeflag & AFLAG))
4508 alt = names32[0];
4509 else
4510 alt = names16[0];
4511 strcpy (obufp, alt);
4512 obufp += strlen (alt);
4513 *obufp++ = close_char;
4514 *obufp = '\0';
4515 break;
4516 }
4517 }
4518
4519 static void
4520 INVLPG_Fixup (int bytemode, int sizeflag)
4521 {
4522 const char *alt;
4523
4524 switch (*codep)
4525 {
4526 case 0xf8:
4527 alt = "swapgs";
4528 break;
4529 case 0xf9:
4530 alt = "rdtscp";
4531 break;
4532 default:
4533 OP_M (bytemode, sizeflag);
4534 return;
4535 }
4536 /* Override "invlpg". */
4537 strcpy (obuf + strlen (obuf) - 6, alt);
4538 codep++;
4539 }
4540
4541 static void
4542 BadOp (void)
4543 {
4544 /* Throw away prefixes and 1st. opcode byte. */
4545 codep = insn_codep + 1;
4546 oappend ("(bad)");
4547 }
4548
4549 static void
4550 SEG_Fixup (int extrachar, int sizeflag)
4551 {
4552 if (mod == 3)
4553 {
4554 /* We need to add a proper suffix with
4555
4556 movw %ds,%ax
4557 movl %ds,%eax
4558 movq %ds,%rax
4559 movw %ax,%ds
4560 movl %eax,%ds
4561 movq %rax,%ds
4562 */
4563 const char *suffix;
4564
4565 if (prefixes & PREFIX_DATA)
4566 suffix = "w";
4567 else
4568 {
4569 USED_REX (REX_MODE64);
4570 if (rex & REX_MODE64)
4571 suffix = "q";
4572 else
4573 suffix = "l";
4574 }
4575 strcat (obuf, suffix);
4576 }
4577 else
4578 {
4579 /* We need to fix the suffix for
4580
4581 movw %ds,(%eax)
4582 movw %ds,(%rax)
4583 movw (%eax),%ds
4584 movw (%rax),%ds
4585
4586 Override "mov[l|q]". */
4587 char *p = obuf + strlen (obuf) - 1;
4588
4589 /* We might not have a suffix. */
4590 if (*p == 'v')
4591 ++p;
4592 *p = 'w';
4593 }
4594
4595 OP_E (extrachar, sizeflag);
4596 }
4597
4598 static void
4599 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4600 {
4601 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
4602 {
4603 /* Override "sgdt". */
4604 char *p = obuf + strlen (obuf) - 4;
4605
4606 /* We might have a suffix when disassembling with -Msuffix. */
4607 if (*p == 'g')
4608 --p;
4609
4610 switch (rm)
4611 {
4612 case 1:
4613 strcpy (p, "vmcall");
4614 break;
4615 case 2:
4616 strcpy (p, "vmlaunch");
4617 break;
4618 case 3:
4619 strcpy (p, "vmresume");
4620 break;
4621 case 4:
4622 strcpy (p, "vmxoff");
4623 break;
4624 }
4625
4626 codep++;
4627 }
4628 else
4629 OP_E (0, sizeflag);
4630 }
4631
4632 static void
4633 OP_VMX (int bytemode, int sizeflag)
4634 {
4635 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
4636 if (prefixes & PREFIX_DATA)
4637 strcpy (obuf, "vmclear");
4638 else if (prefixes & PREFIX_REPZ)
4639 strcpy (obuf, "vmxon");
4640 else
4641 strcpy (obuf, "vmptrld");
4642 OP_E (bytemode, sizeflag);
4643 }
git-cvsimport of binutils cvsroot