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2001-03-22 Philip Blundell <philb@gnu.org>
[binutils.git] / include / opcode / hppa.h
blob2ac11e4277108ac6085ab5023553fa41ca3996f9
1 /* Table of opcodes for the PA-RISC.
2 Copyright (C) 1990, 1991, 1993, 1995, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
9
10 GAS/GDB is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 1, or (at your option)
13 any later version.
14
15 GAS/GDB is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GAS or GDB; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
23
24 #if !defined(__STDC__) && !defined(const)
25 #define const
26 #endif
27
28 /*
29 * Structure of an opcode table entry.
30 */
31
32 /* There are two kinds of delay slot nullification: normal which is
33 * controled by the nullification bit, and conditional, which depends
34 * on the direction of the branch and its success or failure.
35 *
36 * NONE is unfortunately #defined in the hiux system include files.
37 * #undef it away.
38 */
39 #undef NONE
40 struct pa_opcode
41 {
42 const char *name;
43 unsigned long int match; /* Bits that must be set... */
44 unsigned long int mask; /* ... in these bits. */
45 char *args;
46 enum pa_arch arch;
47 char flags;
48 };
49
50 /* Enable/disable strict syntax checking. Not currently used, but will
51 be necessary for PA2.0 support in the future. */
52 #define FLAG_STRICT 0x1
53
54 /*
55 All hppa opcodes are 32 bits.
56
57 The match component is a mask saying which bits must match a
58 particular opcode in order for an instruction to be an instance
59 of that opcode.
60
61 The args component is a string containing one character for each operand of
62 the instruction. Characters used as a prefix allow any second character to
63 be used without conflicting with the main operand characters.
64
65 Bit positions in this description follow HP usage of lsb = 31,
66 "at" is lsb of field.
67
68 In the args field, the following characters must match exactly:
69
70 '+,() '
71
72 In the args field, the following characters are unused:
73
74 ' " - / 34 6789:; '
75 '@ C M [\] '
76 '` e g } '
77
78 Here are all the characters:
79
80 ' !"#$%&'()*+-,./0123456789:;<=>?'
81 '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
82 '`abcdefghijklmnopqrstuvwxyz{|}~ '
83
84 Kinds of operands:
85 x integer register field at 15.
86 b integer register field at 10.
87 t integer register field at 31.
88 a integer register field at 10 and 15 (for PERMH)
89 5 5 bit immediate at 15.
90 s 2 bit space specifier at 17.
91 S 3 bit space specifier at 18.
92 V 5 bit immediate value at 31
93 i 11 bit immediate value at 31
94 j 14 bit immediate value at 31
95 k 21 bit immediate value at 31
96 l 16 bit immediate value at 31 (wide mode only, unusual encoding).
97 n nullification for branch instructions
98 N nullification for spop and copr instructions
99 w 12 bit branch displacement
100 W 17 bit branch displacement (PC relative)
101 X 22 bit branch displacement (PC relative)
102 z 17 bit branch displacement (just a number, not an address)
103
104 Also these:
105
106 . 2 bit shift amount at 25
107 * 4 bit shift amount at 25
108 p 5 bit shift count at 26 (to support the SHD instruction) encoded as
109 31-p
110 ~ 6 bit shift count at 20,22:26 encoded as 63-~.
111 P 5 bit bit position at 26
112 q 6 bit bit position at 20,22:26
113 T 5 bit field length at 31 (encoded as 32-T)
114 % 6 bit field length at 23,27:31 (variable extract/deposit)
115 | 6 bit field length at 19,27:31 (fixed extract/deposit)
116 A 13 bit immediate at 18 (to support the BREAK instruction)
117 ^ like b, but describes a control register
118 ! sar (cr11) register
119 D 26 bit immediate at 31 (to support the DIAG instruction)
120 $ 9 bit immediate at 28 (to support POPBTS)
121
122 v 3 bit Special Function Unit identifier at 25
123 O 20 bit Special Function Unit operation split between 15 bits at 20
124 and 5 bits at 31
125 o 15 bit Special Function Unit operation at 20
126 2 22 bit Special Function Unit operation split between 17 bits at 20
127 and 5 bits at 31
128 1 15 bit Special Function Unit operation split between 10 bits at 20
129 and 5 bits at 31
130 0 10 bit Special Function Unit operation split between 5 bits at 20
131 and 5 bits at 31
132 u 3 bit coprocessor unit identifier at 25
133 F Source Floating Point Operand Format Completer encoded 2 bits at 20
134 I Source Floating Point Operand Format Completer encoded 1 bits at 20
135 (for 0xe format FP instructions)
136 G Destination Floating Point Operand Format Completer encoded 2 bits at 18
137 H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
138 (very similar to 'F')
139
140 r 5 bit immediate value at 31 (for the break instruction)
141 (very similar to V above, except the value is unsigned instead of
142 low_sign_ext)
143 R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
144 (same as r above, except the value is in a different location)
145 U 10 bit immediate value at 15 (for SSM, RSM on pa2.0)
146 Q 5 bit immediate value at 10 (a bit position specified in
147 the bb instruction. It's the same as r above, except the
148 value is in a different location)
149 B 5 bit immediate value at 10 (a bit position specified in
150 the bb instruction. Similar to Q, but 64 bit handling is
151 different.
152 Z %r1 -- implicit target of addil instruction.
153 L ,%r2 completer for new syntax branch
154 { Source format completer for fcnv
155 _ Destination format completer for fcnv
156 h cbit for fcmp
157 = gfx tests for ftest
158 d 14 bit offset for single precision FP long load/store.
159 # 14 bit offset for double precision FP load long/store.
160 J Yet another 14 bit offset for load/store with ma,mb completers.
161 K Yet another 14 bit offset for load/store with ma,mb completers.
162 y 16 bit offset for word aligned load/store (PA2.0 wide).
163 & 16 bit offset for dword aligned load/store (PA2.0 wide).
164 < 16 bit offset for load/store with ma,mb completers (PA2.0 wide).
165 > 16 bit offset for load/store with ma,mb completers (PA2.0 wide).
166 Y %sr0,%r31 -- implicit target of be,l instruction.
167 @ implicit immediate value of 0
168
169 Completer operands all have 'c' as the prefix:
170
171 cx indexed load completer.
172 cm short load and store completer.
173 cq long load and store completer (like cm, but inserted into a
174 different location in the target instruction).
175 cs store bytes short completer.
176 ce long load/store completer for LDW/STW with a different encoding than the
177 others
178 cc load cache control hint
179 cd load and clear cache control hint
180 cC store cache control hint
181 co ordered access
182
183 cp branch link and push completer
184 cP branch pop completer
185 cl branch link completer
186 cg branch gate completer
187
188 cw read/write completer for PROBE
189 cW wide completer for MFCTL
190 cL local processor completer for cache control
191 cZ System Control Completer (to support LPA, LHA, etc.)
192
193 ci correction completer for DCOR
194 ca add completer
195 cy 32 bit add carry completer
196 cY 64 bit add carry completer
197 cv signed overflow trap completer
198 ct trap on condition completer for ADDI, SUB
199 cT trap on condition completer for UADDCM
200 cb 32 bit borrow completer for SUB
201 cB 64 bit borrow completer for SUB
202
203 ch left/right half completer
204 cH signed/unsigned saturation completer
205 cS signed/unsigned completer at 21
206 cz zero/sign extension completer.
207 c* permutation completer
208
209 Condition operands all have '?' as the prefix:
210
211 ?f Floating point compare conditions (encoded as 5 bits at 31)
212
213 ?a add conditions
214 ?A 64 bit add conditions
215 ?@ add branch conditions followed by nullify
216 ?d non-negated add branch conditions
217 ?D negated add branch conditions
218 ?w wide mode non-negated add branch conditions
219 ?W wide mode negated add branch conditions
220
221 ?s compare/subtract conditions
222 ?S 64 bit compare/subtract conditions
223 ?t non-negated compare and branch conditions
224 ?n 32 bit compare and branch conditions followed by nullify
225 ?N 64 bit compare and branch conditions followed by nullify
226 ?Q 64 bit compare and branch conditions for CMPIB instruction
227
228 ?l logical conditions
229 ?L 64 bit logical conditions
230
231 ?b branch on bit conditions
232 ?B 64 bit branch on bit conditions
233
234 ?x shift/extract/deposit conditions
235 ?X 64 bit shift/extract/deposit conditions
236 ?y shift/extract/deposit conditions followed by nullify for conditional
237 branches
238
239 ?u unit conditions
240 ?U 64 bit unit conditions
241
242 Floating point registers all have 'f' as a prefix:
243
244 ft target register at 31
245 fT target register with L/R halves at 31
246 fa operand 1 register at 10
247 fA operand 1 register with L/R halves at 10
248 fX Same as fA, except prints a space before register during disasm
249 fb operand 2 register at 15
250 fB operand 2 register with L/R halves at 15
251 fC operand 3 register with L/R halves at 16:18,21:23
252 fe Like fT, but encoding is different.
253 fE Same as fe, except prints a space before register during disasm.
254 fx target register at 15 (only for PA 2.0 long format FLDD/FSTD).
255
256 Float registers for fmpyadd and fmpysub:
257
258 fi mult operand 1 register at 10
259 fj mult operand 2 register at 15
260 fk mult target register at 20
261 fl add/sub operand register at 25
262 fm add/sub target register at 31
263
264 */
265
266
267 /* List of characters not to put a space after. Note that
268 "," is included, as the "spopN" operations use literal
269 commas in their completer sections. */
270 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
271
272 /* The order of the opcodes in this table is significant:
273
274 * The assembler requires that all instances of the same mnemonic must be
275 consecutive. If they aren't, the assembler will bomb at runtime.
276
277 * The disassembler should not care about the order of the opcodes. */
278
279 static const struct pa_opcode pa_opcodes[] =
280 {
281
282 /* Pseudo-instructions. */
283
284 { "ldi", 0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */
285 { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
286
287 { "call", 0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
288 { "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
289 { "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
290
291 { "cmpib", 0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
292 { "cmpib", 0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
293 { "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
294 /* This entry is for the disassembler only. It will never be used by
295 assembler. */
296 { "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
297 { "cmpb", 0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
298 { "cmpb", 0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
299 { "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
300 /* This entry is for the disassembler only. It will never be used by
301 assembler. */
302 { "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
303 { "addb", 0xa0000000, 0xf4000000, "?Wnx,b,w", pa20, FLAG_STRICT},
304 { "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
305 /* This entry is for the disassembler only. It will never be used by
306 assembler. */
307 { "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
308 { "addib", 0xa4000000, 0xf4000000, "?Wn5,b,w", pa20, FLAG_STRICT},
309 { "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
310 /* This entry is for the disassembler only. It will never be used by
311 assembler. */
312 { "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
313 { "nop", 0x08000240, 0xffffffff, "", pa10, 0}, /* or 0,0,0 */
314 { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10, 0}, /* or r,0,t */
315 { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
316
317 /* Loads and Stores for integer registers. */
318
319 { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
320 { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
321 { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
322 { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT},
323 { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
324 { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT},
325 { "ldd", 0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
326 { "ldd", 0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
327 { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
328 { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
329 { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
330 { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
331 { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
332 { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
333 { "ldw", 0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT},
334 { "ldw", 0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
335 { "ldw", 0x4c000000, 0xfc000000, "ceJ(b),x", pa10, FLAG_STRICT},
336 { "ldw", 0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT},
337 { "ldw", 0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
338 { "ldw", 0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT},
339 { "ldw", 0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
340 { "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
341 { "ldw", 0x48000000, 0xfc000000, "j(b),x", pa10, 0},
342 { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
343 { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
344 { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
345 { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
346 { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
347 { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
348 { "ldh", 0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
349 { "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
350 { "ldh", 0x44000000, 0xfc000000, "j(b),x", pa10, 0},
351 { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
352 { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
353 { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
354 { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
355 { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
356 { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
357 { "ldb", 0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
358 { "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
359 { "ldb", 0x40000000, 0xfc000000, "j(b),x", pa10, 0},
360 { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
361 { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
362 { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
363 { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
364 { "std", 0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT},
365 { "std", 0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
366 { "stw", 0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
367 { "stw", 0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT},
368 { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
369 { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
370 { "stw", 0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT},
371 { "stw", 0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
372 { "stw", 0x6c000000, 0xfc000000, "cex,J(b)", pa10, FLAG_STRICT},
373 { "stw", 0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT},
374 { "stw", 0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
375 { "stw", 0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT},
376 { "stw", 0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
377 { "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
378 { "stw", 0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
379 { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
380 { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
381 { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
382 { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
383 { "sth", 0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
384 { "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
385 { "sth", 0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
386 { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
387 { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
388 { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
389 { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
390 { "stb", 0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
391 { "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
392 { "stb", 0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
393 { "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
394 { "ldwm", 0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
395 { "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
396 { "stwm", 0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
397 { "ldwx", 0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
398 { "ldwx", 0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, 0},
399 { "ldhx", 0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
400 { "ldhx", 0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, 0},
401 { "ldbx", 0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
402 { "ldbx", 0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, 0},
403 { "ldwa", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa10, FLAG_STRICT},
404 { "ldwa", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa10, FLAG_STRICT},
405 { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa10, FLAG_STRICT},
406 { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa10, FLAG_STRICT},
407 { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa10, FLAG_STRICT},
408 { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa10, FLAG_STRICT},
409 { "stwa", 0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
410 { "stwa", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
411 { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa10, FLAG_STRICT},
412 { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa10, FLAG_STRICT},
413 { "ldda", 0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
414 { "ldda", 0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
415 { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
416 { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT},
417 { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
418 { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT},
419 { "stda", 0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
420 { "stda", 0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
421 { "stda", 0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
422 { "stda", 0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
423 { "ldwax", 0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, 0},
424 { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
425 { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, 0},
426 { "ldws", 0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
427 { "ldws", 0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, 0},
428 { "ldhs", 0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
429 { "ldhs", 0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, 0},
430 { "ldbs", 0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
431 { "ldbs", 0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, 0},
432 { "ldwas", 0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, 0},
433 { "ldcws", 0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
434 { "ldcws", 0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, 0},
435 { "stws", 0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
436 { "stws", 0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, 0},
437 { "sths", 0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
438 { "sths", 0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, 0},
439 { "stbs", 0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
440 { "stbs", 0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, 0},
441 { "stwas", 0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, 0},
442 { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
443 { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT},
444 { "stbys", 0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, 0},
445 { "stbys", 0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, 0},
446
447 /* Immediate instructions. */
448 { "ldo", 0x34000000, 0xfc000000, "l(b),x", pa20w, 0},
449 { "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
450 { "ldil", 0x20000000, 0xfc000000, "k,b", pa10, 0},
451 { "addil", 0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
452 { "addil", 0x28000000, 0xfc000000, "k,b", pa10, 0},
453
454 /* Branching instructions. */
455 { "b", 0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
456 { "b", 0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
457 { "b", 0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
458 { "b", 0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
459 { "b", 0xe8000000, 0xffe0e000, "nW", pa10, 0}, /* b,l foo,r0 */
460 { "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
461 { "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
462 { "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
463 { "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
464 { "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
465 { "bve", 0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
466 { "bve", 0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
467 { "bve", 0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
468 { "bve", 0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
469 { "be", 0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
470 { "be", 0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
471 { "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
472 { "be", 0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
473 { "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
474 { "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
475 { "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
476 { "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
477 { "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
478 { "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
479 { "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
480 { "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
481 { "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
482 { "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
483 { "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
484 { "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
485 { "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
486 { "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
487 { "bb", 0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
488 { "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
489 { "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
490 { "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
491 { "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
492 { "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
493
494 /* Computation Instructions. */
495
496 { "cmpclr", 0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
497 { "cmpclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
498 { "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
499 { "or", 0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
500 { "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
501 { "xor", 0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
502 { "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
503 { "and", 0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
504 { "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
505 { "andcm", 0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
506 { "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
507 { "uxor", 0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
508 { "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
509 { "uaddcm", 0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
510 { "uaddcm", 0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
511 { "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
512 { "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
513 { "dcor", 0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
514 { "dcor", 0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
515 { "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10, 0},
516 { "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10, 0},
517 { "addi", 0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
518 { "addi", 0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
519 { "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
520 { "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
521 { "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
522 { "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
523 { "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
524 { "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
525 { "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
526 { "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
527 { "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
528 { "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
529 { "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
530 { "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
531 { "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
532 { "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
533 { "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
534 { "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
535 { "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
536 { "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
537 { "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
538 { "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
539 { "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
540 { "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
541 { "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
542 { "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
543 { "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
544 { "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
545 { "subi", 0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
546 { "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
547 { "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
548 { "cmpiclr", 0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
549 { "cmpiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
550 { "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
551 { "shladd", 0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
552 { "shladd", 0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
553 { "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
554 { "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
555 { "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
556 { "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
557 { "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
558 { "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
559 { "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
560 { "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
561 { "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
562
563 /* Subword Operation Instructions. */
564
565 { "hadd", 0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
566 { "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
567 { "hshl", 0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
568 { "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
569 { "hshr", 0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
570 { "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
571 { "hsub", 0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
572 { "mixh", 0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
573 { "mixw", 0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
574 { "permh", 0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
575
576
577 /* Extract and Deposit Instructions. */
578
579 { "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
580 { "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
581 { "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
582 { "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
583 { "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
584 { "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
585 { "extrd", 0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
586 { "extrd", 0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
587 { "extrw", 0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
588 { "extrw", 0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
589 { "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
590 { "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
591 { "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
592 { "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
593 { "depd", 0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
594 { "depd", 0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
595 { "depdi", 0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
596 { "depdi", 0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
597 { "depw", 0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
598 { "depw", 0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
599 { "depwi", 0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
600 { "depwi", 0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
601 { "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
602 { "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
603 { "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
604 { "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
605 { "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
606 { "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
607 { "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
608 { "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
609
610 /* System Control Instructions. */
611
612 { "break", 0x00000000, 0xfc001fe0, "r,A", pa10, 0},
613 { "rfi", 0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
614 { "rfi", 0x00000c00, 0xffffffff, "", pa10, 0},
615 { "rfir", 0x00000ca0, 0xffffffff, "", pa11, 0},
616 { "ssm", 0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
617 { "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
618 { "rsm", 0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
619 { "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
620 { "mtsm", 0x00001860, 0xffe0ffff, "x", pa10, 0},
621 { "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
622 { "ldsid", 0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
623 { "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10, 0},
624 { "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10, 0},
625 { "mtsarcm", 0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
626 { "mfia", 0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
627 { "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
628 { "mfctl", 0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
629 { "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
630 { "sync", 0x00000400, 0xffffffff, "", pa10, 0},
631 { "syncdma", 0x00100400, 0xffffffff, "", pa10, 0},
632 { "probe", 0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
633 { "probe", 0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
634 { "probei", 0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
635 { "probei", 0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
636 { "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
637 { "prober", 0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
638 { "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
639 { "proberi", 0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
640 { "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
641 { "probew", 0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
642 { "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
643 { "probewi", 0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
644 { "lpa", 0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
645 { "lpa", 0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
646 { "lha", 0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
647 { "lha", 0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
648 { "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
649 { "lci", 0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
650 { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
651 { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
652 { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
653 { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
654 { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
655 { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
656 { "pitlb", 0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
657 { "pitlb", 0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
658 { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
659 { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
660 { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
661 { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
662 { "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
663 { "idtlba", 0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
664 { "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
665 { "iitlba", 0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
666 { "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
667 { "idtlbp", 0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
668 { "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
669 { "iitlbp", 0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
670 { "pdc", 0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
671 { "pdc", 0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
672 { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
673 { "fdc", 0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
674 { "fic", 0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
675 { "fic", 0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
676 { "fdce", 0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
677 { "fdce", 0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
678 { "fice", 0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
679 { "fice", 0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
680 { "diag", 0x14000000, 0xfc000000, "D", pa10, 0},
681 { "idtlbt", 0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
682 { "iitlbt", 0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
683
684 /* These may be specific to certain versions of the PA. Joel claimed
685 they were 72000 (7200?) specific. However, I'm almost certain the
686 mtcpu/mfcpu were undocumented, but available in the older 700 machines. */
687 { "mtcpu", 0x14001600, 0xfc00ffff, "x,^", pa10, 0},
688 { "mfcpu", 0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
689 { "tocen", 0x14403600, 0xffffffff, "", pa10, 0},
690 { "tocdis", 0x14401620, 0xffffffff, "", pa10, 0},
691 { "shdwgr", 0x14402600, 0xffffffff, "", pa10, 0},
692 { "grshdw", 0x14400620, 0xffffffff, "", pa10, 0},
693
694 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
695 the Timex FPU or the Mustang ERS (not sure which) manual. */
696 { "gfw", 0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
697 { "gfw", 0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
698 { "gfr", 0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
699 { "gfr", 0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
700
701 /* Floating Point Coprocessor Instructions. */
702
703 { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
704 { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT},
705 { "fldw", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa10, FLAG_STRICT},
706 { "fldw", 0x24000000, 0xfc001380, "cxccx(b),fT", pa10, FLAG_STRICT},
707 { "fldw", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa10, FLAG_STRICT},
708 { "fldw", 0x24001000, 0xfc001380, "cmcc5(b),fT", pa10, FLAG_STRICT},
709 { "fldw", 0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
710 { "fldw", 0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT},
711 { "fldw", 0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
712 { "fldw", 0x58000000, 0xfc000000, "cJd(b),fe", pa20, FLAG_STRICT},
713 { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
714 { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT},
715 { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa10, FLAG_STRICT},
716 { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa10, FLAG_STRICT},
717 { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa10, FLAG_STRICT},
718 { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa10, FLAG_STRICT},
719 { "fldd", 0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
720 { "fldd", 0x50000002, 0xfc000002, "cq#(b),fx", pa20, FLAG_STRICT},
721 { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa10, FLAG_STRICT},
722 { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa10, FLAG_STRICT},
723 { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa10, FLAG_STRICT},
724 { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(b)", pa10, FLAG_STRICT},
725 { "fstw", 0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa10, FLAG_STRICT},
726 { "fstw", 0x24001200, 0xfc001380, "cmcCfT,5(b)", pa10, FLAG_STRICT},
727 { "fstw", 0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
728 { "fstw", 0x78000000, 0xfc000000, "cJfe,y(b)", pa20w, FLAG_STRICT},
729 { "fstw", 0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
730 { "fstw", 0x78000000, 0xfc000000, "cJfe,d(b)", pa20, FLAG_STRICT},
731 { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa10, FLAG_STRICT},
732 { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa10, FLAG_STRICT},
733 { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa10, FLAG_STRICT},
734 { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa10, FLAG_STRICT},
735 { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa10, FLAG_STRICT},
736 { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa10, FLAG_STRICT},
737 { "fstd", 0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
738 { "fstd", 0x70000002, 0xfc000002, "cqfx,#(b)", pa20, FLAG_STRICT},
739 { "fldwx", 0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, 0},
740 { "fldwx", 0x24000000, 0xfc001f80, "cxx(b),fT", pa10, 0},
741 { "flddx", 0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, 0},
742 { "flddx", 0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, 0},
743 { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
744 { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
745 { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
746 { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
747 { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
748 { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
749 { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
750 { "fldws", 0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
751 { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
752 { "fldds", 0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
753 { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
754 { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
755 { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
756 { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
757 { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
758 { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
759 { "fadd", 0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
760 { "fadd", 0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
761 { "fsub", 0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
762 { "fsub", 0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
763 { "fmpy", 0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
764 { "fmpy", 0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
765 { "fdiv", 0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
766 { "fdiv", 0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
767 { "fsqrt", 0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
768 { "fsqrt", 0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
769 { "fabs", 0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
770 { "fabs", 0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
771 { "frem", 0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
772 { "frem", 0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
773 { "frnd", 0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
774 { "frnd", 0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
775 { "fcpy", 0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
776 { "fcpy", 0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
777 { "fcnvff", 0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
778 { "fcnvff", 0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
779 { "fcnvxf", 0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
780 { "fcnvxf", 0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
781 { "fcnvfx", 0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
782 { "fcnvfx", 0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
783 { "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
784 { "fcnvfxt", 0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
785 { "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
786 { "fmpynfadd", 0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
787 { "fneg", 0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
788 { "fneg", 0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
789 { "fnegabs", 0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
790 { "fnegabs", 0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
791 { "fcnv", 0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
792 { "fcnv", 0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
793 { "fcmp", 0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
794 { "fcmp", 0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
795 { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
796 { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
797 { "xmpyu", 0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
798 { "fmpyadd", 0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
799 { "fmpysub", 0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
800 { "ftest", 0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
801 { "ftest", 0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
802 { "ftest", 0x30002420, 0xffffffff, "", pa10, 0},
803 { "fid", 0x30000000, 0xffffffff, "", pa11, 0},
804
805 /* Performance Monitor Instructions. */
806
807 { "pmdis", 0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
808 { "pmenb", 0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
809
810 /* Assist Instructions. */
811
812 { "spop0", 0x10000000, 0xfc000600, "v,ON", pa10, 0},
813 { "spop1", 0x10000200, 0xfc000600, "v,oNt", pa10, 0},
814 { "spop2", 0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
815 { "spop3", 0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
816 { "copr", 0x30000000, 0xfc000000, "u,2N", pa10, 0},
817 { "cldwx", 0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
818 { "cldwx", 0x24000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
819 { "clddx", 0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
820 { "clddx", 0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
821 { "cstwx", 0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
822 { "cstwx", 0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
823 { "cstdx", 0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
824 { "cstdx", 0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
825 { "cldws", 0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
826 { "cldws", 0x24001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
827 { "cldds", 0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
828 { "cldds", 0x2c001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
829 { "cstws", 0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
830 { "cstws", 0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
831 { "cstds", 0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
832 { "cstds", 0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
833 { "cldw", 0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
834 { "cldw", 0x24000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
835 { "cldw", 0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
836 { "cldw", 0x24001000, 0xfc001e00, "ucm5(b),t", pa10, FLAG_STRICT},
837 { "cldd", 0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
838 { "cldd", 0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
839 { "cldd", 0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
840 { "cldd", 0x2c001000, 0xfc001e00, "ucm5(b),t", pa20, FLAG_STRICT},
841 { "cstw", 0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
842 { "cstw", 0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
843 { "cstw", 0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
844 { "cstw", 0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
845 { "cstd", 0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
846 { "cstd", 0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
847 { "cstd", 0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
848 { "cstd", 0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
849 };
850
851 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
852
853 /* SKV 12/18/92. Added some denotations for various operands. */
854
855 #define PA_IMM11_AT_31 'i'
856 #define PA_IMM14_AT_31 'j'
857 #define PA_IMM21_AT_31 'k'
858 #define PA_DISP12 'w'
859 #define PA_DISP17 'W'
860
861 #define N_HPPA_OPERAND_FORMATS 5
git-cvsimport of binutils cvsroot