1 @c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
7 @node M68HC11-Dependent
8 @chapter M68HC11 and M68HC12 Dependent Features
11 @node Machine Dependencies
12 @chapter M68HC11 and M68HC12 Dependent Features
15 @cindex M68HC11 and M68HC12 support
17 * M68HC11-Opts:: M68HC11 and M68HC12 Options
18 * M68HC11-Syntax:: Syntax
19 * M68HC11-Float:: Floating Point
20 * M68HC11-opcodes:: Opcodes
24 @section M68HC11 and M68HC12 Options
26 @cindex options, M68HC11
27 @cindex M68HC11 options
28 The Motorola 68HC11 and 68HC12 version of @code{@value{AS}} has a few machine
31 @cindex @samp{-m68hc11}
32 This option switches the assembler in the M68HC11 mode. In this mode,
33 the assembler only accepts 68HC11 operands and mnemonics. It produces
36 @cindex @samp{-m68hc12}
37 This option switches the assembler in the M68HC12 mode. In this mode,
38 the assembler also accepts 68HC12 operands and mnemonics. It produces
39 code for the 68HC12. A fiew 68HC11 instructions are replaced by
40 some 68HC12 instructions as recommended by Motorola specifications.
42 @cindex @samp{--strict-direct-mode}
43 You can use the @samp{--strict-direct-mode} option to disable
44 the automatic translation of direct page mode addressing into
45 extended mode when the instruction does not support direct mode.
46 For example, the @samp{clr} instruction does not support direct page
47 mode addressing. When it is used with the direct page mode,
48 @code{@value{AS}} will ignore it and generate an absolute addressing.
49 This option prevents @code{@value{AS}} from doing this, and the wrong
50 usage of the direct page mode will raise an error.
52 @cindex @samp{--short-branchs}
53 The @samp{--short-branchs} option turns off the translation of
54 relative branches into absolute branches when the branch offset is
55 out of range. By default @code{@value{AS}} transforms the relative
56 branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
57 @samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls},
58 @samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into
59 an absolute branch when the offset is out of the -128 .. 127 range.
60 In that case, the @samp{bsr} instruction is translated into a
61 @samp{jsr}, the @samp{bra} instruction is translated into a
62 @samp{jmp} and the conditional branchs instructions are inverted and
63 followed by a @samp{jmp}. This option disables these translations
64 and @code{@value{AS}} will generate an error if a relative branch
65 is out of range. This option does not affect the optimization
66 associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes.
68 @cindex @samp{--force-long-branchs}
69 The @samp{--force-long-branchs} option forces the translation of
70 relative branches into absolute branches. This option does not affect
71 the optimization associated to the @samp{jbra}, @samp{jbsr} and
72 @samp{jbXX} pseudo opcodes.
74 @cindex @samp{--print-insn-syntax}
75 You can use the @samp{--print-insn-syntax} option to obtain the
76 syntax description of the instruction when an error is detected.
78 @cindex @samp{--print-opcodes}
79 The @samp{--print-opcodes} option prints the list of all the
80 instructions with their syntax. The first item of each line
81 represents the instruction name and the rest of the line indicates
82 the possible operands for that instruction. The list is printed
83 in alphabetical order. Once the list is printed @code{@value{AS}}
86 @cindex @samp{--generate-example}
87 The @samp{--generate-example} option is similar to @samp{--print-opcodes}
88 but it generates an example for each instruction instead.
93 @cindex M68HC11 syntax
94 @cindex syntax, M68HC11
96 In the M68HC11 syntax, the instruction name comes first and it may
97 be followed by one or several operands (up to three). Operands are
98 separated by comma (@samp{,}). In the normal mode,
99 @code{@value{AS}} will complain if too many operands are specified for
100 a given instruction. In the MRI mode (turned on with @samp{-M} option),
101 it will treat them as comments. Example:
110 @cindex M68HC11 addressing modes
111 @cindex addressing modes, M68HC11
112 The following addressing modes are understood:
117 @item Address Register
118 @samp{@var{number},X}, @samp{@var{number},Y}
120 The @var{number} may be omitted in which case 0 is assumed.
122 @item Direct Addressing mode
123 @samp{*@var{symbol}}, or @samp{*@var{digits}}
126 @samp{@var{symbol}}, or @samp{@var{digits}}
130 @section Floating Point
132 @cindex floating point, M68HC11
133 @cindex M68HC11 floating point
134 Packed decimal (P) format floating literals are not supported.
135 Feel free to add the code!
137 The floating point formats generated by directives are these.
140 @cindex @code{float} directive, M68HC11
142 @code{Single} precision floating point constants.
144 @cindex @code{double} directive, M68HC11
146 @code{Double} precision floating point constants.
148 @cindex @code{extend} directive M68HC11
149 @cindex @code{ldouble} directive M68HC11
152 @code{Extended} precision (@code{long double}) floating point constants.
156 @node M68HC11-opcodes
159 @cindex M68HC11 opcodes
160 @cindex opcodes, M68HC11
161 @cindex instruction set, M68HC11
164 * M68HC11-Branch:: Branch Improvement
168 @subsection Branch Improvement
170 @cindex pseudo-opcodes, M68HC11
171 @cindex M68HC11 pseudo-opcodes
172 @cindex branch improvement, M68HC11
173 @cindex M68HC11 branch improvement
175 Certain pseudo opcodes are permitted for branch instructions.
176 They expand to the shortest branch instruction that reach the
177 target. Generally these mnemonics are made by prepending @samp{j} to
178 the start of Motorola mnemonic. These pseudo opcodes are not affected
179 by the @samp{--short-branchs} or @samp{--force-long-branchs} options.
181 The following table summarizes the pseudo-operations.
185 +-------------------------------------------------------------+
187 | --short-branchs --force-long-branchs |
188 +--------------------------+----------------------------------+
189 Pseudo-Op |BYTE WORD | BYTE WORD |
190 +--------------------------+----------------------------------+
191 bsr | bsr <pc-rel> <error> | jsr <abs> |
192 bra | bra <pc-rel> <error> | jmp <abs> |
193 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
194 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
195 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
196 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
198 +--------------------------+----------------------------------+
200 NX: negative of condition XX
207 These are the simplest jump pseudo-operations; they always map to one
208 particular machine instruction, depending on the displacement to the
212 Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations,
213 where @var{XX} is a conditional branch or condition-code test. The full
214 list of pseudo-ops in this family is:
216 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
217 jbcs jbne jblt jble jbls jbvc jbmi
220 For the cases of non-PC relative displacements and long displacements,
221 @code{@value{AS}} issues a longer code fragment in terms of
222 @var{NX}, the opposite condition to @var{XX}. For example, for the
223 non-PC relative case: