1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995, 2003
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
9 @chapter H8/300 Dependent Features
11 @cindex H8/300 support
13 * H8/300 Options:: Options
14 * H8/300 Syntax:: Syntax
15 * H8/300 Floating Point:: Floating Point
16 * H8/300 Directives:: H8/300 Machine Directives
17 * H8/300 Opcodes:: Opcodes
23 @cindex H8/300 options (none)
24 @cindex options, H8/300 (none)
25 @code{@value{AS}} has no additional command-line options for the
26 Renesas (formerly Hitachi) H8/300 family.
31 * H8/300-Chars:: Special Characters
32 * H8/300-Regs:: Register Names
33 * H8/300-Addressing:: Addressing Modes
37 @subsection Special Characters
39 @cindex line comment character, H8/300
40 @cindex H8/300 line comment character
41 @samp{;} is the line comment character.
43 @cindex line separator, H8/300
44 @cindex statement separator, H8/300
45 @cindex H8/300 line separator
46 @samp{$} can be used instead of a newline to separate statements.
47 Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
50 @subsection Register Names
52 @cindex H8/300 registers
53 @cindex register names, H8/300
54 You can use predefined symbols of the form @samp{r@var{n}h} and
55 @samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
56 general-purpose registers. @var{n} is a digit from @samp{0} to
57 @samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
60 You can also use the eight predefined symbols @samp{r@var{n}} to refer
61 to the H8/300 registers as 16-bit registers (you must use this form for
64 On the H8/300H, you can also use the eight predefined symbols
65 @samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
66 general purpose registers.
68 The two control registers are called @code{pc} (program counter; a
69 16-bit register, except on the H8/300H where it is 24 bits) and
70 @code{ccr} (condition code register; an 8-bit register). @code{r7} is
71 used as the stack pointer, and can also be called @code{sp}.
73 @node H8/300-Addressing
74 @subsection Addressing Modes
76 @cindex addressing modes, H8/300
77 @cindex H8/300 addressing modes
78 @value{AS} understands the following addressing modes for the H8/300:
87 @item @@(@var{d}, r@var{n})
88 @itemx @@(@var{d}:16, r@var{n})
89 @itemx @@(@var{d}:24, r@var{n})
90 Register indirect: 16-bit or 24-bit displacement @var{d} from register
91 @var{n}. (24-bit displacements are only meaningful on the H8/300H.)
94 Register indirect with post-increment
97 Register indirect with pre-decrement
99 @item @code{@@}@var{aa}
100 @itemx @code{@@}@var{aa}:8
101 @itemx @code{@@}@var{aa}:16
102 @itemx @code{@@}@var{aa}:24
103 Absolute address @code{aa}. (The address size @samp{:24} only makes
104 sense on the H8/300H.)
110 Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
111 @samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
112 requires this nor uses it---the data size required is taken from
115 @item @code{@@}@code{@@}@var{aa}
116 @itemx @code{@@}@code{@@}@var{aa}:8
117 Memory indirect. You may specify the @samp{:8} for clarity, if you
118 wish; but @code{@value{AS}} neither requires this nor uses it.
121 @node H8/300 Floating Point
122 @section Floating Point
124 @cindex floating point, H8/300 (@sc{ieee})
125 @cindex H8/300 floating point (@sc{ieee})
126 The H8/300 family has no hardware floating point, but the @code{.float}
127 directive generates @sc{ieee} floating-point numbers for compatibility
128 with other development tools.
131 @node H8/300 Directives
132 @section H8/300 Machine Directives
134 @cindex H8/300 machine directives (none)
135 @cindex machine directives, H8/300 (none)
136 @cindex @code{word} directive, H8/300
137 @cindex @code{int} directive, H8/300
138 @code{@value{AS}} has the following machine-dependent directives for
142 @cindex H8/300H, assembling for
144 Recognize and emit additional instructions for the H8/300H variant, and
145 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
146 for the H8/300 family.
149 Recognize and emit additional instructions for the H8S variant, and
150 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
151 for the H8/300 family.
154 Recognize and emit additional instructions for the H8/300H variant in
155 normal mode, and also make @code{.int} emit 32-bit numbers rather than
156 the usual (16-bit) for the H8/300 family.
159 Recognize and emit additional instructions for the H8S variant in
160 normal mode, and also make @code{.int} emit 32-bit numbers rather than
161 the usual (16-bit) for the H8/300 family.
164 On the H8/300 family (including the H8/300H) @samp{.word} directives
165 generate 16-bit numbers.
170 @cindex H8/300 opcode summary
171 @cindex opcode summary, H8/300
172 @cindex mnemonics, H8/300
173 @cindex instruction summary, H8/300
174 For detailed information on the H8/300 machine instruction set, see
175 @cite{H8/300 Series Programming Manual}. For information specific to
176 the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
178 @code{@value{AS}} implements all the standard H8/300 opcodes. No additional
179 pseudo-instructions are needed on this family.
182 @c this table, due to the multi-col faking and hardcoded order, looks silly
183 @c except in smallbook. See comments below "@set SMALL" near top of this file.
185 The following table summarizes the H8/300 opcodes, and their arguments.
186 Entries marked @samp{*} are opcodes used only on the H8/300H.
189 @c Using @group seems to use the normal baselineskip, not the smallexample
190 @c baselineskip; looks approx doublespaced.
192 Rs @r{source register}
193 Rd @r{destination register}
194 abs @r{absolute address}
195 imm @r{immediate data}
196 disp:N @r{N-bit displacement from a register}
197 pcrel:N @r{N-bit displacement relative to program counter}
199 add.b #imm,rd * andc #imm,ccr
200 add.b rs,rd band #imm,rd
201 add.w rs,rd band #imm,@@rd
202 * add.w #imm,rd band #imm,@@abs:8
203 * add.l rs,rd bra pcrel:8
204 * add.l #imm,rd * bra pcrel:16
205 adds #imm,rd bt pcrel:8
206 addx #imm,rd * bt pcrel:16
207 addx rs,rd brn pcrel:8
208 and.b #imm,rd * brn pcrel:16
209 and.b rs,rd bf pcrel:8
210 * and.w rs,rd * bf pcrel:16
211 * and.w #imm,rd bhi pcrel:8
212 * and.l #imm,rd * bhi pcrel:16
213 * and.l rs,rd bls pcrel:8
215 * bls pcrel:16 bld #imm,rd
216 bcc pcrel:8 bld #imm,@@rd
217 * bcc pcrel:16 bld #imm,@@abs:8
218 bhs pcrel:8 bnot #imm,rd
219 * bhs pcrel:16 bnot #imm,@@rd
220 bcs pcrel:8 bnot #imm,@@abs:8
221 * bcs pcrel:16 bnot rs,rd
222 blo pcrel:8 bnot rs,@@rd
223 * blo pcrel:16 bnot rs,@@abs:8
224 bne pcrel:8 bor #imm,rd
225 * bne pcrel:16 bor #imm,@@rd
226 beq pcrel:8 bor #imm,@@abs:8
227 * beq pcrel:16 bset #imm,rd
228 bvc pcrel:8 bset #imm,@@rd
229 * bvc pcrel:16 bset #imm,@@abs:8
230 bvs pcrel:8 bset rs,rd
231 * bvs pcrel:16 bset rs,@@rd
232 bpl pcrel:8 bset rs,@@abs:8
233 * bpl pcrel:16 bsr pcrel:8
234 bmi pcrel:8 bsr pcrel:16
235 * bmi pcrel:16 bst #imm,rd
236 bge pcrel:8 bst #imm,@@rd
237 * bge pcrel:16 bst #imm,@@abs:8
238 blt pcrel:8 btst #imm,rd
239 * blt pcrel:16 btst #imm,@@rd
240 bgt pcrel:8 btst #imm,@@abs:8
241 * bgt pcrel:16 btst rs,rd
242 ble pcrel:8 btst rs,@@rd
243 * ble pcrel:16 btst rs,@@abs:8
244 bclr #imm,rd bxor #imm,rd
245 bclr #imm,@@rd bxor #imm,@@rd
246 bclr #imm,@@abs:8 bxor #imm,@@abs:8
247 bclr rs,rd cmp.b #imm,rd
248 bclr rs,@@rd cmp.b rs,rd
249 bclr rs,@@abs:8 cmp.w rs,rd
250 biand #imm,rd cmp.w rs,rd
251 biand #imm,@@rd * cmp.w #imm,rd
252 biand #imm,@@abs:8 * cmp.l #imm,rd
253 bild #imm,rd * cmp.l rs,rd
254 bild #imm,@@rd daa rs
255 bild #imm,@@abs:8 das rs
256 bior #imm,rd dec.b rs
257 bior #imm,@@rd * dec.w #imm,rd
258 bior #imm,@@abs:8 * dec.l #imm,rd
259 bist #imm,rd divxu.b rs,rd
260 bist #imm,@@rd * divxu.w rs,rd
261 bist #imm,@@abs:8 * divxs.b rs,rd
262 bixor #imm,rd * divxs.w rs,rd
263 bixor #imm,@@rd eepmov
264 bixor #imm,@@abs:8 * eepmovw
266 * exts.w rd mov.w rs,@@abs:16
267 * exts.l rd * mov.l #imm,rd
268 * extu.w rd * mov.l rs,rd
269 * extu.l rd * mov.l @@rs,rd
270 inc rs * mov.l @@(disp:16,rs),rd
271 * inc.w #imm,rd * mov.l @@(disp:24,rs),rd
272 * inc.l #imm,rd * mov.l @@rs+,rd
273 jmp @@rs * mov.l @@abs:16,rd
274 jmp abs * mov.l @@abs:24,rd
275 jmp @@@@abs:8 * mov.l rs,@@rd
276 jsr @@rs * mov.l rs,@@(disp:16,rd)
277 jsr abs * mov.l rs,@@(disp:24,rd)
278 jsr @@@@abs:8 * mov.l rs,@@-rd
279 ldc #imm,ccr * mov.l rs,@@abs:16
280 ldc rs,ccr * mov.l rs,@@abs:24
281 * ldc @@abs:16,ccr movfpe @@abs:16,rd
282 * ldc @@abs:24,ccr movtpe rs,@@abs:16
283 * ldc @@(disp:16,rs),ccr mulxu.b rs,rd
284 * ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
285 * ldc @@rs+,ccr * mulxs.b rs,rd
286 * ldc @@rs,ccr * mulxs.w rs,rd
287 * mov.b @@(disp:24,rs),rd neg.b rs
288 * mov.b rs,@@(disp:24,rd) * neg.w rs
289 mov.b @@abs:16,rd * neg.l rs
291 mov.b @@abs:8,rd not.b rs
292 mov.b rs,@@abs:8 * not.w rs
293 mov.b rs,rd * not.l rs
294 mov.b #imm,rd or.b #imm,rd
295 mov.b @@rs,rd or.b rs,rd
296 mov.b @@(disp:16,rs),rd * or.w #imm,rd
297 mov.b @@rs+,rd * or.w rs,rd
298 mov.b @@abs:8,rd * or.l #imm,rd
299 mov.b rs,@@rd * or.l rs,rd
300 mov.b rs,@@(disp:16,rd) orc #imm,ccr
301 mov.b rs,@@-rd pop.w rs
302 mov.b rs,@@abs:8 * pop.l rs
303 mov.w rs,@@rd push.w rs
304 * mov.w @@(disp:24,rs),rd * push.l rs
305 * mov.w rs,@@(disp:24,rd) rotl.b rs
306 * mov.w @@abs:24,rd * rotl.w rs
307 * mov.w rs,@@abs:24 * rotl.l rs
308 mov.w rs,rd rotr.b rs
309 mov.w #imm,rd * rotr.w rs
310 mov.w @@rs,rd * rotr.l rs
311 mov.w @@(disp:16,rs),rd rotxl.b rs
312 mov.w @@rs+,rd * rotxl.w rs
313 mov.w @@abs:16,rd * rotxl.l rs
314 mov.w rs,@@(disp:16,rd) rotxr.b rs
315 mov.w rs,@@-rd * rotxr.w rs
317 * rotxr.l rs * stc ccr,@@(disp:24,rd)
319 rte * stc ccr,@@abs:16
320 rts * stc ccr,@@abs:24
321 shal.b rs sub.b rs,rd
322 * shal.w rs sub.w rs,rd
323 * shal.l rs * sub.w #imm,rd
324 shar.b rs * sub.l rs,rd
325 * shar.w rs * sub.l #imm,rd
326 * shar.l rs subs #imm,rd
327 shll.b rs subx #imm,rd
328 * shll.w rs subx rs,rd
329 * shll.l rs * trapa #imm
330 shlr.b rs xor #imm,rd
331 * shlr.w rs xor rs,rd
332 * shlr.l rs * xor.w #imm,rd
334 stc ccr,rd * xor.l #imm,rd
335 * stc ccr,@@rs * xor.l rs,rd
336 * stc ccr,@@(disp:16,rd) xorc #imm,ccr
340 @cindex size suffixes, H8/300
341 @cindex H8/300 size suffixes
342 Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
343 @code{sub}) are defined with variants using the suffixes @samp{.b},
344 @samp{.w}, and @samp{.l} to specify the size of a memory operand.
345 @code{@value{AS}} supports these suffixes, but does not require them;
346 since one of the operands is always a register, @code{@value{AS}} can
347 deduce the correct size.
349 For example, since @code{r0} refers to a 16-bit register,
352 @exdent is equivalent to
356 If you use the size suffixes, @code{@value{AS}} issues a warning when
357 the suffix and the register size do not match.