* elf32-ppc.c (ppc_elf_check_relocs): Set pointer_equality_needed
[binutils.git] / gas / testsuite / gas / i860 / pfsm.s
blob16ecd979e49b158ca90be3211fd89b5611269be6
1 # pfsm.p family (p={ss,sd,dd})
3 .text
5 # pfsm without dual bit
6 r2s1.ss %f0,%f1,%f2
7 r2s1.sd %f3,%f4,%f5
8 r2s1.dd %f0,%f2,%f4
10 r2st.ss %f1,%f2,%f3
11 r2st.sd %f4,%f5,%f6
12 r2st.dd %f2,%f4,%f6
14 r2as1.ss %f2,%f3,%f4
15 r2as1.sd %f6,%f7,%f8
16 r2as1.dd %f4,%f6,%f8
18 r2ast.ss %f3,%f4,%f5
19 r2ast.sd %f7,%f8,%f9
20 r2ast.dd %f6,%f8,%f10
22 i2s1.ss %f4,%f5,%f6
23 i2s1.sd %f8,%f9,%f10
24 i2s1.dd %f12,%f14,%f16
26 i2st.ss %f7,%f8,%f9
27 i2st.sd %f11,%f12,%f13
28 i2st.dd %f14,%f16,%f18
30 i2as1.ss %f10,%f11,%f12
31 i2as1.sd %f14,%f15,%f16
32 i2as1.dd %f16,%f18,%f20
34 i2ast.ss %f13,%f14,%f15
35 i2ast.sd %f17,%f18,%f19
36 i2ast.dd %f18,%f20,%f22
38 rat1s2.ss %f14,%f15,%f16
39 rat1s2.sd %f20,%f21,%f22
40 rat1s2.dd %f20,%f22,%f24
42 m12asm.ss %f15,%f16,%f17
43 m12asm.sd %f23,%f24,%f25
44 m12asm.dd %f22,%f24,%f26
46 ra1s2.ss %f18,%f19,%f20
47 ra1s2.sd %f26,%f27,%f28
48 ra1s2.dd %f20,%f22,%f24
50 m12ttsa.ss %f19,%f20,%f21
51 m12ttsa.sd %f29,%f30,%f31
52 m12ttsa.dd %f22,%f24,%f26
54 iat1s2.ss %f20,%f21,%f22
55 iat1s2.sd %f0,%f1,%f2
56 iat1s2.dd %f24,%f26,%f28
58 m12tsm.ss %f21,%f22,%f23
59 m12tsm.sd %f3,%f4,%f5
60 m12tsm.dd %f30,%f0,%f2
62 ia1s2.ss %f22,%f23,%f24
63 ia1s2.sd %f6,%f7,%f8
64 ia1s2.dd %f4,%f6,%f8
66 m12tsa.ss %f23,%f24,%f25
67 m12tsa.sd %f9,%f10,%f11
68 m12tsa.dd %f6,%f8,%f10
70 # pfsm with dual bit
71 d.r2s1.ss %f0,%f1,%f2
72 nop
73 d.r2s1.sd %f3,%f4,%f5
74 nop
75 d.r2s1.dd %f0,%f2,%f4
76 nop
78 d.r2st.ss %f1,%f2,%f3
79 nop
80 d.r2st.sd %f4,%f5,%f6
81 nop
82 d.r2st.dd %f2,%f4,%f6
83 nop
85 d.r2as1.ss %f2,%f3,%f4
86 nop
87 d.r2as1.sd %f6,%f7,%f8
88 nop
89 d.r2as1.dd %f4,%f6,%f8
90 nop
92 d.r2ast.ss %f3,%f4,%f5
93 nop
94 d.r2ast.sd %f7,%f8,%f9
95 nop
96 d.r2ast.dd %f6,%f8,%f10
97 nop
99 d.i2s1.ss %f4,%f5,%f6
101 d.i2s1.sd %f8,%f9,%f10
103 d.i2s1.dd %f12,%f14,%f16
106 d.i2st.ss %f7,%f8,%f9
108 d.i2st.sd %f11,%f12,%f13
110 d.i2st.dd %f14,%f16,%f18
113 d.i2as1.ss %f10,%f11,%f12
115 d.i2as1.sd %f14,%f15,%f16
117 d.i2as1.dd %f16,%f18,%f20
120 d.i2ast.ss %f13,%f14,%f15
122 d.i2ast.sd %f17,%f18,%f19
124 d.i2ast.dd %f18,%f20,%f22
127 d.rat1s2.ss %f14,%f15,%f16
129 d.rat1s2.sd %f20,%f21,%f22
131 d.rat1s2.dd %f20,%f22,%f24
134 d.m12asm.ss %f15,%f16,%f17
136 d.m12asm.sd %f23,%f24,%f25
138 d.m12asm.dd %f22,%f24,%f26
141 d.ra1s2.ss %f18,%f19,%f20
143 d.ra1s2.sd %f26,%f27,%f28
145 d.ra1s2.dd %f20,%f22,%f24
148 d.m12ttsa.ss %f19,%f20,%f21
150 d.m12ttsa.sd %f29,%f30,%f31
152 d.m12ttsa.dd %f22,%f24,%f26
155 d.iat1s2.ss %f20,%f21,%f22
157 d.iat1s2.sd %f0,%f1,%f2
159 d.iat1s2.dd %f24,%f26,%f28
162 d.m12tsm.ss %f21,%f22,%f23
164 d.m12tsm.sd %f3,%f4,%f5
166 d.m12tsm.dd %f30,%f0,%f2
169 d.ia1s2.ss %f22,%f23,%f24
171 d.ia1s2.sd %f6,%f7,%f8
173 d.ia1s2.dd %f4,%f6,%f8
176 d.m12tsa.ss %f23,%f24,%f25
178 d.m12tsa.sd %f9,%f10,%f11
180 d.m12tsa.dd %f6,%f8,%f10