* elf32-ppc.c (ppc_elf_check_relocs): Set pointer_equality_needed
[binutils.git] / ld / testsuite / ld-frv / fdpic-shared-2.d
blobcb4b68dae0c127615238a0f8d1b7ce252622fa6a
1 #name: FRV uClinux PIC relocs to (mostly) global symbols, shared linking
2 #source: fdpic2.s
3 #objdump: -DR -j .text -j .data -j .got -j .plt
4 #ld: -shared --version-script fdpic2min.ldv
6 .*: file format elf.*frv.*
8 Disassembly of section \.plt:
10 [0-9a-f ]+ <\.plt>:
11 [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
12 [0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F2-0x10>
13 [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0
14 [0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F2-0x10>
15 [0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0
16 [0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F2-0x10>
17 [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
18 [0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
19 [0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\)
20 [0-9a-f ]+: 9c cc ff f8 lddi @\(gr15,-8\),gr14
21 [0-9a-f ]+: 80 30 e0 00 jmpl @\(gr14,gr0\)
22 Disassembly of section \.text:
24 [0-9a-f ]+<F2>:
25 [0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F2-0x8>
27 [0-9a-f ]+<GF0>:
28 [0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0
29 [0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0
30 [0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0
31 [0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
32 [0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0
33 [0-9a-f ]+: 80 fc 00 18 setlos 0x18,gr0
34 [0-9a-f ]+: 80 f4 00 14 setlo 0x14,gr0
35 [0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
36 [0-9a-f ]+: 80 40 ff f0 addi gr15,-16,gr0
37 [0-9a-f ]+: 80 fc ff e8 setlos 0xf*ffffffe8,gr0
38 [0-9a-f ]+: 80 f4 ff e0 setlo 0xffe0,gr0
39 [0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0
40 [0-9a-f ]+: 80 40 ff d8 addi gr15,-40,gr0
41 [0-9a-f ]+: 80 fc ff d8 setlos 0xf+fd8,gr0
42 [0-9a-f ]+: 80 f4 ff d8 setlo 0xffd8,gr0
43 [0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0
44 [0-9a-f ]+: 80 f4 00 1c setlo 0x1c,gr0
45 [0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
46 Disassembly of section \.dat[0-9a-f ]+:
48 [0-9a-f ]+<D2>:
49 [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
50 [0-9a-f ]+: R_FRV_32 GD0
52 [0-9a-f ]+<GD0>:
53 \.\.\.
54 [0-9a-f ]+: R_FRV_FUNCDESC GFb
55 [0-9a-f ]+: R_FRV_32 GFb
56 [0-9A-F ]+isassembly of section \.got:
58 [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
59 [0-9a-f ]+: 00 00 04 a4 .*
60 [0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF9
61 [0-9a-f ]+: 00 00 00 00 .*
62 [0-9a-f ]+: 00 00 04 9c .*
63 [0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF8
64 [0-9a-f ]+: 00 00 00 00 .*
65 [0-9a-f ]+: 00 00 04 ac .*
66 [0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF7
67 [0-9a-f ]+: 00 00 00 00 .*
68 [0-9a-f ]+: 00 00 04 94 .*
69 [0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF0
70 [0-9a-f ]+: 00 00 00 00 .*
72 [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>:
73 \.\.\.
74 [0-9a-f ]+: R_FRV_FUNCDESC GF4
75 [0-9a-f ]+: R_FRV_32 GF1
76 [0-9a-f ]+: R_FRV_FUNCDESC GF6
77 [0-9a-f ]+: R_FRV_FUNCDESC GF5
78 [0-9a-f ]+: R_FRV_32 GD4
79 [0-9a-f ]+: R_FRV_32 GF3
80 [0-9a-f ]+: R_FRV_32 GF2