1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #include "opcode/hppa.h"
26 /* Integer register names, indexed by the numbers which appear in the
28 static const char *const reg_names
[] =
29 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
30 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
31 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
34 /* Floating point register names, indexed by the numbers which appear in the
36 static const char *const fp_reg_names
[] =
37 {"fpsr", "fpe2", "fpe4", "fpe6",
38 "fr4", "fr5", "fr6", "fr7", "fr8",
39 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
40 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
41 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
43 typedef unsigned int CORE_ADDR
;
45 /* Get at various relevent fields of an instruction word. */
50 #define MASK_14 0x3fff
51 #define MASK_16 0xffff
52 #define MASK_21 0x1fffff
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char *const control_reg
[] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
70 static const char *const compare_cond_names
[] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
74 static const char *const compare_cond_64_names
[] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
78 static const char *const cmpib_cond_64_names
[] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
81 static const char *const add_cond_names
[] = {
82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
85 static const char *const add_cond_64_names
[] = {
86 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
89 static const char *const wide_add_cond_names
[] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
93 static const char *const logical_cond_names
[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
96 static const char *const logical_cond_64_names
[] = {
97 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
99 static const char *const unit_cond_names
[] = {
100 "", ",swz", ",sbz", ",shz", ",sdc", ",swc", ",sbc", ",shc",
101 ",tr", ",nwz", ",nbz", ",nhz", ",ndc", ",nwc", ",nbc", ",nhc"
103 static const char *const unit_cond_64_names
[] = {
104 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
107 static const char *const shift_cond_names
[] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
110 static const char *const shift_cond_64_names
[] = {
111 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
113 static const char *const bb_cond_64_names
[] = {
116 static const char *const index_compl_names
[] = {"", ",m", ",s", ",sm"};
117 static const char *const short_ldst_compl_names
[] = {"", ",ma", "", ",mb"};
118 static const char *const short_bytes_compl_names
[] = {
119 "", ",b,m", ",e", ",e,m"
121 static const char *const float_format_names
[] = {",sgl", ",dbl", "", ",quad"};
122 static const char *const float_comp_names
[] =
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
129 static const char *const signed_unsigned_names
[] = {",u", ",s"};
130 static const char *const mix_half_names
[] = {",l", ",r"};
131 static const char *const saturation_names
[] = {",us", ",ss", 0, ""};
132 static const char *const read_write_names
[] = {",r", ",w"};
133 static const char *const add_compl_names
[] = { 0, "", ",l", ",tsv" };
135 /* For a bunch of different instructions form an index into a
136 completer name table. */
137 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
138 GET_FIELD (insn, 18, 18) << 1)
140 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
141 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
143 /* Utility function to print registers. Put these first, so gcc's function
144 inlining can do its stuff. */
146 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
151 disassemble_info
*info
;
153 (*info
->fprintf_func
) (info
->stream
, reg
? reg_names
[reg
] : "r0");
157 fput_fp_reg (reg
, info
)
159 disassemble_info
*info
;
161 (*info
->fprintf_func
) (info
->stream
, reg
? fp_reg_names
[reg
] : "fr0");
165 fput_fp_reg_r (reg
, info
)
167 disassemble_info
*info
;
169 /* Special case floating point exception registers. */
171 (*info
->fprintf_func
) (info
->stream
, "fpe%d", reg
* 2 + 1);
173 (*info
->fprintf_func
) (info
->stream
, "%sR", reg
? fp_reg_names
[reg
]
178 fput_creg (reg
, info
)
180 disassemble_info
*info
;
182 (*info
->fprintf_func
) (info
->stream
, control_reg
[reg
]);
185 /* Print constants with sign. */
188 fput_const (num
, info
)
190 disassemble_info
*info
;
193 (*info
->fprintf_func
) (info
->stream
, "-%x", -(int)num
);
195 (*info
->fprintf_func
) (info
->stream
, "%x", num
);
198 /* Routines to extract various sized constants out of hppa
201 /* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */
206 return GET_FIELD (word
, 18, 18) << 2 | GET_FIELD (word
, 16, 17);
210 extract_5_load (word
)
213 return low_sign_extend (word
>> 16 & MASK_5
, 5);
216 /* Extract the immediate field from a st{bhw}s instruction. */
218 extract_5_store (word
)
221 return low_sign_extend (word
& MASK_5
, 5);
224 /* Extract the immediate field from a break instruction. */
226 extract_5r_store (word
)
229 return (word
& MASK_5
);
232 /* Extract the immediate field from a {sr}sm instruction. */
234 extract_5R_store (word
)
237 return (word
>> 16 & MASK_5
);
240 /* Extract the 10 bit immediate field from a {sr}sm instruction. */
242 extract_10U_store (word
)
245 return (word
>> 16 & MASK_10
);
248 /* Extract the immediate field from a bb instruction. */
250 extract_5Q_store (word
)
253 return (word
>> 21 & MASK_5
);
256 /* Extract an 11 bit immediate field. */
261 return low_sign_extend (word
& MASK_11
, 11);
264 /* Extract a 14 bit immediate field. */
269 return low_sign_extend (word
& MASK_14
, 14);
272 /* Extract a 16 bit immediate field (PA2.0 wide only). */
278 m0
= GET_BIT (word
, 16);
279 m1
= GET_BIT (word
, 17);
280 m15
= GET_BIT (word
, 31);
281 word
= (word
>> 1) & 0x1fff;
282 word
= word
| (m15
<< 15) | ((m15
^ m0
) << 14) | ((m15
^ m1
) << 13);
283 return sign_extend (word
, 16);
286 /* Extract a 21 bit constant. */
296 val
= GET_FIELD (word
, 20, 20);
298 val
|= GET_FIELD (word
, 9, 19);
300 val
|= GET_FIELD (word
, 5, 6);
302 val
|= GET_FIELD (word
, 0, 4);
304 val
|= GET_FIELD (word
, 7, 8);
305 return sign_extend (val
, 21) << 11;
308 /* Extract a 12 bit constant from branch instructions. */
314 return sign_extend (GET_FIELD (word
, 19, 28) |
315 GET_FIELD (word
, 29, 29) << 10 |
316 (word
& 0x1) << 11, 12) << 2;
319 /* Extract a 17 bit constant from branch instructions, returning the
320 19 bit signed value. */
326 return sign_extend (GET_FIELD (word
, 19, 28) |
327 GET_FIELD (word
, 29, 29) << 10 |
328 GET_FIELD (word
, 11, 15) << 11 |
329 (word
& 0x1) << 16, 17) << 2;
336 return sign_extend (GET_FIELD (word
, 19, 28) |
337 GET_FIELD (word
, 29, 29) << 10 |
338 GET_FIELD (word
, 11, 15) << 11 |
339 GET_FIELD (word
, 6, 10) << 16 |
340 (word
& 0x1) << 21, 22) << 2;
343 /* Print one instruction. */
345 print_insn_hppa (memaddr
, info
)
347 disassemble_info
*info
;
350 unsigned int insn
, i
;
354 (*info
->read_memory_func
) (memaddr
, buffer
, sizeof (buffer
), info
);
357 (*info
->memory_error_func
) (status
, memaddr
, info
);
362 insn
= bfd_getb32 (buffer
);
364 for (i
= 0; i
< NUMOPCODES
; ++i
)
366 const struct pa_opcode
*opcode
= &pa_opcodes
[i
];
367 if ((insn
& opcode
->mask
) == opcode
->match
)
369 register const char *s
;
371 if (opcode
->arch
== pa20w
)
374 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
376 if (!strchr ("cfCY?-+nHNZFIuv", opcode
->args
[0]))
377 (*info
->fprintf_func
) (info
->stream
, " ");
378 for (s
= opcode
->args
; *s
!= '\0'; ++s
)
383 fput_reg (GET_FIELD (insn
, 11, 15), info
);
387 fput_reg (GET_FIELD (insn
, 6, 10), info
);
390 fput_creg (GET_FIELD (insn
, 6, 10), info
);
393 fput_reg (GET_FIELD (insn
, 27, 31), info
);
396 /* Handle floating point registers. */
401 fput_fp_reg (GET_FIELD (insn
, 27, 31), info
);
404 if (GET_FIELD (insn
, 25, 25))
405 fput_fp_reg_r (GET_FIELD (insn
, 27, 31), info
);
407 fput_fp_reg (GET_FIELD (insn
, 27, 31), info
);
410 if (GET_FIELD (insn
, 25, 25))
411 fput_fp_reg_r (GET_FIELD (insn
, 6, 10), info
);
413 fput_fp_reg (GET_FIELD (insn
, 6, 10), info
);
416 /* 'fA' will not generate a space before the regsiter
417 name. Normally that is fine. Except that it
418 causes problems with xmpyu which has no FP format
421 fputs_filtered (" ", info
);
426 if (GET_FIELD (insn
, 24, 24))
427 fput_fp_reg_r (GET_FIELD (insn
, 6, 10), info
);
429 fput_fp_reg (GET_FIELD (insn
, 6, 10), info
);
433 if (GET_FIELD (insn
, 25, 25))
434 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
436 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
439 if (GET_FIELD (insn
, 19, 19))
440 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
442 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
446 int reg
= GET_FIELD (insn
, 21, 22);
447 reg
|= GET_FIELD (insn
, 16, 18) << 2;
448 if (GET_FIELD (insn
, 23, 23) != 0)
449 fput_fp_reg_r (reg
, info
);
451 fput_fp_reg (reg
, info
);
456 int reg
= GET_FIELD (insn
, 6, 10);
458 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
459 fput_fp_reg (reg
, info
);
464 int reg
= GET_FIELD (insn
, 11, 15);
466 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
467 fput_fp_reg (reg
, info
);
472 int reg
= GET_FIELD (insn
, 27, 31);
474 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
475 fput_fp_reg (reg
, info
);
480 int reg
= GET_FIELD (insn
, 21, 25);
482 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
483 fput_fp_reg (reg
, info
);
488 int reg
= GET_FIELD (insn
, 16, 20);
490 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
491 fput_fp_reg (reg
, info
);
495 /* 'fe' will not generate a space before the register
496 name. Normally that is fine. Except that it
497 causes problems with fstw fe,y(b) which has no FP
500 fputs_filtered (" ", info
);
505 if (GET_FIELD (insn
, 30, 30))
506 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
508 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
511 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
517 fput_const (extract_5_load (insn
), info
);
520 (*info
->fprintf_func
) (info
->stream
,
521 "sr%d", GET_FIELD (insn
, 16, 17));
525 (*info
->fprintf_func
) (info
->stream
, "sr%d", extract_3 (insn
));
528 /* Handle completers. */
533 (*info
->fprintf_func
) (info
->stream
, "%s ",
534 index_compl_names
[GET_COMPL (insn
)]);
537 (*info
->fprintf_func
) (info
->stream
, "%s ",
538 short_ldst_compl_names
[GET_COMPL (insn
)]);
541 (*info
->fprintf_func
) (info
->stream
, "%s ",
542 short_bytes_compl_names
[GET_COMPL (insn
)]);
546 switch (GET_FIELD (insn
, 20, 21))
549 (*info
->fprintf_func
) (info
->stream
, ",bc ");
552 (*info
->fprintf_func
) (info
->stream
, ",sl ");
555 (*info
->fprintf_func
) (info
->stream
, " ");
559 switch (GET_FIELD (insn
, 20, 21))
562 (*info
->fprintf_func
) (info
->stream
, ",co ");
565 (*info
->fprintf_func
) (info
->stream
, " ");
569 (*info
->fprintf_func
) (info
->stream
, ",o");
572 (*info
->fprintf_func
) (info
->stream
, ",gate");
575 (*info
->fprintf_func
) (info
->stream
, ",l,push");
578 (*info
->fprintf_func
) (info
->stream
, ",pop");
582 (*info
->fprintf_func
) (info
->stream
, ",l");
585 (*info
->fprintf_func
) (info
->stream
, "%s ",
586 read_write_names
[GET_FIELD (insn
, 25, 25)]);
589 (*info
->fprintf_func
) (info
->stream
, ",w");
592 if (GET_FIELD (insn
, 23, 26) == 5)
593 (*info
->fprintf_func
) (info
->stream
, ",r");
596 if (GET_FIELD (insn
, 26, 26))
597 (*info
->fprintf_func
) (info
->stream
, ",m ");
599 (*info
->fprintf_func
) (info
->stream
, " ");
602 if (GET_FIELD (insn
, 25, 25))
603 (*info
->fprintf_func
) (info
->stream
, ",i");
606 if (!GET_FIELD (insn
, 21, 21))
607 (*info
->fprintf_func
) (info
->stream
, ",z");
610 (*info
->fprintf_func
)
611 (info
->stream
, "%s", add_compl_names
[GET_FIELD
615 (*info
->fprintf_func
)
616 (info
->stream
, ",dc%s", add_compl_names
[GET_FIELD
620 (*info
->fprintf_func
)
621 (info
->stream
, ",c%s", add_compl_names
[GET_FIELD
625 if (GET_FIELD (insn
, 20, 20))
626 (*info
->fprintf_func
) (info
->stream
, ",tsv");
629 (*info
->fprintf_func
) (info
->stream
, ",tc");
630 if (GET_FIELD (insn
, 20, 20))
631 (*info
->fprintf_func
) (info
->stream
, ",tsv");
634 (*info
->fprintf_func
) (info
->stream
, ",db");
635 if (GET_FIELD (insn
, 20, 20))
636 (*info
->fprintf_func
) (info
->stream
, ",tsv");
639 (*info
->fprintf_func
) (info
->stream
, ",b");
640 if (GET_FIELD (insn
, 20, 20))
641 (*info
->fprintf_func
) (info
->stream
, ",tsv");
644 if (GET_FIELD (insn
, 25, 25))
645 (*info
->fprintf_func
) (info
->stream
, ",tc");
648 /* EXTRD/W has a following condition. */
650 (*info
->fprintf_func
)
651 (info
->stream
, "%s", signed_unsigned_names
[GET_FIELD
654 (*info
->fprintf_func
)
655 (info
->stream
, "%s ", signed_unsigned_names
[GET_FIELD
659 (*info
->fprintf_func
)
660 (info
->stream
, "%s", mix_half_names
[GET_FIELD
664 (*info
->fprintf_func
)
665 (info
->stream
, "%s", saturation_names
[GET_FIELD
669 (*info
->fprintf_func
)
670 (info
->stream
, ",%d%d%d%d ",
671 GET_FIELD (insn
, 17, 18), GET_FIELD (insn
, 20, 21),
672 GET_FIELD (insn
, 22, 23), GET_FIELD (insn
, 24, 25));
679 m
= GET_FIELD (insn
, 28, 28);
680 a
= GET_FIELD (insn
, 29, 29);
683 fputs_filtered (",ma ", info
);
685 fputs_filtered (",mb ", info
);
687 fputs_filtered (" ", info
);
693 int opcode
= GET_FIELD (insn
, 0, 5);
695 if (opcode
== 0x16 || opcode
== 0x1e)
697 if (GET_FIELD (insn
, 29, 29) == 0)
698 fputs_filtered (",ma ", info
);
700 fputs_filtered (",mb ", info
);
703 fputs_filtered (" ", info
);
709 int opcode
= GET_FIELD (insn
, 0, 5);
711 if (opcode
== 0x13 || opcode
== 0x1b)
713 if (GET_FIELD (insn
, 18, 18) == 1)
714 fputs_filtered (",mb ", info
);
716 fputs_filtered (",ma ", info
);
718 else if (opcode
== 0x17 || opcode
== 0x1f)
720 if (GET_FIELD (insn
, 31, 31) == 1)
721 fputs_filtered (",ma ", info
);
723 fputs_filtered (",mb ", info
);
726 fputs_filtered (" ", info
);
733 /* Handle conditions. */
740 (*info
->fprintf_func
) (info
->stream
, "%s ",
741 float_comp_names
[GET_FIELD
745 /* these four conditions are for the set of instructions
746 which distinguish true/false conditions by opcode
747 rather than by the 'f' bit (sigh): comb, comib,
750 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)],
754 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)
755 + GET_FIELD (insn
, 4, 4) * 8], info
);
758 fputs_filtered (compare_cond_64_names
[GET_FIELD (insn
, 16, 18)
759 + GET_FIELD (insn
, 2, 2) * 8], info
);
762 fputs_filtered (cmpib_cond_64_names
[GET_FIELD (insn
, 16, 18)],
766 fputs_filtered (add_cond_names
[GET_FIELD (insn
, 16, 18)
767 + GET_FIELD (insn
, 4, 4) * 8], info
);
770 (*info
->fprintf_func
) (info
->stream
, "%s ",
771 compare_cond_names
[GET_COND (insn
)]);
774 (*info
->fprintf_func
) (info
->stream
, "%s ",
775 compare_cond_64_names
[GET_COND (insn
)]);
778 (*info
->fprintf_func
) (info
->stream
, "%s ",
779 add_cond_names
[GET_COND (insn
)]);
782 (*info
->fprintf_func
) (info
->stream
, "%s ",
783 add_cond_64_names
[GET_COND (insn
)]);
786 (*info
->fprintf_func
) (info
->stream
, "%s",
787 add_cond_names
[GET_FIELD (insn
, 16, 18)]);
791 (*info
->fprintf_func
)
793 wide_add_cond_names
[GET_FIELD (insn
, 16, 18) +
794 GET_FIELD (insn
, 4, 4) * 8]);
798 (*info
->fprintf_func
) (info
->stream
, "%s ",
799 logical_cond_names
[GET_COND (insn
)]);
802 (*info
->fprintf_func
) (info
->stream
, "%s ",
803 logical_cond_64_names
[GET_COND (insn
)]);
806 (*info
->fprintf_func
) (info
->stream
, "%s ",
807 unit_cond_names
[GET_COND (insn
)]);
810 (*info
->fprintf_func
) (info
->stream
, "%s ",
811 unit_cond_64_names
[GET_COND (insn
)]);
816 (*info
->fprintf_func
)
818 shift_cond_names
[GET_FIELD (insn
, 16, 18)]);
820 /* If the next character in args is 'n', it will handle
821 putting out the space. */
823 (*info
->fprintf_func
) (info
->stream
, " ");
826 (*info
->fprintf_func
) (info
->stream
, "%s ",
827 shift_cond_64_names
[GET_FIELD (insn
, 16, 18)]);
830 (*info
->fprintf_func
)
832 bb_cond_64_names
[GET_FIELD (insn
, 16, 16)]);
834 /* If the next character in args is 'n', it will handle
835 putting out the space. */
837 (*info
->fprintf_func
) (info
->stream
, " ");
844 fput_const (extract_5_store (insn
), info
);
847 fput_const (extract_5r_store (insn
), info
);
850 fput_const (extract_5R_store (insn
), info
);
853 fput_const (extract_10U_store (insn
), info
);
857 fput_const (extract_5Q_store (insn
), info
);
860 fput_const (extract_11 (insn
), info
);
863 fput_const (extract_14 (insn
), info
);
866 fput_const (extract_21 (insn
), info
);
869 /* 16-bit long disp., PA2.0 wide only. */
870 fput_const (extract_16 (insn
), info
);
874 (*info
->fprintf_func
) (info
->stream
, ",n ");
876 (*info
->fprintf_func
) (info
->stream
, " ");
879 if ((insn
& 0x20) && s
[1])
880 (*info
->fprintf_func
) (info
->stream
, ",n ");
881 else if (insn
& 0x20)
882 (*info
->fprintf_func
) (info
->stream
, ",n");
884 (*info
->fprintf_func
) (info
->stream
, " ");
887 (*info
->print_address_func
) (memaddr
+ 8 + extract_12 (insn
),
891 /* 17 bit PC-relative branch. */
892 (*info
->print_address_func
) ((memaddr
+ 8
893 + extract_17 (insn
)),
897 /* 17 bit displacement. This is an offset from a register
898 so it gets disasssembled as just a number, not any sort
900 fput_const (extract_17 (insn
), info
);
904 /* addil %r1 implicit output. */
905 (*info
->fprintf_func
) (info
->stream
, "%%r1");
909 /* be,l %sr0,%r31 implicit output. */
910 (*info
->fprintf_func
) (info
->stream
, "%%sr0,%%r31");
914 (*info
->fprintf_func
) (info
->stream
, "0");
918 (*info
->fprintf_func
) (info
->stream
, "%d",
919 GET_FIELD (insn
, 24, 25));
922 (*info
->fprintf_func
) (info
->stream
, "%d",
923 GET_FIELD (insn
, 22, 25));
926 (*info
->fprintf_func
) (info
->stream
, "%%sar");
929 (*info
->fprintf_func
) (info
->stream
, "%d",
930 31 - GET_FIELD (insn
, 22, 26));
935 num
= GET_FIELD (insn
, 20, 20) << 5;
936 num
|= GET_FIELD (insn
, 22, 26);
937 (*info
->fprintf_func
) (info
->stream
, "%d", 63 - num
);
941 (*info
->fprintf_func
) (info
->stream
, "%d",
942 GET_FIELD (insn
, 22, 26));
947 num
= GET_FIELD (insn
, 20, 20) << 5;
948 num
|= GET_FIELD (insn
, 22, 26);
949 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
953 (*info
->fprintf_func
) (info
->stream
, "%d",
954 32 - GET_FIELD (insn
, 27, 31));
959 num
= (GET_FIELD (insn
, 23, 23) + 1) * 32;
960 num
-= GET_FIELD (insn
, 27, 31);
961 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
967 num
= (GET_FIELD (insn
, 19, 19) + 1) * 32;
968 num
-= GET_FIELD (insn
, 27, 31);
969 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
973 fput_const (GET_FIELD (insn
, 20, 28), info
);
976 fput_const (GET_FIELD (insn
, 6, 18), info
);
979 fput_const (GET_FIELD (insn
, 6, 31), info
);
982 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
985 fput_const ((GET_FIELD (insn
, 6,20) << 5 |
986 GET_FIELD (insn
, 27, 31)), info
);
989 fput_const (GET_FIELD (insn
, 6, 20), info
);
992 fput_const ((GET_FIELD (insn
, 6, 22) << 5 |
993 GET_FIELD (insn
, 27, 31)), info
);
996 fput_const ((GET_FIELD (insn
, 11, 20) << 5 |
997 GET_FIELD (insn
, 27, 31)), info
);
1000 fput_const ((GET_FIELD (insn
, 16, 20) << 5 |
1001 GET_FIELD (insn
, 27, 31)), info
);
1004 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
1007 /* if no destination completer and not before a completer
1008 for fcmp, need a space here */
1009 if (s
[1] == 'G' || s
[1] == '?')
1010 fputs_filtered (float_format_names
[GET_FIELD (insn
, 19, 20)],
1013 (*info
->fprintf_func
) (info
->stream
, "%s ",
1014 float_format_names
[GET_FIELD
1018 (*info
->fprintf_func
) (info
->stream
, "%s ",
1019 float_format_names
[GET_FIELD (insn
,
1023 if (GET_FIELD (insn
, 26, 26) == 1)
1024 (*info
->fprintf_func
) (info
->stream
, "%s ",
1025 float_format_names
[0]);
1027 (*info
->fprintf_func
) (info
->stream
, "%s ",
1028 float_format_names
[1]);
1031 /* if no destination completer and not before a completer
1032 for fcmp, need a space here */
1034 fputs_filtered (float_format_names
[GET_FIELD (insn
, 20, 20)],
1037 (*info
->fprintf_func
) (info
->stream
, "%s ",
1038 float_format_names
[GET_FIELD
1043 fput_const (extract_14 (insn
), info
);
1048 int sign
= GET_FIELD (insn
, 31, 31);
1049 int imm10
= GET_FIELD (insn
, 18, 27);
1053 disp
= (-1 << 10) | imm10
;
1058 fput_const (disp
, info
);
1064 int sign
= GET_FIELD (insn
, 31, 31);
1065 int imm11
= GET_FIELD (insn
, 18, 28);
1069 disp
= (-1 << 11) | imm11
;
1074 fput_const (disp
, info
);
1080 /* 16-bit long disp., PA2.0 wide only. */
1081 int disp
= extract_16 (insn
);
1083 fput_const (disp
, info
);
1089 /* 16-bit long disp., PA2.0 wide only. */
1090 int disp
= extract_16 (insn
);
1092 fput_const (disp
, info
);
1099 fputs_filtered ("Disassembler botch.\n", info
);
1104 int y
= GET_FIELD (insn
, 16, 18);
1107 fput_const ((y
^ 1) - 1, info
);
1115 cbit
= GET_FIELD (insn
, 16, 18);
1118 (*info
->fprintf_func
) (info
->stream
, ",%d", cbit
- 1);
1124 int cond
= GET_FIELD (insn
, 27, 31);
1127 fputs_filtered (" ", info
);
1129 fputs_filtered ("acc ", info
);
1131 fputs_filtered ("rej ", info
);
1133 fputs_filtered ("acc8 ", info
);
1135 fputs_filtered ("rej8 ", info
);
1137 fputs_filtered ("acc6 ", info
);
1138 else if (cond
== 13)
1139 fputs_filtered ("acc4 ", info
);
1140 else if (cond
== 17)
1141 fputs_filtered ("acc2 ", info
);
1146 (*info
->print_address_func
) ((memaddr
+ 8
1147 + extract_22 (insn
)),
1151 fputs_filtered (",%r2", info
);
1154 (*info
->fprintf_func
) (info
->stream
, "%c", *s
);
1158 return sizeof(insn
);
1161 (*info
->fprintf_func
) (info
->stream
, "#%8x", insn
);
1162 return sizeof(insn
);