| blob | dcb8ab0f6f29b1b0d477198a0236629daaca8456 |
1 @section Relocations
2 BFD maintains relocations in much the same way it maintains
3 symbols: they are left alone until required, then read in
4 en-masse and translated into an internal form. A common
5 routine @code{bfd_perform_relocation} acts upon the
6 canonical form to do the fixup.
8 Relocations are maintained on a per section basis,
9 while symbols are maintained on a per BFD basis.
11 All that a back end has to do to fit the BFD interface is to create
12 a @code{struct reloc_cache_entry} for each relocation
13 in a particular section, and fill in the right bits of the structures.
15 @menu
16 * typedef arelent::
17 * howto manager::
18 @end menu
21 @node typedef arelent, howto manager, Relocations, Relocations
22 @subsection typedef arelent
23 This is the structure of a relocation entry:
26 @example
28 typedef enum bfd_reloc_status
29 @{
30 /* No errors detected */
31 bfd_reloc_ok,
33 /* The relocation was performed, but there was an overflow. */
34 bfd_reloc_overflow,
36 /* The address to relocate was not within the section supplied. */
37 bfd_reloc_outofrange,
39 /* Used by special functions */
40 bfd_reloc_continue,
42 /* Unsupported relocation size requested. */
43 bfd_reloc_notsupported,
45 /* Unused */
46 bfd_reloc_other,
48 /* The symbol to relocate against was undefined. */
49 bfd_reloc_undefined,
51 /* The relocation was performed, but may not be ok - presently
52 generated only when linking i960 coff files with i960 b.out
53 symbols. If this type is returned, the error_message argument
54 to bfd_perform_relocation will be set. */
55 bfd_reloc_dangerous
56 @}
57 bfd_reloc_status_type;
60 typedef struct reloc_cache_entry
61 @{
62 /* A pointer into the canonical table of pointers */
63 struct symbol_cache_entry **sym_ptr_ptr;
65 /* offset in section */
66 bfd_size_type address;
68 /* addend for relocation value */
69 bfd_vma addend;
71 /* Pointer to how to perform the required relocation */
72 reloc_howto_type *howto;
74 @} arelent;
75 @end example
76 @strong{Description}@*
77 Here is a description of each of the fields within an @code{arelent}:
79 @itemize @bullet
81 @item
82 @code{sym_ptr_ptr}
83 @end itemize
84 The symbol table pointer points to a pointer to the symbol
85 associated with the relocation request. It is
86 the pointer into the table returned by the back end's
87 @code{get_symtab} action. @xref{Symbols}. The symbol is referenced
88 through a pointer to a pointer so that tools like the linker
89 can fix up all the symbols of the same name by modifying only
90 one pointer. The relocation routine looks in the symbol and
91 uses the base of the section the symbol is attached to and the
92 value of the symbol as the initial relocation offset. If the
93 symbol pointer is zero, then the section provided is looked up.
95 @itemize @bullet
97 @item
98 @code{address}
99 @end itemize
100 The @code{address} field gives the offset in bytes from the base of
101 the section data which owns the relocation record to the first
102 byte of relocatable information. The actual data relocated
103 will be relative to this point; for example, a relocation
104 type which modifies the bottom two bytes of a four byte word
105 would not touch the first byte pointed to in a big endian
106 world.
108 @itemize @bullet
110 @item
111 @code{addend}
112 @end itemize
113 The @code{addend} is a value provided by the back end to be added (!)
114 to the relocation offset. Its interpretation is dependent upon
115 the howto. For example, on the 68k the code:
117 @example
118 char foo[];
119 main()
120 @{
121 return foo[0x12345678];
122 @}
123 @end example
125 Could be compiled into:
127 @example
128 linkw fp,#-4
129 moveb @@#12345678,d0
130 extbl d0
131 unlk fp
132 rts
133 @end example
135 This could create a reloc pointing to @code{foo}, but leave the
136 offset in the data, something like:
138 @example
139 RELOCATION RECORDS FOR [.text]:
140 offset type value
141 00000006 32 _foo
143 00000000 4e56 fffc ; linkw fp,#-4
144 00000004 1039 1234 5678 ; moveb @@#12345678,d0
145 0000000a 49c0 ; extbl d0
146 0000000c 4e5e ; unlk fp
147 0000000e 4e75 ; rts
148 @end example
150 Using coff and an 88k, some instructions don't have enough
151 space in them to represent the full address range, and
152 pointers have to be loaded in two parts. So you'd get something like:
154 @example
155 or.u r13,r0,hi16(_foo+0x12345678)
156 ld.b r2,r13,lo16(_foo+0x12345678)
157 jmp r1
158 @end example
160 This should create two relocs, both pointing to @code{_foo}, and with
161 0x12340000 in their addend field. The data would consist of:
163 @example
164 RELOCATION RECORDS FOR [.text]:
165 offset type value
166 00000002 HVRT16 _foo+0x12340000
167 00000006 LVRT16 _foo+0x12340000
169 00000000 5da05678 ; or.u r13,r0,0x5678
170 00000004 1c4d5678 ; ld.b r2,r13,0x5678
171 00000008 f400c001 ; jmp r1
172 @end example
174 The relocation routine digs out the value from the data, adds
175 it to the addend to get the original offset, and then adds the
176 value of @code{_foo}. Note that all 32 bits have to be kept around
177 somewhere, to cope with carry from bit 15 to bit 16.
179 One further example is the sparc and the a.out format. The
180 sparc has a similar problem to the 88k, in that some
181 instructions don't have room for an entire offset, but on the
182 sparc the parts are created in odd sized lumps. The designers of
183 the a.out format chose to not use the data within the section
184 for storing part of the offset; all the offset is kept within
185 the reloc. Anything in the data should be ignored.
187 @example
188 save %sp,-112,%sp
189 sethi %hi(_foo+0x12345678),%g2
190 ldsb [%g2+%lo(_foo+0x12345678)],%i0
191 ret
192 restore
193 @end example
195 Both relocs contain a pointer to @code{foo}, and the offsets
196 contain junk.
198 @example
199 RELOCATION RECORDS FOR [.text]:
200 offset type value
201 00000004 HI22 _foo+0x12345678
202 00000008 LO10 _foo+0x12345678
204 00000000 9de3bf90 ; save %sp,-112,%sp
205 00000004 05000000 ; sethi %hi(_foo+0),%g2
206 00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
207 0000000c 81c7e008 ; ret
208 00000010 81e80000 ; restore
209 @end example
211 @itemize @bullet
213 @item
214 @code{howto}
215 @end itemize
216 The @code{howto} field can be imagined as a
217 relocation instruction. It is a pointer to a structure which
218 contains information on what to do with all of the other
219 information in the reloc record and data section. A back end
220 would normally have a relocation instruction set and turn
221 relocations into pointers to the correct structure on input -
222 but it would be possible to create each howto field on demand.
224 @subsubsection @code{enum complain_overflow}
225 Indicates what sort of overflow checking should be done when
226 performing a relocation.
229 @example
231 enum complain_overflow
232 @{
233 /* Do not complain on overflow. */
234 complain_overflow_dont,
236 /* Complain if the bitfield overflows, whether it is considered
237 as signed or unsigned. */
238 complain_overflow_bitfield,
240 /* Complain if the value overflows when considered as signed
241 number. */
242 complain_overflow_signed,
244 /* Complain if the value overflows when considered as an
245 unsigned number. */
246 complain_overflow_unsigned
247 @};
248 @end example
249 @subsubsection @code{reloc_howto_type}
250 The @code{reloc_howto_type} is a structure which contains all the
251 information that libbfd needs to know to tie up a back end's data.
254 @example
255 struct symbol_cache_entry; /* Forward declaration */
257 struct reloc_howto_struct
258 @{
259 /* The type field has mainly a documentary use - the back end can
260 do what it wants with it, though normally the back end's
261 external idea of what a reloc number is stored
262 in this field. For example, a PC relative word relocation
263 in a coff environment has the type 023 - because that's
264 what the outside world calls a R_PCRWORD reloc. */
265 unsigned int type;
267 /* The value the final relocation is shifted right by. This drops
268 unwanted data from the relocation. */
269 unsigned int rightshift;
271 /* The size of the item to be relocated. This is *not* a
272 power-of-two measure. To get the number of bytes operated
273 on by a type of relocation, use bfd_get_reloc_size. */
274 int size;
276 /* The number of bits in the item to be relocated. This is used
277 when doing overflow checking. */
278 unsigned int bitsize;
280 /* Notes that the relocation is relative to the location in the
281 data section of the addend. The relocation function will
282 subtract from the relocation value the address of the location
283 being relocated. */
284 boolean pc_relative;
286 /* The bit position of the reloc value in the destination.
287 The relocated value is left shifted by this amount. */
288 unsigned int bitpos;
290 /* What type of overflow error should be checked for when
291 relocating. */
292 enum complain_overflow complain_on_overflow;
294 /* If this field is non null, then the supplied function is
295 called rather than the normal function. This allows really
296 strange relocation methods to be accomodated (e.g., i960 callj
297 instructions). */
298 bfd_reloc_status_type (*special_function)
299 PARAMS ((bfd *abfd,
300 arelent *reloc_entry,
301 struct symbol_cache_entry *symbol,
302 PTR data,
303 asection *input_section,
304 bfd *output_bfd,
305 char **error_message));
307 /* The textual name of the relocation type. */
308 char *name;
310 /* Some formats record a relocation addend in the section contents
311 rather than with the relocation. For ELF formats this is the
312 distinction between USE_REL and USE_RELA (though the code checks
313 for USE_REL == 1/0). The value of this field is TRUE if the
314 addend is recorded with the section contents; when performing a
315 partial link (ld -r) the section contents (the data) will be
316 modified. The value of this field is FALSE if addends are
317 recorded with the relocation (in arelent.addend); when performing
318 a partial link the relocation will be modified.
319 All relocations for all ELF USE_RELA targets should set this field
320 to FALSE (values of TRUE should be looked on with suspicion).
321 However, the converse is not true: not all relocations of all ELF
322 USE_REL targets set this field to TRUE. Why this is so is peculiar
323 to each particular target. For relocs that aren't used in partial
324 links (e.g. GOT stuff) it doesn't matter what this is set to. */
325 boolean partial_inplace;
327 /* The src_mask selects which parts of the read in data
328 are to be used in the relocation sum. E.g., if this was an 8 bit
329 byte of data which we read and relocated, this would be
330 0x000000ff. When we have relocs which have an addend, such as
331 sun4 extended relocs, the value in the offset part of a
332 relocating field is garbage so we never use it. In this case
333 the mask would be 0x00000000. */
334 bfd_vma src_mask;
336 /* The dst_mask selects which parts of the instruction are replaced
337 into the instruction. In most cases src_mask == dst_mask,
338 except in the above special case, where dst_mask would be
339 0x000000ff, and src_mask would be 0x00000000. */
340 bfd_vma dst_mask;
342 /* When some formats create PC relative instructions, they leave
343 the value of the pc of the place being relocated in the offset
344 slot of the instruction, so that a PC relative relocation can
345 be made just by adding in an ordinary offset (e.g., sun3 a.out).
346 Some formats leave the displacement part of an instruction
347 empty (e.g., m88k bcs); this flag signals the fact.*/
348 boolean pcrel_offset;
350 @};
351 @end example
352 @findex The HOWTO Macro
353 @subsubsection @code{The HOWTO Macro}
354 @strong{Description}@*
355 The HOWTO define is horrible and will go away.
356 @example
357 #define HOWTO(C, R,S,B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
358 @{(unsigned)C,R,S,B, P, BI, O,SF,NAME,INPLACE,MASKSRC,MASKDST,PC@}
359 @end example
361 @strong{Description}@*
362 And will be replaced with the totally magic way. But for the
363 moment, we are compatible, so do it this way.
364 @example
365 #define NEWHOWTO( FUNCTION, NAME,SIZE,REL,IN) HOWTO(0,0,SIZE,0,REL,0,complain_overflow_dont,FUNCTION, NAME,false,0,0,IN)
367 @end example
369 @strong{Description}@*
370 This is used to fill in an empty howto entry in an array.
371 @example
372 #define EMPTY_HOWTO(C) \
373 HOWTO((C),0,0,0,false,0,complain_overflow_dont,NULL,NULL,false,0,0,false)
375 @end example
377 @strong{Description}@*
378 Helper routine to turn a symbol into a relocation value.
379 @example
380 #define HOWTO_PREPARE(relocation, symbol) \
381 @{ \
382 if (symbol != (asymbol *)NULL) @{ \
383 if (bfd_is_com_section (symbol->section)) @{ \
384 relocation = 0; \
385 @} \
386 else @{ \
387 relocation = symbol->value; \
388 @} \
389 @} \
390 @}
391 @end example
393 @findex bfd_get_reloc_size
394 @subsubsection @code{bfd_get_reloc_size}
395 @strong{Synopsis}
396 @example
397 unsigned int bfd_get_reloc_size (reloc_howto_type *);
398 @end example
399 @strong{Description}@*
400 For a reloc_howto_type that operates on a fixed number of bytes,
401 this returns the number of bytes operated on.
403 @findex arelent_chain
404 @subsubsection @code{arelent_chain}
405 @strong{Description}@*
406 How relocs are tied together in an @code{asection}:
407 @example
408 typedef struct relent_chain @{
409 arelent relent;
410 struct relent_chain *next;
411 @} arelent_chain;
412 @end example
414 @findex bfd_check_overflow
415 @subsubsection @code{bfd_check_overflow}
416 @strong{Synopsis}
417 @example
418 bfd_reloc_status_type
419 bfd_check_overflow
420 (enum complain_overflow how,
421 unsigned int bitsize,
422 unsigned int rightshift,
423 unsigned int addrsize,
424 bfd_vma relocation);
425 @end example
426 @strong{Description}@*
427 Perform overflow checking on @var{relocation} which has
428 @var{bitsize} significant bits and will be shifted right by
429 @var{rightshift} bits, on a machine with addresses containing
430 @var{addrsize} significant bits. The result is either of
431 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
433 @findex bfd_perform_relocation
434 @subsubsection @code{bfd_perform_relocation}
435 @strong{Synopsis}
436 @example
437 bfd_reloc_status_type
438 bfd_perform_relocation
439 (bfd *abfd,
440 arelent *reloc_entry,
441 PTR data,
442 asection *input_section,
443 bfd *output_bfd,
444 char **error_message);
445 @end example
446 @strong{Description}@*
447 If @var{output_bfd} is supplied to this function, the
448 generated image will be relocatable; the relocations are
449 copied to the output file after they have been changed to
450 reflect the new state of the world. There are two ways of
451 reflecting the results of partial linkage in an output file:
452 by modifying the output data in place, and by modifying the
453 relocation record. Some native formats (e.g., basic a.out and
454 basic coff) have no way of specifying an addend in the
455 relocation type, so the addend has to go in the output data.
456 This is no big deal since in these formats the output data
457 slot will always be big enough for the addend. Complex reloc
458 types with addends were invented to solve just this problem.
459 The @var{error_message} argument is set to an error message if
460 this return @code{bfd_reloc_dangerous}.
462 @findex bfd_install_relocation
463 @subsubsection @code{bfd_install_relocation}
464 @strong{Synopsis}
465 @example
466 bfd_reloc_status_type
467 bfd_install_relocation
468 (bfd *abfd,
469 arelent *reloc_entry,
470 PTR data, bfd_vma data_start,
471 asection *input_section,
472 char **error_message);
473 @end example
474 @strong{Description}@*
475 This looks remarkably like @code{bfd_perform_relocation}, except it
476 does not expect that the section contents have been filled in.
477 I.e., it's suitable for use when creating, rather than applying
478 a relocation.
480 For now, this function should be considered reserved for the
481 assembler.
484 @node howto manager, , typedef arelent, Relocations
485 @section The howto manager
486 When an application wants to create a relocation, but doesn't
487 know what the target machine might call it, it can find out by
488 using this bit of code.
490 @findex bfd_reloc_code_type
491 @subsubsection @code{bfd_reloc_code_type}
492 @strong{Description}@*
493 The insides of a reloc code. The idea is that, eventually, there
494 will be one enumerator for every type of relocation we ever do.
495 Pass one of these values to @code{bfd_reloc_type_lookup}, and it'll
496 return a howto pointer.
498 This does mean that the application must determine the correct
499 enumerator value; you can't get a howto pointer from a random set
500 of attributes.
502 Here are the possible values for @code{enum bfd_reloc_code_real}:
504 @deffn {} BFD_RELOC_64
505 @deffnx {} BFD_RELOC_32
506 @deffnx {} BFD_RELOC_26
507 @deffnx {} BFD_RELOC_24
508 @deffnx {} BFD_RELOC_16
509 @deffnx {} BFD_RELOC_14
510 @deffnx {} BFD_RELOC_8
511 Basic absolute relocations of N bits.
512 @end deffn
513 @deffn {} BFD_RELOC_64_PCREL
514 @deffnx {} BFD_RELOC_32_PCREL
515 @deffnx {} BFD_RELOC_24_PCREL
516 @deffnx {} BFD_RELOC_16_PCREL
517 @deffnx {} BFD_RELOC_12_PCREL
518 @deffnx {} BFD_RELOC_8_PCREL
519 PC-relative relocations. Sometimes these are relative to the address
520 of the relocation itself; sometimes they are relative to the start of
521 the section containing the relocation. It depends on the specific target.
523 The 24-bit relocation is used in some Intel 960 configurations.
524 @end deffn
525 @deffn {} BFD_RELOC_32_GOT_PCREL
526 @deffnx {} BFD_RELOC_16_GOT_PCREL
527 @deffnx {} BFD_RELOC_8_GOT_PCREL
528 @deffnx {} BFD_RELOC_32_GOTOFF
529 @deffnx {} BFD_RELOC_16_GOTOFF
530 @deffnx {} BFD_RELOC_LO16_GOTOFF
531 @deffnx {} BFD_RELOC_HI16_GOTOFF
532 @deffnx {} BFD_RELOC_HI16_S_GOTOFF
533 @deffnx {} BFD_RELOC_8_GOTOFF
534 @deffnx {} BFD_RELOC_32_PLT_PCREL
535 @deffnx {} BFD_RELOC_24_PLT_PCREL
536 @deffnx {} BFD_RELOC_16_PLT_PCREL
537 @deffnx {} BFD_RELOC_8_PLT_PCREL
538 @deffnx {} BFD_RELOC_32_PLTOFF
539 @deffnx {} BFD_RELOC_16_PLTOFF
540 @deffnx {} BFD_RELOC_LO16_PLTOFF
541 @deffnx {} BFD_RELOC_HI16_PLTOFF
542 @deffnx {} BFD_RELOC_HI16_S_PLTOFF
543 @deffnx {} BFD_RELOC_8_PLTOFF
544 For ELF.
545 @end deffn
546 @deffn {} BFD_RELOC_68K_GLOB_DAT
547 @deffnx {} BFD_RELOC_68K_JMP_SLOT
548 @deffnx {} BFD_RELOC_68K_RELATIVE
549 Relocations used by 68K ELF.
550 @end deffn
551 @deffn {} BFD_RELOC_32_BASEREL
552 @deffnx {} BFD_RELOC_16_BASEREL
553 @deffnx {} BFD_RELOC_LO16_BASEREL
554 @deffnx {} BFD_RELOC_HI16_BASEREL
555 @deffnx {} BFD_RELOC_HI16_S_BASEREL
556 @deffnx {} BFD_RELOC_8_BASEREL
557 @deffnx {} BFD_RELOC_RVA
558 Linkage-table relative.
559 @end deffn
560 @deffn {} BFD_RELOC_8_FFnn
561 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
562 @end deffn
563 @deffn {} BFD_RELOC_32_PCREL_S2
564 @deffnx {} BFD_RELOC_16_PCREL_S2
565 @deffnx {} BFD_RELOC_23_PCREL_S2
566 These PC-relative relocations are stored as word displacements --
567 i.e., byte displacements shifted right two bits. The 30-bit word
568 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
569 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
570 signed 16-bit displacement is used on the MIPS, and the 23-bit
571 displacement is used on the Alpha.
572 @end deffn
573 @deffn {} BFD_RELOC_HI22
574 @deffnx {} BFD_RELOC_LO10
575 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
576 the target word. These are used on the SPARC.
577 @end deffn
578 @deffn {} BFD_RELOC_GPREL16
579 @deffnx {} BFD_RELOC_GPREL32
580 For systems that allocate a Global Pointer register, these are
581 displacements off that register. These relocation types are
582 handled specially, because the value the register will have is
583 decided relatively late.
584 @end deffn
585 @deffn {} BFD_RELOC_I960_CALLJ
586 Reloc types used for i960/b.out.
587 @end deffn
588 @deffn {} BFD_RELOC_NONE
589 @deffnx {} BFD_RELOC_SPARC_WDISP22
590 @deffnx {} BFD_RELOC_SPARC22
591 @deffnx {} BFD_RELOC_SPARC13
592 @deffnx {} BFD_RELOC_SPARC_GOT10
593 @deffnx {} BFD_RELOC_SPARC_GOT13
594 @deffnx {} BFD_RELOC_SPARC_GOT22
595 @deffnx {} BFD_RELOC_SPARC_PC10
596 @deffnx {} BFD_RELOC_SPARC_PC22
597 @deffnx {} BFD_RELOC_SPARC_WPLT30
598 @deffnx {} BFD_RELOC_SPARC_COPY
599 @deffnx {} BFD_RELOC_SPARC_GLOB_DAT
600 @deffnx {} BFD_RELOC_SPARC_JMP_SLOT
601 @deffnx {} BFD_RELOC_SPARC_RELATIVE
602 @deffnx {} BFD_RELOC_SPARC_UA16
603 @deffnx {} BFD_RELOC_SPARC_UA32
604 @deffnx {} BFD_RELOC_SPARC_UA64
605 SPARC ELF relocations. There is probably some overlap with other
606 relocation types already defined.
607 @end deffn
608 @deffn {} BFD_RELOC_SPARC_BASE13
609 @deffnx {} BFD_RELOC_SPARC_BASE22
610 I think these are specific to SPARC a.out (e.g., Sun 4).
611 @end deffn
612 @deffn {} BFD_RELOC_SPARC_64
613 @deffnx {} BFD_RELOC_SPARC_10
614 @deffnx {} BFD_RELOC_SPARC_11
615 @deffnx {} BFD_RELOC_SPARC_OLO10
616 @deffnx {} BFD_RELOC_SPARC_HH22
617 @deffnx {} BFD_RELOC_SPARC_HM10
618 @deffnx {} BFD_RELOC_SPARC_LM22
619 @deffnx {} BFD_RELOC_SPARC_PC_HH22
620 @deffnx {} BFD_RELOC_SPARC_PC_HM10
621 @deffnx {} BFD_RELOC_SPARC_PC_LM22
622 @deffnx {} BFD_RELOC_SPARC_WDISP16
623 @deffnx {} BFD_RELOC_SPARC_WDISP19
624 @deffnx {} BFD_RELOC_SPARC_7
625 @deffnx {} BFD_RELOC_SPARC_6
626 @deffnx {} BFD_RELOC_SPARC_5
627 @deffnx {} BFD_RELOC_SPARC_DISP64
628 @deffnx {} BFD_RELOC_SPARC_PLT64
629 @deffnx {} BFD_RELOC_SPARC_HIX22
630 @deffnx {} BFD_RELOC_SPARC_LOX10
631 @deffnx {} BFD_RELOC_SPARC_H44
632 @deffnx {} BFD_RELOC_SPARC_M44
633 @deffnx {} BFD_RELOC_SPARC_L44
634 @deffnx {} BFD_RELOC_SPARC_REGISTER
635 SPARC64 relocations
636 @end deffn
637 @deffn {} BFD_RELOC_SPARC_REV32
638 SPARC little endian relocation
639 @end deffn
640 @deffn {} BFD_RELOC_ALPHA_GPDISP_HI16
641 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
642 "addend" in some special way.
643 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
644 writing; when reading, it will be the absolute section symbol. The
645 addend is the displacement in bytes of the "lda" instruction from
646 the "ldah" instruction (which is at the address of this reloc).
647 @end deffn
648 @deffn {} BFD_RELOC_ALPHA_GPDISP_LO16
649 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
650 with GPDISP_HI16 relocs. The addend is ignored when writing the
651 relocations out, and is filled in with the file's GP value on
652 reading, for convenience.
653 @end deffn
654 @deffn {} BFD_RELOC_ALPHA_GPDISP
655 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
656 relocation except that there is no accompanying GPDISP_LO16
657 relocation.
658 @end deffn
659 @deffn {} BFD_RELOC_ALPHA_LITERAL
660 @deffnx {} BFD_RELOC_ALPHA_ELF_LITERAL
661 @deffnx {} BFD_RELOC_ALPHA_LITUSE
662 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
663 the assembler turns it into a LDQ instruction to load the address of
664 the symbol, and then fills in a register in the real instruction.
666 The LITERAL reloc, at the LDQ instruction, refers to the .lita
667 section symbol. The addend is ignored when writing, but is filled
668 in with the file's GP value on reading, for convenience, as with the
669 GPDISP_LO16 reloc.
671 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
672 It should refer to the symbol to be referenced, as with 16_GOTOFF,
673 but it generates output not based on the position within the .got
674 section, but relative to the GP value chosen for the file during the
675 final link stage.
677 The LITUSE reloc, on the instruction using the loaded address, gives
678 information to the linker that it might be able to use to optimize
679 away some literal section references. The symbol is ignored (read
680 as the absolute section symbol), and the "addend" indicates the type
681 of instruction using the register:
682 1 - "memory" fmt insn
683 2 - byte-manipulation (byte offset reg)
684 3 - jsr (target of branch)
686 The GNU linker currently doesn't do any of this optimizing.
687 @end deffn
688 @deffn {} BFD_RELOC_ALPHA_USER_LITERAL
689 @deffnx {} BFD_RELOC_ALPHA_USER_LITUSE_BASE
690 @deffnx {} BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF
691 @deffnx {} BFD_RELOC_ALPHA_USER_LITUSE_JSR
692 @deffnx {} BFD_RELOC_ALPHA_USER_GPDISP
693 @deffnx {} BFD_RELOC_ALPHA_USER_GPRELHIGH
694 @deffnx {} BFD_RELOC_ALPHA_USER_GPRELLOW
695 The BFD_RELOC_ALPHA_USER_* relocations are used by the assembler to
696 process the explicit !<reloc>!sequence relocations, and are mapped
697 into the normal relocations at the end of processing.
698 @end deffn
699 @deffn {} BFD_RELOC_ALPHA_HINT
700 The HINT relocation indicates a value that should be filled into the
701 "hint" field of a jmp/jsr/ret instruction, for possible branch-
702 prediction logic which may be provided on some processors.
703 @end deffn
704 @deffn {} BFD_RELOC_ALPHA_LINKAGE
705 The LINKAGE relocation outputs a linkage pair in the object file,
706 which is filled by the linker.
707 @end deffn
708 @deffn {} BFD_RELOC_ALPHA_CODEADDR
709 The CODEADDR relocation outputs a STO_CA in the object file,
710 which is filled by the linker.
711 @end deffn
712 @deffn {} BFD_RELOC_MIPS_JMP
713 Bits 27..2 of the relocation address shifted right 2 bits;
714 simple reloc otherwise.
715 @end deffn
716 @deffn {} BFD_RELOC_MIPS16_JMP
717 The MIPS16 jump instruction.
718 @end deffn
719 @deffn {} BFD_RELOC_MIPS16_GPREL
720 MIPS16 GP relative reloc.
721 @end deffn
722 @deffn {} BFD_RELOC_HI16
723 High 16 bits of 32-bit value; simple reloc.
724 @end deffn
725 @deffn {} BFD_RELOC_HI16_S
726 High 16 bits of 32-bit value but the low 16 bits will be sign
727 extended and added to form the final result. If the low 16
728 bits form a negative number, we need to add one to the high value
729 to compensate for the borrow when the low bits are added.
730 @end deffn
731 @deffn {} BFD_RELOC_LO16
732 Low 16 bits.
733 @end deffn
734 @deffn {} BFD_RELOC_PCREL_HI16_S
735 Like BFD_RELOC_HI16_S, but PC relative.
736 @end deffn
737 @deffn {} BFD_RELOC_PCREL_LO16
738 Like BFD_RELOC_LO16, but PC relative.
739 @end deffn
740 @deffn {} BFD_RELOC_MIPS_GPREL
741 Relocation relative to the global pointer.
742 @end deffn
743 @deffn {} BFD_RELOC_MIPS_LITERAL
744 Relocation against a MIPS literal section.
745 @end deffn
746 @deffn {} BFD_RELOC_MIPS_GOT16
747 @deffnx {} BFD_RELOC_MIPS_CALL16
748 @deffnx {} BFD_RELOC_MIPS_GPREL32
749 @deffnx {} BFD_RELOC_MIPS_GOT_HI16
750 @deffnx {} BFD_RELOC_MIPS_GOT_LO16
751 @deffnx {} BFD_RELOC_MIPS_CALL_HI16
752 @deffnx {} BFD_RELOC_MIPS_CALL_LO16
753 @deffnx {} BFD_RELOC_MIPS_SUB
754 @deffnx {} BFD_RELOC_MIPS_GOT_PAGE
755 @deffnx {} BFD_RELOC_MIPS_GOT_OFST
756 @deffnx {} BFD_RELOC_MIPS_GOT_DISP
757 MIPS ELF relocations.
758 @end deffn
759 @deffn {} BFD_RELOC_386_GOT32
760 @deffnx {} BFD_RELOC_386_PLT32
761 @deffnx {} BFD_RELOC_386_COPY
762 @deffnx {} BFD_RELOC_386_GLOB_DAT
763 @deffnx {} BFD_RELOC_386_JUMP_SLOT
764 @deffnx {} BFD_RELOC_386_RELATIVE
765 @deffnx {} BFD_RELOC_386_GOTOFF
766 @deffnx {} BFD_RELOC_386_GOTPC
767 i386/elf relocations
768 @end deffn
769 @deffn {} BFD_RELOC_X86_64_GOT32
770 @deffnx {} BFD_RELOC_X86_64_PLT32
771 @deffnx {} BFD_RELOC_X86_64_COPY
772 @deffnx {} BFD_RELOC_X86_64_GLOB_DAT
773 @deffnx {} BFD_RELOC_X86_64_JUMP_SLOT
774 @deffnx {} BFD_RELOC_X86_64_RELATIVE
775 @deffnx {} BFD_RELOC_X86_64_GOTPCREL
776 @deffnx {} BFD_RELOC_X86_64_32S
777 x86-64/elf relocations
778 @end deffn
779 @deffn {} BFD_RELOC_NS32K_IMM_8
780 @deffnx {} BFD_RELOC_NS32K_IMM_16
781 @deffnx {} BFD_RELOC_NS32K_IMM_32
782 @deffnx {} BFD_RELOC_NS32K_IMM_8_PCREL
783 @deffnx {} BFD_RELOC_NS32K_IMM_16_PCREL
784 @deffnx {} BFD_RELOC_NS32K_IMM_32_PCREL
785 @deffnx {} BFD_RELOC_NS32K_DISP_8
786 @deffnx {} BFD_RELOC_NS32K_DISP_16
787 @deffnx {} BFD_RELOC_NS32K_DISP_32
788 @deffnx {} BFD_RELOC_NS32K_DISP_8_PCREL
789 @deffnx {} BFD_RELOC_NS32K_DISP_16_PCREL
790 @deffnx {} BFD_RELOC_NS32K_DISP_32_PCREL
791 ns32k relocations
792 @end deffn
793 @deffn {} BFD_RELOC_PJ_CODE_HI16
794 @deffnx {} BFD_RELOC_PJ_CODE_LO16
795 @deffnx {} BFD_RELOC_PJ_CODE_DIR16
796 @deffnx {} BFD_RELOC_PJ_CODE_DIR32
797 @deffnx {} BFD_RELOC_PJ_CODE_REL16
798 @deffnx {} BFD_RELOC_PJ_CODE_REL32
799 Picojava relocs. Not all of these appear in object files.
800 @end deffn
801 @deffn {} BFD_RELOC_PPC_B26
802 @deffnx {} BFD_RELOC_PPC_BA26
803 @deffnx {} BFD_RELOC_PPC_TOC16
804 @deffnx {} BFD_RELOC_PPC_B16
805 @deffnx {} BFD_RELOC_PPC_B16_BRTAKEN
806 @deffnx {} BFD_RELOC_PPC_B16_BRNTAKEN
807 @deffnx {} BFD_RELOC_PPC_BA16
808 @deffnx {} BFD_RELOC_PPC_BA16_BRTAKEN
809 @deffnx {} BFD_RELOC_PPC_BA16_BRNTAKEN
810 @deffnx {} BFD_RELOC_PPC_COPY
811 @deffnx {} BFD_RELOC_PPC_GLOB_DAT
812 @deffnx {} BFD_RELOC_PPC_JMP_SLOT
813 @deffnx {} BFD_RELOC_PPC_RELATIVE
814 @deffnx {} BFD_RELOC_PPC_LOCAL24PC
815 @deffnx {} BFD_RELOC_PPC_EMB_NADDR32
816 @deffnx {} BFD_RELOC_PPC_EMB_NADDR16
817 @deffnx {} BFD_RELOC_PPC_EMB_NADDR16_LO
818 @deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HI
819 @deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HA
820 @deffnx {} BFD_RELOC_PPC_EMB_SDAI16
821 @deffnx {} BFD_RELOC_PPC_EMB_SDA2I16
822 @deffnx {} BFD_RELOC_PPC_EMB_SDA2REL
823 @deffnx {} BFD_RELOC_PPC_EMB_SDA21
824 @deffnx {} BFD_RELOC_PPC_EMB_MRKREF
825 @deffnx {} BFD_RELOC_PPC_EMB_RELSEC16
826 @deffnx {} BFD_RELOC_PPC_EMB_RELST_LO
827 @deffnx {} BFD_RELOC_PPC_EMB_RELST_HI
828 @deffnx {} BFD_RELOC_PPC_EMB_RELST_HA
829 @deffnx {} BFD_RELOC_PPC_EMB_BIT_FLD
830 @deffnx {} BFD_RELOC_PPC_EMB_RELSDA
831 Power(rs6000) and PowerPC relocations.
832 @end deffn
833 @deffn {} BFD_RELOC_I370_D12
834 IBM 370/390 relocations
835 @end deffn
836 @deffn {} BFD_RELOC_CTOR
837 The type of reloc used to build a contructor table - at the moment
838 probably a 32 bit wide absolute relocation, but the target can choose.
839 It generally does map to one of the other relocation types.
840 @end deffn
841 @deffn {} BFD_RELOC_ARM_PCREL_BRANCH
842 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
843 not stored in the instruction.
844 @end deffn
845 @deffn {} BFD_RELOC_ARM_PCREL_BLX
846 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
847 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
848 field in the instruction.
849 @end deffn
850 @deffn {} BFD_RELOC_THUMB_PCREL_BLX
851 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
852 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
853 field in the instruction.
854 @end deffn
855 @deffn {} BFD_RELOC_ARM_IMMEDIATE
856 @deffnx {} BFD_RELOC_ARM_ADRL_IMMEDIATE
857 @deffnx {} BFD_RELOC_ARM_OFFSET_IMM
858 @deffnx {} BFD_RELOC_ARM_SHIFT_IMM
859 @deffnx {} BFD_RELOC_ARM_SWI
860 @deffnx {} BFD_RELOC_ARM_MULTI
861 @deffnx {} BFD_RELOC_ARM_CP_OFF_IMM
862 @deffnx {} BFD_RELOC_ARM_ADR_IMM
863 @deffnx {} BFD_RELOC_ARM_LDR_IMM
864 @deffnx {} BFD_RELOC_ARM_LITERAL
865 @deffnx {} BFD_RELOC_ARM_IN_POOL
866 @deffnx {} BFD_RELOC_ARM_OFFSET_IMM8
867 @deffnx {} BFD_RELOC_ARM_HWLITERAL
868 @deffnx {} BFD_RELOC_ARM_THUMB_ADD
869 @deffnx {} BFD_RELOC_ARM_THUMB_IMM
870 @deffnx {} BFD_RELOC_ARM_THUMB_SHIFT
871 @deffnx {} BFD_RELOC_ARM_THUMB_OFFSET
872 @deffnx {} BFD_RELOC_ARM_GOT12
873 @deffnx {} BFD_RELOC_ARM_GOT32
874 @deffnx {} BFD_RELOC_ARM_JUMP_SLOT
875 @deffnx {} BFD_RELOC_ARM_COPY
876 @deffnx {} BFD_RELOC_ARM_GLOB_DAT
877 @deffnx {} BFD_RELOC_ARM_PLT32
878 @deffnx {} BFD_RELOC_ARM_RELATIVE
879 @deffnx {} BFD_RELOC_ARM_GOTOFF
880 @deffnx {} BFD_RELOC_ARM_GOTPC
881 These relocs are only used within the ARM assembler. They are not
882 (at present) written to any object files.
883 @end deffn
884 @deffn {} BFD_RELOC_SH_PCDISP8BY2
885 @deffnx {} BFD_RELOC_SH_PCDISP12BY2
886 @deffnx {} BFD_RELOC_SH_IMM4
887 @deffnx {} BFD_RELOC_SH_IMM4BY2
888 @deffnx {} BFD_RELOC_SH_IMM4BY4
889 @deffnx {} BFD_RELOC_SH_IMM8
890 @deffnx {} BFD_RELOC_SH_IMM8BY2
891 @deffnx {} BFD_RELOC_SH_IMM8BY4
892 @deffnx {} BFD_RELOC_SH_PCRELIMM8BY2
893 @deffnx {} BFD_RELOC_SH_PCRELIMM8BY4
894 @deffnx {} BFD_RELOC_SH_SWITCH16
895 @deffnx {} BFD_RELOC_SH_SWITCH32
896 @deffnx {} BFD_RELOC_SH_USES
897 @deffnx {} BFD_RELOC_SH_COUNT
898 @deffnx {} BFD_RELOC_SH_ALIGN
899 @deffnx {} BFD_RELOC_SH_CODE
900 @deffnx {} BFD_RELOC_SH_DATA
901 @deffnx {} BFD_RELOC_SH_LABEL
902 @deffnx {} BFD_RELOC_SH_LOOP_START
903 @deffnx {} BFD_RELOC_SH_LOOP_END
904 @deffnx {} BFD_RELOC_SH_COPY
905 @deffnx {} BFD_RELOC_SH_GLOB_DAT
906 @deffnx {} BFD_RELOC_SH_JMP_SLOT
907 @deffnx {} BFD_RELOC_SH_RELATIVE
908 @deffnx {} BFD_RELOC_SH_GOTPC
909 Hitachi SH relocs. Not all of these appear in object files.
910 @end deffn
911 @deffn {} BFD_RELOC_THUMB_PCREL_BRANCH9
912 @deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH12
913 @deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH23
914 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
915 be zero and is not stored in the instruction.
916 @end deffn
917 @deffn {} BFD_RELOC_ARC_B22_PCREL
918 ARC Cores relocs.
919 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
920 not stored in the instruction. The high 20 bits are installed in bits 26
921 through 7 of the instruction.
922 @end deffn
923 @deffn {} BFD_RELOC_ARC_B26
924 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
925 stored in the instruction. The high 24 bits are installed in bits 23
926 through 0.
927 @end deffn
928 @deffn {} BFD_RELOC_D10V_10_PCREL_R
929 Mitsubishi D10V relocs.
930 This is a 10-bit reloc with the right 2 bits
931 assumed to be 0.
932 @end deffn
933 @deffn {} BFD_RELOC_D10V_10_PCREL_L
934 Mitsubishi D10V relocs.
935 This is a 10-bit reloc with the right 2 bits
936 assumed to be 0. This is the same as the previous reloc
937 except it is in the left container, i.e.,
938 shifted left 15 bits.
939 @end deffn
940 @deffn {} BFD_RELOC_D10V_18
941 This is an 18-bit reloc with the right 2 bits
942 assumed to be 0.
943 @end deffn
944 @deffn {} BFD_RELOC_D10V_18_PCREL
945 This is an 18-bit reloc with the right 2 bits
946 assumed to be 0.
947 @end deffn
948 @deffn {} BFD_RELOC_D30V_6
949 Mitsubishi D30V relocs.
950 This is a 6-bit absolute reloc.
951 @end deffn
952 @deffn {} BFD_RELOC_D30V_9_PCREL
953 This is a 6-bit pc-relative reloc with
954 the right 3 bits assumed to be 0.
955 @end deffn
956 @deffn {} BFD_RELOC_D30V_9_PCREL_R
957 This is a 6-bit pc-relative reloc with
958 the right 3 bits assumed to be 0. Same
959 as the previous reloc but on the right side
960 of the container.
961 @end deffn
962 @deffn {} BFD_RELOC_D30V_15
963 This is a 12-bit absolute reloc with the
964 right 3 bitsassumed to be 0.
965 @end deffn
966 @deffn {} BFD_RELOC_D30V_15_PCREL
967 This is a 12-bit pc-relative reloc with
968 the right 3 bits assumed to be 0.
969 @end deffn
970 @deffn {} BFD_RELOC_D30V_15_PCREL_R
971 This is a 12-bit pc-relative reloc with
972 the right 3 bits assumed to be 0. Same
973 as the previous reloc but on the right side
974 of the container.
975 @end deffn
976 @deffn {} BFD_RELOC_D30V_21
977 This is an 18-bit absolute reloc with
978 the right 3 bits assumed to be 0.
979 @end deffn
980 @deffn {} BFD_RELOC_D30V_21_PCREL
981 This is an 18-bit pc-relative reloc with
982 the right 3 bits assumed to be 0.
983 @end deffn
984 @deffn {} BFD_RELOC_D30V_21_PCREL_R
985 This is an 18-bit pc-relative reloc with
986 the right 3 bits assumed to be 0. Same
987 as the previous reloc but on the right side
988 of the container.
989 @end deffn
990 @deffn {} BFD_RELOC_D30V_32
991 This is a 32-bit absolute reloc.
992 @end deffn
993 @deffn {} BFD_RELOC_D30V_32_PCREL
994 This is a 32-bit pc-relative reloc.
995 @end deffn
996 @deffn {} BFD_RELOC_M32R_24
997 Mitsubishi M32R relocs.
998 This is a 24 bit absolute address.
999 @end deffn
1000 @deffn {} BFD_RELOC_M32R_10_PCREL
1001 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
1002 @end deffn
1003 @deffn {} BFD_RELOC_M32R_18_PCREL
1004 This is an 18-bit reloc with the right 2 bits assumed to be 0.
1005 @end deffn
1006 @deffn {} BFD_RELOC_M32R_26_PCREL
1007 This is a 26-bit reloc with the right 2 bits assumed to be 0.
1008 @end deffn
1009 @deffn {} BFD_RELOC_M32R_HI16_ULO
1010 This is a 16-bit reloc containing the high 16 bits of an address
1011 used when the lower 16 bits are treated as unsigned.
1012 @end deffn
1013 @deffn {} BFD_RELOC_M32R_HI16_SLO
1014 This is a 16-bit reloc containing the high 16 bits of an address
1015 used when the lower 16 bits are treated as signed.
1016 @end deffn
1017 @deffn {} BFD_RELOC_M32R_LO16
1018 This is a 16-bit reloc containing the lower 16 bits of an address.
1019 @end deffn
1020 @deffn {} BFD_RELOC_M32R_SDA16
1021 This is a 16-bit reloc containing the small data area offset for use in
1022 add3, load, and store instructions.
1023 @end deffn
1024 @deffn {} BFD_RELOC_V850_9_PCREL
1025 This is a 9-bit reloc
1026 @end deffn
1027 @deffn {} BFD_RELOC_V850_22_PCREL
1028 This is a 22-bit reloc
1029 @end deffn
1030 @deffn {} BFD_RELOC_V850_SDA_16_16_OFFSET
1031 This is a 16 bit offset from the short data area pointer.
1032 @end deffn
1033 @deffn {} BFD_RELOC_V850_SDA_15_16_OFFSET
1034 This is a 16 bit offset (of which only 15 bits are used) from the
1035 short data area pointer.
1036 @end deffn
1037 @deffn {} BFD_RELOC_V850_ZDA_16_16_OFFSET
1038 This is a 16 bit offset from the zero data area pointer.
1039 @end deffn
1040 @deffn {} BFD_RELOC_V850_ZDA_15_16_OFFSET
1041 This is a 16 bit offset (of which only 15 bits are used) from the
1042 zero data area pointer.
1043 @end deffn
1044 @deffn {} BFD_RELOC_V850_TDA_6_8_OFFSET
1045 This is an 8 bit offset (of which only 6 bits are used) from the
1046 tiny data area pointer.
1047 @end deffn
1048 @deffn {} BFD_RELOC_V850_TDA_7_8_OFFSET
1049 This is an 8bit offset (of which only 7 bits are used) from the tiny
1050 data area pointer.
1051 @end deffn
1052 @deffn {} BFD_RELOC_V850_TDA_7_7_OFFSET
1053 This is a 7 bit offset from the tiny data area pointer.
1054 @end deffn
1055 @deffn {} BFD_RELOC_V850_TDA_16_16_OFFSET
1056 This is a 16 bit offset from the tiny data area pointer.
1057 @end deffn
1058 @deffn {} BFD_RELOC_V850_TDA_4_5_OFFSET
1059 This is a 5 bit offset (of which only 4 bits are used) from the tiny
1060 data area pointer.
1061 @end deffn
1062 @deffn {} BFD_RELOC_V850_TDA_4_4_OFFSET
1063 This is a 4 bit offset from the tiny data area pointer.
1064 @end deffn
1065 @deffn {} BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
1066 This is a 16 bit offset from the short data area pointer, with the
1067 bits placed non-contigously in the instruction.
1068 @end deffn
1069 @deffn {} BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
1070 This is a 16 bit offset from the zero data area pointer, with the
1071 bits placed non-contigously in the instruction.
1072 @end deffn
1073 @deffn {} BFD_RELOC_V850_CALLT_6_7_OFFSET
1074 This is a 6 bit offset from the call table base pointer.
1075 @end deffn
1076 @deffn {} BFD_RELOC_V850_CALLT_16_16_OFFSET
1077 This is a 16 bit offset from the call table base pointer.
1078 @end deffn
1079 @deffn {} BFD_RELOC_MN10300_32_PCREL
1080 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
1081 instruction.
1082 @end deffn
1083 @deffn {} BFD_RELOC_MN10300_16_PCREL
1084 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
1085 instruction.
1086 @end deffn
1087 @deffn {} BFD_RELOC_TIC30_LDP
1088 This is a 8bit DP reloc for the tms320c30, where the most
1089 significant 8 bits of a 24 bit word are placed into the least
1090 significant 8 bits of the opcode.
1091 @end deffn
1092 @deffn {} BFD_RELOC_TIC54X_PARTLS7
1093 This is a 7bit reloc for the tms320c54x, where the least
1094 significant 7 bits of a 16 bit word are placed into the least
1095 significant 7 bits of the opcode.
1096 @end deffn
1097 @deffn {} BFD_RELOC_TIC54X_PARTMS9
1098 This is a 9bit DP reloc for the tms320c54x, where the most
1099 significant 9 bits of a 16 bit word are placed into the least
1100 significant 9 bits of the opcode.
1101 @end deffn
1102 @deffn {} BFD_RELOC_TIC54X_23
1103 This is an extended address 23-bit reloc for the tms320c54x.
1104 @end deffn
1105 @deffn {} BFD_RELOC_TIC54X_16_OF_23
1106 This is a 16-bit reloc for the tms320c54x, where the least
1107 significant 16 bits of a 23-bit extended address are placed into
1108 the opcode.
1109 @end deffn
1110 @deffn {} BFD_RELOC_TIC54X_MS7_OF_23
1111 This is a reloc for the tms320c54x, where the most
1112 significant 7 bits of a 23-bit extended address are placed into
1113 the opcode.
1114 @end deffn
1115 @deffn {} BFD_RELOC_FR30_48
1116 This is a 48 bit reloc for the FR30 that stores 32 bits.
1117 @end deffn
1118 @deffn {} BFD_RELOC_FR30_20
1119 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
1120 two sections.
1121 @end deffn
1122 @deffn {} BFD_RELOC_FR30_6_IN_4
1123 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
1124 4 bits.
1125 @end deffn
1126 @deffn {} BFD_RELOC_FR30_8_IN_8
1127 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
1128 into 8 bits.
1129 @end deffn
1130 @deffn {} BFD_RELOC_FR30_9_IN_8
1131 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
1132 into 8 bits.
1133 @end deffn
1134 @deffn {} BFD_RELOC_FR30_10_IN_8
1135 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
1136 into 8 bits.
1137 @end deffn
1138 @deffn {} BFD_RELOC_FR30_9_PCREL
1139 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
1140 short offset into 8 bits.
1141 @end deffn
1142 @deffn {} BFD_RELOC_FR30_12_PCREL
1143 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
1144 short offset into 11 bits.
1145 @end deffn
1146 @deffn {} BFD_RELOC_MCORE_PCREL_IMM8BY4
1147 @deffnx {} BFD_RELOC_MCORE_PCREL_IMM11BY2
1148 @deffnx {} BFD_RELOC_MCORE_PCREL_IMM4BY2
1149 @deffnx {} BFD_RELOC_MCORE_PCREL_32
1150 @deffnx {} BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
1151 @deffnx {} BFD_RELOC_MCORE_RVA
1152 Motorola Mcore relocations.
1153 @end deffn
1154 @deffn {} BFD_RELOC_AVR_7_PCREL
1155 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
1156 short offset into 7 bits.
1157 @end deffn
1158 @deffn {} BFD_RELOC_AVR_13_PCREL
1159 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
1160 short offset into 12 bits.
1161 @end deffn
1162 @deffn {} BFD_RELOC_AVR_16_PM
1163 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
1164 program memory address) into 16 bits.
1165 @end deffn
1166 @deffn {} BFD_RELOC_AVR_LO8_LDI
1167 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
1168 data memory address) into 8 bit immediate value of LDI insn.
1169 @end deffn
1170 @deffn {} BFD_RELOC_AVR_HI8_LDI
1171 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
1172 of data memory address) into 8 bit immediate value of LDI insn.
1173 @end deffn
1174 @deffn {} BFD_RELOC_AVR_HH8_LDI
1175 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
1176 of program memory address) into 8 bit immediate value of LDI insn.
1177 @end deffn
1178 @deffn {} BFD_RELOC_AVR_LO8_LDI_NEG
1179 This is a 16 bit reloc for the AVR that stores negated 8 bit value
1180 (usually data memory address) into 8 bit immediate value of SUBI insn.
1181 @end deffn
1182 @deffn {} BFD_RELOC_AVR_HI8_LDI_NEG
1183 This is a 16 bit reloc for the AVR that stores negated 8 bit value
1184 (high 8 bit of data memory address) into 8 bit immediate value of
1185 SUBI insn.
1186 @end deffn
1187 @deffn {} BFD_RELOC_AVR_HH8_LDI_NEG
1188 This is a 16 bit reloc for the AVR that stores negated 8 bit value
1189 (most high 8 bit of program memory address) into 8 bit immediate value
1190 of LDI or SUBI insn.
1191 @end deffn
1192 @deffn {} BFD_RELOC_AVR_LO8_LDI_PM
1193 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
1194 command address) into 8 bit immediate value of LDI insn.
1195 @end deffn
1196 @deffn {} BFD_RELOC_AVR_HI8_LDI_PM
1197 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
1198 of command address) into 8 bit immediate value of LDI insn.
1199 @end deffn
1200 @deffn {} BFD_RELOC_AVR_HH8_LDI_PM
1201 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
1202 of command address) into 8 bit immediate value of LDI insn.
1203 @end deffn
1204 @deffn {} BFD_RELOC_AVR_LO8_LDI_PM_NEG
1205 This is a 16 bit reloc for the AVR that stores negated 8 bit value
1206 (usually command address) into 8 bit immediate value of SUBI insn.
1207 @end deffn
1208 @deffn {} BFD_RELOC_AVR_HI8_LDI_PM_NEG
1209 This is a 16 bit reloc for the AVR that stores negated 8 bit value
1210 (high 8 bit of 16 bit command address) into 8 bit immediate value
1211 of SUBI insn.
1212 @end deffn
1213 @deffn {} BFD_RELOC_AVR_HH8_LDI_PM_NEG
1214 This is a 16 bit reloc for the AVR that stores negated 8 bit value
1215 (high 6 bit of 22 bit command address) into 8 bit immediate
1216 value of SUBI insn.
1217 @end deffn
1218 @deffn {} BFD_RELOC_AVR_CALL
1219 This is a 32 bit reloc for the AVR that stores 23 bit value
1220 into 22 bits.
1221 @end deffn
1222 @deffn {} BFD_RELOC_VTABLE_INHERIT
1223 @deffnx {} BFD_RELOC_VTABLE_ENTRY
1224 These two relocations are used by the linker to determine which of
1225 the entries in a C++ virtual function table are actually used. When
1226 the --gc-sections option is given, the linker will zero out the entries
1227 that are not used, so that the code for those functions need not be
1228 included in the output.
1230 VTABLE_INHERIT is a zero-space relocation used to describe to the
1231 linker the inheritence tree of a C++ virtual function table. The
1232 relocation's symbol should be the parent class' vtable, and the
1233 relocation should be located at the child vtable.
1235 VTABLE_ENTRY is a zero-space relocation that describes the use of a
1236 virtual function table entry. The reloc's symbol should refer to the
1237 table of the class mentioned in the code. Off of that base, an offset
1238 describes the entry that is being used. For Rela hosts, this offset
1239 is stored in the reloc's addend. For Rel hosts, we are forced to put
1240 this offset in the reloc's section offset.
1241 @end deffn
1242 @deffn {} BFD_RELOC_IA64_IMM14
1243 @deffnx {} BFD_RELOC_IA64_IMM22
1244 @deffnx {} BFD_RELOC_IA64_IMM64
1245 @deffnx {} BFD_RELOC_IA64_DIR32MSB
1246 @deffnx {} BFD_RELOC_IA64_DIR32LSB
1247 @deffnx {} BFD_RELOC_IA64_DIR64MSB
1248 @deffnx {} BFD_RELOC_IA64_DIR64LSB
1249 @deffnx {} BFD_RELOC_IA64_GPREL22
1250 @deffnx {} BFD_RELOC_IA64_GPREL64I
1251 @deffnx {} BFD_RELOC_IA64_GPREL32MSB
1252 @deffnx {} BFD_RELOC_IA64_GPREL32LSB
1253 @deffnx {} BFD_RELOC_IA64_GPREL64MSB
1254 @deffnx {} BFD_RELOC_IA64_GPREL64LSB
1255 @deffnx {} BFD_RELOC_IA64_LTOFF22
1256 @deffnx {} BFD_RELOC_IA64_LTOFF64I
1257 @deffnx {} BFD_RELOC_IA64_PLTOFF22
1258 @deffnx {} BFD_RELOC_IA64_PLTOFF64I
1259 @deffnx {} BFD_RELOC_IA64_PLTOFF64MSB
1260 @deffnx {} BFD_RELOC_IA64_PLTOFF64LSB
1261 @deffnx {} BFD_RELOC_IA64_FPTR64I
1262 @deffnx {} BFD_RELOC_IA64_FPTR32MSB
1263 @deffnx {} BFD_RELOC_IA64_FPTR32LSB
1264 @deffnx {} BFD_RELOC_IA64_FPTR64MSB
1265 @deffnx {} BFD_RELOC_IA64_FPTR64LSB
1266 @deffnx {} BFD_RELOC_IA64_PCREL21B
1267 @deffnx {} BFD_RELOC_IA64_PCREL21BI
1268 @deffnx {} BFD_RELOC_IA64_PCREL21M
1269 @deffnx {} BFD_RELOC_IA64_PCREL21F
1270 @deffnx {} BFD_RELOC_IA64_PCREL22
1271 @deffnx {} BFD_RELOC_IA64_PCREL60B
1272 @deffnx {} BFD_RELOC_IA64_PCREL64I
1273 @deffnx {} BFD_RELOC_IA64_PCREL32MSB
1274 @deffnx {} BFD_RELOC_IA64_PCREL32LSB
1275 @deffnx {} BFD_RELOC_IA64_PCREL64MSB
1276 @deffnx {} BFD_RELOC_IA64_PCREL64LSB
1277 @deffnx {} BFD_RELOC_IA64_LTOFF_FPTR22
1278 @deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64I
1279 @deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64MSB
1280 @deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64LSB
1281 @deffnx {} BFD_RELOC_IA64_SEGREL32MSB
1282 @deffnx {} BFD_RELOC_IA64_SEGREL32LSB
1283 @deffnx {} BFD_RELOC_IA64_SEGREL64MSB
1284 @deffnx {} BFD_RELOC_IA64_SEGREL64LSB
1285 @deffnx {} BFD_RELOC_IA64_SECREL32MSB
1286 @deffnx {} BFD_RELOC_IA64_SECREL32LSB
1287 @deffnx {} BFD_RELOC_IA64_SECREL64MSB
1288 @deffnx {} BFD_RELOC_IA64_SECREL64LSB
1289 @deffnx {} BFD_RELOC_IA64_REL32MSB
1290 @deffnx {} BFD_RELOC_IA64_REL32LSB
1291 @deffnx {} BFD_RELOC_IA64_REL64MSB
1292 @deffnx {} BFD_RELOC_IA64_REL64LSB
1293 @deffnx {} BFD_RELOC_IA64_LTV32MSB
1294 @deffnx {} BFD_RELOC_IA64_LTV32LSB
1295 @deffnx {} BFD_RELOC_IA64_LTV64MSB
1296 @deffnx {} BFD_RELOC_IA64_LTV64LSB
1297 @deffnx {} BFD_RELOC_IA64_IPLTMSB
1298 @deffnx {} BFD_RELOC_IA64_IPLTLSB
1299 @deffnx {} BFD_RELOC_IA64_COPY
1300 @deffnx {} BFD_RELOC_IA64_TPREL22
1301 @deffnx {} BFD_RELOC_IA64_TPREL64MSB
1302 @deffnx {} BFD_RELOC_IA64_TPREL64LSB
1303 @deffnx {} BFD_RELOC_IA64_LTOFF_TP22
1304 @deffnx {} BFD_RELOC_IA64_LTOFF22X
1305 @deffnx {} BFD_RELOC_IA64_LDXMOV
1306 Intel IA64 Relocations.
1307 @end deffn
1308 @deffn {} BFD_RELOC_M68HC11_HI8
1309 Motorola 68HC11 reloc.
1310 This is the 8 bits high part of an absolute address.
1311 @end deffn
1312 @deffn {} BFD_RELOC_M68HC11_LO8
1313 Motorola 68HC11 reloc.
1314 This is the 8 bits low part of an absolute address.
1315 @end deffn
1316 @deffn {} BFD_RELOC_M68HC11_3B
1317 Motorola 68HC11 reloc.
1318 This is the 3 bits of a value.
1319 @end deffn
1320 @deffn {} BFD_RELOC_CRIS_BDISP8
1321 @deffnx {} BFD_RELOC_CRIS_UNSIGNED_5
1322 @deffnx {} BFD_RELOC_CRIS_SIGNED_6
1323 @deffnx {} BFD_RELOC_CRIS_UNSIGNED_6
1324 @deffnx {} BFD_RELOC_CRIS_UNSIGNED_4
1325 These relocs are only used within the CRIS assembler. They are not
1326 (at present) written to any object files.
1327 @end deffn
1328 @deffn {} BFD_RELOC_860_COPY
1329 @deffnx {} BFD_RELOC_860_GLOB_DAT
1330 @deffnx {} BFD_RELOC_860_JUMP_SLOT
1331 @deffnx {} BFD_RELOC_860_RELATIVE
1332 @deffnx {} BFD_RELOC_860_PC26
1333 @deffnx {} BFD_RELOC_860_PLT26
1334 @deffnx {} BFD_RELOC_860_PC16
1335 @deffnx {} BFD_RELOC_860_LOW0
1336 @deffnx {} BFD_RELOC_860_SPLIT0
1337 @deffnx {} BFD_RELOC_860_LOW1
1338 @deffnx {} BFD_RELOC_860_SPLIT1
1339 @deffnx {} BFD_RELOC_860_LOW2
1340 @deffnx {} BFD_RELOC_860_SPLIT2
1341 @deffnx {} BFD_RELOC_860_LOW3
1342 @deffnx {} BFD_RELOC_860_LOGOT0
1343 @deffnx {} BFD_RELOC_860_SPGOT0
1344 @deffnx {} BFD_RELOC_860_LOGOT1
1345 @deffnx {} BFD_RELOC_860_SPGOT1
1346 @deffnx {} BFD_RELOC_860_LOGOTOFF0
1347 @deffnx {} BFD_RELOC_860_SPGOTOFF0
1348 @deffnx {} BFD_RELOC_860_LOGOTOFF1
1349 @deffnx {} BFD_RELOC_860_SPGOTOFF1
1350 @deffnx {} BFD_RELOC_860_LOGOTOFF2
1351 @deffnx {} BFD_RELOC_860_LOGOTOFF3
1352 @deffnx {} BFD_RELOC_860_LOPC
1353 @deffnx {} BFD_RELOC_860_HIGHADJ
1354 @deffnx {} BFD_RELOC_860_HAGOT
1355 @deffnx {} BFD_RELOC_860_HAGOTOFF
1356 @deffnx {} BFD_RELOC_860_HAPC
1357 @deffnx {} BFD_RELOC_860_HIGH
1358 @deffnx {} BFD_RELOC_860_HIGOT
1359 @deffnx {} BFD_RELOC_860_HIGOTOFF
1360 Intel i860 Relocations.
1361 @end deffn
1363 @example
1365 typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
1366 @end example
1367 @findex bfd_reloc_type_lookup
1368 @subsubsection @code{bfd_reloc_type_lookup}
1369 @strong{Synopsis}
1370 @example
1371 reloc_howto_type *
1372 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code);
1373 @end example
1374 @strong{Description}@*
1375 Return a pointer to a howto structure which, when
1376 invoked, will perform the relocation @var{code} on data from the
1377 architecture noted.
1379 @findex bfd_default_reloc_type_lookup
1380 @subsubsection @code{bfd_default_reloc_type_lookup}
1381 @strong{Synopsis}
1382 @example
1383 reloc_howto_type *bfd_default_reloc_type_lookup
1384 (bfd *abfd, bfd_reloc_code_real_type code);
1385 @end example
1386 @strong{Description}@*
1387 Provides a default relocation lookup routine for any architecture.
1389 @findex bfd_get_reloc_code_name
1390 @subsubsection @code{bfd_get_reloc_code_name}
1391 @strong{Synopsis}
1392 @example
1393 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
1394 @end example
1395 @strong{Description}@*
1396 Provides a printable name for the supplied relocation code.
1397 Useful mainly for printing error messages.
1399 @findex bfd_generic_relax_section
1400 @subsubsection @code{bfd_generic_relax_section}
1401 @strong{Synopsis}
1402 @example
1403 boolean bfd_generic_relax_section
1404 (bfd *abfd,
1405 asection *section,
1406 struct bfd_link_info *,
1407 boolean *);
1408 @end example
1409 @strong{Description}@*
1410 Provides default handling for relaxing for back ends which
1411 don't do relaxing -- i.e., does nothing.
1413 @findex bfd_generic_gc_sections
1414 @subsubsection @code{bfd_generic_gc_sections}
1415 @strong{Synopsis}
1416 @example
1417 boolean bfd_generic_gc_sections
1418 (bfd *, struct bfd_link_info *);
1419 @end example
1420 @strong{Description}@*
1421 Provides default handling for relaxing for back ends which
1422 don't do section gc -- i.e., does nothing.
1424 @findex bfd_generic_get_relocated_section_contents
1425 @subsubsection @code{bfd_generic_get_relocated_section_contents}
1426 @strong{Synopsis}
1427 @example
1428 bfd_byte *
1429 bfd_generic_get_relocated_section_contents (bfd *abfd,
1430 struct bfd_link_info *link_info,
1431 struct bfd_link_order *link_order,
1432 bfd_byte *data,
1433 boolean relocateable,
1434 asymbol **symbols);
1435 @end example
1436 @strong{Description}@*
1437 Provides default handling of relocation effort for back ends
1438 which can't be bothered to do it efficiently.