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[binutils.git] / gas / itbl-ops.h
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1 /* itbl-ops.h
2 Copyright 1997, 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
21 /* External functions, constants and defines for itbl support */
23 #include "ansidecl.h"
25 /* Include file notes: "expr.h" needed before targ-*.h,
26 * "targ-env.h" includes the chain of target dependant headers,
27 * "targ-cpu.h" has the HAVE_ITBL_CPU define, and
28 * as.h includes them all */
29 #include "as.h"
31 #ifdef HAVE_ITBL_CPU
32 #include "itbl-cpu.h"
33 #endif
35 /* Defaults for definitions required by generic code */
36 #ifndef ITBL_NUMBER_OF_PROCESSORS
37 #define ITBL_NUMBER_OF_PROCESSORS 1
38 #endif
40 #ifndef ITBL_MAX_BITPOS
41 #define ITBL_MAX_BITPOS 31
42 #endif
44 #ifndef ITBL_TYPE
45 #define ITBL_TYPE unsigned long
46 #endif
48 #ifndef ITBL_IS_INSN
49 #define ITBL_IS_INSN(insn) 1
50 #endif
52 #ifndef ITBL_DECODE_PNUM
53 #define ITBL_DECODE_PNUM(insn) 0
54 #endif
56 #ifndef ITBL_ENCODE_PNUM
57 #define ITBL_ENCODE_PNUM(pnum) 0
58 #endif
60 typedef ITBL_TYPE t_insn;
62 /* types of entries */
63 typedef enum
65 e_insn,
66 e_dreg,
67 e_regtype0 = e_dreg,
68 e_creg,
69 e_greg,
70 e_addr,
71 e_nregtypes = e_greg + 1,
72 e_immed,
73 e_ntypes,
74 e_invtype /* invalid type */
75 } e_type;
77 typedef enum
79 e_p0,
80 e_nprocs = NUMBER_OF_PROCESSORS,
81 e_invproc /* invalid processor */
82 } e_processor;
84 /* 0 means an instruction table was not specified. */
85 extern int itbl_have_entries;
87 /* These routines are visible to the main part of the assembler */
89 int itbl_parse PARAMS ((char *insntbl));
90 void itbl_init PARAMS ((void));
91 char *itbl_get_field PARAMS ((char **s));
92 unsigned long itbl_assemble PARAMS ((char *name, char *operands));
93 int itbl_disassemble PARAMS ((char *str, unsigned long insn));
94 int itbl_parse PARAMS ((char *tbl)); /* parses insn tbl */
95 int itbl_get_reg_val PARAMS ((char *name, unsigned long *pval));
96 int itbl_get_val PARAMS ((e_processor processor, e_type type, char *name,
97 unsigned long *pval));
98 char *itbl_get_name PARAMS ((e_processor processor, e_type type,
99 unsigned long val));
101 /* These routines are called by the table parser used to build the
102 dynamic list of new processor instructions and registers. */
104 struct itbl_entry *itbl_add_reg PARAMS ((int yyproc, int yytype,
105 char *regname, int regnum));
106 struct itbl_entry *itbl_add_insn PARAMS ((int yyproc, char *name,
107 unsigned long value, int sbit, int ebit, unsigned long flags));
108 struct itbl_field *itbl_add_operand PARAMS ((struct itbl_entry * e, int yytype,
109 int sbit, int ebit, unsigned long flags));