include/xtensa-isa.h

   1 /* Interface definition for configurable Xtensa ISA support.
   2    Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
   3
   4    This file is part of BFD, the Binary File Descriptor library.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  19
  20 #ifndef XTENSA_LIBISA_H
  21 #define XTENSA_LIBISA_H
  22
  23 #ifdef __cplusplus
  24 extern "C" {
  25 #endif
  26
  27 /* Use the statically-linked version for the GNU tools.  */
  28 #define STATIC_LIBISA 1
  29
  30 /* Version number: This is intended to help support code that works with
  31    versions of this library from multiple Xtensa releases.  */
  32
  33 #define XTENSA_ISA_VERSION 7000
  34
  35 #ifndef uint32
  36 #define uint32 unsigned int
  37 #endif
  38
  39 /* This file defines the interface to the Xtensa ISA library.  This
  40    library contains most of the ISA-specific information for a
  41    particular Xtensa processor.  For example, the set of valid
  42    instructions, their opcode encodings and operand fields are all
  43    included here.
  44
  45    This interface basically defines a number of abstract data types.
  46
  47    . an instruction buffer - for holding the raw instruction bits
  48    . ISA info - information about the ISA as a whole
  49    . instruction formats - instruction size and slot structure
  50    . opcodes - information about individual instructions
  51    . operands - information about register and immediate instruction operands
  52    . stateOperands - information about processor state instruction operands
  53    . interfaceOperands - information about interface instruction operands
  54    . register files - register file information
  55    . processor states - internal processor state information
  56    . system registers - "special registers" and "user registers"
  57    . interfaces - TIE interfaces that are external to the processor
  58    . functional units - TIE shared functions
  59
  60    The interface defines a set of functions to access each data type.
  61    With the exception of the instruction buffer, the internal
  62    representations of the data structures are hidden.  All accesses must
  63    be made through the functions defined here.  */
  64
  65 typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa;
  66
  67
  68 /* Most of the Xtensa ISA entities (e.g., opcodes, regfiles, etc.) are
  69    represented here using sequential integers beginning with 0.  The
  70    specific values are only fixed for a particular instantiation of an
  71    xtensa_isa structure, so these values should only be used
  72    internally.  */
  73
  74 typedef int xtensa_opcode;
  75 typedef int xtensa_format;
  76 typedef int xtensa_regfile;
  77 typedef int xtensa_state;
  78 typedef int xtensa_sysreg;
  79 typedef int xtensa_interface;
  80 typedef int xtensa_funcUnit;
  81
  82
  83 /* Define a unique value for undefined items.  */
  84
  85 #define XTENSA_UNDEFINED -1
  86
  87
  88 /* Overview of using this interface to decode/encode instructions:
  89
  90    Each Xtensa instruction is associated with a particular instruction
  91    format, where the format defines a fixed number of slots for
  92    operations.  The formats for the core Xtensa ISA have only one slot,
  93    but FLIX instructions may have multiple slots.  Within each slot,
  94    there is a single opcode and some number of associated operands.
  95
  96    The encoding and decoding functions operate on instruction buffers,
  97    not on the raw bytes of the instructions.  The same instruction
  98    buffer data structure is used for both entire instructions and
  99    individual slots in those instructions -- the contents of a slot need
 100    to be extracted from or inserted into the buffer for the instruction
 101    as a whole.
 102
 103    Decoding an instruction involves first finding the format, which
 104    identifies the number of slots, and then decoding each slot
 105    separately.  A slot is decoded by finding the opcode and then using
 106    the opcode to determine how many operands there are.  For example:
 107
 108    xtensa_insnbuf_from_chars
 109    xtensa_format_decode
 110    for each slot {
 111      xtensa_format_get_slot
 112      xtensa_opcode_decode
 113      for each operand {
 114        xtensa_operand_get_field
 115        xtensa_operand_decode
 116      }
 117    }
 118
 119    Encoding an instruction is roughly the same procedure in reverse:
 120
 121    xtensa_format_encode
 122    for each slot {
 123      xtensa_opcode_encode
 124      for each operand {
 125        xtensa_operand_encode
 126        xtensa_operand_set_field
 127      }
 128      xtensa_format_set_slot
 129    }
 130    xtensa_insnbuf_to_chars
 131 */
 132
 133 \f
 134 /* Error handling.  */
 135
 136 /* Error codes.  The code for the most recent error condition can be
 137    retrieved with the "errno" function.  For any result other than
 138    xtensa_isa_ok, an error message containing additional information
 139    about the problem can be retrieved using the "error_msg" function.
 140    The error messages are stored in an internal buffer, which should not
 141    should be freed and may be overwritten by subsequent operations.  */
 142
 143 typedef enum xtensa_isa_status_enum
 144 {
 145   xtensa_isa_ok = 0,
 146   xtensa_isa_bad_format,
 147   xtensa_isa_bad_slot,
 148   xtensa_isa_bad_opcode,
 149   xtensa_isa_bad_operand,
 150   xtensa_isa_bad_field,
 151   xtensa_isa_bad_iclass,
 152   xtensa_isa_bad_regfile,
 153   xtensa_isa_bad_sysreg,
 154   xtensa_isa_bad_state,
 155   xtensa_isa_bad_interface,
 156   xtensa_isa_bad_funcUnit,
 157   xtensa_isa_wrong_slot,
 158   xtensa_isa_no_field,
 159   xtensa_isa_out_of_memory,
 160   xtensa_isa_buffer_overflow,
 161   xtensa_isa_internal_error,
 162   xtensa_isa_bad_value
 163 } xtensa_isa_status;
 164
 165 extern xtensa_isa_status
 166 xtensa_isa_errno (xtensa_isa isa);
 167
 168 extern char *
 169 xtensa_isa_error_msg (xtensa_isa isa);
 170
 171
 172 \f
 173 /* Instruction buffers.  */
 174
 175 typedef uint32 xtensa_insnbuf_word;
 176 typedef xtensa_insnbuf_word *xtensa_insnbuf;
 177
 178
 179 /* Get the size in "insnbuf_words" of the xtensa_insnbuf array.  */
 180
 181 extern int
 182 xtensa_insnbuf_size (xtensa_isa isa);
 183
 184
 185 /* Allocate an xtensa_insnbuf of the right size.  */
 186
 187 extern xtensa_insnbuf
 188 xtensa_insnbuf_alloc (xtensa_isa isa);
 189
 190
 191 /* Release an xtensa_insnbuf.  */
 192
 193 extern void
 194 xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf);
 195
 196
 197 /* Conversion between raw memory (char arrays) and our internal
 198    instruction representation.  This is complicated by the Xtensa ISA's
 199    variable instruction lengths.  When converting to chars, the buffer
 200    must contain a valid instruction so we know how many bytes to copy;
 201    thus, the "to_chars" function returns the number of bytes copied or
 202    XTENSA_UNDEFINED on error.  The "from_chars" function first reads the
 203    minimal number of bytes required to decode the instruction length and
 204    then proceeds to copy the entire instruction into the buffer; if the
 205    memory does not contain a valid instruction, it copies the maximum
 206    number of bytes required for the longest Xtensa instruction.  The
 207    "num_chars" argument may be used to limit the number of bytes that
 208    can be read or written.  Otherwise, if "num_chars" is zero, the
 209    functions may read or write past the end of the code.  */
 210
 211 extern int
 212 xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn,
 213                          unsigned char *cp, int num_chars);
 214
 215 extern void
 216 xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn,
 217                            const unsigned char *cp, int num_chars);
 218
 219
 220 \f
 221 /* ISA information.  */
 222
 223 /* Initialize the ISA information.  */
 224
 225 extern xtensa_isa
 226 xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p);
 227
 228
 229 /* Deallocate an xtensa_isa structure.  */
 230
 231 extern void
 232 xtensa_isa_free (xtensa_isa isa);
 233
 234
 235 /* Get the maximum instruction size in bytes.  */
 236
 237 extern int
 238 xtensa_isa_maxlength (xtensa_isa isa);
 239
 240
 241 /* Decode the length in bytes of an instruction in raw memory (not an
 242    insnbuf).  This function reads only the minimal number of bytes
 243    required to decode the instruction length.  Returns
 244    XTENSA_UNDEFINED on error.  */
 245
 246 extern int
 247 xtensa_isa_length_from_chars (xtensa_isa isa, const unsigned char *cp);
 248
 249
 250 /* Get the number of stages in the processor's pipeline.  The pipeline
 251    stage values returned by other functions in this library will range
 252    from 0 to N-1, where N is the value returned by this function.
 253    Note that the stage numbers used here may not correspond to the
 254    actual processor hardware, e.g., the hardware may have additional
 255    stages before stage 0.  Returns XTENSA_UNDEFINED on error.  */
 256
 257 extern int
 258 xtensa_isa_num_pipe_stages (xtensa_isa isa);
 259
 260
 261 /* Get the number of various entities that are defined for this processor.  */
 262
 263 extern int
 264 xtensa_isa_num_formats (xtensa_isa isa);
 265
 266 extern int
 267 xtensa_isa_num_opcodes (xtensa_isa isa);
 268
 269 extern int
 270 xtensa_isa_num_regfiles (xtensa_isa isa);
 271
 272 extern int
 273 xtensa_isa_num_states (xtensa_isa isa);
 274
 275 extern int
 276 xtensa_isa_num_sysregs (xtensa_isa isa);
 277
 278 extern int
 279 xtensa_isa_num_interfaces (xtensa_isa isa);
 280
 281 extern int
 282 xtensa_isa_num_funcUnits (xtensa_isa isa);
 283
 284
 285 \f
 286 /* Instruction formats.  */
 287
 288 /* Get the name of a format.  Returns null on error.  */
 289
 290 extern const char *
 291 xtensa_format_name (xtensa_isa isa, xtensa_format fmt);
 292
 293
 294 /* Given a format name, return the format number.  Returns
 295    XTENSA_UNDEFINED if the name is not a valid format.  */
 296
 297 extern xtensa_format
 298 xtensa_format_lookup (xtensa_isa isa, const char *fmtname);
 299
 300
 301 /* Decode the instruction format from a binary instruction buffer.
 302    Returns XTENSA_UNDEFINED if the format is not recognized.  */
 303
 304 extern xtensa_format
 305 xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn);
 306
 307
 308 /* Set the instruction format field(s) in a binary instruction buffer.
 309    All the other fields are set to zero.  Returns non-zero on error.  */
 310
 311 extern int
 312 xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
 313
 314
 315 /* Find the length (in bytes) of an instruction.  Returns
 316    XTENSA_UNDEFINED on error.  */
 317
 318 extern int
 319 xtensa_format_length (xtensa_isa isa, xtensa_format fmt);
 320
 321
 322 /* Get the number of slots in an instruction.  Returns XTENSA_UNDEFINED
 323    on error.  */
 324
 325 extern int
 326 xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt);
 327
 328
 329 /* Get the opcode for a no-op in a particular slot.
 330    Returns XTENSA_UNDEFINED on error.  */
 331
 332 extern xtensa_opcode
 333 xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
 334
 335
 336 /* Get the bits for a specified slot out of an insnbuf for the
 337    instruction as a whole and put them into an insnbuf for that one
 338    slot, and do the opposite to set a slot.  Return non-zero on error.  */
 339
 340 extern int
 341 xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
 342                         const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
 343
 344 extern int
 345 xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
 346                         xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
 347
 348
 349 \f
 350 /* Opcode information.  */
 351
 352 /* Translate a mnemonic name to an opcode.  Returns XTENSA_UNDEFINED if
 353    the name is not a valid opcode mnemonic.  */
 354
 355 extern xtensa_opcode
 356 xtensa_opcode_lookup (xtensa_isa isa, const char *opname);
 357
 358
 359 /* Decode the opcode for one instruction slot from a binary instruction
 360    buffer.  Returns the opcode or XTENSA_UNDEFINED if the opcode is
 361    illegal.  */
 362
 363 extern xtensa_opcode
 364 xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
 365                       const xtensa_insnbuf slotbuf);
 366
 367
 368 /* Set the opcode field(s) for an instruction slot.  All other fields
 369    in the slot are set to zero.  Returns non-zero if the opcode cannot
 370    be encoded.  */
 371
 372 extern int
 373 xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
 374                       xtensa_insnbuf slotbuf, xtensa_opcode opc);
 375
 376
 377 /* Get the mnemonic name for an opcode.  Returns null on error.  */
 378
 379 extern const char *
 380 xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
 381
 382
 383 /* Check various properties of opcodes.  These functions return 0 if
 384    the condition is false, 1 if the condition is true, and
 385    XTENSA_UNDEFINED on error.  The instructions are classified as
 386    follows:
 387
 388    branch: conditional branch; may fall through to next instruction (B*)
 389    jump: unconditional branch (J, JX, RET*, RF*)
 390    loop: zero-overhead loop (LOOP*)
 391    call: unconditional call; control returns to next instruction (CALL*)
 392
 393    For the opcodes that affect control flow in some way, the branch
 394    target may be specified by an immediate operand or it may be an
 395    address stored in a register.  You can distinguish these by
 396    checking if the instruction has a PC-relative immediate
 397    operand.  */
 398
 399 extern int
 400 xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
 401
 402 extern int
 403 xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
 404
 405 extern int
 406 xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
 407
 408 extern int
 409 xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
 410
 411
 412 /* Find the number of ordinary operands, state operands, and interface
 413    operands for an instruction.  These return XTENSA_UNDEFINED on
 414    error.  */
 415
 416 extern int
 417 xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
 418
 419 extern int
 420 xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
 421
 422 extern int
 423 xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
 424
 425
 426 /* Get functional unit usage requirements for an opcode.  Each "use"
 427    is identified by a <functional unit, pipeline stage> pair.  The
 428    "num_funcUnit_uses" function returns the number of these "uses" or
 429    XTENSA_UNDEFINED on error.  The "funcUnit_use" function returns
 430    a pointer to a "use" pair or null on error.  */
 431
 432 typedef struct xtensa_funcUnit_use_struct
 433 {
 434   xtensa_funcUnit unit;
 435   int stage;
 436 } xtensa_funcUnit_use;
 437
 438 extern int
 439 xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
 440
 441 extern xtensa_funcUnit_use *
 442 xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u);
 443
 444
 445 \f
 446 /* Operand information.  */
 447
 448 /* Get the name of an operand.  Returns null on error.  */
 449
 450 extern const char *
 451 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
 452
 453
 454 /* Some operands are "invisible", i.e., not explicitly specified in
 455    assembly language.  When assembling an instruction, you need not set
 456    the values of invisible operands, since they are either hardwired or
 457    derived from other field values.  The values of invisible operands
 458    can be examined in the same way as other operands, but remember that
 459    an invisible operand may get its value from another visible one, so
 460    the entire instruction must be available before examining the
 461    invisible operand values.  This function returns 1 if an operand is
 462    visible, 0 if it is invisible, or XTENSA_UNDEFINED on error.  Note
 463    that whether an operand is visible is orthogonal to whether it is
 464    "implicit", i.e., whether it is encoded in a field in the
 465    instruction.  */
 466
 467 extern int
 468 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
 469
 470
 471 /* Check if an operand is an input ('i'), output ('o'), or inout ('m')
 472    operand.  Note: The output operand of a conditional assignment
 473    (e.g., movnez) appears here as an inout ('m') even if it is declared
 474    in the TIE code as an output ('o'); this allows the compiler to
 475    properly handle register allocation for conditional assignments.
 476    Returns 0 on error.  */
 477
 478 extern char
 479 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
 480
 481
 482 /* Get and set the raw (encoded) value of the field for the specified
 483    operand.  The "set" function does not check if the value fits in the
 484    field; that is done by the "encode" function below.  Both of these
 485    functions return non-zero on error, e.g., if the field is not defined
 486    for the specified slot.  */
 487
 488 extern int
 489 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
 490                           xtensa_format fmt, int slot,
 491                           const xtensa_insnbuf slotbuf, uint32 *valp);
 492
 493 extern int
 494 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
 495                           xtensa_format fmt, int slot,
 496                           xtensa_insnbuf slotbuf, uint32 val);
 497
 498
 499 /* Encode and decode operands.  The raw bits in the operand field may
 500    be encoded in a variety of different ways.  These functions hide
 501    the details of that encoding.  The result values are returned through
 502    the argument pointer.  The return value is non-zero on error.  */
 503
 504 extern int
 505 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
 506                        uint32 *valp);
 507
 508 extern int
 509 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
 510                        uint32 *valp);
 511
 512
 513 /* An operand may be either a register operand or an immediate of some
 514    sort (e.g., PC-relative or not).  The "is_register" function returns
 515    0 if the operand is an immediate, 1 if it is a register, and
 516    XTENSA_UNDEFINED on error.  The "regfile" function returns the
 517    regfile for a register operand, or XTENSA_UNDEFINED on error.  */
 518
 519 extern int
 520 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
 521
 522 extern xtensa_regfile
 523 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
 524
 525
 526 /* Register operands may span multiple consecutive registers, e.g., a
 527    64-bit data type may occupy two 32-bit registers.  Only the first
 528    register is encoded in the operand field.  This function specifies
 529    the number of consecutive registers occupied by this operand.  For
 530    non-register operands, the return value is undefined.  Returns
 531    XTENSA_UNDEFINED on error.  */
 532
 533 extern int
 534 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
 535
 536
 537 /* Some register operands do not completely identify the register being
 538    accessed.  For example, the operand value may be added to an internal
 539    state value.  By definition, this implies that the corresponding
 540    regfile is not allocatable.  Unknown registers should generally be
 541    treated with worst-case assumptions.  The function returns 0 if the
 542    register value is unknown, 1 if known, and XTENSA_UNDEFINED on
 543    error.  */
 544
 545 extern int
 546 xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd);
 547
 548
 549 /* Check if an immediate operand is PC-relative.  Returns 0 for register
 550    operands and non-PC-relative immediates, 1 for PC-relative
 551    immediates, and XTENSA_UNDEFINED on error.  */
 552
 553 extern int
 554 xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd);
 555
 556
 557 /* For PC-relative offset operands, the interpretation of the offset may
 558    vary between opcodes, e.g., is it relative to the current PC or that
 559    of the next instruction?  The following functions are defined to
 560    perform PC-relative relocations and to undo them (as in the
 561    disassembler).  The "do_reloc" function takes the desired address
 562    value and the PC of the current instruction and sets the value to the
 563    corresponding PC-relative offset (which can then be encoded and
 564    stored into the operand field).  The "undo_reloc" function takes the
 565    unencoded offset value and the current PC and sets the value to the
 566    appropriate address.  The return values are non-zero on error.  Note
 567    that these functions do not replace the encode/decode functions; the
 568    operands must be encoded/decoded separately and the encode functions
 569    are responsible for detecting invalid operand values.  */
 570
 571 extern int
 572 xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
 573                          uint32 *valp, uint32 pc);
 574
 575 extern int
 576 xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
 577                            uint32 *valp, uint32 pc);
 578
 579
 580 \f
 581 /* State Operands.  */
 582
 583 /* Get the state accessed by a state operand.  Returns XTENSA_UNDEFINED
 584    on error.  */
 585
 586 extern xtensa_state
 587 xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp);
 588
 589
 590 /* Check if a state operand is an input ('i'), output ('o'), or inout
 591    ('m') operand.  Returns 0 on error.  */
 592
 593 extern char
 594 xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp);
 595
 596
 597 \f
 598 /* Interface Operands.  */
 599
 600 /* Get the external interface accessed by an interface operand.
 601    Returns XTENSA_UNDEFINED on error.  */
 602
 603 extern xtensa_interface
 604 xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
 605                                    int ifOp);
 606
 607
 608 \f
 609 /* Register Files.  */
 610
 611 /* Regfiles include both "real" regfiles and "views", where a view
 612    allows a group of adjacent registers in a real "parent" regfile to be
 613    viewed as a single register.  A regfile view has all the same
 614    properties as its parent except for its (long) name, bit width, number
 615    of entries, and default ctype.  You can use the parent function to
 616    distinguish these two classes.  */
 617
 618 /* Look up a regfile by either its name or its abbreviated "short name".
 619    Returns XTENSA_UNDEFINED on error.  The "lookup_shortname" function
 620    ignores "view" regfiles since they always have the same shortname as
 621    their parents.  */
 622
 623 extern xtensa_regfile
 624 xtensa_regfile_lookup (xtensa_isa isa, const char *name);
 625
 626 extern xtensa_regfile
 627 xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname);
 628
 629
 630 /* Get the name or abbreviated "short name" of a regfile.
 631    Returns null on error.  */
 632
 633 extern const char *
 634 xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf);
 635
 636 extern const char *
 637 xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf);
 638
 639
 640 /* Get the parent regfile of a "view" regfile.  If the regfile is not a
 641    view, the result is the same as the input parameter.  Returns
 642    XTENSA_UNDEFINED on error.  */
 643
 644 extern xtensa_regfile
 645 xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf);
 646
 647
 648 /* Get the bit width of a regfile or regfile view.
 649    Returns XTENSA_UNDEFINED on error.  */
 650
 651 extern int
 652 xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf);
 653
 654
 655 /* Get the number of regfile entries.  Returns XTENSA_UNDEFINED on
 656    error.  */
 657
 658 extern int
 659 xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf);
 660
 661
 662 \f
 663 /* Processor States.  */
 664
 665 /* Look up a state by name.  Returns XTENSA_UNDEFINED on error.  */
 666
 667 extern xtensa_state
 668 xtensa_state_lookup (xtensa_isa isa, const char *name);
 669
 670
 671 /* Get the name for a processor state.  Returns null on error.  */
 672
 673 extern const char *
 674 xtensa_state_name (xtensa_isa isa, xtensa_state st);
 675
 676
 677 /* Get the bit width for a processor state.
 678    Returns XTENSA_UNDEFINED on error.  */
 679
 680 extern int
 681 xtensa_state_num_bits (xtensa_isa isa, xtensa_state st);
 682
 683
 684 /* Check if a state is exported from the processor core.  Returns 0 if
 685    the condition is false, 1 if the condition is true, and
 686    XTENSA_UNDEFINED on error.  */
 687
 688 extern int
 689 xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
 690
 691
 692 \f
 693 /* Sysregs ("special registers" and "user registers").  */
 694
 695 /* Look up a register by its number and whether it is a "user register"
 696    or a "special register".  Returns XTENSA_UNDEFINED if the sysreg does
 697    not exist.  */
 698
 699 extern xtensa_sysreg
 700 xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user);
 701
 702
 703 /* Check if there exists a sysreg with a given name.
 704    If not, this function returns XTENSA_UNDEFINED.  */
 705
 706 extern xtensa_sysreg
 707 xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name);
 708
 709
 710 /* Get the name of a sysreg.  Returns null on error.  */
 711
 712 extern const char *
 713 xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg);
 714
 715
 716 /* Get the register number.  Returns XTENSA_UNDEFINED on error.  */
 717
 718 extern int
 719 xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg);
 720
 721
 722 /* Check if a sysreg is a "special register" or a "user register".
 723    Returns 0 for special registers, 1 for user registers and
 724    XTENSA_UNDEFINED on error.  */
 725
 726 extern int
 727 xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg);
 728
 729
 730 \f
 731 /* Interfaces.  */
 732
 733 /* Find an interface by name.  The return value is XTENSA_UNDEFINED if
 734    the specified interface is not found.  */
 735
 736 extern xtensa_interface
 737 xtensa_interface_lookup (xtensa_isa isa, const char *ifname);
 738
 739
 740 /* Get the name of an interface.  Returns null on error.  */
 741
 742 extern const char *
 743 xtensa_interface_name (xtensa_isa isa, xtensa_interface intf);
 744
 745
 746 /* Get the bit width for an interface.
 747    Returns XTENSA_UNDEFINED on error.  */
 748
 749 extern int
 750 xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf);
 751
 752
 753 /* Check if an interface is an input ('i') or output ('o') with respect
 754    to the Xtensa processor core.  Returns 0 on error.  */
 755
 756 extern char
 757 xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf);
 758
 759
 760 /* Check if accessing an interface has potential side effects.
 761    Currently "data" interfaces have side effects and "control"
 762    interfaces do not.  Returns 1 if there are side effects, 0 if not,
 763    and XTENSA_UNDEFINED on error.  */
 764
 765 extern int
 766 xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf);
 767
 768
 769 /* Some interfaces may be related such that accessing one interface
 770    has side effects on a set of related interfaces.  The interfaces
 771    are partitioned into equivalence classes of related interfaces, and
 772    each class is assigned a unique identifier number.  This function
 773    returns the class identifier for an interface, or XTENSA_UNDEFINED
 774    on error.  These identifiers can be compared to determine if two
 775    interfaces are related; the specific values of the identifiers have
 776    no particular meaning otherwise.  */
 777
 778 extern int
 779 xtensa_interface_class_id (xtensa_isa isa, xtensa_interface intf);
 780
 781
 782 \f
 783 /* Functional Units.  */
 784
 785 /* Find a functional unit by name.  The return value is XTENSA_UNDEFINED if
 786    the specified unit is not found.  */
 787
 788 extern xtensa_funcUnit
 789 xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname);
 790
 791
 792 /* Get the name of a functional unit.  Returns null on error.  */
 793
 794 extern const char *
 795 xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun);
 796
 797
 798 /* Functional units may be replicated.  See how many instances of a
 799    particular function unit exist.  Returns XTENSA_UNDEFINED on error.  */
 800
 801 extern int
 802 xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun);
 803
 804
 805 #ifdef __cplusplus
 806 }
 807 #endif
 808 #endif /* XTENSA_LIBISA_H */