1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
132 /* The following pseudo-registers are used for unwind directives only: */
140 DYNREG_GR
= 0, /* dynamic general purpose register */
141 DYNREG_FR
, /* dynamic floating point register */
142 DYNREG_PR
, /* dynamic predicate register */
146 enum operand_match_result
149 OPERAND_OUT_OF_RANGE
,
153 /* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
159 struct label_fix
*next
;
161 bfd_boolean dw2_mark_labels
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";{}";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
230 that are predictable. */
233 /* Optimize for which CPU. */
240 /* What to do when hint.b is used. */
252 explicit_mode
: 1, /* which mode we're in */
253 default_explicit_mode
: 1, /* which mode is the default */
254 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
256 keep_pending_output
: 1;
258 /* What to do when something is wrong with unwind directives. */
261 unwind_check_warning
,
265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
267 the end_of_insn_group for the last instruction in a bundle. */
269 int num_slots_in_use
;
273 end_of_insn_group
: 1,
274 manual_bundling_on
: 1,
275 manual_bundling_off
: 1,
276 loc_directive_seen
: 1;
277 signed char user_template
; /* user-selected template, if any */
278 unsigned char qp_regno
; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
285 bfd_reloc_code_real_type code
;
286 enum ia64_opnd opnd
; /* type of operand in need of fix */
287 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
288 expressionS expr
; /* the value to be inserted */
290 fixup
[2]; /* at most two fixups per insn */
291 struct ia64_opcode
*idesc
;
292 struct label_fix
*label_fixups
;
293 struct label_fix
*tag_fixups
;
294 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
297 unsigned int src_line
;
298 struct dwarf2_line_info debug_line
;
306 struct dynreg
*next
; /* next dynamic register */
308 unsigned short base
; /* the base register number */
309 unsigned short num_regs
; /* # of registers in this set */
311 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
313 flagword flags
; /* ELF-header flags */
316 unsigned hint
:1; /* is this hint currently valid? */
317 bfd_vma offset
; /* mem.offset offset */
318 bfd_vma base
; /* mem.offset base */
321 int path
; /* number of alt. entry points seen */
322 const char **entry_labels
; /* labels of all alternate paths in
323 the current DV-checking block. */
324 int maxpaths
; /* size currently allocated for
327 int pointer_size
; /* size in bytes of a pointer */
328 int pointer_size_shift
; /* shift size of a pointer for alignment */
330 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
381 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
382 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
383 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
384 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
385 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
386 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
387 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
388 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
389 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
390 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
391 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
392 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
393 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
394 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
397 /* control registers: */
436 {"cr.gpta", CR_GPTA
},
437 {"cr.ipsr", CR_IPSR
},
441 {"cr.itir", CR_ITIR
},
442 {"cr.iipa", CR_IIPA
},
450 {"cr.irr0", CR_IRR0
},
451 {"cr.irr1", CR_IRR0
+ 1},
452 {"cr.irr2", CR_IRR0
+ 2},
453 {"cr.irr3", CR_IRR3
},
456 {"cr.cmcv", CR_CMCV
},
457 {"cr.lrr0", CR_LRR0
},
466 static const struct const_desc
473 /* PSR constant masks: */
476 {"psr.be", ((valueT
) 1) << 1},
477 {"psr.up", ((valueT
) 1) << 2},
478 {"psr.ac", ((valueT
) 1) << 3},
479 {"psr.mfl", ((valueT
) 1) << 4},
480 {"psr.mfh", ((valueT
) 1) << 5},
482 {"psr.ic", ((valueT
) 1) << 13},
483 {"psr.i", ((valueT
) 1) << 14},
484 {"psr.pk", ((valueT
) 1) << 15},
486 {"psr.dt", ((valueT
) 1) << 17},
487 {"psr.dfl", ((valueT
) 1) << 18},
488 {"psr.dfh", ((valueT
) 1) << 19},
489 {"psr.sp", ((valueT
) 1) << 20},
490 {"psr.pp", ((valueT
) 1) << 21},
491 {"psr.di", ((valueT
) 1) << 22},
492 {"psr.si", ((valueT
) 1) << 23},
493 {"psr.db", ((valueT
) 1) << 24},
494 {"psr.lp", ((valueT
) 1) << 25},
495 {"psr.tb", ((valueT
) 1) << 26},
496 {"psr.rt", ((valueT
) 1) << 27},
497 /* 28-31: reserved */
498 /* 32-33: cpl (current privilege level) */
499 {"psr.is", ((valueT
) 1) << 34},
500 {"psr.mc", ((valueT
) 1) << 35},
501 {"psr.it", ((valueT
) 1) << 36},
502 {"psr.id", ((valueT
) 1) << 37},
503 {"psr.da", ((valueT
) 1) << 38},
504 {"psr.dd", ((valueT
) 1) << 39},
505 {"psr.ss", ((valueT
) 1) << 40},
506 /* 41-42: ri (restart instruction) */
507 {"psr.ed", ((valueT
) 1) << 43},
508 {"psr.bn", ((valueT
) 1) << 44},
511 /* indirect register-sets/memory: */
520 { "CPUID", IND_CPUID
},
521 { "cpuid", IND_CPUID
},
533 /* Pseudo functions used to indicate relocation types (these functions
534 start with an at sign (@). */
556 /* reloc pseudo functions (these must come first!): */
557 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
558 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
559 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
560 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
561 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
562 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
563 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
564 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
565 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
566 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
567 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
568 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
569 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
570 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
571 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
572 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
573 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
575 /* mbtype4 constants: */
576 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
577 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
578 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
579 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
580 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
582 /* fclass constants: */
583 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
584 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
585 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
586 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
587 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
588 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
589 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
590 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
591 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
593 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
595 /* hint constants: */
596 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
598 /* unwind-related constants: */
599 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
600 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
601 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
602 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
603 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
604 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
605 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
607 /* unwind-related registers: */
608 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
611 /* 41-bit nop opcodes (one per unit): */
612 static const bfd_vma nop
[IA64_NUM_UNITS
] =
614 0x0000000000LL
, /* NIL => break 0 */
615 0x0008000000LL
, /* I-unit nop */
616 0x0008000000LL
, /* M-unit nop */
617 0x4000000000LL
, /* B-unit nop */
618 0x0008000000LL
, /* F-unit nop */
619 0x0000000000LL
, /* L-"unit" nop immediate */
620 0x0008000000LL
, /* X-unit nop */
623 /* Can't be `const' as it's passed to input routines (which have the
624 habit of setting temporary sentinels. */
625 static char special_section_name
[][20] =
627 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
628 {".IA_64.unwind"}, {".IA_64.unwind_info"},
629 {".init_array"}, {".fini_array"}
632 /* The best template for a particular sequence of up to three
634 #define N IA64_NUM_TYPES
635 static unsigned char best_template
[N
][N
][N
];
638 /* Resource dependencies currently in effect */
640 int depind
; /* dependency index */
641 const struct ia64_dependency
*dependency
; /* actual dependency */
642 unsigned specific
:1, /* is this a specific bit/regno? */
643 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
644 int index
; /* specific regno/bit within dependency */
645 int note
; /* optional qualifying note (0 if none) */
649 int insn_srlz
; /* current insn serialization state */
650 int data_srlz
; /* current data serialization state */
651 int qp_regno
; /* qualifying predicate for this usage */
652 char *file
; /* what file marked this dependency */
653 unsigned int line
; /* what line marked this dependency */
654 struct mem_offset mem_offset
; /* optional memory offset hint */
655 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
656 int path
; /* corresponding code entry index */
658 static int regdepslen
= 0;
659 static int regdepstotlen
= 0;
660 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
661 static const char *dv_sem
[] = { "none", "implied", "impliedf",
662 "data", "instr", "specific", "stop", "other" };
663 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
665 /* Current state of PR mutexation */
666 static struct qpmutex
{
669 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
670 static int qp_mutexeslen
= 0;
671 static int qp_mutexestotlen
= 0;
672 static valueT qp_safe_across_calls
= 0;
674 /* Current state of PR implications */
675 static struct qp_imply
{
678 unsigned p2_branched
:1;
680 } *qp_implies
= NULL
;
681 static int qp_implieslen
= 0;
682 static int qp_impliestotlen
= 0;
684 /* Keep track of static GR values so that indirect register usage can
685 sometimes be tracked. */
696 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
702 /* Remember the alignment frag. */
703 static fragS
*align_frag
;
705 /* These are the routines required to output the various types of
708 /* A slot_number is a frag address plus the slot index (0-2). We use the
709 frag address here so that if there is a section switch in the middle of
710 a function, then instructions emitted to a different section are not
711 counted. Since there may be more than one frag for a function, this
712 means we also need to keep track of which frag this address belongs to
713 so we can compute inter-frag distances. This also nicely solves the
714 problem with nops emitted for align directives, which can't easily be
715 counted, but can easily be derived from frag sizes. */
717 typedef struct unw_rec_list
{
719 unsigned long slot_number
;
721 struct unw_rec_list
*next
;
724 #define SLOT_NUM_NOT_SET (unsigned)-1
726 /* Linked list of saved prologue counts. A very poor
727 implementation of a map from label numbers to prologue counts. */
728 typedef struct label_prologue_count
730 struct label_prologue_count
*next
;
731 unsigned long label_number
;
732 unsigned int prologue_count
;
733 } label_prologue_count
;
735 typedef struct proc_pending
738 struct proc_pending
*next
;
743 /* Maintain a list of unwind entries for the current function. */
747 /* Any unwind entries that should be attached to the current slot
748 that an insn is being constructed for. */
749 unw_rec_list
*current_entry
;
751 /* These are used to create the unwind table entry for this function. */
752 proc_pending proc_pending
;
753 symbolS
*info
; /* pointer to unwind info */
754 symbolS
*personality_routine
;
756 subsegT saved_text_subseg
;
757 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
759 /* TRUE if processing unwind directives in a prologue region. */
760 unsigned int prologue
: 1;
761 unsigned int prologue_mask
: 4;
762 unsigned int prologue_gr
: 7;
763 unsigned int body
: 1;
764 unsigned int insn
: 1;
765 unsigned int prologue_count
; /* number of .prologues seen so far */
766 /* Prologue counts at previous .label_state directives. */
767 struct label_prologue_count
* saved_prologue_counts
;
769 /* List of split up .save-s. */
770 unw_p_record
*pending_saves
;
773 /* The input value is a negated offset from psp, and specifies an address
774 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
775 must add 16 and divide by 4 to get the encoded value. */
777 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
779 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
781 /* Forward declarations: */
782 static void set_section
PARAMS ((char *name
));
783 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
784 unsigned int, unsigned int));
785 static void dot_align (int);
786 static void dot_radix
PARAMS ((int));
787 static void dot_special_section
PARAMS ((int));
788 static void dot_proc
PARAMS ((int));
789 static void dot_fframe
PARAMS ((int));
790 static void dot_vframe
PARAMS ((int));
791 static void dot_vframesp
PARAMS ((int));
792 static void dot_save
PARAMS ((int));
793 static void dot_restore
PARAMS ((int));
794 static void dot_restorereg
PARAMS ((int));
795 static void dot_handlerdata
PARAMS ((int));
796 static void dot_unwentry
PARAMS ((int));
797 static void dot_altrp
PARAMS ((int));
798 static void dot_savemem
PARAMS ((int));
799 static void dot_saveg
PARAMS ((int));
800 static void dot_savef
PARAMS ((int));
801 static void dot_saveb
PARAMS ((int));
802 static void dot_savegf
PARAMS ((int));
803 static void dot_spill
PARAMS ((int));
804 static void dot_spillreg
PARAMS ((int));
805 static void dot_spillmem
PARAMS ((int));
806 static void dot_label_state
PARAMS ((int));
807 static void dot_copy_state
PARAMS ((int));
808 static void dot_unwabi
PARAMS ((int));
809 static void dot_personality
PARAMS ((int));
810 static void dot_body
PARAMS ((int));
811 static void dot_prologue
PARAMS ((int));
812 static void dot_endp
PARAMS ((int));
813 static void dot_template
PARAMS ((int));
814 static void dot_regstk
PARAMS ((int));
815 static void dot_rot
PARAMS ((int));
816 static void dot_byteorder
PARAMS ((int));
817 static void dot_psr
PARAMS ((int));
818 static void dot_alias
PARAMS ((int));
819 static void dot_ln
PARAMS ((int));
820 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
821 static void dot_xdata
PARAMS ((int));
822 static void stmt_float_cons
PARAMS ((int));
823 static void stmt_cons_ua
PARAMS ((int));
824 static void dot_xfloat_cons
PARAMS ((int));
825 static void dot_xstringer
PARAMS ((int));
826 static void dot_xdata_ua
PARAMS ((int));
827 static void dot_xfloat_cons_ua
PARAMS ((int));
828 static void print_prmask
PARAMS ((valueT mask
));
829 static void dot_pred_rel
PARAMS ((int));
830 static void dot_reg_val
PARAMS ((int));
831 static void dot_serialize
PARAMS ((int));
832 static void dot_dv_mode
PARAMS ((int));
833 static void dot_entry
PARAMS ((int));
834 static void dot_mem_offset
PARAMS ((int));
835 static void add_unwind_entry
PARAMS((unw_rec_list
*, int));
836 static symbolS
*declare_register
PARAMS ((const char *name
, unsigned int regnum
));
837 static void declare_register_set
PARAMS ((const char *, unsigned int, unsigned int));
838 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
839 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
842 static int parse_operand
PARAMS ((expressionS
*, int));
843 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
844 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
845 static void emit_one_bundle
PARAMS ((void));
846 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
847 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
848 bfd_reloc_code_real_type r_type
));
849 static void insn_group_break
PARAMS ((int, int, int));
850 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
851 struct rsrc
*, int depind
, int path
));
852 static void add_qp_mutex
PARAMS((valueT mask
));
853 static void add_qp_imply
PARAMS((int p1
, int p2
));
854 static void clear_qp_branch_flag
PARAMS((valueT mask
));
855 static void clear_qp_mutex
PARAMS((valueT mask
));
856 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
857 static int has_suffix_p
PARAMS((const char *, const char *));
858 static void clear_register_values
PARAMS ((void));
859 static void print_dependency
PARAMS ((const char *action
, int depind
));
860 static void instruction_serialization
PARAMS ((void));
861 static void data_serialization
PARAMS ((void));
862 static void remove_marked_resource
PARAMS ((struct rsrc
*));
863 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
864 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
865 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
866 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
867 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
868 struct ia64_opcode
*, int, struct rsrc
[], int, int));
869 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
870 static void check_dependencies
PARAMS((struct ia64_opcode
*));
871 static void mark_resources
PARAMS((struct ia64_opcode
*));
872 static void update_dependencies
PARAMS((struct ia64_opcode
*));
873 static void note_register_values
PARAMS((struct ia64_opcode
*));
874 static int qp_mutex
PARAMS ((int, int, int));
875 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
876 static void output_vbyte_mem
PARAMS ((int, char *, char *));
877 static void count_output
PARAMS ((int, char *, char *));
878 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
879 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
880 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
881 static void output_P1_format
PARAMS ((vbyte_func
, int));
882 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
883 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
884 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
885 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
886 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
887 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
888 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
889 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
890 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
891 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
892 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
893 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
894 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
895 static char format_ab_reg
PARAMS ((int, int));
896 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
898 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
899 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
901 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
902 static unw_rec_list
*output_endp
PARAMS ((void));
903 static unw_rec_list
*output_prologue
PARAMS ((void));
904 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
905 static unw_rec_list
*output_body
PARAMS ((void));
906 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
907 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
908 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
909 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
910 static unw_rec_list
*output_rp_when
PARAMS ((void));
911 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
912 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
913 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
915 static unw_rec_list
*output_pfs_when
PARAMS ((void));
916 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
917 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
919 static unw_rec_list
*output_preds_when
PARAMS ((void));
920 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
921 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
923 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
924 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
925 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
926 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
927 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
928 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
929 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
930 static unw_rec_list
*output_unat_when
PARAMS ((void));
931 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
932 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
933 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
934 static unw_rec_list
*output_lc_when
PARAMS ((void));
935 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
936 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
937 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
938 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
939 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
940 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
941 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
942 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
943 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
944 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
945 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
946 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
947 static unw_rec_list
*output_bsp_when
PARAMS ((void));
948 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
949 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
950 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
951 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
952 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
953 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
954 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
955 static unw_rec_list
*output_rnat_when
PARAMS ((void));
956 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
957 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
958 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
959 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
960 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
961 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
962 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
963 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int,
965 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int,
967 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
968 unsigned int, unsigned int));
969 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
970 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
971 static int calc_record_size
PARAMS ((unw_rec_list
*));
972 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
973 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
974 unsigned long, fragS
*,
976 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
977 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
978 static int parse_predicate_and_operand
PARAMS ((expressionS
*, unsigned *, const char *));
979 static void convert_expr_to_ab_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
980 static void convert_expr_to_xy_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
981 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
982 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
983 static void free_saved_prologue_counts
PARAMS ((void));
985 /* Determine if application register REGNUM resides only in the integer
986 unit (as opposed to the memory unit). */
988 ar_is_only_in_integer_unit (int reg
)
991 return reg
>= 64 && reg
<= 111;
994 /* Determine if application register REGNUM resides only in the memory
995 unit (as opposed to the integer unit). */
997 ar_is_only_in_memory_unit (int reg
)
1000 return reg
>= 0 && reg
<= 47;
1003 /* Switch to section NAME and create section if necessary. It's
1004 rather ugly that we have to manipulate input_line_pointer but I
1005 don't see any other way to accomplish the same thing without
1006 changing obj-elf.c (which may be the Right Thing, in the end). */
1011 char *saved_input_line_pointer
;
1013 saved_input_line_pointer
= input_line_pointer
;
1014 input_line_pointer
= name
;
1015 obj_elf_section (0);
1016 input_line_pointer
= saved_input_line_pointer
;
1019 /* Map 's' to SHF_IA_64_SHORT. */
1022 ia64_elf_section_letter (letter
, ptr_msg
)
1027 return SHF_IA_64_SHORT
;
1028 else if (letter
== 'o')
1029 return SHF_LINK_ORDER
;
1031 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1035 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1038 ia64_elf_section_flags (flags
, attr
, type
)
1040 int attr
, type ATTRIBUTE_UNUSED
;
1042 if (attr
& SHF_IA_64_SHORT
)
1043 flags
|= SEC_SMALL_DATA
;
1048 ia64_elf_section_type (str
, len
)
1052 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1054 if (STREQ (ELF_STRING_ia64_unwind_info
))
1055 return SHT_PROGBITS
;
1057 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1058 return SHT_PROGBITS
;
1060 if (STREQ (ELF_STRING_ia64_unwind
))
1061 return SHT_IA_64_UNWIND
;
1063 if (STREQ (ELF_STRING_ia64_unwind_once
))
1064 return SHT_IA_64_UNWIND
;
1066 if (STREQ ("unwind"))
1067 return SHT_IA_64_UNWIND
;
1074 set_regstack (ins
, locs
, outs
, rots
)
1075 unsigned int ins
, locs
, outs
, rots
;
1077 /* Size of frame. */
1080 sof
= ins
+ locs
+ outs
;
1083 as_bad (_("Size of frame exceeds maximum of 96 registers"));
1088 as_warn (_("Size of rotating registers exceeds frame size"));
1091 md
.in
.base
= REG_GR
+ 32;
1092 md
.loc
.base
= md
.in
.base
+ ins
;
1093 md
.out
.base
= md
.loc
.base
+ locs
;
1095 md
.in
.num_regs
= ins
;
1096 md
.loc
.num_regs
= locs
;
1097 md
.out
.num_regs
= outs
;
1098 md
.rot
.num_regs
= rots
;
1105 struct label_fix
*lfix
;
1107 subsegT saved_subseg
;
1111 if (!md
.last_text_seg
)
1114 saved_seg
= now_seg
;
1115 saved_subseg
= now_subseg
;
1117 subseg_set (md
.last_text_seg
, 0);
1119 while (md
.num_slots_in_use
> 0)
1120 emit_one_bundle (); /* force out queued instructions */
1122 /* In case there are labels following the last instruction, resolve
1125 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1127 symbol_set_value_now (lfix
->sym
);
1128 mark
|= lfix
->dw2_mark_labels
;
1132 dwarf2_where (&CURR_SLOT
.debug_line
);
1133 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
1134 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
1135 dwarf2_consume_line_info ();
1137 CURR_SLOT
.label_fixups
= 0;
1139 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1140 symbol_set_value_now (lfix
->sym
);
1141 CURR_SLOT
.tag_fixups
= 0;
1143 /* In case there are unwind directives following the last instruction,
1144 resolve those now. We only handle prologue, body, and endp directives
1145 here. Give an error for others. */
1146 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1148 switch (ptr
->r
.type
)
1154 ptr
->slot_number
= (unsigned long) frag_more (0);
1155 ptr
->slot_frag
= frag_now
;
1158 /* Allow any record which doesn't have a "t" field (i.e.,
1159 doesn't relate to a particular instruction). */
1175 as_bad (_("Unwind directive not followed by an instruction."));
1179 unwind
.current_entry
= NULL
;
1181 subseg_set (saved_seg
, saved_subseg
);
1183 if (md
.qp
.X_op
== O_register
)
1184 as_bad (_("qualifying predicate not followed by instruction"));
1188 ia64_do_align (int nbytes
)
1190 char *saved_input_line_pointer
= input_line_pointer
;
1192 input_line_pointer
= "";
1193 s_align_bytes (nbytes
);
1194 input_line_pointer
= saved_input_line_pointer
;
1198 ia64_cons_align (nbytes
)
1203 char *saved_input_line_pointer
= input_line_pointer
;
1204 input_line_pointer
= "";
1205 s_align_bytes (nbytes
);
1206 input_line_pointer
= saved_input_line_pointer
;
1210 /* Output COUNT bytes to a memory location. */
1211 static char *vbyte_mem_ptr
= NULL
;
1214 output_vbyte_mem (count
, ptr
, comment
)
1217 char *comment ATTRIBUTE_UNUSED
;
1220 if (vbyte_mem_ptr
== NULL
)
1225 for (x
= 0; x
< count
; x
++)
1226 *(vbyte_mem_ptr
++) = ptr
[x
];
1229 /* Count the number of bytes required for records. */
1230 static int vbyte_count
= 0;
1232 count_output (count
, ptr
, comment
)
1234 char *ptr ATTRIBUTE_UNUSED
;
1235 char *comment ATTRIBUTE_UNUSED
;
1237 vbyte_count
+= count
;
1241 output_R1_format (f
, rtype
, rlen
)
1243 unw_record_type rtype
;
1250 output_R3_format (f
, rtype
, rlen
);
1256 else if (rtype
!= prologue
)
1257 as_bad (_("record type is not valid"));
1259 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1260 (*f
) (1, &byte
, NULL
);
1264 output_R2_format (f
, mask
, grsave
, rlen
)
1271 mask
= (mask
& 0x0f);
1272 grsave
= (grsave
& 0x7f);
1274 bytes
[0] = (UNW_R2
| (mask
>> 1));
1275 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1276 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1277 (*f
) (count
, bytes
, NULL
);
1281 output_R3_format (f
, rtype
, rlen
)
1283 unw_record_type rtype
;
1290 output_R1_format (f
, rtype
, rlen
);
1296 else if (rtype
!= prologue
)
1297 as_bad (_("record type is not valid"));
1298 bytes
[0] = (UNW_R3
| r
);
1299 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1300 (*f
) (count
+ 1, bytes
, NULL
);
1304 output_P1_format (f
, brmask
)
1309 byte
= UNW_P1
| (brmask
& 0x1f);
1310 (*f
) (1, &byte
, NULL
);
1314 output_P2_format (f
, brmask
, gr
)
1320 brmask
= (brmask
& 0x1f);
1321 bytes
[0] = UNW_P2
| (brmask
>> 1);
1322 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1323 (*f
) (2, bytes
, NULL
);
1327 output_P3_format (f
, rtype
, reg
)
1329 unw_record_type rtype
;
1374 as_bad (_("Invalid record type for P3 format."));
1376 bytes
[0] = (UNW_P3
| (r
>> 1));
1377 bytes
[1] = (((r
& 1) << 7) | reg
);
1378 (*f
) (2, bytes
, NULL
);
1382 output_P4_format (f
, imask
, imask_size
)
1384 unsigned char *imask
;
1385 unsigned long imask_size
;
1388 (*f
) (imask_size
, (char *) imask
, NULL
);
1392 output_P5_format (f
, grmask
, frmask
)
1395 unsigned long frmask
;
1398 grmask
= (grmask
& 0x0f);
1401 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1402 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1403 bytes
[3] = (frmask
& 0x000000ff);
1404 (*f
) (4, bytes
, NULL
);
1408 output_P6_format (f
, rtype
, rmask
)
1410 unw_record_type rtype
;
1416 if (rtype
== gr_mem
)
1418 else if (rtype
!= fr_mem
)
1419 as_bad (_("Invalid record type for format P6"));
1420 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1421 (*f
) (1, &byte
, NULL
);
1425 output_P7_format (f
, rtype
, w1
, w2
)
1427 unw_record_type rtype
;
1434 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1439 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1489 bytes
[0] = (UNW_P7
| r
);
1490 (*f
) (count
, bytes
, NULL
);
1494 output_P8_format (f
, rtype
, t
)
1496 unw_record_type rtype
;
1535 case bspstore_psprel
:
1538 case bspstore_sprel
:
1550 case priunat_when_gr
:
1553 case priunat_psprel
:
1559 case priunat_when_mem
:
1566 count
+= output_leb128 (bytes
+ 2, t
, 0);
1567 (*f
) (count
, bytes
, NULL
);
1571 output_P9_format (f
, grmask
, gr
)
1578 bytes
[1] = (grmask
& 0x0f);
1579 bytes
[2] = (gr
& 0x7f);
1580 (*f
) (3, bytes
, NULL
);
1584 output_P10_format (f
, abi
, context
)
1591 bytes
[1] = (abi
& 0xff);
1592 bytes
[2] = (context
& 0xff);
1593 (*f
) (3, bytes
, NULL
);
1597 output_B1_format (f
, rtype
, label
)
1599 unw_record_type rtype
;
1600 unsigned long label
;
1606 output_B4_format (f
, rtype
, label
);
1609 if (rtype
== copy_state
)
1611 else if (rtype
!= label_state
)
1612 as_bad (_("Invalid record type for format B1"));
1614 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1615 (*f
) (1, &byte
, NULL
);
1619 output_B2_format (f
, ecount
, t
)
1621 unsigned long ecount
;
1628 output_B3_format (f
, ecount
, t
);
1631 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1632 count
+= output_leb128 (bytes
+ 1, t
, 0);
1633 (*f
) (count
, bytes
, NULL
);
1637 output_B3_format (f
, ecount
, t
)
1639 unsigned long ecount
;
1646 output_B2_format (f
, ecount
, t
);
1650 count
+= output_leb128 (bytes
+ 1, t
, 0);
1651 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1652 (*f
) (count
, bytes
, NULL
);
1656 output_B4_format (f
, rtype
, label
)
1658 unw_record_type rtype
;
1659 unsigned long label
;
1666 output_B1_format (f
, rtype
, label
);
1670 if (rtype
== copy_state
)
1672 else if (rtype
!= label_state
)
1673 as_bad (_("Invalid record type for format B1"));
1675 bytes
[0] = (UNW_B4
| (r
<< 3));
1676 count
+= output_leb128 (bytes
+ 1, label
, 0);
1677 (*f
) (count
, bytes
, NULL
);
1681 format_ab_reg (ab
, reg
)
1688 ret
= (ab
<< 5) | reg
;
1693 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1695 unw_record_type rtype
;
1705 if (rtype
== spill_sprel
)
1707 else if (rtype
!= spill_psprel
)
1708 as_bad (_("Invalid record type for format X1"));
1709 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1710 count
+= output_leb128 (bytes
+ 2, t
, 0);
1711 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1712 (*f
) (count
, bytes
, NULL
);
1716 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1725 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1726 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1727 count
+= output_leb128 (bytes
+ 3, t
, 0);
1728 (*f
) (count
, bytes
, NULL
);
1732 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1734 unw_record_type rtype
;
1745 if (rtype
== spill_sprel_p
)
1747 else if (rtype
!= spill_psprel_p
)
1748 as_bad (_("Invalid record type for format X3"));
1749 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1750 bytes
[2] = format_ab_reg (ab
, reg
);
1751 count
+= output_leb128 (bytes
+ 3, t
, 0);
1752 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1753 (*f
) (count
, bytes
, NULL
);
1757 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1767 bytes
[1] = (qp
& 0x3f);
1768 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1769 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1770 count
+= output_leb128 (bytes
+ 4, t
, 0);
1771 (*f
) (count
, bytes
, NULL
);
1774 /* This function checks whether there are any outstanding .save-s and
1775 discards them if so. */
1778 check_pending_save (void)
1780 if (unwind
.pending_saves
)
1782 unw_rec_list
*cur
, *prev
;
1784 as_warn (_("Previous .save incomplete"));
1785 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1786 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1789 prev
->next
= cur
->next
;
1791 unwind
.list
= cur
->next
;
1792 if (cur
== unwind
.tail
)
1794 if (cur
== unwind
.current_entry
)
1795 unwind
.current_entry
= cur
->next
;
1796 /* Don't free the first discarded record, it's being used as
1797 terminator for (currently) br_gr and gr_gr processing, and
1798 also prevents leaving a dangling pointer to it in its
1800 cur
->r
.record
.p
.grmask
= 0;
1801 cur
->r
.record
.p
.brmask
= 0;
1802 cur
->r
.record
.p
.frmask
= 0;
1803 prev
= cur
->r
.record
.p
.next
;
1804 cur
->r
.record
.p
.next
= NULL
;
1816 cur
= cur
->r
.record
.p
.next
;
1819 unwind
.pending_saves
= NULL
;
1823 /* This function allocates a record list structure, and initializes fields. */
1825 static unw_rec_list
*
1826 alloc_record (unw_record_type t
)
1829 ptr
= xmalloc (sizeof (*ptr
));
1830 memset (ptr
, 0, sizeof (*ptr
));
1831 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1836 /* Dummy unwind record used for calculating the length of the last prologue or
1839 static unw_rec_list
*
1842 unw_rec_list
*ptr
= alloc_record (endp
);
1846 static unw_rec_list
*
1849 unw_rec_list
*ptr
= alloc_record (prologue
);
1850 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1854 static unw_rec_list
*
1855 output_prologue_gr (saved_mask
, reg
)
1856 unsigned int saved_mask
;
1859 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1860 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1861 ptr
->r
.record
.r
.grmask
= saved_mask
;
1862 ptr
->r
.record
.r
.grsave
= reg
;
1866 static unw_rec_list
*
1869 unw_rec_list
*ptr
= alloc_record (body
);
1873 static unw_rec_list
*
1874 output_mem_stack_f (size
)
1877 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1878 ptr
->r
.record
.p
.size
= size
;
1882 static unw_rec_list
*
1883 output_mem_stack_v ()
1885 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1889 static unw_rec_list
*
1893 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1894 ptr
->r
.record
.p
.r
.gr
= gr
;
1898 static unw_rec_list
*
1899 output_psp_sprel (offset
)
1900 unsigned int offset
;
1902 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1903 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1907 static unw_rec_list
*
1910 unw_rec_list
*ptr
= alloc_record (rp_when
);
1914 static unw_rec_list
*
1918 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1919 ptr
->r
.record
.p
.r
.gr
= gr
;
1923 static unw_rec_list
*
1927 unw_rec_list
*ptr
= alloc_record (rp_br
);
1928 ptr
->r
.record
.p
.r
.br
= br
;
1932 static unw_rec_list
*
1933 output_rp_psprel (offset
)
1934 unsigned int offset
;
1936 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1937 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1941 static unw_rec_list
*
1942 output_rp_sprel (offset
)
1943 unsigned int offset
;
1945 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1946 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1950 static unw_rec_list
*
1953 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1957 static unw_rec_list
*
1961 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1962 ptr
->r
.record
.p
.r
.gr
= gr
;
1966 static unw_rec_list
*
1967 output_pfs_psprel (offset
)
1968 unsigned int offset
;
1970 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1971 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1975 static unw_rec_list
*
1976 output_pfs_sprel (offset
)
1977 unsigned int offset
;
1979 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1980 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1984 static unw_rec_list
*
1985 output_preds_when ()
1987 unw_rec_list
*ptr
= alloc_record (preds_when
);
1991 static unw_rec_list
*
1992 output_preds_gr (gr
)
1995 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1996 ptr
->r
.record
.p
.r
.gr
= gr
;
2000 static unw_rec_list
*
2001 output_preds_psprel (offset
)
2002 unsigned int offset
;
2004 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
2005 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2009 static unw_rec_list
*
2010 output_preds_sprel (offset
)
2011 unsigned int offset
;
2013 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
2014 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2018 static unw_rec_list
*
2019 output_fr_mem (mask
)
2022 unw_rec_list
*ptr
= alloc_record (fr_mem
);
2023 unw_rec_list
*cur
= ptr
;
2025 ptr
->r
.record
.p
.frmask
= mask
;
2026 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2029 unw_rec_list
*prev
= cur
;
2031 /* Clear least significant set bit. */
2032 mask
&= ~(mask
& (~mask
+ 1));
2035 cur
= alloc_record (fr_mem
);
2036 cur
->r
.record
.p
.frmask
= mask
;
2037 /* Retain only least significant bit. */
2038 prev
->r
.record
.p
.frmask
^= mask
;
2039 prev
->r
.record
.p
.next
= cur
;
2043 static unw_rec_list
*
2044 output_frgr_mem (gr_mask
, fr_mask
)
2045 unsigned int gr_mask
;
2046 unsigned int fr_mask
;
2048 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
2049 unw_rec_list
*cur
= ptr
;
2051 unwind
.pending_saves
= &cur
->r
.record
.p
;
2052 cur
->r
.record
.p
.frmask
= fr_mask
;
2055 unw_rec_list
*prev
= cur
;
2057 /* Clear least significant set bit. */
2058 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
2059 if (!gr_mask
&& !fr_mask
)
2061 cur
= alloc_record (frgr_mem
);
2062 cur
->r
.record
.p
.frmask
= fr_mask
;
2063 /* Retain only least significant bit. */
2064 prev
->r
.record
.p
.frmask
^= fr_mask
;
2065 prev
->r
.record
.p
.next
= cur
;
2067 cur
->r
.record
.p
.grmask
= gr_mask
;
2070 unw_rec_list
*prev
= cur
;
2072 /* Clear least significant set bit. */
2073 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
2076 cur
= alloc_record (frgr_mem
);
2077 cur
->r
.record
.p
.grmask
= gr_mask
;
2078 /* Retain only least significant bit. */
2079 prev
->r
.record
.p
.grmask
^= gr_mask
;
2080 prev
->r
.record
.p
.next
= cur
;
2084 static unw_rec_list
*
2085 output_gr_gr (mask
, reg
)
2089 unw_rec_list
*ptr
= alloc_record (gr_gr
);
2090 unw_rec_list
*cur
= ptr
;
2092 ptr
->r
.record
.p
.grmask
= mask
;
2093 ptr
->r
.record
.p
.r
.gr
= reg
;
2094 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2097 unw_rec_list
*prev
= cur
;
2099 /* Clear least significant set bit. */
2100 mask
&= ~(mask
& (~mask
+ 1));
2103 cur
= alloc_record (gr_gr
);
2104 cur
->r
.record
.p
.grmask
= mask
;
2105 /* Indicate this record shouldn't be output. */
2106 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2107 /* Retain only least significant bit. */
2108 prev
->r
.record
.p
.grmask
^= mask
;
2109 prev
->r
.record
.p
.next
= cur
;
2113 static unw_rec_list
*
2114 output_gr_mem (mask
)
2117 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2118 unw_rec_list
*cur
= ptr
;
2120 ptr
->r
.record
.p
.grmask
= mask
;
2121 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2124 unw_rec_list
*prev
= cur
;
2126 /* Clear least significant set bit. */
2127 mask
&= ~(mask
& (~mask
+ 1));
2130 cur
= alloc_record (gr_mem
);
2131 cur
->r
.record
.p
.grmask
= mask
;
2132 /* Retain only least significant bit. */
2133 prev
->r
.record
.p
.grmask
^= mask
;
2134 prev
->r
.record
.p
.next
= cur
;
2138 static unw_rec_list
*
2139 output_br_mem (unsigned int mask
)
2141 unw_rec_list
*ptr
= alloc_record (br_mem
);
2142 unw_rec_list
*cur
= ptr
;
2144 ptr
->r
.record
.p
.brmask
= mask
;
2145 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2148 unw_rec_list
*prev
= cur
;
2150 /* Clear least significant set bit. */
2151 mask
&= ~(mask
& (~mask
+ 1));
2154 cur
= alloc_record (br_mem
);
2155 cur
->r
.record
.p
.brmask
= mask
;
2156 /* Retain only least significant bit. */
2157 prev
->r
.record
.p
.brmask
^= mask
;
2158 prev
->r
.record
.p
.next
= cur
;
2162 static unw_rec_list
*
2163 output_br_gr (mask
, reg
)
2167 unw_rec_list
*ptr
= alloc_record (br_gr
);
2168 unw_rec_list
*cur
= ptr
;
2170 ptr
->r
.record
.p
.brmask
= mask
;
2171 ptr
->r
.record
.p
.r
.gr
= reg
;
2172 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2175 unw_rec_list
*prev
= cur
;
2177 /* Clear least significant set bit. */
2178 mask
&= ~(mask
& (~mask
+ 1));
2181 cur
= alloc_record (br_gr
);
2182 cur
->r
.record
.p
.brmask
= mask
;
2183 /* Indicate this record shouldn't be output. */
2184 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2185 /* Retain only least significant bit. */
2186 prev
->r
.record
.p
.brmask
^= mask
;
2187 prev
->r
.record
.p
.next
= cur
;
2191 static unw_rec_list
*
2192 output_spill_base (offset
)
2193 unsigned int offset
;
2195 unw_rec_list
*ptr
= alloc_record (spill_base
);
2196 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2200 static unw_rec_list
*
2203 unw_rec_list
*ptr
= alloc_record (unat_when
);
2207 static unw_rec_list
*
2211 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2212 ptr
->r
.record
.p
.r
.gr
= gr
;
2216 static unw_rec_list
*
2217 output_unat_psprel (offset
)
2218 unsigned int offset
;
2220 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2221 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2225 static unw_rec_list
*
2226 output_unat_sprel (offset
)
2227 unsigned int offset
;
2229 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2230 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2234 static unw_rec_list
*
2237 unw_rec_list
*ptr
= alloc_record (lc_when
);
2241 static unw_rec_list
*
2245 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2246 ptr
->r
.record
.p
.r
.gr
= gr
;
2250 static unw_rec_list
*
2251 output_lc_psprel (offset
)
2252 unsigned int offset
;
2254 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2255 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2259 static unw_rec_list
*
2260 output_lc_sprel (offset
)
2261 unsigned int offset
;
2263 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2264 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2268 static unw_rec_list
*
2271 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2275 static unw_rec_list
*
2279 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2280 ptr
->r
.record
.p
.r
.gr
= gr
;
2284 static unw_rec_list
*
2285 output_fpsr_psprel (offset
)
2286 unsigned int offset
;
2288 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2289 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2293 static unw_rec_list
*
2294 output_fpsr_sprel (offset
)
2295 unsigned int offset
;
2297 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2298 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2302 static unw_rec_list
*
2303 output_priunat_when_gr ()
2305 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2309 static unw_rec_list
*
2310 output_priunat_when_mem ()
2312 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2316 static unw_rec_list
*
2317 output_priunat_gr (gr
)
2320 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2321 ptr
->r
.record
.p
.r
.gr
= gr
;
2325 static unw_rec_list
*
2326 output_priunat_psprel (offset
)
2327 unsigned int offset
;
2329 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2330 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2334 static unw_rec_list
*
2335 output_priunat_sprel (offset
)
2336 unsigned int offset
;
2338 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2339 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2343 static unw_rec_list
*
2346 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2350 static unw_rec_list
*
2354 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2355 ptr
->r
.record
.p
.r
.gr
= gr
;
2359 static unw_rec_list
*
2360 output_bsp_psprel (offset
)
2361 unsigned int offset
;
2363 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2364 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2368 static unw_rec_list
*
2369 output_bsp_sprel (offset
)
2370 unsigned int offset
;
2372 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2373 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2377 static unw_rec_list
*
2378 output_bspstore_when ()
2380 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2384 static unw_rec_list
*
2385 output_bspstore_gr (gr
)
2388 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2389 ptr
->r
.record
.p
.r
.gr
= gr
;
2393 static unw_rec_list
*
2394 output_bspstore_psprel (offset
)
2395 unsigned int offset
;
2397 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2398 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2402 static unw_rec_list
*
2403 output_bspstore_sprel (offset
)
2404 unsigned int offset
;
2406 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2407 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2411 static unw_rec_list
*
2414 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2418 static unw_rec_list
*
2422 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2423 ptr
->r
.record
.p
.r
.gr
= gr
;
2427 static unw_rec_list
*
2428 output_rnat_psprel (offset
)
2429 unsigned int offset
;
2431 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2432 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2436 static unw_rec_list
*
2437 output_rnat_sprel (offset
)
2438 unsigned int offset
;
2440 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2441 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2445 static unw_rec_list
*
2446 output_unwabi (abi
, context
)
2448 unsigned long context
;
2450 unw_rec_list
*ptr
= alloc_record (unwabi
);
2451 ptr
->r
.record
.p
.abi
= abi
;
2452 ptr
->r
.record
.p
.context
= context
;
2456 static unw_rec_list
*
2457 output_epilogue (unsigned long ecount
)
2459 unw_rec_list
*ptr
= alloc_record (epilogue
);
2460 ptr
->r
.record
.b
.ecount
= ecount
;
2464 static unw_rec_list
*
2465 output_label_state (unsigned long label
)
2467 unw_rec_list
*ptr
= alloc_record (label_state
);
2468 ptr
->r
.record
.b
.label
= label
;
2472 static unw_rec_list
*
2473 output_copy_state (unsigned long label
)
2475 unw_rec_list
*ptr
= alloc_record (copy_state
);
2476 ptr
->r
.record
.b
.label
= label
;
2480 static unw_rec_list
*
2481 output_spill_psprel (ab
, reg
, offset
, predicate
)
2484 unsigned int offset
;
2485 unsigned int predicate
;
2487 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2488 ptr
->r
.record
.x
.ab
= ab
;
2489 ptr
->r
.record
.x
.reg
= reg
;
2490 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2491 ptr
->r
.record
.x
.qp
= predicate
;
2495 static unw_rec_list
*
2496 output_spill_sprel (ab
, reg
, offset
, predicate
)
2499 unsigned int offset
;
2500 unsigned int predicate
;
2502 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2503 ptr
->r
.record
.x
.ab
= ab
;
2504 ptr
->r
.record
.x
.reg
= reg
;
2505 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2506 ptr
->r
.record
.x
.qp
= predicate
;
2510 static unw_rec_list
*
2511 output_spill_reg (ab
, reg
, targ_reg
, xy
, predicate
)
2514 unsigned int targ_reg
;
2516 unsigned int predicate
;
2518 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2519 ptr
->r
.record
.x
.ab
= ab
;
2520 ptr
->r
.record
.x
.reg
= reg
;
2521 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2522 ptr
->r
.record
.x
.xy
= xy
;
2523 ptr
->r
.record
.x
.qp
= predicate
;
2527 /* Given a unw_rec_list process the correct format with the
2528 specified function. */
2531 process_one_record (ptr
, f
)
2535 unsigned int fr_mask
, gr_mask
;
2537 switch (ptr
->r
.type
)
2539 /* This is a dummy record that takes up no space in the output. */
2547 /* These are taken care of by prologue/prologue_gr. */
2552 if (ptr
->r
.type
== prologue_gr
)
2553 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2554 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2556 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2558 /* Output descriptor(s) for union of register spills (if any). */
2559 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2560 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2563 if ((fr_mask
& ~0xfUL
) == 0)
2564 output_P6_format (f
, fr_mem
, fr_mask
);
2567 output_P5_format (f
, gr_mask
, fr_mask
);
2572 output_P6_format (f
, gr_mem
, gr_mask
);
2573 if (ptr
->r
.record
.r
.mask
.br_mem
)
2574 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2576 /* output imask descriptor if necessary: */
2577 if (ptr
->r
.record
.r
.mask
.i
)
2578 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2579 ptr
->r
.record
.r
.imask_size
);
2583 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2587 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2588 ptr
->r
.record
.p
.size
);
2601 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2604 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2607 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2615 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2624 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2634 case bspstore_sprel
:
2636 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2639 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2641 const unw_rec_list
*cur
= ptr
;
2643 gr_mask
= cur
->r
.record
.p
.grmask
;
2644 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2645 gr_mask
|= cur
->r
.record
.p
.grmask
;
2646 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2650 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2652 const unw_rec_list
*cur
= ptr
;
2654 gr_mask
= cur
->r
.record
.p
.brmask
;
2655 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2656 gr_mask
|= cur
->r
.record
.p
.brmask
;
2657 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2661 as_bad (_("spill_mask record unimplemented."));
2663 case priunat_when_gr
:
2664 case priunat_when_mem
:
2668 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2670 case priunat_psprel
:
2672 case bspstore_psprel
:
2674 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2677 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2680 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2684 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2687 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2688 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2689 ptr
->r
.record
.x
.where
.pspoff
);
2692 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2693 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2694 ptr
->r
.record
.x
.where
.spoff
);
2697 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2698 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2699 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2701 case spill_psprel_p
:
2702 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2703 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2704 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2707 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2708 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2709 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2712 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2713 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2714 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2718 as_bad (_("record_type_not_valid"));
2723 /* Given a unw_rec_list list, process all the records with
2724 the specified function. */
2726 process_unw_records (list
, f
)
2731 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2732 process_one_record (ptr
, f
);
2735 /* Determine the size of a record list in bytes. */
2737 calc_record_size (list
)
2741 process_unw_records (list
, count_output
);
2745 /* Return the number of bits set in the input value.
2746 Perhaps this has a better place... */
2747 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2748 # define popcount __builtin_popcount
2751 popcount (unsigned x
)
2753 static const unsigned char popcnt
[16] =
2761 if (x
< NELEMS (popcnt
))
2763 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2767 /* Update IMASK bitmask to reflect the fact that one or more registers
2768 of type TYPE are saved starting at instruction with index T. If N
2769 bits are set in REGMASK, it is assumed that instructions T through
2770 T+N-1 save these registers.
2774 1: instruction saves next fp reg
2775 2: instruction saves next general reg
2776 3: instruction saves next branch reg */
2778 set_imask (region
, regmask
, t
, type
)
2779 unw_rec_list
*region
;
2780 unsigned long regmask
;
2784 unsigned char *imask
;
2785 unsigned long imask_size
;
2789 imask
= region
->r
.record
.r
.mask
.i
;
2790 imask_size
= region
->r
.record
.r
.imask_size
;
2793 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2794 imask
= xmalloc (imask_size
);
2795 memset (imask
, 0, imask_size
);
2797 region
->r
.record
.r
.imask_size
= imask_size
;
2798 region
->r
.record
.r
.mask
.i
= imask
;
2802 pos
= 2 * (3 - t
% 4);
2805 if (i
>= imask_size
)
2807 as_bad (_("Ignoring attempt to spill beyond end of region"));
2811 imask
[i
] |= (type
& 0x3) << pos
;
2813 regmask
&= (regmask
- 1);
2823 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2824 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2825 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2829 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2830 unsigned long slot_addr
;
2832 unsigned long first_addr
;
2836 unsigned long index
= 0;
2838 /* First time we are called, the initial address and frag are invalid. */
2839 if (first_addr
== 0)
2842 /* If the two addresses are in different frags, then we need to add in
2843 the remaining size of this frag, and then the entire size of intermediate
2845 while (slot_frag
!= first_frag
)
2847 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2851 /* We can get the final addresses only during and after
2853 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2854 index
+= 3 * ((first_frag
->fr_next
->fr_address
2855 - first_frag
->fr_address
2856 - first_frag
->fr_fix
) >> 4);
2859 /* We don't know what the final addresses will be. We try our
2860 best to estimate. */
2861 switch (first_frag
->fr_type
)
2867 as_fatal (_("Only constant space allocation is supported"));
2873 /* Take alignment into account. Assume the worst case
2874 before relaxation. */
2875 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2879 if (first_frag
->fr_symbol
)
2881 as_fatal (_("Only constant offsets are supported"));
2885 index
+= 3 * (first_frag
->fr_offset
>> 4);
2889 /* Add in the full size of the frag converted to instruction slots. */
2890 index
+= 3 * (first_frag
->fr_fix
>> 4);
2891 /* Subtract away the initial part before first_addr. */
2892 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2893 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2895 /* Move to the beginning of the next frag. */
2896 first_frag
= first_frag
->fr_next
;
2897 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2899 /* This can happen if there is section switching in the middle of a
2900 function, causing the frag chain for the function to be broken.
2901 It is too difficult to recover safely from this problem, so we just
2902 exit with an error. */
2903 if (first_frag
== NULL
)
2904 as_fatal (_("Section switching in code is not supported."));
2907 /* Add in the used part of the last frag. */
2908 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2909 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2913 /* Optimize unwind record directives. */
2915 static unw_rec_list
*
2916 optimize_unw_records (list
)
2922 /* If the only unwind record is ".prologue" or ".prologue" followed
2923 by ".body", then we can optimize the unwind directives away. */
2924 if (list
->r
.type
== prologue
2925 && (list
->next
->r
.type
== endp
2926 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2932 /* Given a complete record list, process any records which have
2933 unresolved fields, (ie length counts for a prologue). After
2934 this has been run, all necessary information should be available
2935 within each record to generate an image. */
2938 fixup_unw_records (list
, before_relax
)
2942 unw_rec_list
*ptr
, *region
= 0;
2943 unsigned long first_addr
= 0, rlen
= 0, t
;
2944 fragS
*first_frag
= 0;
2946 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2948 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2949 as_bad (_(" Insn slot not set in unwind record."));
2950 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2951 first_addr
, first_frag
, before_relax
);
2952 switch (ptr
->r
.type
)
2960 unsigned long last_addr
= 0;
2961 fragS
*last_frag
= NULL
;
2963 first_addr
= ptr
->slot_number
;
2964 first_frag
= ptr
->slot_frag
;
2965 /* Find either the next body/prologue start, or the end of
2966 the function, and determine the size of the region. */
2967 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2968 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2969 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2971 last_addr
= last
->slot_number
;
2972 last_frag
= last
->slot_frag
;
2975 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2977 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2978 if (ptr
->r
.type
== body
)
2979 /* End of region. */
2987 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2989 /* This happens when a memory-stack-less procedure uses a
2990 ".restore sp" directive at the end of a region to pop
2992 ptr
->r
.record
.b
.t
= 0;
3003 case priunat_when_gr
:
3004 case priunat_when_mem
:
3008 ptr
->r
.record
.p
.t
= t
;
3016 case spill_psprel_p
:
3017 ptr
->r
.record
.x
.t
= t
;
3023 as_bad (_("frgr_mem record before region record!"));
3026 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3027 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3028 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3029 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3034 as_bad (_("fr_mem record before region record!"));
3037 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3038 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3043 as_bad (_("gr_mem record before region record!"));
3046 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3047 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3052 as_bad (_("br_mem record before region record!"));
3055 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
3056 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3062 as_bad (_("gr_gr record before region record!"));
3065 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3070 as_bad (_("br_gr record before region record!"));
3073 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3082 /* Estimate the size of a frag before relaxing. We only have one type of frag
3083 to handle here, which is the unwind info frag. */
3086 ia64_estimate_size_before_relax (fragS
*frag
,
3087 asection
*segtype ATTRIBUTE_UNUSED
)
3092 /* ??? This code is identical to the first part of ia64_convert_frag. */
3093 list
= (unw_rec_list
*) frag
->fr_opcode
;
3094 fixup_unw_records (list
, 0);
3096 len
= calc_record_size (list
);
3097 /* pad to pointer-size boundary. */
3098 pad
= len
% md
.pointer_size
;
3100 len
+= md
.pointer_size
- pad
;
3101 /* Add 8 for the header. */
3103 /* Add a pointer for the personality offset. */
3104 if (frag
->fr_offset
)
3105 size
+= md
.pointer_size
;
3107 /* fr_var carries the max_chars that we created the fragment with.
3108 We must, of course, have allocated enough memory earlier. */
3109 assert (frag
->fr_var
>= size
);
3111 return frag
->fr_fix
+ size
;
3114 /* This function converts a rs_machine_dependent variant frag into a
3115 normal fill frag with the unwind image from the the record list. */
3117 ia64_convert_frag (fragS
*frag
)
3123 /* ??? This code is identical to ia64_estimate_size_before_relax. */
3124 list
= (unw_rec_list
*) frag
->fr_opcode
;
3125 fixup_unw_records (list
, 0);
3127 len
= calc_record_size (list
);
3128 /* pad to pointer-size boundary. */
3129 pad
= len
% md
.pointer_size
;
3131 len
+= md
.pointer_size
- pad
;
3132 /* Add 8 for the header. */
3134 /* Add a pointer for the personality offset. */
3135 if (frag
->fr_offset
)
3136 size
+= md
.pointer_size
;
3138 /* fr_var carries the max_chars that we created the fragment with.
3139 We must, of course, have allocated enough memory earlier. */
3140 assert (frag
->fr_var
>= size
);
3142 /* Initialize the header area. fr_offset is initialized with
3143 unwind.personality_routine. */
3144 if (frag
->fr_offset
)
3146 if (md
.flags
& EF_IA_64_ABI64
)
3147 flag_value
= (bfd_vma
) 3 << 32;
3149 /* 32-bit unwind info block. */
3150 flag_value
= (bfd_vma
) 0x1003 << 32;
3155 md_number_to_chars (frag
->fr_literal
,
3156 (((bfd_vma
) 1 << 48) /* Version. */
3157 | flag_value
/* U & E handler flags. */
3158 | (len
/ md
.pointer_size
)), /* Length. */
3161 /* Skip the header. */
3162 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3163 process_unw_records (list
, output_vbyte_mem
);
3165 /* Fill the padding bytes with zeros. */
3167 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3168 md
.pointer_size
- pad
);
3169 /* Fill the unwind personality with zeros. */
3170 if (frag
->fr_offset
)
3171 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3174 frag
->fr_fix
+= size
;
3175 frag
->fr_type
= rs_fill
;
3177 frag
->fr_offset
= 0;
3181 parse_predicate_and_operand (e
, qp
, po
)
3186 int sep
= parse_operand (e
, ',');
3188 *qp
= e
->X_add_number
- REG_P
;
3189 if (e
->X_op
!= O_register
|| *qp
> 63)
3191 as_bad (_("First operand to .%s must be a predicate"), po
);
3195 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3197 sep
= parse_operand (e
, ',');
3204 convert_expr_to_ab_reg (e
, ab
, regp
, po
, n
)
3205 const expressionS
*e
;
3211 unsigned int reg
= e
->X_add_number
;
3213 *ab
= *regp
= 0; /* Anything valid is good here. */
3215 if (e
->X_op
!= O_register
)
3216 reg
= REG_GR
; /* Anything invalid is good here. */
3218 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3221 *regp
= reg
- REG_GR
;
3223 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3224 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3227 *regp
= reg
- REG_FR
;
3229 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3232 *regp
= reg
- REG_BR
;
3239 case REG_PR
: *regp
= 0; break;
3240 case REG_PSP
: *regp
= 1; break;
3241 case REG_PRIUNAT
: *regp
= 2; break;
3242 case REG_BR
+ 0: *regp
= 3; break;
3243 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3244 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3245 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3246 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3247 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3248 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3249 case REG_AR
+ AR_LC
: *regp
= 10; break;
3252 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3259 convert_expr_to_xy_reg (e
, xy
, regp
, po
, n
)
3260 const expressionS
*e
;
3266 unsigned int reg
= e
->X_add_number
;
3268 *xy
= *regp
= 0; /* Anything valid is good here. */
3270 if (e
->X_op
!= O_register
)
3271 reg
= REG_GR
; /* Anything invalid is good here. */
3273 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3276 *regp
= reg
- REG_GR
;
3278 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3281 *regp
= reg
- REG_FR
;
3283 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3286 *regp
= reg
- REG_BR
;
3289 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3295 /* The current frag is an alignment frag. */
3296 align_frag
= frag_now
;
3297 s_align_bytes (arg
);
3302 int dummy ATTRIBUTE_UNUSED
;
3309 if (is_it_end_of_statement ())
3311 radix
= input_line_pointer
;
3312 ch
= get_symbol_end ();
3313 ia64_canonicalize_symbol_name (radix
);
3314 if (strcasecmp (radix
, "C"))
3315 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3316 *input_line_pointer
= ch
;
3317 demand_empty_rest_of_line ();
3320 /* Helper function for .loc directives. If the assembler is not generating
3321 line number info, then we need to remember which instructions have a .loc
3322 directive, and only call dwarf2_gen_line_info for those instructions. */
3327 CURR_SLOT
.loc_directive_seen
= 1;
3328 dwarf2_directive_loc (x
);
3331 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3333 dot_special_section (which
)
3336 set_section ((char *) special_section_name
[which
]);
3339 /* Return -1 for warning and 0 for error. */
3342 unwind_diagnostic (const char * region
, const char *directive
)
3344 if (md
.unwind_check
== unwind_check_warning
)
3346 as_warn (_(".%s outside of %s"), directive
, region
);
3351 as_bad (_(".%s outside of %s"), directive
, region
);
3352 ignore_rest_of_line ();
3357 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3358 a procedure but the unwind directive check is set to warning, 0 if
3359 a directive isn't in a procedure and the unwind directive check is set
3363 in_procedure (const char *directive
)
3365 if (unwind
.proc_pending
.sym
3366 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3368 return unwind_diagnostic ("procedure", directive
);
3371 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3372 a prologue but the unwind directive check is set to warning, 0 if
3373 a directive isn't in a prologue and the unwind directive check is set
3377 in_prologue (const char *directive
)
3379 int in
= in_procedure (directive
);
3381 if (in
> 0 && !unwind
.prologue
)
3382 in
= unwind_diagnostic ("prologue", directive
);
3383 check_pending_save ();
3387 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3388 a body but the unwind directive check is set to warning, 0 if
3389 a directive isn't in a body and the unwind directive check is set
3393 in_body (const char *directive
)
3395 int in
= in_procedure (directive
);
3397 if (in
> 0 && !unwind
.body
)
3398 in
= unwind_diagnostic ("body region", directive
);
3403 add_unwind_entry (ptr
, sep
)
3410 unwind
.tail
->next
= ptr
;
3415 /* The current entry can in fact be a chain of unwind entries. */
3416 if (unwind
.current_entry
== NULL
)
3417 unwind
.current_entry
= ptr
;
3420 /* The current entry can in fact be a chain of unwind entries. */
3421 if (unwind
.current_entry
== NULL
)
3422 unwind
.current_entry
= ptr
;
3426 /* Parse a tag permitted for the current directive. */
3430 ch
= get_symbol_end ();
3431 /* FIXME: For now, just issue a warning that this isn't implemented. */
3438 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3441 *input_line_pointer
= ch
;
3443 if (sep
!= NOT_A_CHAR
)
3444 demand_empty_rest_of_line ();
3449 int dummy ATTRIBUTE_UNUSED
;
3454 if (!in_prologue ("fframe"))
3457 sep
= parse_operand (&e
, ',');
3459 if (e
.X_op
!= O_constant
)
3461 as_bad (_("First operand to .fframe must be a constant"));
3464 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3469 int dummy ATTRIBUTE_UNUSED
;
3475 if (!in_prologue ("vframe"))
3478 sep
= parse_operand (&e
, ',');
3479 reg
= e
.X_add_number
- REG_GR
;
3480 if (e
.X_op
!= O_register
|| reg
> 127)
3482 as_bad (_("First operand to .vframe must be a general register"));
3485 add_unwind_entry (output_mem_stack_v (), sep
);
3486 if (! (unwind
.prologue_mask
& 2))
3487 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3488 else if (reg
!= unwind
.prologue_gr
3489 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3490 as_warn (_("Operand of .vframe contradicts .prologue"));
3501 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3503 if (!in_prologue ("vframesp"))
3506 sep
= parse_operand (&e
, ',');
3507 if (e
.X_op
!= O_constant
)
3509 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3512 add_unwind_entry (output_mem_stack_v (), sep
);
3513 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3518 int dummy ATTRIBUTE_UNUSED
;
3521 unsigned reg1
, reg2
;
3524 if (!in_prologue ("save"))
3527 sep
= parse_operand (&e1
, ',');
3529 sep
= parse_operand (&e2
, ',');
3533 reg1
= e1
.X_add_number
;
3534 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3535 if (e1
.X_op
!= O_register
)
3537 as_bad (_("First operand to .save not a register"));
3538 reg1
= REG_PR
; /* Anything valid is good here. */
3540 reg2
= e2
.X_add_number
- REG_GR
;
3541 if (e2
.X_op
!= O_register
|| reg2
> 127)
3543 as_bad (_("Second operand to .save not a valid register"));
3548 case REG_AR
+ AR_BSP
:
3549 add_unwind_entry (output_bsp_when (), sep
);
3550 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3552 case REG_AR
+ AR_BSPSTORE
:
3553 add_unwind_entry (output_bspstore_when (), sep
);
3554 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3556 case REG_AR
+ AR_RNAT
:
3557 add_unwind_entry (output_rnat_when (), sep
);
3558 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3560 case REG_AR
+ AR_UNAT
:
3561 add_unwind_entry (output_unat_when (), sep
);
3562 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3564 case REG_AR
+ AR_FPSR
:
3565 add_unwind_entry (output_fpsr_when (), sep
);
3566 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3568 case REG_AR
+ AR_PFS
:
3569 add_unwind_entry (output_pfs_when (), sep
);
3570 if (! (unwind
.prologue_mask
& 4))
3571 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3572 else if (reg2
!= unwind
.prologue_gr
3573 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3574 as_warn (_("Second operand of .save contradicts .prologue"));
3576 case REG_AR
+ AR_LC
:
3577 add_unwind_entry (output_lc_when (), sep
);
3578 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3581 add_unwind_entry (output_rp_when (), sep
);
3582 if (! (unwind
.prologue_mask
& 8))
3583 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3584 else if (reg2
!= unwind
.prologue_gr
)
3585 as_warn (_("Second operand of .save contradicts .prologue"));
3588 add_unwind_entry (output_preds_when (), sep
);
3589 if (! (unwind
.prologue_mask
& 1))
3590 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3591 else if (reg2
!= unwind
.prologue_gr
3592 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3593 as_warn (_("Second operand of .save contradicts .prologue"));
3596 add_unwind_entry (output_priunat_when_gr (), sep
);
3597 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3600 as_bad (_("First operand to .save not a valid register"));
3601 add_unwind_entry (NULL
, sep
);
3608 int dummy ATTRIBUTE_UNUSED
;
3611 unsigned long ecount
; /* # of _additional_ regions to pop */
3614 if (!in_body ("restore"))
3617 sep
= parse_operand (&e1
, ',');
3618 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3619 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3625 sep
= parse_operand (&e2
, ',');
3626 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3628 as_bad (_("Second operand to .restore must be a constant >= 0"));
3629 e2
.X_add_number
= 0;
3631 ecount
= e2
.X_add_number
;
3634 ecount
= unwind
.prologue_count
- 1;
3636 if (ecount
>= unwind
.prologue_count
)
3638 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3639 ecount
+ 1, unwind
.prologue_count
);
3643 add_unwind_entry (output_epilogue (ecount
), sep
);
3645 if (ecount
< unwind
.prologue_count
)
3646 unwind
.prologue_count
-= ecount
+ 1;
3648 unwind
.prologue_count
= 0;
3652 dot_restorereg (pred
)
3655 unsigned int qp
, ab
, reg
;
3658 const char * const po
= pred
? "restorereg.p" : "restorereg";
3660 if (!in_procedure (po
))
3664 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3667 sep
= parse_operand (&e
, ',');
3670 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3672 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3675 static char *special_linkonce_name
[] =
3677 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3681 start_unwind_section (const segT text_seg
, int sec_index
)
3684 Use a slightly ugly scheme to derive the unwind section names from
3685 the text section name:
3687 text sect. unwind table sect.
3688 name: name: comments:
3689 ---------- ----------------- --------------------------------
3691 .text.foo .IA_64.unwind.text.foo
3692 .foo .IA_64.unwind.foo
3694 .gnu.linkonce.ia64unw.foo
3695 _info .IA_64.unwind_info gas issues error message (ditto)
3696 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3698 This mapping is done so that:
3700 (a) An object file with unwind info only in .text will use
3701 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3702 This follows the letter of the ABI and also ensures backwards
3703 compatibility with older toolchains.
3705 (b) An object file with unwind info in multiple text sections
3706 will use separate unwind sections for each text section.
3707 This allows us to properly set the "sh_info" and "sh_link"
3708 fields in SHT_IA_64_UNWIND as required by the ABI and also
3709 lets GNU ld support programs with multiple segments
3710 containing unwind info (as might be the case for certain
3711 embedded applications).
3713 (c) An error is issued if there would be a name clash.
3716 const char *text_name
, *sec_text_name
;
3718 const char *prefix
= special_section_name
[sec_index
];
3720 size_t prefix_len
, suffix_len
, sec_name_len
;
3722 sec_text_name
= segment_name (text_seg
);
3723 text_name
= sec_text_name
;
3724 if (strncmp (text_name
, "_info", 5) == 0)
3726 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3728 ignore_rest_of_line ();
3731 if (strcmp (text_name
, ".text") == 0)
3734 /* Build the unwind section name by appending the (possibly stripped)
3735 text section name to the unwind prefix. */
3737 if (strncmp (text_name
, ".gnu.linkonce.t.",
3738 sizeof (".gnu.linkonce.t.") - 1) == 0)
3740 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3741 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3744 prefix_len
= strlen (prefix
);
3745 suffix_len
= strlen (suffix
);
3746 sec_name_len
= prefix_len
+ suffix_len
;
3747 sec_name
= alloca (sec_name_len
+ 1);
3748 memcpy (sec_name
, prefix
, prefix_len
);
3749 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3750 sec_name
[sec_name_len
] = '\0';
3752 /* Handle COMDAT group. */
3753 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3754 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3757 size_t len
, group_name_len
;
3758 const char *group_name
= elf_group_name (text_seg
);
3760 if (group_name
== NULL
)
3762 as_bad (_("Group section `%s' has no group signature"),
3764 ignore_rest_of_line ();
3767 /* We have to construct a fake section directive. */
3768 group_name_len
= strlen (group_name
);
3770 + 16 /* ,"aG",@progbits, */
3771 + group_name_len
/* ,group_name */
3774 section
= alloca (len
+ 1);
3775 memcpy (section
, sec_name
, sec_name_len
);
3776 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3777 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3778 memcpy (section
+ len
- 7, ",comdat", 7);
3779 section
[len
] = '\0';
3780 set_section (section
);
3784 set_section (sec_name
);
3785 bfd_set_section_flags (stdoutput
, now_seg
,
3786 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3789 elf_linked_to_section (now_seg
) = text_seg
;
3793 generate_unwind_image (const segT text_seg
)
3798 /* Mark the end of the unwind info, so that we can compute the size of the
3799 last unwind region. */
3800 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3802 /* Force out pending instructions, to make sure all unwind records have
3803 a valid slot_number field. */
3804 ia64_flush_insns ();
3806 /* Generate the unwind record. */
3807 list
= optimize_unw_records (unwind
.list
);
3808 fixup_unw_records (list
, 1);
3809 size
= calc_record_size (list
);
3811 if (size
> 0 || unwind
.force_unwind_entry
)
3813 unwind
.force_unwind_entry
= 0;
3814 /* pad to pointer-size boundary. */
3815 pad
= size
% md
.pointer_size
;
3817 size
+= md
.pointer_size
- pad
;
3818 /* Add 8 for the header. */
3820 /* Add a pointer for the personality offset. */
3821 if (unwind
.personality_routine
)
3822 size
+= md
.pointer_size
;
3825 /* If there are unwind records, switch sections, and output the info. */
3829 bfd_reloc_code_real_type reloc
;
3831 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3833 /* Make sure the section has 4 byte alignment for ILP32 and
3834 8 byte alignment for LP64. */
3835 frag_align (md
.pointer_size_shift
, 0, 0);
3836 record_alignment (now_seg
, md
.pointer_size_shift
);
3838 /* Set expression which points to start of unwind descriptor area. */
3839 unwind
.info
= expr_build_dot ();
3841 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3842 (offsetT
) (long) unwind
.personality_routine
,
3845 /* Add the personality address to the image. */
3846 if (unwind
.personality_routine
!= 0)
3848 exp
.X_op
= O_symbol
;
3849 exp
.X_add_symbol
= unwind
.personality_routine
;
3850 exp
.X_add_number
= 0;
3852 if (md
.flags
& EF_IA_64_BE
)
3854 if (md
.flags
& EF_IA_64_ABI64
)
3855 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3857 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3861 if (md
.flags
& EF_IA_64_ABI64
)
3862 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3864 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3867 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3868 md
.pointer_size
, &exp
, 0, reloc
);
3869 unwind
.personality_routine
= 0;
3873 free_saved_prologue_counts ();
3874 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3878 dot_handlerdata (dummy
)
3879 int dummy ATTRIBUTE_UNUSED
;
3881 if (!in_procedure ("handlerdata"))
3883 unwind
.force_unwind_entry
= 1;
3885 /* Remember which segment we're in so we can switch back after .endp */
3886 unwind
.saved_text_seg
= now_seg
;
3887 unwind
.saved_text_subseg
= now_subseg
;
3889 /* Generate unwind info into unwind-info section and then leave that
3890 section as the currently active one so dataXX directives go into
3891 the language specific data area of the unwind info block. */
3892 generate_unwind_image (now_seg
);
3893 demand_empty_rest_of_line ();
3897 dot_unwentry (dummy
)
3898 int dummy ATTRIBUTE_UNUSED
;
3900 if (!in_procedure ("unwentry"))
3902 unwind
.force_unwind_entry
= 1;
3903 demand_empty_rest_of_line ();
3908 int dummy ATTRIBUTE_UNUSED
;
3913 if (!in_prologue ("altrp"))
3916 parse_operand (&e
, 0);
3917 reg
= e
.X_add_number
- REG_BR
;
3918 if (e
.X_op
!= O_register
|| reg
> 7)
3920 as_bad (_("First operand to .altrp not a valid branch register"));
3923 add_unwind_entry (output_rp_br (reg
), 0);
3927 dot_savemem (psprel
)
3933 const char * const po
= psprel
? "savepsp" : "savesp";
3935 if (!in_prologue (po
))
3938 sep
= parse_operand (&e1
, ',');
3940 sep
= parse_operand (&e2
, ',');
3944 reg1
= e1
.X_add_number
;
3945 val
= e2
.X_add_number
;
3947 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3948 if (e1
.X_op
!= O_register
)
3950 as_bad (_("First operand to .%s not a register"), po
);
3951 reg1
= REG_PR
; /* Anything valid is good here. */
3953 if (e2
.X_op
!= O_constant
)
3955 as_bad (_("Second operand to .%s not a constant"), po
);
3961 case REG_AR
+ AR_BSP
:
3962 add_unwind_entry (output_bsp_when (), sep
);
3963 add_unwind_entry ((psprel
3965 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3967 case REG_AR
+ AR_BSPSTORE
:
3968 add_unwind_entry (output_bspstore_when (), sep
);
3969 add_unwind_entry ((psprel
3970 ? output_bspstore_psprel
3971 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3973 case REG_AR
+ AR_RNAT
:
3974 add_unwind_entry (output_rnat_when (), sep
);
3975 add_unwind_entry ((psprel
3976 ? output_rnat_psprel
3977 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3979 case REG_AR
+ AR_UNAT
:
3980 add_unwind_entry (output_unat_when (), sep
);
3981 add_unwind_entry ((psprel
3982 ? output_unat_psprel
3983 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3985 case REG_AR
+ AR_FPSR
:
3986 add_unwind_entry (output_fpsr_when (), sep
);
3987 add_unwind_entry ((psprel
3988 ? output_fpsr_psprel
3989 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3991 case REG_AR
+ AR_PFS
:
3992 add_unwind_entry (output_pfs_when (), sep
);
3993 add_unwind_entry ((psprel
3995 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3997 case REG_AR
+ AR_LC
:
3998 add_unwind_entry (output_lc_when (), sep
);
3999 add_unwind_entry ((psprel
4001 : output_lc_sprel
) (val
), NOT_A_CHAR
);
4004 add_unwind_entry (output_rp_when (), sep
);
4005 add_unwind_entry ((psprel
4007 : output_rp_sprel
) (val
), NOT_A_CHAR
);
4010 add_unwind_entry (output_preds_when (), sep
);
4011 add_unwind_entry ((psprel
4012 ? output_preds_psprel
4013 : output_preds_sprel
) (val
), NOT_A_CHAR
);
4016 add_unwind_entry (output_priunat_when_mem (), sep
);
4017 add_unwind_entry ((psprel
4018 ? output_priunat_psprel
4019 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
4022 as_bad (_("First operand to .%s not a valid register"), po
);
4023 add_unwind_entry (NULL
, sep
);
4030 int dummy ATTRIBUTE_UNUSED
;
4036 if (!in_prologue ("save.g"))
4039 sep
= parse_operand (&e
, ',');
4041 grmask
= e
.X_add_number
;
4042 if (e
.X_op
!= O_constant
4043 || e
.X_add_number
<= 0
4044 || e
.X_add_number
> 0xf)
4046 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
4053 int n
= popcount (grmask
);
4055 parse_operand (&e
, 0);
4056 reg
= e
.X_add_number
- REG_GR
;
4057 if (e
.X_op
!= O_register
|| reg
> 127)
4059 as_bad (_("Second operand to .save.g must be a general register"));
4062 else if (reg
> 128U - n
)
4064 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
4067 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
4070 add_unwind_entry (output_gr_mem (grmask
), 0);
4075 int dummy ATTRIBUTE_UNUSED
;
4079 if (!in_prologue ("save.f"))
4082 parse_operand (&e
, 0);
4084 if (e
.X_op
!= O_constant
4085 || e
.X_add_number
<= 0
4086 || e
.X_add_number
> 0xfffff)
4088 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
4091 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
4096 int dummy ATTRIBUTE_UNUSED
;
4102 if (!in_prologue ("save.b"))
4105 sep
= parse_operand (&e
, ',');
4107 brmask
= e
.X_add_number
;
4108 if (e
.X_op
!= O_constant
4109 || e
.X_add_number
<= 0
4110 || e
.X_add_number
> 0x1f)
4112 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
4119 int n
= popcount (brmask
);
4121 parse_operand (&e
, 0);
4122 reg
= e
.X_add_number
- REG_GR
;
4123 if (e
.X_op
!= O_register
|| reg
> 127)
4125 as_bad (_("Second operand to .save.b must be a general register"));
4128 else if (reg
> 128U - n
)
4130 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
4133 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
4136 add_unwind_entry (output_br_mem (brmask
), 0);
4141 int dummy ATTRIBUTE_UNUSED
;
4145 if (!in_prologue ("save.gf"))
4148 if (parse_operand (&e1
, ',') == ',')
4149 parse_operand (&e2
, 0);
4153 if (e1
.X_op
!= O_constant
4154 || e1
.X_add_number
< 0
4155 || e1
.X_add_number
> 0xf)
4157 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
4159 e1
.X_add_number
= 0;
4161 if (e2
.X_op
!= O_constant
4162 || e2
.X_add_number
< 0
4163 || e2
.X_add_number
> 0xfffff)
4165 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
4167 e2
.X_add_number
= 0;
4169 if (e1
.X_op
== O_constant
4170 && e2
.X_op
== O_constant
4171 && e1
.X_add_number
== 0
4172 && e2
.X_add_number
== 0)
4173 as_bad (_("Operands to .save.gf may not be both zero"));
4175 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4180 int dummy ATTRIBUTE_UNUSED
;
4184 if (!in_prologue ("spill"))
4187 parse_operand (&e
, 0);
4189 if (e
.X_op
!= O_constant
)
4191 as_bad (_("Operand to .spill must be a constant"));
4194 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4202 unsigned int qp
, ab
, xy
, reg
, treg
;
4204 const char * const po
= pred
? "spillreg.p" : "spillreg";
4206 if (!in_procedure (po
))
4210 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4213 sep
= parse_operand (&e
, ',');
4216 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4219 sep
= parse_operand (&e
, ',');
4222 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4224 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4228 dot_spillmem (psprel
)
4232 int pred
= (psprel
< 0), sep
;
4233 unsigned int qp
, ab
, reg
;
4239 po
= psprel
? "spillpsp.p" : "spillsp.p";
4242 po
= psprel
? "spillpsp" : "spillsp";
4244 if (!in_procedure (po
))
4248 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4251 sep
= parse_operand (&e
, ',');
4254 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4257 sep
= parse_operand (&e
, ',');
4260 if (e
.X_op
!= O_constant
)
4262 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4267 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4269 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4273 get_saved_prologue_count (lbl
)
4276 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4278 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4282 return lpc
->prologue_count
;
4284 as_bad (_("Missing .label_state %ld"), lbl
);
4289 save_prologue_count (lbl
, count
)
4293 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4295 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4299 lpc
->prologue_count
= count
;
4302 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4304 new_lpc
->next
= unwind
.saved_prologue_counts
;
4305 new_lpc
->label_number
= lbl
;
4306 new_lpc
->prologue_count
= count
;
4307 unwind
.saved_prologue_counts
= new_lpc
;
4312 free_saved_prologue_counts ()
4314 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4315 label_prologue_count
*next
;
4324 unwind
.saved_prologue_counts
= NULL
;
4328 dot_label_state (dummy
)
4329 int dummy ATTRIBUTE_UNUSED
;
4333 if (!in_body ("label_state"))
4336 parse_operand (&e
, 0);
4337 if (e
.X_op
== O_constant
)
4338 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4341 as_bad (_("Operand to .label_state must be a constant"));
4344 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4348 dot_copy_state (dummy
)
4349 int dummy ATTRIBUTE_UNUSED
;
4353 if (!in_body ("copy_state"))
4356 parse_operand (&e
, 0);
4357 if (e
.X_op
== O_constant
)
4358 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4361 as_bad (_("Operand to .copy_state must be a constant"));
4364 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4369 int dummy ATTRIBUTE_UNUSED
;
4374 if (!in_prologue ("unwabi"))
4377 sep
= parse_operand (&e1
, ',');
4379 parse_operand (&e2
, 0);
4383 if (e1
.X_op
!= O_constant
)
4385 as_bad (_("First operand to .unwabi must be a constant"));
4386 e1
.X_add_number
= 0;
4389 if (e2
.X_op
!= O_constant
)
4391 as_bad (_("Second operand to .unwabi must be a constant"));
4392 e2
.X_add_number
= 0;
4395 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4399 dot_personality (dummy
)
4400 int dummy ATTRIBUTE_UNUSED
;
4403 if (!in_procedure ("personality"))
4406 name
= input_line_pointer
;
4407 c
= get_symbol_end ();
4408 p
= input_line_pointer
;
4409 unwind
.personality_routine
= symbol_find_or_make (name
);
4410 unwind
.force_unwind_entry
= 1;
4413 demand_empty_rest_of_line ();
4418 int dummy ATTRIBUTE_UNUSED
;
4422 proc_pending
*pending
, *last_pending
;
4424 if (unwind
.proc_pending
.sym
)
4426 (md
.unwind_check
== unwind_check_warning
4428 : as_bad
) (_("Missing .endp after previous .proc"));
4429 while (unwind
.proc_pending
.next
)
4431 pending
= unwind
.proc_pending
.next
;
4432 unwind
.proc_pending
.next
= pending
->next
;
4436 last_pending
= NULL
;
4438 /* Parse names of main and alternate entry points and mark them as
4439 function symbols: */
4443 name
= input_line_pointer
;
4444 c
= get_symbol_end ();
4445 p
= input_line_pointer
;
4447 as_bad (_("Empty argument of .proc"));
4450 sym
= symbol_find_or_make (name
);
4451 if (S_IS_DEFINED (sym
))
4452 as_bad (_("`%s' was already defined"), name
);
4453 else if (!last_pending
)
4455 unwind
.proc_pending
.sym
= sym
;
4456 last_pending
= &unwind
.proc_pending
;
4460 pending
= xmalloc (sizeof (*pending
));
4462 last_pending
= last_pending
->next
= pending
;
4464 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4468 if (*input_line_pointer
!= ',')
4470 ++input_line_pointer
;
4474 unwind
.proc_pending
.sym
= expr_build_dot ();
4475 last_pending
= &unwind
.proc_pending
;
4477 last_pending
->next
= NULL
;
4478 demand_empty_rest_of_line ();
4481 unwind
.prologue
= 0;
4482 unwind
.prologue_count
= 0;
4485 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4486 unwind
.personality_routine
= 0;
4491 int dummy ATTRIBUTE_UNUSED
;
4493 if (!in_procedure ("body"))
4495 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4496 as_warn (_("Initial .body should precede any instructions"));
4497 check_pending_save ();
4499 unwind
.prologue
= 0;
4500 unwind
.prologue_mask
= 0;
4503 add_unwind_entry (output_body (), 0);
4507 dot_prologue (dummy
)
4508 int dummy ATTRIBUTE_UNUSED
;
4510 unsigned mask
= 0, grsave
= 0;
4512 if (!in_procedure ("prologue"))
4514 if (unwind
.prologue
)
4516 as_bad (_(".prologue within prologue"));
4517 ignore_rest_of_line ();
4520 if (!unwind
.body
&& unwind
.insn
)
4521 as_warn (_("Initial .prologue should precede any instructions"));
4523 if (!is_it_end_of_statement ())
4526 int n
, sep
= parse_operand (&e
, ',');
4528 if (e
.X_op
!= O_constant
4529 || e
.X_add_number
< 0
4530 || e
.X_add_number
> 0xf)
4531 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4532 else if (e
.X_add_number
== 0)
4533 as_warn (_("Pointless use of zero first operand to .prologue"));
4535 mask
= e
.X_add_number
;
4536 n
= popcount (mask
);
4539 parse_operand (&e
, 0);
4542 if (e
.X_op
== O_constant
4543 && e
.X_add_number
>= 0
4544 && e
.X_add_number
< 128)
4546 if (md
.unwind_check
== unwind_check_error
)
4547 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4548 grsave
= e
.X_add_number
;
4550 else if (e
.X_op
!= O_register
4551 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4553 as_bad (_("Second operand to .prologue must be a general register"));
4556 else if (grsave
> 128U - n
)
4558 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4565 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4567 add_unwind_entry (output_prologue (), 0);
4569 unwind
.prologue
= 1;
4570 unwind
.prologue_mask
= mask
;
4571 unwind
.prologue_gr
= grsave
;
4573 ++unwind
.prologue_count
;
4578 int dummy ATTRIBUTE_UNUSED
;
4581 int bytes_per_address
;
4584 subsegT saved_subseg
;
4585 proc_pending
*pending
;
4586 int unwind_check
= md
.unwind_check
;
4588 md
.unwind_check
= unwind_check_error
;
4589 if (!in_procedure ("endp"))
4591 md
.unwind_check
= unwind_check
;
4593 if (unwind
.saved_text_seg
)
4595 saved_seg
= unwind
.saved_text_seg
;
4596 saved_subseg
= unwind
.saved_text_subseg
;
4597 unwind
.saved_text_seg
= NULL
;
4601 saved_seg
= now_seg
;
4602 saved_subseg
= now_subseg
;
4605 insn_group_break (1, 0, 0);
4607 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4609 generate_unwind_image (saved_seg
);
4611 if (unwind
.info
|| unwind
.force_unwind_entry
)
4615 subseg_set (md
.last_text_seg
, 0);
4616 proc_end
= expr_build_dot ();
4618 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4620 /* Make sure that section has 4 byte alignment for ILP32 and
4621 8 byte alignment for LP64. */
4622 record_alignment (now_seg
, md
.pointer_size_shift
);
4624 /* Need space for 3 pointers for procedure start, procedure end,
4626 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4627 where
= frag_now_fix () - (3 * md
.pointer_size
);
4628 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4630 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4631 e
.X_op
= O_pseudo_fixup
;
4632 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4634 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4635 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4636 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4637 S_GET_VALUE (unwind
.proc_pending
.sym
),
4638 symbol_get_frag (unwind
.proc_pending
.sym
));
4640 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4641 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4643 e
.X_op
= O_pseudo_fixup
;
4644 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4646 e
.X_add_symbol
= proc_end
;
4647 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4648 bytes_per_address
, &e
);
4652 e
.X_op
= O_pseudo_fixup
;
4653 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4655 e
.X_add_symbol
= unwind
.info
;
4656 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4657 bytes_per_address
, &e
);
4660 subseg_set (saved_seg
, saved_subseg
);
4662 /* Set symbol sizes. */
4663 pending
= &unwind
.proc_pending
;
4664 if (S_GET_NAME (pending
->sym
))
4668 symbolS
*sym
= pending
->sym
;
4670 if (!S_IS_DEFINED (sym
))
4671 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4672 else if (S_GET_SIZE (sym
) == 0
4673 && symbol_get_obj (sym
)->size
== NULL
)
4675 fragS
*frag
= symbol_get_frag (sym
);
4679 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4680 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4683 symbol_get_obj (sym
)->size
=
4684 (expressionS
*) xmalloc (sizeof (expressionS
));
4685 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4686 symbol_get_obj (sym
)->size
->X_add_symbol
4687 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4688 frag_now_fix (), frag_now
);
4689 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4690 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4694 } while ((pending
= pending
->next
) != NULL
);
4697 /* Parse names of main and alternate entry points. */
4703 name
= input_line_pointer
;
4704 c
= get_symbol_end ();
4705 p
= input_line_pointer
;
4707 (md
.unwind_check
== unwind_check_warning
4709 : as_bad
) (_("Empty argument of .endp"));
4712 symbolS
*sym
= symbol_find (name
);
4714 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4716 if (sym
== pending
->sym
)
4718 pending
->sym
= NULL
;
4722 if (!sym
|| !pending
)
4723 as_warn (_("`%s' was not specified with previous .proc"), name
);
4727 if (*input_line_pointer
!= ',')
4729 ++input_line_pointer
;
4731 demand_empty_rest_of_line ();
4733 /* Deliberately only checking for the main entry point here; the
4734 language spec even says all arguments to .endp are ignored. */
4735 if (unwind
.proc_pending
.sym
4736 && S_GET_NAME (unwind
.proc_pending
.sym
)
4737 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4738 as_warn (_("`%s' should be an operand to this .endp"),
4739 S_GET_NAME (unwind
.proc_pending
.sym
));
4740 while (unwind
.proc_pending
.next
)
4742 pending
= unwind
.proc_pending
.next
;
4743 unwind
.proc_pending
.next
= pending
->next
;
4746 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4750 dot_template (template)
4753 CURR_SLOT
.user_template
= template;
4758 int dummy ATTRIBUTE_UNUSED
;
4760 int ins
, locs
, outs
, rots
;
4762 if (is_it_end_of_statement ())
4763 ins
= locs
= outs
= rots
= 0;
4766 ins
= get_absolute_expression ();
4767 if (*input_line_pointer
++ != ',')
4769 locs
= get_absolute_expression ();
4770 if (*input_line_pointer
++ != ',')
4772 outs
= get_absolute_expression ();
4773 if (*input_line_pointer
++ != ',')
4775 rots
= get_absolute_expression ();
4777 set_regstack (ins
, locs
, outs
, rots
);
4781 as_bad (_("Comma expected"));
4782 ignore_rest_of_line ();
4790 valueT num_alloced
= 0;
4791 struct dynreg
**drpp
, *dr
;
4792 int ch
, base_reg
= 0;
4798 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4799 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4800 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4804 /* First, remove existing names from hash table. */
4805 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4807 hash_delete (md
.dynreg_hash
, dr
->name
);
4808 /* FIXME: Free dr->name. */
4812 drpp
= &md
.dynreg
[type
];
4815 start
= input_line_pointer
;
4816 ch
= get_symbol_end ();
4817 len
= strlen (ia64_canonicalize_symbol_name (start
));
4818 *input_line_pointer
= ch
;
4821 if (*input_line_pointer
!= '[')
4823 as_bad (_("Expected '['"));
4826 ++input_line_pointer
; /* skip '[' */
4828 num_regs
= get_absolute_expression ();
4830 if (*input_line_pointer
++ != ']')
4832 as_bad (_("Expected ']'"));
4837 as_bad (_("Number of elements must be positive"));
4842 num_alloced
+= num_regs
;
4846 if (num_alloced
> md
.rot
.num_regs
)
4848 as_bad (_("Used more than the declared %d rotating registers"),
4854 if (num_alloced
> 96)
4856 as_bad (_("Used more than the available 96 rotating registers"));
4861 if (num_alloced
> 48)
4863 as_bad (_("Used more than the available 48 rotating registers"));
4874 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4875 memset (*drpp
, 0, sizeof (*dr
));
4878 name
= obstack_alloc (¬es
, len
+ 1);
4879 memcpy (name
, start
, len
);
4884 dr
->num_regs
= num_regs
;
4885 dr
->base
= base_reg
;
4887 base_reg
+= num_regs
;
4889 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4891 as_bad (_("Attempt to redefine register set `%s'"), name
);
4892 obstack_free (¬es
, name
);
4896 if (*input_line_pointer
!= ',')
4898 ++input_line_pointer
; /* skip comma */
4901 demand_empty_rest_of_line ();
4905 ignore_rest_of_line ();
4909 dot_byteorder (byteorder
)
4912 segment_info_type
*seginfo
= seg_info (now_seg
);
4914 if (byteorder
== -1)
4916 if (seginfo
->tc_segment_info_data
.endian
== 0)
4917 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4918 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4921 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4923 if (target_big_endian
!= byteorder
)
4925 target_big_endian
= byteorder
;
4926 if (target_big_endian
)
4928 ia64_number_to_chars
= number_to_chars_bigendian
;
4929 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4933 ia64_number_to_chars
= number_to_chars_littleendian
;
4934 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4941 int dummy ATTRIBUTE_UNUSED
;
4948 option
= input_line_pointer
;
4949 ch
= get_symbol_end ();
4950 if (strcmp (option
, "lsb") == 0)
4951 md
.flags
&= ~EF_IA_64_BE
;
4952 else if (strcmp (option
, "msb") == 0)
4953 md
.flags
|= EF_IA_64_BE
;
4954 else if (strcmp (option
, "abi32") == 0)
4955 md
.flags
&= ~EF_IA_64_ABI64
;
4956 else if (strcmp (option
, "abi64") == 0)
4957 md
.flags
|= EF_IA_64_ABI64
;
4959 as_bad (_("Unknown psr option `%s'"), option
);
4960 *input_line_pointer
= ch
;
4963 if (*input_line_pointer
!= ',')
4966 ++input_line_pointer
;
4969 demand_empty_rest_of_line ();
4974 int dummy ATTRIBUTE_UNUSED
;
4976 new_logical_line (0, get_absolute_expression ());
4977 demand_empty_rest_of_line ();
4981 cross_section (ref
, cons
, ua
)
4983 void (*cons
) PARAMS((int));
4987 int saved_auto_align
;
4988 unsigned int section_count
;
4991 start
= input_line_pointer
;
4997 name
= demand_copy_C_string (&len
);
4998 obstack_free(¬es
, name
);
5001 ignore_rest_of_line ();
5007 char c
= get_symbol_end ();
5009 if (input_line_pointer
== start
)
5011 as_bad (_("Missing section name"));
5012 ignore_rest_of_line ();
5015 *input_line_pointer
= c
;
5017 end
= input_line_pointer
;
5019 if (*input_line_pointer
!= ',')
5021 as_bad (_("Comma expected after section name"));
5022 ignore_rest_of_line ();
5026 end
= input_line_pointer
+ 1; /* skip comma */
5027 input_line_pointer
= start
;
5028 md
.keep_pending_output
= 1;
5029 section_count
= bfd_count_sections(stdoutput
);
5030 obj_elf_section (0);
5031 if (section_count
!= bfd_count_sections(stdoutput
))
5032 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
5033 input_line_pointer
= end
;
5034 saved_auto_align
= md
.auto_align
;
5039 md
.auto_align
= saved_auto_align
;
5040 obj_elf_previous (0);
5041 md
.keep_pending_output
= 0;
5048 cross_section (size
, cons
, 0);
5051 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
5054 stmt_float_cons (kind
)
5075 ia64_do_align (alignment
);
5083 int saved_auto_align
= md
.auto_align
;
5087 md
.auto_align
= saved_auto_align
;
5091 dot_xfloat_cons (kind
)
5094 cross_section (kind
, stmt_float_cons
, 0);
5098 dot_xstringer (int zero
)
5100 cross_section (zero
, stringer
, 0);
5107 cross_section (size
, cons
, 1);
5111 dot_xfloat_cons_ua (kind
)
5114 cross_section (kind
, float_cons
, 1);
5117 /* .reg.val <regname>,value */
5121 int dummy ATTRIBUTE_UNUSED
;
5125 expression_and_evaluate (®
);
5126 if (reg
.X_op
!= O_register
)
5128 as_bad (_("Register name expected"));
5129 ignore_rest_of_line ();
5131 else if (*input_line_pointer
++ != ',')
5133 as_bad (_("Comma expected"));
5134 ignore_rest_of_line ();
5138 valueT value
= get_absolute_expression ();
5139 int regno
= reg
.X_add_number
;
5140 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
5141 as_warn (_("Register value annotation ignored"));
5144 gr_values
[regno
- REG_GR
].known
= 1;
5145 gr_values
[regno
- REG_GR
].value
= value
;
5146 gr_values
[regno
- REG_GR
].path
= md
.path
;
5149 demand_empty_rest_of_line ();
5154 .serialize.instruction
5157 dot_serialize (type
)
5160 insn_group_break (0, 0, 0);
5162 instruction_serialization ();
5164 data_serialization ();
5165 insn_group_break (0, 0, 0);
5166 demand_empty_rest_of_line ();
5169 /* select dv checking mode
5174 A stop is inserted when changing modes
5181 if (md
.manual_bundling
)
5182 as_warn (_("Directive invalid within a bundle"));
5184 if (type
== 'E' || type
== 'A')
5185 md
.mode_explicitly_set
= 0;
5187 md
.mode_explicitly_set
= 1;
5194 if (md
.explicit_mode
)
5195 insn_group_break (1, 0, 0);
5196 md
.explicit_mode
= 0;
5200 if (!md
.explicit_mode
)
5201 insn_group_break (1, 0, 0);
5202 md
.explicit_mode
= 1;
5206 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5207 insn_group_break (1, 0, 0);
5208 md
.explicit_mode
= md
.default_explicit_mode
;
5209 md
.mode_explicitly_set
= 0;
5220 for (regno
= 0; regno
< 64; regno
++)
5222 if (mask
& ((valueT
) 1 << regno
))
5224 fprintf (stderr
, "%s p%d", comma
, regno
);
5231 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5232 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5233 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5234 .pred.safe_across_calls p1 [, p2 [,...]]
5243 int p1
= -1, p2
= -1;
5247 if (*input_line_pointer
== '"')
5250 char *form
= demand_copy_C_string (&len
);
5252 if (strcmp (form
, "mutex") == 0)
5254 else if (strcmp (form
, "clear") == 0)
5256 else if (strcmp (form
, "imply") == 0)
5258 obstack_free (¬es
, form
);
5260 else if (*input_line_pointer
== '@')
5262 char *form
= ++input_line_pointer
;
5263 char c
= get_symbol_end();
5265 if (strcmp (form
, "mutex") == 0)
5267 else if (strcmp (form
, "clear") == 0)
5269 else if (strcmp (form
, "imply") == 0)
5271 *input_line_pointer
= c
;
5275 as_bad (_("Missing predicate relation type"));
5276 ignore_rest_of_line ();
5281 as_bad (_("Unrecognized predicate relation type"));
5282 ignore_rest_of_line ();
5285 if (*input_line_pointer
== ',')
5286 ++input_line_pointer
;
5294 expressionS pr
, *pr1
, *pr2
;
5296 sep
= parse_operand (&pr
, ',');
5297 if (pr
.X_op
== O_register
5298 && pr
.X_add_number
>= REG_P
5299 && pr
.X_add_number
<= REG_P
+ 63)
5301 regno
= pr
.X_add_number
- REG_P
;
5309 else if (type
!= 'i'
5310 && pr
.X_op
== O_subtract
5311 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5312 && pr1
->X_op
== O_register
5313 && pr1
->X_add_number
>= REG_P
5314 && pr1
->X_add_number
<= REG_P
+ 63
5315 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5316 && pr2
->X_op
== O_register
5317 && pr2
->X_add_number
>= REG_P
5318 && pr2
->X_add_number
<= REG_P
+ 63)
5323 regno
= pr1
->X_add_number
- REG_P
;
5324 stop
= pr2
->X_add_number
- REG_P
;
5327 as_bad (_("Bad register range"));
5328 ignore_rest_of_line ();
5331 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5332 count
+= stop
- regno
+ 1;
5336 as_bad (_("Predicate register expected"));
5337 ignore_rest_of_line ();
5341 as_warn (_("Duplicate predicate register ignored"));
5352 clear_qp_mutex (mask
);
5353 clear_qp_implies (mask
, (valueT
) 0);
5356 if (count
!= 2 || p1
== -1 || p2
== -1)
5357 as_bad (_("Predicate source and target required"));
5358 else if (p1
== 0 || p2
== 0)
5359 as_bad (_("Use of p0 is not valid in this context"));
5361 add_qp_imply (p1
, p2
);
5366 as_bad (_("At least two PR arguments expected"));
5371 as_bad (_("Use of p0 is not valid in this context"));
5374 add_qp_mutex (mask
);
5377 /* note that we don't override any existing relations */
5380 as_bad (_("At least one PR argument expected"));
5385 fprintf (stderr
, "Safe across calls: ");
5386 print_prmask (mask
);
5387 fprintf (stderr
, "\n");
5389 qp_safe_across_calls
= mask
;
5392 demand_empty_rest_of_line ();
5395 /* .entry label [, label [, ...]]
5396 Hint to DV code that the given labels are to be considered entry points.
5397 Otherwise, only global labels are considered entry points. */
5401 int dummy ATTRIBUTE_UNUSED
;
5410 name
= input_line_pointer
;
5411 c
= get_symbol_end ();
5412 symbolP
= symbol_find_or_make (name
);
5414 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5416 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5419 *input_line_pointer
= c
;
5421 c
= *input_line_pointer
;
5424 input_line_pointer
++;
5426 if (*input_line_pointer
== '\n')
5432 demand_empty_rest_of_line ();
5435 /* .mem.offset offset, base
5436 "base" is used to distinguish between offsets from a different base. */
5439 dot_mem_offset (dummy
)
5440 int dummy ATTRIBUTE_UNUSED
;
5442 md
.mem_offset
.hint
= 1;
5443 md
.mem_offset
.offset
= get_absolute_expression ();
5444 if (*input_line_pointer
!= ',')
5446 as_bad (_("Comma expected"));
5447 ignore_rest_of_line ();
5450 ++input_line_pointer
;
5451 md
.mem_offset
.base
= get_absolute_expression ();
5452 demand_empty_rest_of_line ();
5455 /* ia64-specific pseudo-ops: */
5456 const pseudo_typeS md_pseudo_table
[] =
5458 { "radix", dot_radix
, 0 },
5459 { "lcomm", s_lcomm_bytes
, 1 },
5460 { "loc", dot_loc
, 0 },
5461 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5462 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5463 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5464 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5465 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5466 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5467 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5468 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5469 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5470 { "proc", dot_proc
, 0 },
5471 { "body", dot_body
, 0 },
5472 { "prologue", dot_prologue
, 0 },
5473 { "endp", dot_endp
, 0 },
5475 { "fframe", dot_fframe
, 0 },
5476 { "vframe", dot_vframe
, 0 },
5477 { "vframesp", dot_vframesp
, 0 },
5478 { "vframepsp", dot_vframesp
, 1 },
5479 { "save", dot_save
, 0 },
5480 { "restore", dot_restore
, 0 },
5481 { "restorereg", dot_restorereg
, 0 },
5482 { "restorereg.p", dot_restorereg
, 1 },
5483 { "handlerdata", dot_handlerdata
, 0 },
5484 { "unwentry", dot_unwentry
, 0 },
5485 { "altrp", dot_altrp
, 0 },
5486 { "savesp", dot_savemem
, 0 },
5487 { "savepsp", dot_savemem
, 1 },
5488 { "save.g", dot_saveg
, 0 },
5489 { "save.f", dot_savef
, 0 },
5490 { "save.b", dot_saveb
, 0 },
5491 { "save.gf", dot_savegf
, 0 },
5492 { "spill", dot_spill
, 0 },
5493 { "spillreg", dot_spillreg
, 0 },
5494 { "spillsp", dot_spillmem
, 0 },
5495 { "spillpsp", dot_spillmem
, 1 },
5496 { "spillreg.p", dot_spillreg
, 1 },
5497 { "spillsp.p", dot_spillmem
, ~0 },
5498 { "spillpsp.p", dot_spillmem
, ~1 },
5499 { "label_state", dot_label_state
, 0 },
5500 { "copy_state", dot_copy_state
, 0 },
5501 { "unwabi", dot_unwabi
, 0 },
5502 { "personality", dot_personality
, 0 },
5503 { "mii", dot_template
, 0x0 },
5504 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5505 { "mlx", dot_template
, 0x2 },
5506 { "mmi", dot_template
, 0x4 },
5507 { "mfi", dot_template
, 0x6 },
5508 { "mmf", dot_template
, 0x7 },
5509 { "mib", dot_template
, 0x8 },
5510 { "mbb", dot_template
, 0x9 },
5511 { "bbb", dot_template
, 0xb },
5512 { "mmb", dot_template
, 0xc },
5513 { "mfb", dot_template
, 0xe },
5514 { "align", dot_align
, 0 },
5515 { "regstk", dot_regstk
, 0 },
5516 { "rotr", dot_rot
, DYNREG_GR
},
5517 { "rotf", dot_rot
, DYNREG_FR
},
5518 { "rotp", dot_rot
, DYNREG_PR
},
5519 { "lsb", dot_byteorder
, 0 },
5520 { "msb", dot_byteorder
, 1 },
5521 { "psr", dot_psr
, 0 },
5522 { "alias", dot_alias
, 0 },
5523 { "secalias", dot_alias
, 1 },
5524 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5526 { "xdata1", dot_xdata
, 1 },
5527 { "xdata2", dot_xdata
, 2 },
5528 { "xdata4", dot_xdata
, 4 },
5529 { "xdata8", dot_xdata
, 8 },
5530 { "xdata16", dot_xdata
, 16 },
5531 { "xreal4", dot_xfloat_cons
, 'f' },
5532 { "xreal8", dot_xfloat_cons
, 'd' },
5533 { "xreal10", dot_xfloat_cons
, 'x' },
5534 { "xreal16", dot_xfloat_cons
, 'X' },
5535 { "xstring", dot_xstringer
, 8 + 0 },
5536 { "xstringz", dot_xstringer
, 8 + 1 },
5538 /* unaligned versions: */
5539 { "xdata2.ua", dot_xdata_ua
, 2 },
5540 { "xdata4.ua", dot_xdata_ua
, 4 },
5541 { "xdata8.ua", dot_xdata_ua
, 8 },
5542 { "xdata16.ua", dot_xdata_ua
, 16 },
5543 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5544 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5545 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5546 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5548 /* annotations/DV checking support */
5549 { "entry", dot_entry
, 0 },
5550 { "mem.offset", dot_mem_offset
, 0 },
5551 { "pred.rel", dot_pred_rel
, 0 },
5552 { "pred.rel.clear", dot_pred_rel
, 'c' },
5553 { "pred.rel.imply", dot_pred_rel
, 'i' },
5554 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5555 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5556 { "reg.val", dot_reg_val
, 0 },
5557 { "serialize.data", dot_serialize
, 0 },
5558 { "serialize.instruction", dot_serialize
, 1 },
5559 { "auto", dot_dv_mode
, 'a' },
5560 { "explicit", dot_dv_mode
, 'e' },
5561 { "default", dot_dv_mode
, 'd' },
5563 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5564 IA-64 aligns data allocation pseudo-ops by default, so we have to
5565 tell it that these ones are supposed to be unaligned. Long term,
5566 should rewrite so that only IA-64 specific data allocation pseudo-ops
5567 are aligned by default. */
5568 {"2byte", stmt_cons_ua
, 2},
5569 {"4byte", stmt_cons_ua
, 4},
5570 {"8byte", stmt_cons_ua
, 8},
5575 static const struct pseudo_opcode
5578 void (*handler
) (int);
5583 /* these are more like pseudo-ops, but don't start with a dot */
5584 { "data1", cons
, 1 },
5585 { "data2", cons
, 2 },
5586 { "data4", cons
, 4 },
5587 { "data8", cons
, 8 },
5588 { "data16", cons
, 16 },
5589 { "real4", stmt_float_cons
, 'f' },
5590 { "real8", stmt_float_cons
, 'd' },
5591 { "real10", stmt_float_cons
, 'x' },
5592 { "real16", stmt_float_cons
, 'X' },
5593 { "string", stringer
, 8 + 0 },
5594 { "stringz", stringer
, 8 + 1 },
5596 /* unaligned versions: */
5597 { "data2.ua", stmt_cons_ua
, 2 },
5598 { "data4.ua", stmt_cons_ua
, 4 },
5599 { "data8.ua", stmt_cons_ua
, 8 },
5600 { "data16.ua", stmt_cons_ua
, 16 },
5601 { "real4.ua", float_cons
, 'f' },
5602 { "real8.ua", float_cons
, 'd' },
5603 { "real10.ua", float_cons
, 'x' },
5604 { "real16.ua", float_cons
, 'X' },
5607 /* Declare a register by creating a symbol for it and entering it in
5608 the symbol table. */
5611 declare_register (name
, regnum
)
5613 unsigned int regnum
;
5618 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5620 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5622 as_fatal ("Inserting \"%s\" into register table failed: %s",
5629 declare_register_set (prefix
, num_regs
, base_regnum
)
5631 unsigned int num_regs
;
5632 unsigned int base_regnum
;
5637 for (i
= 0; i
< num_regs
; ++i
)
5639 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5640 declare_register (name
, base_regnum
+ i
);
5645 operand_width (opnd
)
5646 enum ia64_opnd opnd
;
5648 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5649 unsigned int bits
= 0;
5653 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5654 bits
+= odesc
->field
[i
].bits
;
5659 static enum operand_match_result
5660 operand_match (idesc
, index
, e
)
5661 const struct ia64_opcode
*idesc
;
5665 enum ia64_opnd opnd
= idesc
->operands
[index
];
5666 int bits
, relocatable
= 0;
5667 struct insn_fix
*fix
;
5674 case IA64_OPND_AR_CCV
:
5675 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5676 return OPERAND_MATCH
;
5679 case IA64_OPND_AR_CSD
:
5680 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5681 return OPERAND_MATCH
;
5684 case IA64_OPND_AR_PFS
:
5685 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5686 return OPERAND_MATCH
;
5690 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5691 return OPERAND_MATCH
;
5695 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5696 return OPERAND_MATCH
;
5700 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5701 return OPERAND_MATCH
;
5704 case IA64_OPND_PR_ROT
:
5705 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5706 return OPERAND_MATCH
;
5710 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5711 return OPERAND_MATCH
;
5714 case IA64_OPND_PSR_L
:
5715 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5716 return OPERAND_MATCH
;
5719 case IA64_OPND_PSR_UM
:
5720 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5721 return OPERAND_MATCH
;
5725 if (e
->X_op
== O_constant
)
5727 if (e
->X_add_number
== 1)
5728 return OPERAND_MATCH
;
5730 return OPERAND_OUT_OF_RANGE
;
5735 if (e
->X_op
== O_constant
)
5737 if (e
->X_add_number
== 8)
5738 return OPERAND_MATCH
;
5740 return OPERAND_OUT_OF_RANGE
;
5745 if (e
->X_op
== O_constant
)
5747 if (e
->X_add_number
== 16)
5748 return OPERAND_MATCH
;
5750 return OPERAND_OUT_OF_RANGE
;
5754 /* register operands: */
5757 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5758 && e
->X_add_number
< REG_AR
+ 128)
5759 return OPERAND_MATCH
;
5764 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5765 && e
->X_add_number
< REG_BR
+ 8)
5766 return OPERAND_MATCH
;
5770 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5771 && e
->X_add_number
< REG_CR
+ 128)
5772 return OPERAND_MATCH
;
5779 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5780 && e
->X_add_number
< REG_FR
+ 128)
5781 return OPERAND_MATCH
;
5786 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5787 && e
->X_add_number
< REG_P
+ 64)
5788 return OPERAND_MATCH
;
5794 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5795 && e
->X_add_number
< REG_GR
+ 128)
5796 return OPERAND_MATCH
;
5799 case IA64_OPND_R3_2
:
5800 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5802 if (e
->X_add_number
< REG_GR
+ 4)
5803 return OPERAND_MATCH
;
5804 else if (e
->X_add_number
< REG_GR
+ 128)
5805 return OPERAND_OUT_OF_RANGE
;
5809 /* indirect operands: */
5810 case IA64_OPND_CPUID_R3
:
5811 case IA64_OPND_DBR_R3
:
5812 case IA64_OPND_DTR_R3
:
5813 case IA64_OPND_ITR_R3
:
5814 case IA64_OPND_IBR_R3
:
5815 case IA64_OPND_MSR_R3
:
5816 case IA64_OPND_PKR_R3
:
5817 case IA64_OPND_PMC_R3
:
5818 case IA64_OPND_PMD_R3
:
5819 case IA64_OPND_RR_R3
:
5820 if (e
->X_op
== O_index
&& e
->X_op_symbol
5821 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5822 == opnd
- IA64_OPND_CPUID_R3
))
5823 return OPERAND_MATCH
;
5827 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5828 return OPERAND_MATCH
;
5831 /* immediate operands: */
5832 case IA64_OPND_CNT2a
:
5833 case IA64_OPND_LEN4
:
5834 case IA64_OPND_LEN6
:
5835 bits
= operand_width (idesc
->operands
[index
]);
5836 if (e
->X_op
== O_constant
)
5838 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5839 return OPERAND_MATCH
;
5841 return OPERAND_OUT_OF_RANGE
;
5845 case IA64_OPND_CNT2b
:
5846 if (e
->X_op
== O_constant
)
5848 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5849 return OPERAND_MATCH
;
5851 return OPERAND_OUT_OF_RANGE
;
5855 case IA64_OPND_CNT2c
:
5856 val
= e
->X_add_number
;
5857 if (e
->X_op
== O_constant
)
5859 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5860 return OPERAND_MATCH
;
5862 return OPERAND_OUT_OF_RANGE
;
5867 /* SOR must be an integer multiple of 8 */
5868 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5869 return OPERAND_OUT_OF_RANGE
;
5872 if (e
->X_op
== O_constant
)
5874 if ((bfd_vma
) e
->X_add_number
<= 96)
5875 return OPERAND_MATCH
;
5877 return OPERAND_OUT_OF_RANGE
;
5881 case IA64_OPND_IMMU62
:
5882 if (e
->X_op
== O_constant
)
5884 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5885 return OPERAND_MATCH
;
5887 return OPERAND_OUT_OF_RANGE
;
5891 /* FIXME -- need 62-bit relocation type */
5892 as_bad (_("62-bit relocation not yet implemented"));
5896 case IA64_OPND_IMMU64
:
5897 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5898 || e
->X_op
== O_subtract
)
5900 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5901 fix
->code
= BFD_RELOC_IA64_IMM64
;
5902 if (e
->X_op
!= O_subtract
)
5904 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5905 if (e
->X_op
== O_pseudo_fixup
)
5909 fix
->opnd
= idesc
->operands
[index
];
5912 ++CURR_SLOT
.num_fixups
;
5913 return OPERAND_MATCH
;
5915 else if (e
->X_op
== O_constant
)
5916 return OPERAND_MATCH
;
5919 case IA64_OPND_IMMU5b
:
5920 if (e
->X_op
== O_constant
)
5922 val
= e
->X_add_number
;
5923 if (val
>= 32 && val
<= 63)
5924 return OPERAND_MATCH
;
5926 return OPERAND_OUT_OF_RANGE
;
5930 case IA64_OPND_CCNT5
:
5931 case IA64_OPND_CNT5
:
5932 case IA64_OPND_CNT6
:
5933 case IA64_OPND_CPOS6a
:
5934 case IA64_OPND_CPOS6b
:
5935 case IA64_OPND_CPOS6c
:
5936 case IA64_OPND_IMMU2
:
5937 case IA64_OPND_IMMU7a
:
5938 case IA64_OPND_IMMU7b
:
5939 case IA64_OPND_IMMU21
:
5940 case IA64_OPND_IMMU24
:
5941 case IA64_OPND_MBTYPE4
:
5942 case IA64_OPND_MHTYPE8
:
5943 case IA64_OPND_POS6
:
5944 bits
= operand_width (idesc
->operands
[index
]);
5945 if (e
->X_op
== O_constant
)
5947 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5948 return OPERAND_MATCH
;
5950 return OPERAND_OUT_OF_RANGE
;
5954 case IA64_OPND_IMMU9
:
5955 bits
= operand_width (idesc
->operands
[index
]);
5956 if (e
->X_op
== O_constant
)
5958 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5960 int lobits
= e
->X_add_number
& 0x3;
5961 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5962 e
->X_add_number
|= (bfd_vma
) 0x3;
5963 return OPERAND_MATCH
;
5966 return OPERAND_OUT_OF_RANGE
;
5970 case IA64_OPND_IMM44
:
5971 /* least 16 bits must be zero */
5972 if ((e
->X_add_number
& 0xffff) != 0)
5973 /* XXX technically, this is wrong: we should not be issuing warning
5974 messages until we're sure this instruction pattern is going to
5976 as_warn (_("lower 16 bits of mask ignored"));
5978 if (e
->X_op
== O_constant
)
5980 if (((e
->X_add_number
>= 0
5981 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5982 || (e
->X_add_number
< 0
5983 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5986 if (e
->X_add_number
>= 0
5987 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5989 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5991 return OPERAND_MATCH
;
5994 return OPERAND_OUT_OF_RANGE
;
5998 case IA64_OPND_IMM17
:
5999 /* bit 0 is a don't care (pr0 is hardwired to 1) */
6000 if (e
->X_op
== O_constant
)
6002 if (((e
->X_add_number
>= 0
6003 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
6004 || (e
->X_add_number
< 0
6005 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
6008 if (e
->X_add_number
>= 0
6009 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
6011 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
6013 return OPERAND_MATCH
;
6016 return OPERAND_OUT_OF_RANGE
;
6020 case IA64_OPND_IMM14
:
6021 case IA64_OPND_IMM22
:
6023 case IA64_OPND_IMM1
:
6024 case IA64_OPND_IMM8
:
6025 case IA64_OPND_IMM8U4
:
6026 case IA64_OPND_IMM8M1
:
6027 case IA64_OPND_IMM8M1U4
:
6028 case IA64_OPND_IMM8M1U8
:
6029 case IA64_OPND_IMM9a
:
6030 case IA64_OPND_IMM9b
:
6031 bits
= operand_width (idesc
->operands
[index
]);
6032 if (relocatable
&& (e
->X_op
== O_symbol
6033 || e
->X_op
== O_subtract
6034 || e
->X_op
== O_pseudo_fixup
))
6036 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6038 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
6039 fix
->code
= BFD_RELOC_IA64_IMM14
;
6041 fix
->code
= BFD_RELOC_IA64_IMM22
;
6043 if (e
->X_op
!= O_subtract
)
6045 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6046 if (e
->X_op
== O_pseudo_fixup
)
6050 fix
->opnd
= idesc
->operands
[index
];
6053 ++CURR_SLOT
.num_fixups
;
6054 return OPERAND_MATCH
;
6056 else if (e
->X_op
!= O_constant
6057 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
6058 return OPERAND_MISMATCH
;
6060 if (opnd
== IA64_OPND_IMM8M1U4
)
6062 /* Zero is not valid for unsigned compares that take an adjusted
6063 constant immediate range. */
6064 if (e
->X_add_number
== 0)
6065 return OPERAND_OUT_OF_RANGE
;
6067 /* Sign-extend 32-bit unsigned numbers, so that the following range
6068 checks will work. */
6069 val
= e
->X_add_number
;
6070 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6071 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6072 val
= ((val
<< 32) >> 32);
6074 /* Check for 0x100000000. This is valid because
6075 0x100000000-1 is the same as ((uint32_t) -1). */
6076 if (val
== ((bfd_signed_vma
) 1 << 32))
6077 return OPERAND_MATCH
;
6081 else if (opnd
== IA64_OPND_IMM8M1U8
)
6083 /* Zero is not valid for unsigned compares that take an adjusted
6084 constant immediate range. */
6085 if (e
->X_add_number
== 0)
6086 return OPERAND_OUT_OF_RANGE
;
6088 /* Check for 0x10000000000000000. */
6089 if (e
->X_op
== O_big
)
6091 if (generic_bignum
[0] == 0
6092 && generic_bignum
[1] == 0
6093 && generic_bignum
[2] == 0
6094 && generic_bignum
[3] == 0
6095 && generic_bignum
[4] == 1)
6096 return OPERAND_MATCH
;
6098 return OPERAND_OUT_OF_RANGE
;
6101 val
= e
->X_add_number
- 1;
6103 else if (opnd
== IA64_OPND_IMM8M1
)
6104 val
= e
->X_add_number
- 1;
6105 else if (opnd
== IA64_OPND_IMM8U4
)
6107 /* Sign-extend 32-bit unsigned numbers, so that the following range
6108 checks will work. */
6109 val
= e
->X_add_number
;
6110 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6111 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6112 val
= ((val
<< 32) >> 32);
6115 val
= e
->X_add_number
;
6117 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
6118 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
6119 return OPERAND_MATCH
;
6121 return OPERAND_OUT_OF_RANGE
;
6123 case IA64_OPND_INC3
:
6124 /* +/- 1, 4, 8, 16 */
6125 val
= e
->X_add_number
;
6128 if (e
->X_op
== O_constant
)
6130 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
6131 return OPERAND_MATCH
;
6133 return OPERAND_OUT_OF_RANGE
;
6137 case IA64_OPND_TGT25
:
6138 case IA64_OPND_TGT25b
:
6139 case IA64_OPND_TGT25c
:
6140 case IA64_OPND_TGT64
:
6141 if (e
->X_op
== O_symbol
)
6143 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6144 if (opnd
== IA64_OPND_TGT25
)
6145 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
6146 else if (opnd
== IA64_OPND_TGT25b
)
6147 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
6148 else if (opnd
== IA64_OPND_TGT25c
)
6149 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
6150 else if (opnd
== IA64_OPND_TGT64
)
6151 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
6155 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6156 fix
->opnd
= idesc
->operands
[index
];
6159 ++CURR_SLOT
.num_fixups
;
6160 return OPERAND_MATCH
;
6162 case IA64_OPND_TAG13
:
6163 case IA64_OPND_TAG13b
:
6167 return OPERAND_MATCH
;
6170 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6171 /* There are no external relocs for TAG13/TAG13b fields, so we
6172 create a dummy reloc. This will not live past md_apply_fix. */
6173 fix
->code
= BFD_RELOC_UNUSED
;
6174 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6175 fix
->opnd
= idesc
->operands
[index
];
6178 ++CURR_SLOT
.num_fixups
;
6179 return OPERAND_MATCH
;
6186 case IA64_OPND_LDXMOV
:
6187 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6188 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6189 fix
->opnd
= idesc
->operands
[index
];
6192 ++CURR_SLOT
.num_fixups
;
6193 return OPERAND_MATCH
;
6198 return OPERAND_MISMATCH
;
6202 parse_operand (e
, more
)
6208 memset (e
, 0, sizeof (*e
));
6211 expression_and_evaluate (e
);
6212 sep
= *input_line_pointer
;
6213 if (more
&& (sep
== ',' || sep
== more
))
6214 ++input_line_pointer
;
6218 /* Returns the next entry in the opcode table that matches the one in
6219 IDESC, and frees the entry in IDESC. If no matching entry is
6220 found, NULL is returned instead. */
6222 static struct ia64_opcode
*
6223 get_next_opcode (struct ia64_opcode
*idesc
)
6225 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6226 ia64_free_opcode (idesc
);
6230 /* Parse the operands for the opcode and find the opcode variant that
6231 matches the specified operands, or NULL if no match is possible. */
6233 static struct ia64_opcode
*
6234 parse_operands (idesc
)
6235 struct ia64_opcode
*idesc
;
6237 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6238 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6241 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6242 enum operand_match_result result
;
6244 char *first_arg
= 0, *end
, *saved_input_pointer
;
6247 assert (strlen (idesc
->name
) <= 128);
6249 strcpy (mnemonic
, idesc
->name
);
6250 if (idesc
->operands
[2] == IA64_OPND_SOF
6251 || idesc
->operands
[1] == IA64_OPND_SOF
)
6253 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6254 can't parse the first operand until we have parsed the
6255 remaining operands of the "alloc" instruction. */
6257 first_arg
= input_line_pointer
;
6258 end
= strchr (input_line_pointer
, '=');
6261 as_bad (_("Expected separator `='"));
6264 input_line_pointer
= end
+ 1;
6271 if (i
< NELEMS (CURR_SLOT
.opnd
))
6273 sep
= parse_operand (CURR_SLOT
.opnd
+ i
, '=');
6274 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6281 sep
= parse_operand (&dummy
, '=');
6282 if (dummy
.X_op
== O_absent
)
6288 if (sep
!= '=' && sep
!= ',')
6293 if (num_outputs
> 0)
6294 as_bad (_("Duplicate equal sign (=) in instruction"));
6296 num_outputs
= i
+ 1;
6301 as_bad (_("Illegal operand separator `%c'"), sep
);
6305 if (idesc
->operands
[2] == IA64_OPND_SOF
6306 || idesc
->operands
[1] == IA64_OPND_SOF
)
6308 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6309 Note, however, that due to that mapping operand numbers in error
6310 messages for any of the constant operands will not be correct. */
6311 know (strcmp (idesc
->name
, "alloc") == 0);
6312 /* The first operand hasn't been parsed/initialized, yet (but
6313 num_operands intentionally doesn't account for that). */
6314 i
= num_operands
> 4 ? 2 : 1;
6315 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6316 ? CURR_SLOT.opnd[n].X_add_number \
6318 sof
= set_regstack (FORCE_CONST(i
),
6321 FORCE_CONST(i
+ 3));
6324 /* now we can parse the first arg: */
6325 saved_input_pointer
= input_line_pointer
;
6326 input_line_pointer
= first_arg
;
6327 sep
= parse_operand (CURR_SLOT
.opnd
+ 0, '=');
6329 --num_outputs
; /* force error */
6330 input_line_pointer
= saved_input_pointer
;
6332 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6333 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6334 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6335 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6336 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6338 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6339 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6342 highest_unmatched_operand
= -4;
6343 curr_out_of_range_pos
= -1;
6345 for (; idesc
; idesc
= get_next_opcode (idesc
))
6347 if (num_outputs
!= idesc
->num_outputs
)
6348 continue; /* mismatch in # of outputs */
6349 if (highest_unmatched_operand
< 0)
6350 highest_unmatched_operand
|= 1;
6351 if (num_operands
> NELEMS (idesc
->operands
)
6352 || (num_operands
< NELEMS (idesc
->operands
)
6353 && idesc
->operands
[num_operands
])
6354 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6355 continue; /* mismatch in number of arguments */
6356 if (highest_unmatched_operand
< 0)
6357 highest_unmatched_operand
|= 2;
6359 CURR_SLOT
.num_fixups
= 0;
6361 /* Try to match all operands. If we see an out-of-range operand,
6362 then continue trying to match the rest of the operands, since if
6363 the rest match, then this idesc will give the best error message. */
6365 out_of_range_pos
= -1;
6366 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6368 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6369 if (result
!= OPERAND_MATCH
)
6371 if (result
!= OPERAND_OUT_OF_RANGE
)
6373 if (out_of_range_pos
< 0)
6374 /* remember position of the first out-of-range operand: */
6375 out_of_range_pos
= i
;
6379 /* If we did not match all operands, or if at least one operand was
6380 out-of-range, then this idesc does not match. Keep track of which
6381 idesc matched the most operands before failing. If we have two
6382 idescs that failed at the same position, and one had an out-of-range
6383 operand, then prefer the out-of-range operand. Thus if we have
6384 "add r0=0x1000000,r1" we get an error saying the constant is out
6385 of range instead of an error saying that the constant should have been
6388 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6390 if (i
> highest_unmatched_operand
6391 || (i
== highest_unmatched_operand
6392 && out_of_range_pos
> curr_out_of_range_pos
))
6394 highest_unmatched_operand
= i
;
6395 if (out_of_range_pos
>= 0)
6397 expected_operand
= idesc
->operands
[out_of_range_pos
];
6398 error_pos
= out_of_range_pos
;
6402 expected_operand
= idesc
->operands
[i
];
6405 curr_out_of_range_pos
= out_of_range_pos
;
6414 if (expected_operand
)
6415 as_bad (_("Operand %u of `%s' should be %s"),
6416 error_pos
+ 1, mnemonic
,
6417 elf64_ia64_operands
[expected_operand
].desc
);
6418 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6419 as_bad (_("Wrong number of output operands"));
6420 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6421 as_bad (_("Wrong number of input operands"));
6423 as_bad (_("Operand mismatch"));
6427 /* Check that the instruction doesn't use
6428 - r0, f0, or f1 as output operands
6429 - the same predicate twice as output operands
6430 - r0 as address of a base update load or store
6431 - the same GR as output and address of a base update load
6432 - two even- or two odd-numbered FRs as output operands of a floating
6433 point parallel load.
6434 At most two (conflicting) output (or output-like) operands can exist,
6435 (floating point parallel loads have three outputs, but the base register,
6436 if updated, cannot conflict with the actual outputs). */
6438 for (i
= 0; i
< num_operands
; ++i
)
6443 switch (idesc
->operands
[i
])
6448 if (i
< num_outputs
)
6450 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6453 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6455 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6460 if (i
< num_outputs
)
6463 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6465 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6472 if (i
< num_outputs
)
6474 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6475 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6478 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6481 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6483 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6487 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6489 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6492 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6494 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6505 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6508 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6514 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6519 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6524 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6532 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6534 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6535 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6536 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6537 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6538 && ! ((reg1
^ reg2
) & 1))
6539 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6540 reg1
- REG_FR
, reg2
- REG_FR
);
6541 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6542 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6543 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6544 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6545 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6546 reg1
- REG_FR
, reg2
- REG_FR
);
6551 build_insn (slot
, insnp
)
6555 const struct ia64_operand
*odesc
, *o2desc
;
6556 struct ia64_opcode
*idesc
= slot
->idesc
;
6562 insn
= idesc
->opcode
| slot
->qp_regno
;
6564 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6566 if (slot
->opnd
[i
].X_op
== O_register
6567 || slot
->opnd
[i
].X_op
== O_constant
6568 || slot
->opnd
[i
].X_op
== O_index
)
6569 val
= slot
->opnd
[i
].X_add_number
;
6570 else if (slot
->opnd
[i
].X_op
== O_big
)
6572 /* This must be the value 0x10000000000000000. */
6573 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6579 switch (idesc
->operands
[i
])
6581 case IA64_OPND_IMMU64
:
6582 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6583 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6584 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6585 | (((val
>> 63) & 0x1) << 36));
6588 case IA64_OPND_IMMU62
:
6589 val
&= 0x3fffffffffffffffULL
;
6590 if (val
!= slot
->opnd
[i
].X_add_number
)
6591 as_warn (_("Value truncated to 62 bits"));
6592 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6593 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6596 case IA64_OPND_TGT64
:
6598 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6599 insn
|= ((((val
>> 59) & 0x1) << 36)
6600 | (((val
>> 0) & 0xfffff) << 13));
6631 case IA64_OPND_R3_2
:
6632 case IA64_OPND_CPUID_R3
:
6633 case IA64_OPND_DBR_R3
:
6634 case IA64_OPND_DTR_R3
:
6635 case IA64_OPND_ITR_R3
:
6636 case IA64_OPND_IBR_R3
:
6638 case IA64_OPND_MSR_R3
:
6639 case IA64_OPND_PKR_R3
:
6640 case IA64_OPND_PMC_R3
:
6641 case IA64_OPND_PMD_R3
:
6642 case IA64_OPND_RR_R3
:
6650 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6651 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6653 as_bad_where (slot
->src_file
, slot
->src_line
,
6654 _("Bad operand value: %s"), err
);
6655 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6657 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6658 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6660 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6661 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6663 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6664 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6665 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6667 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6668 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6678 int manual_bundling_off
= 0, manual_bundling
= 0;
6679 enum ia64_unit required_unit
, insn_unit
= 0;
6680 enum ia64_insn_type type
[3], insn_type
;
6681 unsigned int template, orig_template
;
6682 bfd_vma insn
[3] = { -1, -1, -1 };
6683 struct ia64_opcode
*idesc
;
6684 int end_of_insn_group
= 0, user_template
= -1;
6685 int n
, i
, j
, first
, curr
, last_slot
;
6686 bfd_vma t0
= 0, t1
= 0;
6687 struct label_fix
*lfix
;
6688 bfd_boolean mark_label
;
6689 struct insn_fix
*ifix
;
6695 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6696 know (first
>= 0 && first
< NUM_SLOTS
);
6697 n
= MIN (3, md
.num_slots_in_use
);
6699 /* Determine template: user user_template if specified, best match
6702 if (md
.slot
[first
].user_template
>= 0)
6703 user_template
= template = md
.slot
[first
].user_template
;
6706 /* Auto select appropriate template. */
6707 memset (type
, 0, sizeof (type
));
6709 for (i
= 0; i
< n
; ++i
)
6711 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6713 type
[i
] = md
.slot
[curr
].idesc
->type
;
6714 curr
= (curr
+ 1) % NUM_SLOTS
;
6716 template = best_template
[type
[0]][type
[1]][type
[2]];
6719 /* initialize instructions with appropriate nops: */
6720 for (i
= 0; i
< 3; ++i
)
6721 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6725 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6726 from the start of the frag. */
6727 addr_mod
= frag_now_fix () & 15;
6728 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6729 as_bad (_("instruction address is not a multiple of 16"));
6730 frag_now
->insn_addr
= addr_mod
;
6731 frag_now
->has_code
= 1;
6733 /* now fill in slots with as many insns as possible: */
6735 idesc
= md
.slot
[curr
].idesc
;
6736 end_of_insn_group
= 0;
6738 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6740 /* If we have unwind records, we may need to update some now. */
6741 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6742 unw_rec_list
*end_ptr
= NULL
;
6746 /* Find the last prologue/body record in the list for the current
6747 insn, and set the slot number for all records up to that point.
6748 This needs to be done now, because prologue/body records refer to
6749 the current point, not the point after the instruction has been
6750 issued. This matters because there may have been nops emitted
6751 meanwhile. Any non-prologue non-body record followed by a
6752 prologue/body record must also refer to the current point. */
6753 unw_rec_list
*last_ptr
;
6755 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6756 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6757 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6758 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6759 || ptr
->r
.type
== body
)
6763 /* Make last_ptr point one after the last prologue/body
6765 last_ptr
= last_ptr
->next
;
6766 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6769 ptr
->slot_number
= (unsigned long) f
+ i
;
6770 ptr
->slot_frag
= frag_now
;
6772 /* Remove the initialized records, so that we won't accidentally
6773 update them again if we insert a nop and continue. */
6774 md
.slot
[curr
].unwind_record
= last_ptr
;
6778 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6779 if (md
.slot
[curr
].manual_bundling_on
)
6782 manual_bundling
= 1;
6784 break; /* Need to start a new bundle. */
6787 /* If this instruction specifies a template, then it must be the first
6788 instruction of a bundle. */
6789 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6792 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6794 if (manual_bundling
&& !manual_bundling_off
)
6796 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6797 _("`%s' must be last in bundle"), idesc
->name
);
6799 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6803 if (idesc
->flags
& IA64_OPCODE_LAST
)
6806 unsigned int required_template
;
6808 /* If we need a stop bit after an M slot, our only choice is
6809 template 5 (M;;MI). If we need a stop bit after a B
6810 slot, our only choice is to place it at the end of the
6811 bundle, because the only available templates are MIB,
6812 MBB, BBB, MMB, and MFB. We don't handle anything other
6813 than M and B slots because these are the only kind of
6814 instructions that can have the IA64_OPCODE_LAST bit set. */
6815 required_template
= template;
6816 switch (idesc
->type
)
6820 required_template
= 5;
6828 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6829 _("Internal error: don't know how to force %s to end of instruction group"),
6835 && (i
> required_slot
6836 || (required_slot
== 2 && !manual_bundling_off
)
6837 || (user_template
>= 0
6838 /* Changing from MMI to M;MI is OK. */
6839 && (template ^ required_template
) > 1)))
6841 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6842 _("`%s' must be last in instruction group"),
6844 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6845 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6847 if (required_slot
< i
)
6848 /* Can't fit this instruction. */
6852 if (required_template
!= template)
6854 /* If we switch the template, we need to reset the NOPs
6855 after slot i. The slot-types of the instructions ahead
6856 of i never change, so we don't need to worry about
6857 changing NOPs in front of this slot. */
6858 for (j
= i
; j
< 3; ++j
)
6859 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6861 /* We just picked a template that includes the stop bit in the
6862 middle, so we don't need another one emitted later. */
6863 md
.slot
[curr
].end_of_insn_group
= 0;
6865 template = required_template
;
6867 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6869 if (manual_bundling
)
6871 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6872 _("Label must be first in a bundle"));
6873 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6875 /* This insn must go into the first slot of a bundle. */
6879 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6881 /* We need an instruction group boundary in the middle of a
6882 bundle. See if we can switch to an other template with
6883 an appropriate boundary. */
6885 orig_template
= template;
6886 if (i
== 1 && (user_template
== 4
6887 || (user_template
< 0
6888 && (ia64_templ_desc
[template].exec_unit
[0]
6892 end_of_insn_group
= 0;
6894 else if (i
== 2 && (user_template
== 0
6895 || (user_template
< 0
6896 && (ia64_templ_desc
[template].exec_unit
[1]
6898 /* This test makes sure we don't switch the template if
6899 the next instruction is one that needs to be first in
6900 an instruction group. Since all those instructions are
6901 in the M group, there is no way such an instruction can
6902 fit in this bundle even if we switch the template. The
6903 reason we have to check for this is that otherwise we
6904 may end up generating "MI;;I M.." which has the deadly
6905 effect that the second M instruction is no longer the
6906 first in the group! --davidm 99/12/16 */
6907 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6910 end_of_insn_group
= 0;
6913 && user_template
== 0
6914 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6915 /* Use the next slot. */
6917 else if (curr
!= first
)
6918 /* can't fit this insn */
6921 if (template != orig_template
)
6922 /* if we switch the template, we need to reset the NOPs
6923 after slot i. The slot-types of the instructions ahead
6924 of i never change, so we don't need to worry about
6925 changing NOPs in front of this slot. */
6926 for (j
= i
; j
< 3; ++j
)
6927 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6929 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6931 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6932 if (idesc
->type
== IA64_TYPE_DYN
)
6934 enum ia64_opnd opnd1
, opnd2
;
6936 if ((strcmp (idesc
->name
, "nop") == 0)
6937 || (strcmp (idesc
->name
, "break") == 0))
6938 insn_unit
= required_unit
;
6939 else if (strcmp (idesc
->name
, "hint") == 0)
6941 insn_unit
= required_unit
;
6942 if (required_unit
== IA64_UNIT_B
)
6948 case hint_b_warning
:
6949 as_warn (_("hint in B unit may be treated as nop"));
6952 /* When manual bundling is off and there is no
6953 user template, we choose a different unit so
6954 that hint won't go into the current slot. We
6955 will fill the current bundle with nops and
6956 try to put hint into the next bundle. */
6957 if (!manual_bundling
&& user_template
< 0)
6958 insn_unit
= IA64_UNIT_I
;
6960 as_bad (_("hint in B unit can't be used"));
6965 else if (strcmp (idesc
->name
, "chk.s") == 0
6966 || strcmp (idesc
->name
, "mov") == 0)
6968 insn_unit
= IA64_UNIT_M
;
6969 if (required_unit
== IA64_UNIT_I
6970 || (required_unit
== IA64_UNIT_F
&& template == 6))
6971 insn_unit
= IA64_UNIT_I
;
6974 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6976 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6977 idesc
->name
, "?imbfxx"[insn_unit
]);
6978 opnd1
= idesc
->operands
[0];
6979 opnd2
= idesc
->operands
[1];
6980 ia64_free_opcode (idesc
);
6981 idesc
= ia64_find_opcode (mnemonic
);
6982 /* moves to/from ARs have collisions */
6983 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6985 while (idesc
!= NULL
6986 && (idesc
->operands
[0] != opnd1
6987 || idesc
->operands
[1] != opnd2
))
6988 idesc
= get_next_opcode (idesc
);
6990 md
.slot
[curr
].idesc
= idesc
;
6994 insn_type
= idesc
->type
;
6995 insn_unit
= IA64_UNIT_NIL
;
6999 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
7000 insn_unit
= required_unit
;
7002 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
7003 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
7004 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
7005 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
7006 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
7011 if (insn_unit
!= required_unit
)
7012 continue; /* Try next slot. */
7014 /* Now is a good time to fix up the labels for this insn. */
7016 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
7018 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
7019 symbol_set_frag (lfix
->sym
, frag_now
);
7020 mark_label
|= lfix
->dw2_mark_labels
;
7022 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
7024 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
7025 symbol_set_frag (lfix
->sym
, frag_now
);
7028 if (debug_type
== DEBUG_DWARF2
7029 || md
.slot
[curr
].loc_directive_seen
7032 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
7034 md
.slot
[curr
].loc_directive_seen
= 0;
7036 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
7038 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
7041 build_insn (md
.slot
+ curr
, insn
+ i
);
7043 ptr
= md
.slot
[curr
].unwind_record
;
7046 /* Set slot numbers for all remaining unwind records belonging to the
7047 current insn. There can not be any prologue/body unwind records
7049 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
7051 ptr
->slot_number
= (unsigned long) f
+ i
;
7052 ptr
->slot_frag
= frag_now
;
7054 md
.slot
[curr
].unwind_record
= NULL
;
7057 if (required_unit
== IA64_UNIT_L
)
7060 /* skip one slot for long/X-unit instructions */
7063 --md
.num_slots_in_use
;
7066 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
7068 ifix
= md
.slot
[curr
].fixup
+ j
;
7069 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
7070 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
7071 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
7072 fix
->fx_file
= md
.slot
[curr
].src_file
;
7073 fix
->fx_line
= md
.slot
[curr
].src_line
;
7076 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
7079 ia64_free_opcode (md
.slot
[curr
].idesc
);
7080 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7081 md
.slot
[curr
].user_template
= -1;
7083 if (manual_bundling_off
)
7085 manual_bundling
= 0;
7088 curr
= (curr
+ 1) % NUM_SLOTS
;
7089 idesc
= md
.slot
[curr
].idesc
;
7092 /* A user template was specified, but the first following instruction did
7093 not fit. This can happen with or without manual bundling. */
7094 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
7096 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7097 _("`%s' does not fit into %s template"),
7098 idesc
->name
, ia64_templ_desc
[template].name
);
7099 /* Drop first insn so we don't livelock. */
7100 --md
.num_slots_in_use
;
7101 know (curr
== first
);
7102 ia64_free_opcode (md
.slot
[curr
].idesc
);
7103 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7104 md
.slot
[curr
].user_template
= -1;
7106 else if (manual_bundling
> 0)
7108 if (md
.num_slots_in_use
> 0)
7111 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7112 _("`%s' does not fit into bundle"), idesc
->name
);
7119 else if (last_slot
== 0)
7120 where
= "slots 2 or 3";
7123 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7124 _("`%s' can't go in %s of %s template"),
7125 idesc
->name
, where
, ia64_templ_desc
[template].name
);
7129 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7130 _("Missing '}' at end of file"));
7133 know (md
.num_slots_in_use
< NUM_SLOTS
);
7135 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
7136 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7138 number_to_chars_littleendian (f
+ 0, t0
, 8);
7139 number_to_chars_littleendian (f
+ 8, t1
, 8);
7143 md_parse_option (c
, arg
)
7150 /* Switches from the Intel assembler. */
7152 if (strcmp (arg
, "ilp64") == 0
7153 || strcmp (arg
, "lp64") == 0
7154 || strcmp (arg
, "p64") == 0)
7156 md
.flags
|= EF_IA_64_ABI64
;
7158 else if (strcmp (arg
, "ilp32") == 0)
7160 md
.flags
&= ~EF_IA_64_ABI64
;
7162 else if (strcmp (arg
, "le") == 0)
7164 md
.flags
&= ~EF_IA_64_BE
;
7165 default_big_endian
= 0;
7167 else if (strcmp (arg
, "be") == 0)
7169 md
.flags
|= EF_IA_64_BE
;
7170 default_big_endian
= 1;
7172 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7175 if (strcmp (arg
, "warning") == 0)
7176 md
.unwind_check
= unwind_check_warning
;
7177 else if (strcmp (arg
, "error") == 0)
7178 md
.unwind_check
= unwind_check_error
;
7182 else if (strncmp (arg
, "hint.b=", 7) == 0)
7185 if (strcmp (arg
, "ok") == 0)
7186 md
.hint_b
= hint_b_ok
;
7187 else if (strcmp (arg
, "warning") == 0)
7188 md
.hint_b
= hint_b_warning
;
7189 else if (strcmp (arg
, "error") == 0)
7190 md
.hint_b
= hint_b_error
;
7194 else if (strncmp (arg
, "tune=", 5) == 0)
7197 if (strcmp (arg
, "itanium1") == 0)
7199 else if (strcmp (arg
, "itanium2") == 0)
7209 if (strcmp (arg
, "so") == 0)
7211 /* Suppress signon message. */
7213 else if (strcmp (arg
, "pi") == 0)
7215 /* Reject privileged instructions. FIXME */
7217 else if (strcmp (arg
, "us") == 0)
7219 /* Allow union of signed and unsigned range. FIXME */
7221 else if (strcmp (arg
, "close_fcalls") == 0)
7223 /* Do not resolve global function calls. */
7230 /* temp[="prefix"] Insert temporary labels into the object file
7231 symbol table prefixed by "prefix".
7232 Default prefix is ":temp:".
7237 /* indirect=<tgt> Assume unannotated indirect branches behavior
7238 according to <tgt> --
7239 exit: branch out from the current context (default)
7240 labels: all labels in context may be branch targets
7242 if (strncmp (arg
, "indirect=", 9) != 0)
7247 /* -X conflicts with an ignored option, use -x instead */
7249 if (!arg
|| strcmp (arg
, "explicit") == 0)
7251 /* set default mode to explicit */
7252 md
.default_explicit_mode
= 1;
7255 else if (strcmp (arg
, "auto") == 0)
7257 md
.default_explicit_mode
= 0;
7259 else if (strcmp (arg
, "none") == 0)
7263 else if (strcmp (arg
, "debug") == 0)
7267 else if (strcmp (arg
, "debugx") == 0)
7269 md
.default_explicit_mode
= 1;
7272 else if (strcmp (arg
, "debugn") == 0)
7279 as_bad (_("Unrecognized option '-x%s'"), arg
);
7284 /* nops Print nops statistics. */
7287 /* GNU specific switches for gcc. */
7288 case OPTION_MCONSTANT_GP
:
7289 md
.flags
|= EF_IA_64_CONS_GP
;
7292 case OPTION_MAUTO_PIC
:
7293 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7304 md_show_usage (stream
)
7309 --mconstant-gp mark output file as using the constant-GP model\n\
7310 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7311 --mauto-pic mark output file as using the constant-GP model\n\
7312 without function descriptors (sets ELF header flag\n\
7313 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7314 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7315 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7316 -mtune=[itanium1|itanium2]\n\
7317 tune for a specific CPU (default -mtune=itanium2)\n\
7318 -munwind-check=[warning|error]\n\
7319 unwind directive check (default -munwind-check=warning)\n\
7320 -mhint.b=[ok|warning|error]\n\
7321 hint.b check (default -mhint.b=error)\n\
7322 -x | -xexplicit turn on dependency violation checking\n\
7323 -xauto automagically remove dependency violations (default)\n\
7324 -xnone turn off dependency violation checking\n\
7325 -xdebug debug dependency violation checker\n\
7326 -xdebugn debug dependency violation checker but turn off\n\
7327 dependency violation checking\n\
7328 -xdebugx debug dependency violation checker and turn on\n\
7329 dependency violation checking\n"),
7334 ia64_after_parse_args ()
7336 if (debug_type
== DEBUG_STABS
)
7337 as_fatal (_("--gstabs is not supported for ia64"));
7340 /* Return true if TYPE fits in TEMPL at SLOT. */
7343 match (int templ
, int type
, int slot
)
7345 enum ia64_unit unit
;
7348 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7351 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7353 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7355 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7356 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7357 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7358 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7359 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7360 default: result
= 0; break;
7365 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7366 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7367 type M or I would fit in TEMPL at SLOT. */
7370 extra_goodness (int templ
, int slot
)
7375 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7377 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7383 if (match (templ
, IA64_TYPE_M
, slot
)
7384 || match (templ
, IA64_TYPE_I
, slot
))
7385 /* Favor M- and I-unit NOPs. We definitely want to avoid
7386 F-unit and B-unit may cause split-issue or less-than-optimal
7387 branch-prediction. */
7398 /* This function is called once, at assembler startup time. It sets
7399 up all the tables, etc. that the MD part of the assembler will need
7400 that can be determined before arguments are parsed. */
7404 int i
, j
, k
, t
, goodness
, best
, ok
;
7409 md
.explicit_mode
= md
.default_explicit_mode
;
7411 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7413 /* Make sure function pointers get initialized. */
7414 target_big_endian
= -1;
7415 dot_byteorder (default_big_endian
);
7417 alias_hash
= hash_new ();
7418 alias_name_hash
= hash_new ();
7419 secalias_hash
= hash_new ();
7420 secalias_name_hash
= hash_new ();
7422 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7423 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7424 &zero_address_frag
);
7426 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7427 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7428 &zero_address_frag
);
7430 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7431 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7432 &zero_address_frag
);
7434 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7435 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7436 &zero_address_frag
);
7438 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7439 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7440 &zero_address_frag
);
7442 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7443 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7444 &zero_address_frag
);
7446 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7447 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7448 &zero_address_frag
);
7450 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7451 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7452 &zero_address_frag
);
7454 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7455 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7456 &zero_address_frag
);
7458 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7459 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7460 &zero_address_frag
);
7462 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7463 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7464 &zero_address_frag
);
7466 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7467 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7468 &zero_address_frag
);
7470 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7471 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7472 &zero_address_frag
);
7474 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7475 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7476 &zero_address_frag
);
7478 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7479 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7480 &zero_address_frag
);
7482 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7483 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7484 &zero_address_frag
);
7486 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7487 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7488 &zero_address_frag
);
7490 if (md
.tune
!= itanium1
)
7492 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7494 le_nop_stop
[0] = 0x9;
7497 /* Compute the table of best templates. We compute goodness as a
7498 base 4 value, in which each match counts for 3. Match-failures
7499 result in NOPs and we use extra_goodness() to pick the execution
7500 units that are best suited for issuing the NOP. */
7501 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7502 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7503 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7506 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7509 if (match (t
, i
, 0))
7511 if (match (t
, j
, 1))
7513 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7514 goodness
= 3 + 3 + 3;
7516 goodness
= 3 + 3 + extra_goodness (t
, 2);
7518 else if (match (t
, j
, 2))
7519 goodness
= 3 + 3 + extra_goodness (t
, 1);
7523 goodness
+= extra_goodness (t
, 1);
7524 goodness
+= extra_goodness (t
, 2);
7527 else if (match (t
, i
, 1))
7529 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7532 goodness
= 3 + extra_goodness (t
, 2);
7534 else if (match (t
, i
, 2))
7535 goodness
= 3 + extra_goodness (t
, 1);
7537 if (goodness
> best
)
7540 best_template
[i
][j
][k
] = t
;
7545 #ifdef DEBUG_TEMPLATES
7546 /* For debugging changes to the best_template calculations. We don't care
7547 about combinations with invalid instructions, so start the loops at 1. */
7548 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7549 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7550 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7552 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7554 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7556 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7560 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7561 md
.slot
[i
].user_template
= -1;
7563 md
.pseudo_hash
= hash_new ();
7564 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7566 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7567 (void *) (pseudo_opcode
+ i
));
7569 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7570 pseudo_opcode
[i
].name
, err
);
7573 md
.reg_hash
= hash_new ();
7574 md
.dynreg_hash
= hash_new ();
7575 md
.const_hash
= hash_new ();
7576 md
.entry_hash
= hash_new ();
7578 /* general registers: */
7579 declare_register_set ("r", 128, REG_GR
);
7580 declare_register ("gp", REG_GR
+ 1);
7581 declare_register ("sp", REG_GR
+ 12);
7582 declare_register ("tp", REG_GR
+ 13);
7583 declare_register_set ("ret", 4, REG_GR
+ 8);
7585 /* floating point registers: */
7586 declare_register_set ("f", 128, REG_FR
);
7587 declare_register_set ("farg", 8, REG_FR
+ 8);
7588 declare_register_set ("fret", 8, REG_FR
+ 8);
7590 /* branch registers: */
7591 declare_register_set ("b", 8, REG_BR
);
7592 declare_register ("rp", REG_BR
+ 0);
7594 /* predicate registers: */
7595 declare_register_set ("p", 64, REG_P
);
7596 declare_register ("pr", REG_PR
);
7597 declare_register ("pr.rot", REG_PR_ROT
);
7599 /* application registers: */
7600 declare_register_set ("ar", 128, REG_AR
);
7601 for (i
= 0; i
< NELEMS (ar
); ++i
)
7602 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7604 /* control registers: */
7605 declare_register_set ("cr", 128, REG_CR
);
7606 for (i
= 0; i
< NELEMS (cr
); ++i
)
7607 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7609 declare_register ("ip", REG_IP
);
7610 declare_register ("cfm", REG_CFM
);
7611 declare_register ("psr", REG_PSR
);
7612 declare_register ("psr.l", REG_PSR_L
);
7613 declare_register ("psr.um", REG_PSR_UM
);
7615 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7617 unsigned int regnum
= indirect_reg
[i
].regnum
;
7619 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7622 /* pseudo-registers used to specify unwind info: */
7623 declare_register ("psp", REG_PSP
);
7625 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7627 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7628 (PTR
) (const_bits
+ i
));
7630 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7634 /* Set the architecture and machine depending on defaults and command line
7636 if (md
.flags
& EF_IA_64_ABI64
)
7637 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7639 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7642 as_warn (_("Could not set architecture and machine"));
7644 /* Set the pointer size and pointer shift size depending on md.flags */
7646 if (md
.flags
& EF_IA_64_ABI64
)
7648 md
.pointer_size
= 8; /* pointers are 8 bytes */
7649 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7653 md
.pointer_size
= 4; /* pointers are 4 bytes */
7654 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7657 md
.mem_offset
.hint
= 0;
7660 md
.entry_labels
= NULL
;
7663 /* Set the default options in md. Cannot do this in md_begin because
7664 that is called after md_parse_option which is where we set the
7665 options in md based on command line options. */
7668 ia64_init (argc
, argv
)
7669 int argc ATTRIBUTE_UNUSED
;
7670 char **argv ATTRIBUTE_UNUSED
;
7672 md
.flags
= MD_FLAGS_DEFAULT
;
7674 /* FIXME: We should change it to unwind_check_error someday. */
7675 md
.unwind_check
= unwind_check_warning
;
7676 md
.hint_b
= hint_b_error
;
7680 /* Return a string for the target object file format. */
7683 ia64_target_format ()
7685 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7687 if (md
.flags
& EF_IA_64_BE
)
7689 if (md
.flags
& EF_IA_64_ABI64
)
7690 #if defined(TE_AIX50)
7691 return "elf64-ia64-aix-big";
7692 #elif defined(TE_HPUX)
7693 return "elf64-ia64-hpux-big";
7695 return "elf64-ia64-big";
7698 #if defined(TE_AIX50)
7699 return "elf32-ia64-aix-big";
7700 #elif defined(TE_HPUX)
7701 return "elf32-ia64-hpux-big";
7703 return "elf32-ia64-big";
7708 if (md
.flags
& EF_IA_64_ABI64
)
7710 return "elf64-ia64-aix-little";
7712 return "elf64-ia64-little";
7716 return "elf32-ia64-aix-little";
7718 return "elf32-ia64-little";
7723 return "unknown-format";
7727 ia64_end_of_source ()
7729 /* terminate insn group upon reaching end of file: */
7730 insn_group_break (1, 0, 0);
7732 /* emits slots we haven't written yet: */
7733 ia64_flush_insns ();
7735 bfd_set_private_flags (stdoutput
, md
.flags
);
7737 md
.mem_offset
.hint
= 0;
7746 /* Make sure we don't reference input_line_pointer[-1] when that's
7752 if (md
.qp
.X_op
== O_register
)
7753 as_bad (_("qualifying predicate not followed by instruction"));
7754 md
.qp
.X_op
= O_absent
;
7756 if (ignore_input ())
7759 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7761 if (md
.detect_dv
&& !md
.explicit_mode
)
7768 as_warn (_("Explicit stops are ignored in auto mode"));
7772 insn_group_break (1, 0, 0);
7774 else if (input_line_pointer
[-1] == '{')
7776 if (md
.manual_bundling
)
7777 as_warn (_("Found '{' when manual bundling is already turned on"));
7779 CURR_SLOT
.manual_bundling_on
= 1;
7780 md
.manual_bundling
= 1;
7782 /* Bundling is only acceptable in explicit mode
7783 or when in default automatic mode. */
7784 if (md
.detect_dv
&& !md
.explicit_mode
)
7786 if (!md
.mode_explicitly_set
7787 && !md
.default_explicit_mode
)
7790 as_warn (_("Found '{' after explicit switch to automatic mode"));
7793 else if (input_line_pointer
[-1] == '}')
7795 if (!md
.manual_bundling
)
7796 as_warn (_("Found '}' when manual bundling is off"));
7798 PREV_SLOT
.manual_bundling_off
= 1;
7799 md
.manual_bundling
= 0;
7801 /* switch back to automatic mode, if applicable */
7804 && !md
.mode_explicitly_set
7805 && !md
.default_explicit_mode
)
7810 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7812 static int defining_tag
= 0;
7815 ia64_unrecognized_line (ch
)
7821 expression_and_evaluate (&md
.qp
);
7822 if (*input_line_pointer
++ != ')')
7824 as_bad (_("Expected ')'"));
7827 if (md
.qp
.X_op
!= O_register
)
7829 as_bad (_("Qualifying predicate expected"));
7832 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7834 as_bad (_("Predicate register expected"));
7846 if (md
.qp
.X_op
== O_register
)
7848 as_bad (_("Tag must come before qualifying predicate."));
7852 /* This implements just enough of read_a_source_file in read.c to
7853 recognize labels. */
7854 if (is_name_beginner (*input_line_pointer
))
7856 s
= input_line_pointer
;
7857 c
= get_symbol_end ();
7859 else if (LOCAL_LABELS_FB
7860 && ISDIGIT (*input_line_pointer
))
7863 while (ISDIGIT (*input_line_pointer
))
7864 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7865 fb_label_instance_inc (temp
);
7866 s
= fb_label_name (temp
, 0);
7867 c
= *input_line_pointer
;
7876 /* Put ':' back for error messages' sake. */
7877 *input_line_pointer
++ = ':';
7878 as_bad (_("Expected ':'"));
7885 /* Put ':' back for error messages' sake. */
7886 *input_line_pointer
++ = ':';
7887 if (*input_line_pointer
++ != ']')
7889 as_bad (_("Expected ']'"));
7894 as_bad (_("Tag name expected"));
7904 /* Not a valid line. */
7909 ia64_frob_label (sym
)
7912 struct label_fix
*fix
;
7914 /* Tags need special handling since they are not bundle breaks like
7918 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7920 fix
->next
= CURR_SLOT
.tag_fixups
;
7921 fix
->dw2_mark_labels
= FALSE
;
7922 CURR_SLOT
.tag_fixups
= fix
;
7927 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7929 md
.last_text_seg
= now_seg
;
7930 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7932 fix
->next
= CURR_SLOT
.label_fixups
;
7933 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7934 CURR_SLOT
.label_fixups
= fix
;
7936 /* Keep track of how many code entry points we've seen. */
7937 if (md
.path
== md
.maxpaths
)
7940 md
.entry_labels
= (const char **)
7941 xrealloc ((void *) md
.entry_labels
,
7942 md
.maxpaths
* sizeof (char *));
7944 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7949 /* The HP-UX linker will give unresolved symbol errors for symbols
7950 that are declared but unused. This routine removes declared,
7951 unused symbols from an object. */
7953 ia64_frob_symbol (sym
)
7956 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7957 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7958 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7959 && ! S_IS_EXTERNAL (sym
)))
7966 ia64_flush_pending_output ()
7968 if (!md
.keep_pending_output
7969 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7971 /* ??? This causes many unnecessary stop bits to be emitted.
7972 Unfortunately, it isn't clear if it is safe to remove this. */
7973 insn_group_break (1, 0, 0);
7974 ia64_flush_insns ();
7978 /* Do ia64-specific expression optimization. All that's done here is
7979 to transform index expressions that are either due to the indexing
7980 of rotating registers or due to the indexing of indirect register
7983 ia64_optimize_expr (l
, op
, r
)
7990 resolve_expression (l
);
7991 if (l
->X_op
== O_register
)
7993 unsigned num_regs
= l
->X_add_number
>> 16;
7995 resolve_expression (r
);
7998 /* Left side is a .rotX-allocated register. */
7999 if (r
->X_op
!= O_constant
)
8001 as_bad (_("Rotating register index must be a non-negative constant"));
8002 r
->X_add_number
= 0;
8004 else if ((valueT
) r
->X_add_number
>= num_regs
)
8006 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
8007 r
->X_add_number
= 0;
8009 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
8012 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
8014 if (r
->X_op
!= O_register
8015 || r
->X_add_number
< REG_GR
8016 || r
->X_add_number
> REG_GR
+ 127)
8018 as_bad (_("Indirect register index must be a general register"));
8019 r
->X_add_number
= REG_GR
;
8022 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
8023 l
->X_add_number
= r
->X_add_number
;
8027 as_bad (_("Index can only be applied to rotating or indirect registers"));
8028 /* Fall back to some register use of which has as little as possible
8029 side effects, to minimize subsequent error messages. */
8030 l
->X_op
= O_register
;
8031 l
->X_add_number
= REG_GR
+ 3;
8036 ia64_parse_name (name
, e
, nextcharP
)
8041 struct const_desc
*cdesc
;
8042 struct dynreg
*dr
= 0;
8049 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
8051 /* Find what relocation pseudo-function we're dealing with. */
8052 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
8053 if (pseudo_func
[idx
].name
8054 && pseudo_func
[idx
].name
[0] == name
[1]
8055 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
8057 pseudo_type
= pseudo_func
[idx
].type
;
8060 switch (pseudo_type
)
8062 case PSEUDO_FUNC_RELOC
:
8063 end
= input_line_pointer
;
8064 if (*nextcharP
!= '(')
8066 as_bad (_("Expected '('"));
8070 ++input_line_pointer
;
8072 if (*input_line_pointer
!= ')')
8074 as_bad (_("Missing ')'"));
8078 ++input_line_pointer
;
8079 if (e
->X_op
!= O_symbol
)
8081 if (e
->X_op
!= O_pseudo_fixup
)
8083 as_bad (_("Not a symbolic expression"));
8086 if (idx
!= FUNC_LT_RELATIVE
)
8088 as_bad (_("Illegal combination of relocation functions"));
8091 switch (S_GET_VALUE (e
->X_op_symbol
))
8093 case FUNC_FPTR_RELATIVE
:
8094 idx
= FUNC_LT_FPTR_RELATIVE
; break;
8095 case FUNC_DTP_MODULE
:
8096 idx
= FUNC_LT_DTP_MODULE
; break;
8097 case FUNC_DTP_RELATIVE
:
8098 idx
= FUNC_LT_DTP_RELATIVE
; break;
8099 case FUNC_TP_RELATIVE
:
8100 idx
= FUNC_LT_TP_RELATIVE
; break;
8102 as_bad (_("Illegal combination of relocation functions"));
8106 /* Make sure gas doesn't get rid of local symbols that are used
8108 e
->X_op
= O_pseudo_fixup
;
8109 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8111 *nextcharP
= *input_line_pointer
;
8114 case PSEUDO_FUNC_CONST
:
8115 e
->X_op
= O_constant
;
8116 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8119 case PSEUDO_FUNC_REG
:
8120 e
->X_op
= O_register
;
8121 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8130 /* first see if NAME is a known register name: */
8131 sym
= hash_find (md
.reg_hash
, name
);
8134 e
->X_op
= O_register
;
8135 e
->X_add_number
= S_GET_VALUE (sym
);
8139 cdesc
= hash_find (md
.const_hash
, name
);
8142 e
->X_op
= O_constant
;
8143 e
->X_add_number
= cdesc
->value
;
8147 /* check for inN, locN, or outN: */
8152 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8160 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8168 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8179 /* Ignore register numbers with leading zeroes, except zero itself. */
8180 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8182 unsigned long regnum
;
8184 /* The name is inN, locN, or outN; parse the register number. */
8185 regnum
= strtoul (name
+ idx
, &end
, 10);
8186 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8188 if (regnum
>= dr
->num_regs
)
8191 as_bad (_("No current frame"));
8193 as_bad (_("Register number out of range 0..%u"),
8197 e
->X_op
= O_register
;
8198 e
->X_add_number
= dr
->base
+ regnum
;
8203 end
= alloca (strlen (name
) + 1);
8205 name
= ia64_canonicalize_symbol_name (end
);
8206 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8208 /* We've got ourselves the name of a rotating register set.
8209 Store the base register number in the low 16 bits of
8210 X_add_number and the size of the register set in the top 16
8212 e
->X_op
= O_register
;
8213 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8219 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8222 ia64_canonicalize_symbol_name (name
)
8225 size_t len
= strlen (name
), full
= len
;
8227 while (len
> 0 && name
[len
- 1] == '#')
8232 as_bad (_("Standalone `#' is illegal"));
8234 else if (len
< full
- 1)
8235 as_warn (_("Redundant `#' suffix operators"));
8240 /* Return true if idesc is a conditional branch instruction. This excludes
8241 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8242 because they always read/write resources regardless of the value of the
8243 qualifying predicate. br.ia must always use p0, and hence is always
8244 taken. Thus this function returns true for branches which can fall
8245 through, and which use no resources if they do fall through. */
8248 is_conditional_branch (idesc
)
8249 struct ia64_opcode
*idesc
;
8251 /* br is a conditional branch. Everything that starts with br. except
8252 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8253 Everything that starts with brl is a conditional branch. */
8254 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8255 && (idesc
->name
[2] == '\0'
8256 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8257 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8258 || idesc
->name
[2] == 'l'
8259 /* br.cond, br.call, br.clr */
8260 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8261 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8262 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8265 /* Return whether the given opcode is a taken branch. If there's any doubt,
8269 is_taken_branch (idesc
)
8270 struct ia64_opcode
*idesc
;
8272 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8273 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8276 /* Return whether the given opcode is an interruption or rfi. If there's any
8277 doubt, returns zero. */
8280 is_interruption_or_rfi (idesc
)
8281 struct ia64_opcode
*idesc
;
8283 if (strcmp (idesc
->name
, "rfi") == 0)
8288 /* Returns the index of the given dependency in the opcode's list of chks, or
8289 -1 if there is no dependency. */
8292 depends_on (depind
, idesc
)
8294 struct ia64_opcode
*idesc
;
8297 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8298 for (i
= 0; i
< dep
->nchks
; i
++)
8300 if (depind
== DEP (dep
->chks
[i
]))
8306 /* Determine a set of specific resources used for a particular resource
8307 class. Returns the number of specific resources identified For those
8308 cases which are not determinable statically, the resource returned is
8311 Meanings of value in 'NOTE':
8312 1) only read/write when the register number is explicitly encoded in the
8314 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8315 accesses CFM when qualifying predicate is in the rotating region.
8316 3) general register value is used to specify an indirect register; not
8317 determinable statically.
8318 4) only read the given resource when bits 7:0 of the indirect index
8319 register value does not match the register number of the resource; not
8320 determinable statically.
8321 5) all rules are implementation specific.
8322 6) only when both the index specified by the reader and the index specified
8323 by the writer have the same value in bits 63:61; not determinable
8325 7) only access the specified resource when the corresponding mask bit is
8327 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8328 only read when these insns reference FR2-31
8329 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8330 written when these insns write FR32-127
8331 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8333 11) The target predicates are written independently of PR[qp], but source
8334 registers are only read if PR[qp] is true. Since the state of PR[qp]
8335 cannot statically be determined, all source registers are marked used.
8336 12) This insn only reads the specified predicate register when that
8337 register is the PR[qp].
8338 13) This reference to ld-c only applies to the GR whose value is loaded
8339 with data returned from memory, not the post-incremented address register.
8340 14) The RSE resource includes the implementation-specific RSE internal
8341 state resources. At least one (and possibly more) of these resources are
8342 read by each instruction listed in IC:rse-readers. At least one (and
8343 possibly more) of these resources are written by each insn listed in
8345 15+16) Represents reserved instructions, which the assembler does not
8347 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8348 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8350 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8351 this code; there are no dependency violations based on memory access.
8354 #define MAX_SPECS 256
8359 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8360 const struct ia64_dependency
*dep
;
8361 struct ia64_opcode
*idesc
;
8362 int type
; /* is this a DV chk or a DV reg? */
8363 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8364 int note
; /* resource note for this insn's usage */
8365 int path
; /* which execution path to examine */
8372 if (dep
->mode
== IA64_DV_WAW
8373 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8374 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8377 /* template for any resources we identify */
8378 tmpl
.dependency
= dep
;
8380 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8381 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8382 tmpl
.link_to_qp_branch
= 1;
8383 tmpl
.mem_offset
.hint
= 0;
8384 tmpl
.mem_offset
.offset
= 0;
8385 tmpl
.mem_offset
.base
= 0;
8388 tmpl
.cmp_type
= CMP_NONE
;
8395 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8396 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8397 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8399 /* we don't need to track these */
8400 if (dep
->semantics
== IA64_DVS_NONE
)
8403 switch (dep
->specifier
)
8408 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8410 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8411 if (regno
>= 0 && regno
<= 7)
8413 specs
[count
] = tmpl
;
8414 specs
[count
++].index
= regno
;
8420 for (i
= 0; i
< 8; i
++)
8422 specs
[count
] = tmpl
;
8423 specs
[count
++].index
= i
;
8432 case IA64_RS_AR_UNAT
:
8433 /* This is a mov =AR or mov AR= instruction. */
8434 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8436 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8437 if (regno
== AR_UNAT
)
8439 specs
[count
++] = tmpl
;
8444 /* This is a spill/fill, or other instruction that modifies the
8447 /* Unless we can determine the specific bits used, mark the whole
8448 thing; bits 8:3 of the memory address indicate the bit used in
8449 UNAT. The .mem.offset hint may be used to eliminate a small
8450 subset of conflicts. */
8451 specs
[count
] = tmpl
;
8452 if (md
.mem_offset
.hint
)
8455 fprintf (stderr
, " Using hint for spill/fill\n");
8456 /* The index isn't actually used, just set it to something
8457 approximating the bit index. */
8458 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8459 specs
[count
].mem_offset
.hint
= 1;
8460 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8461 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8465 specs
[count
++].specific
= 0;
8473 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8475 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8476 if ((regno
>= 8 && regno
<= 15)
8477 || (regno
>= 20 && regno
<= 23)
8478 || (regno
>= 31 && regno
<= 39)
8479 || (regno
>= 41 && regno
<= 47)
8480 || (regno
>= 67 && regno
<= 111))
8482 specs
[count
] = tmpl
;
8483 specs
[count
++].index
= regno
;
8496 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8498 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8499 if ((regno
>= 48 && regno
<= 63)
8500 || (regno
>= 112 && regno
<= 127))
8502 specs
[count
] = tmpl
;
8503 specs
[count
++].index
= regno
;
8509 for (i
= 48; i
< 64; i
++)
8511 specs
[count
] = tmpl
;
8512 specs
[count
++].index
= i
;
8514 for (i
= 112; i
< 128; i
++)
8516 specs
[count
] = tmpl
;
8517 specs
[count
++].index
= i
;
8535 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8536 if (idesc
->operands
[i
] == IA64_OPND_B1
8537 || idesc
->operands
[i
] == IA64_OPND_B2
)
8539 specs
[count
] = tmpl
;
8540 specs
[count
++].index
=
8541 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8546 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8547 if (idesc
->operands
[i
] == IA64_OPND_B1
8548 || idesc
->operands
[i
] == IA64_OPND_B2
)
8550 specs
[count
] = tmpl
;
8551 specs
[count
++].index
=
8552 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8558 case IA64_RS_CPUID
: /* four or more registers */
8561 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8563 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8564 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8567 specs
[count
] = tmpl
;
8568 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8572 specs
[count
] = tmpl
;
8573 specs
[count
++].specific
= 0;
8583 case IA64_RS_DBR
: /* four or more registers */
8586 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8588 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8589 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8592 specs
[count
] = tmpl
;
8593 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8597 specs
[count
] = tmpl
;
8598 specs
[count
++].specific
= 0;
8602 else if (note
== 0 && !rsrc_write
)
8604 specs
[count
] = tmpl
;
8605 specs
[count
++].specific
= 0;
8613 case IA64_RS_IBR
: /* four or more registers */
8616 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8618 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8619 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8622 specs
[count
] = tmpl
;
8623 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8627 specs
[count
] = tmpl
;
8628 specs
[count
++].specific
= 0;
8641 /* These are implementation specific. Force all references to
8642 conflict with all other references. */
8643 specs
[count
] = tmpl
;
8644 specs
[count
++].specific
= 0;
8652 case IA64_RS_PKR
: /* 16 or more registers */
8653 if (note
== 3 || note
== 4)
8655 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8657 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8658 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8663 specs
[count
] = tmpl
;
8664 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8667 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8669 /* Uses all registers *except* the one in R3. */
8670 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8672 specs
[count
] = tmpl
;
8673 specs
[count
++].index
= i
;
8679 specs
[count
] = tmpl
;
8680 specs
[count
++].specific
= 0;
8687 specs
[count
] = tmpl
;
8688 specs
[count
++].specific
= 0;
8692 case IA64_RS_PMC
: /* four or more registers */
8695 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8696 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8699 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8701 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8702 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8705 specs
[count
] = tmpl
;
8706 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8710 specs
[count
] = tmpl
;
8711 specs
[count
++].specific
= 0;
8721 case IA64_RS_PMD
: /* four or more registers */
8724 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8726 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8727 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8730 specs
[count
] = tmpl
;
8731 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8735 specs
[count
] = tmpl
;
8736 specs
[count
++].specific
= 0;
8746 case IA64_RS_RR
: /* eight registers */
8749 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8751 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8752 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8755 specs
[count
] = tmpl
;
8756 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8760 specs
[count
] = tmpl
;
8761 specs
[count
++].specific
= 0;
8765 else if (note
== 0 && !rsrc_write
)
8767 specs
[count
] = tmpl
;
8768 specs
[count
++].specific
= 0;
8776 case IA64_RS_CR_IRR
:
8779 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8780 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8782 && idesc
->operands
[1] == IA64_OPND_CR3
8785 for (i
= 0; i
< 4; i
++)
8787 specs
[count
] = tmpl
;
8788 specs
[count
++].index
= CR_IRR0
+ i
;
8794 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8795 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8797 && regno
<= CR_IRR3
)
8799 specs
[count
] = tmpl
;
8800 specs
[count
++].index
= regno
;
8809 case IA64_RS_CR_LRR
:
8816 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8817 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8818 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8820 specs
[count
] = tmpl
;
8821 specs
[count
++].index
= regno
;
8829 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8831 specs
[count
] = tmpl
;
8832 specs
[count
++].index
=
8833 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8848 else if (rsrc_write
)
8850 if (dep
->specifier
== IA64_RS_FRb
8851 && idesc
->operands
[0] == IA64_OPND_F1
)
8853 specs
[count
] = tmpl
;
8854 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8859 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8861 if (idesc
->operands
[i
] == IA64_OPND_F2
8862 || idesc
->operands
[i
] == IA64_OPND_F3
8863 || idesc
->operands
[i
] == IA64_OPND_F4
)
8865 specs
[count
] = tmpl
;
8866 specs
[count
++].index
=
8867 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8876 /* This reference applies only to the GR whose value is loaded with
8877 data returned from memory. */
8878 specs
[count
] = tmpl
;
8879 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8885 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8886 if (idesc
->operands
[i
] == IA64_OPND_R1
8887 || idesc
->operands
[i
] == IA64_OPND_R2
8888 || idesc
->operands
[i
] == IA64_OPND_R3
)
8890 specs
[count
] = tmpl
;
8891 specs
[count
++].index
=
8892 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8894 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8895 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8896 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8898 specs
[count
] = tmpl
;
8899 specs
[count
++].index
=
8900 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8905 /* Look for anything that reads a GR. */
8906 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8908 if (idesc
->operands
[i
] == IA64_OPND_MR3
8909 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8910 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8911 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8912 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8913 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8914 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8915 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8916 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8917 || ((i
>= idesc
->num_outputs
)
8918 && (idesc
->operands
[i
] == IA64_OPND_R1
8919 || idesc
->operands
[i
] == IA64_OPND_R2
8920 || idesc
->operands
[i
] == IA64_OPND_R3
8921 /* addl source register. */
8922 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8924 specs
[count
] = tmpl
;
8925 specs
[count
++].index
=
8926 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8937 /* This is the same as IA64_RS_PRr, except that the register range is
8938 from 1 - 15, and there are no rotating register reads/writes here. */
8942 for (i
= 1; i
< 16; i
++)
8944 specs
[count
] = tmpl
;
8945 specs
[count
++].index
= i
;
8951 /* Mark only those registers indicated by the mask. */
8954 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8955 for (i
= 1; i
< 16; i
++)
8956 if (mask
& ((valueT
) 1 << i
))
8958 specs
[count
] = tmpl
;
8959 specs
[count
++].index
= i
;
8967 else if (note
== 11) /* note 11 implies note 1 as well */
8971 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8973 if (idesc
->operands
[i
] == IA64_OPND_P1
8974 || idesc
->operands
[i
] == IA64_OPND_P2
)
8976 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8977 if (regno
>= 1 && regno
< 16)
8979 specs
[count
] = tmpl
;
8980 specs
[count
++].index
= regno
;
8990 else if (note
== 12)
8992 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8994 specs
[count
] = tmpl
;
8995 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9002 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9003 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9004 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9005 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9007 if ((idesc
->operands
[0] == IA64_OPND_P1
9008 || idesc
->operands
[0] == IA64_OPND_P2
)
9009 && p1
>= 1 && p1
< 16)
9011 specs
[count
] = tmpl
;
9012 specs
[count
].cmp_type
=
9013 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9014 specs
[count
++].index
= p1
;
9016 if ((idesc
->operands
[1] == IA64_OPND_P1
9017 || idesc
->operands
[1] == IA64_OPND_P2
)
9018 && p2
>= 1 && p2
< 16)
9020 specs
[count
] = tmpl
;
9021 specs
[count
].cmp_type
=
9022 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9023 specs
[count
++].index
= p2
;
9028 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
9030 specs
[count
] = tmpl
;
9031 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9033 if (idesc
->operands
[1] == IA64_OPND_PR
)
9035 for (i
= 1; i
< 16; i
++)
9037 specs
[count
] = tmpl
;
9038 specs
[count
++].index
= i
;
9049 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9050 simplified cases of this. */
9054 for (i
= 16; i
< 63; i
++)
9056 specs
[count
] = tmpl
;
9057 specs
[count
++].index
= i
;
9063 /* Mark only those registers indicated by the mask. */
9065 && idesc
->operands
[0] == IA64_OPND_PR
)
9067 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9068 if (mask
& ((valueT
) 1 << 16))
9069 for (i
= 16; i
< 63; i
++)
9071 specs
[count
] = tmpl
;
9072 specs
[count
++].index
= i
;
9076 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9078 for (i
= 16; i
< 63; i
++)
9080 specs
[count
] = tmpl
;
9081 specs
[count
++].index
= i
;
9089 else if (note
== 11) /* note 11 implies note 1 as well */
9093 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9095 if (idesc
->operands
[i
] == IA64_OPND_P1
9096 || idesc
->operands
[i
] == IA64_OPND_P2
)
9098 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9099 if (regno
>= 16 && regno
< 63)
9101 specs
[count
] = tmpl
;
9102 specs
[count
++].index
= regno
;
9112 else if (note
== 12)
9114 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9116 specs
[count
] = tmpl
;
9117 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9124 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9125 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9126 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9127 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9129 if ((idesc
->operands
[0] == IA64_OPND_P1
9130 || idesc
->operands
[0] == IA64_OPND_P2
)
9131 && p1
>= 16 && p1
< 63)
9133 specs
[count
] = tmpl
;
9134 specs
[count
].cmp_type
=
9135 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9136 specs
[count
++].index
= p1
;
9138 if ((idesc
->operands
[1] == IA64_OPND_P1
9139 || idesc
->operands
[1] == IA64_OPND_P2
)
9140 && p2
>= 16 && p2
< 63)
9142 specs
[count
] = tmpl
;
9143 specs
[count
].cmp_type
=
9144 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9145 specs
[count
++].index
= p2
;
9150 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9152 specs
[count
] = tmpl
;
9153 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9155 if (idesc
->operands
[1] == IA64_OPND_PR
)
9157 for (i
= 16; i
< 63; i
++)
9159 specs
[count
] = tmpl
;
9160 specs
[count
++].index
= i
;
9172 /* Verify that the instruction is using the PSR bit indicated in
9176 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9178 if (dep
->regindex
< 6)
9180 specs
[count
++] = tmpl
;
9183 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9185 if (dep
->regindex
< 32
9186 || dep
->regindex
== 35
9187 || dep
->regindex
== 36
9188 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9190 specs
[count
++] = tmpl
;
9193 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9195 if (dep
->regindex
< 32
9196 || dep
->regindex
== 35
9197 || dep
->regindex
== 36
9198 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9200 specs
[count
++] = tmpl
;
9205 /* Several PSR bits have very specific dependencies. */
9206 switch (dep
->regindex
)
9209 specs
[count
++] = tmpl
;
9214 specs
[count
++] = tmpl
;
9218 /* Only certain CR accesses use PSR.ic */
9219 if (idesc
->operands
[0] == IA64_OPND_CR3
9220 || idesc
->operands
[1] == IA64_OPND_CR3
)
9223 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9226 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9241 specs
[count
++] = tmpl
;
9250 specs
[count
++] = tmpl
;
9254 /* Only some AR accesses use cpl */
9255 if (idesc
->operands
[0] == IA64_OPND_AR3
9256 || idesc
->operands
[1] == IA64_OPND_AR3
)
9259 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9262 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9269 && regno
<= AR_K7
))))
9271 specs
[count
++] = tmpl
;
9276 specs
[count
++] = tmpl
;
9286 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9288 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9294 if (mask
& ((valueT
) 1 << dep
->regindex
))
9296 specs
[count
++] = tmpl
;
9301 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9302 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9303 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9304 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9306 if (idesc
->operands
[i
] == IA64_OPND_F1
9307 || idesc
->operands
[i
] == IA64_OPND_F2
9308 || idesc
->operands
[i
] == IA64_OPND_F3
9309 || idesc
->operands
[i
] == IA64_OPND_F4
)
9311 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9312 if (reg
>= min
&& reg
<= max
)
9314 specs
[count
++] = tmpl
;
9321 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9322 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9323 /* mfh is read on writes to FR32-127; mfl is read on writes to
9325 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9327 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9329 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9330 if (reg
>= min
&& reg
<= max
)
9332 specs
[count
++] = tmpl
;
9337 else if (note
== 10)
9339 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9341 if (idesc
->operands
[i
] == IA64_OPND_R1
9342 || idesc
->operands
[i
] == IA64_OPND_R2
9343 || idesc
->operands
[i
] == IA64_OPND_R3
)
9345 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9346 if (regno
>= 16 && regno
<= 31)
9348 specs
[count
++] = tmpl
;
9359 case IA64_RS_AR_FPSR
:
9360 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9362 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9363 if (regno
== AR_FPSR
)
9365 specs
[count
++] = tmpl
;
9370 specs
[count
++] = tmpl
;
9375 /* Handle all AR[REG] resources */
9376 if (note
== 0 || note
== 1)
9378 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9379 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9380 && regno
== dep
->regindex
)
9382 specs
[count
++] = tmpl
;
9384 /* other AR[REG] resources may be affected by AR accesses */
9385 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9388 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9389 switch (dep
->regindex
)
9395 if (regno
== AR_BSPSTORE
)
9397 specs
[count
++] = tmpl
;
9401 (regno
== AR_BSPSTORE
9402 || regno
== AR_RNAT
))
9404 specs
[count
++] = tmpl
;
9409 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9412 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9413 switch (dep
->regindex
)
9418 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9420 specs
[count
++] = tmpl
;
9427 specs
[count
++] = tmpl
;
9437 /* Handle all CR[REG] resources.
9438 ??? FIXME: The rule 17 isn't really handled correctly. */
9439 if (note
== 0 || note
== 1 || note
== 17)
9441 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9443 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9444 if (regno
== dep
->regindex
)
9446 specs
[count
++] = tmpl
;
9448 else if (!rsrc_write
)
9450 /* Reads from CR[IVR] affect other resources. */
9451 if (regno
== CR_IVR
)
9453 if ((dep
->regindex
>= CR_IRR0
9454 && dep
->regindex
<= CR_IRR3
)
9455 || dep
->regindex
== CR_TPR
)
9457 specs
[count
++] = tmpl
;
9464 specs
[count
++] = tmpl
;
9473 case IA64_RS_INSERVICE
:
9474 /* look for write of EOI (67) or read of IVR (65) */
9475 if ((idesc
->operands
[0] == IA64_OPND_CR3
9476 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9477 || (idesc
->operands
[1] == IA64_OPND_CR3
9478 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9480 specs
[count
++] = tmpl
;
9487 specs
[count
++] = tmpl
;
9498 specs
[count
++] = tmpl
;
9502 /* Check if any of the registers accessed are in the rotating region.
9503 mov to/from pr accesses CFM only when qp_regno is in the rotating
9505 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9507 if (idesc
->operands
[i
] == IA64_OPND_R1
9508 || idesc
->operands
[i
] == IA64_OPND_R2
9509 || idesc
->operands
[i
] == IA64_OPND_R3
)
9511 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9512 /* Assumes that md.rot.num_regs is always valid */
9513 if (md
.rot
.num_regs
> 0
9515 && num
< 31 + md
.rot
.num_regs
)
9517 specs
[count
] = tmpl
;
9518 specs
[count
++].specific
= 0;
9521 else if (idesc
->operands
[i
] == IA64_OPND_F1
9522 || idesc
->operands
[i
] == IA64_OPND_F2
9523 || idesc
->operands
[i
] == IA64_OPND_F3
9524 || idesc
->operands
[i
] == IA64_OPND_F4
)
9526 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9529 specs
[count
] = tmpl
;
9530 specs
[count
++].specific
= 0;
9533 else if (idesc
->operands
[i
] == IA64_OPND_P1
9534 || idesc
->operands
[i
] == IA64_OPND_P2
)
9536 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9539 specs
[count
] = tmpl
;
9540 specs
[count
++].specific
= 0;
9544 if (CURR_SLOT
.qp_regno
> 15)
9546 specs
[count
] = tmpl
;
9547 specs
[count
++].specific
= 0;
9552 /* This is the same as IA64_RS_PRr, except simplified to account for
9553 the fact that there is only one register. */
9557 specs
[count
++] = tmpl
;
9562 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9563 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9564 if (mask
& ((valueT
) 1 << 63))
9565 specs
[count
++] = tmpl
;
9567 else if (note
== 11)
9569 if ((idesc
->operands
[0] == IA64_OPND_P1
9570 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9571 || (idesc
->operands
[1] == IA64_OPND_P2
9572 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9574 specs
[count
++] = tmpl
;
9577 else if (note
== 12)
9579 if (CURR_SLOT
.qp_regno
== 63)
9581 specs
[count
++] = tmpl
;
9588 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9589 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9590 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9591 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9594 && (idesc
->operands
[0] == IA64_OPND_P1
9595 || idesc
->operands
[0] == IA64_OPND_P2
))
9597 specs
[count
] = tmpl
;
9598 specs
[count
++].cmp_type
=
9599 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9602 && (idesc
->operands
[1] == IA64_OPND_P1
9603 || idesc
->operands
[1] == IA64_OPND_P2
))
9605 specs
[count
] = tmpl
;
9606 specs
[count
++].cmp_type
=
9607 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9612 if (CURR_SLOT
.qp_regno
== 63)
9614 specs
[count
++] = tmpl
;
9625 /* FIXME we can identify some individual RSE written resources, but RSE
9626 read resources have not yet been completely identified, so for now
9627 treat RSE as a single resource */
9628 if (strncmp (idesc
->name
, "mov", 3) == 0)
9632 if (idesc
->operands
[0] == IA64_OPND_AR3
9633 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9635 specs
[count
++] = tmpl
;
9640 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9642 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9643 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9645 specs
[count
++] = tmpl
;
9648 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9650 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9651 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9652 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9654 specs
[count
++] = tmpl
;
9661 specs
[count
++] = tmpl
;
9666 /* FIXME -- do any of these need to be non-specific? */
9667 specs
[count
++] = tmpl
;
9671 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9678 /* Clear branch flags on marked resources. This breaks the link between the
9679 QP of the marking instruction and a subsequent branch on the same QP. */
9682 clear_qp_branch_flag (mask
)
9686 for (i
= 0; i
< regdepslen
; i
++)
9688 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9689 if ((bit
& mask
) != 0)
9691 regdeps
[i
].link_to_qp_branch
= 0;
9696 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9697 any mutexes which contain one of the PRs and create new ones when
9701 update_qp_mutex (valueT mask
)
9707 while (i
< qp_mutexeslen
)
9709 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9711 /* If it destroys and creates the same mutex, do nothing. */
9712 if (qp_mutexes
[i
].prmask
== mask
9713 && qp_mutexes
[i
].path
== md
.path
)
9724 fprintf (stderr
, " Clearing mutex relation");
9725 print_prmask (qp_mutexes
[i
].prmask
);
9726 fprintf (stderr
, "\n");
9729 /* Deal with the old mutex with more than 3+ PRs only if
9730 the new mutex on the same execution path with it.
9732 FIXME: The 3+ mutex support is incomplete.
9733 dot_pred_rel () may be a better place to fix it. */
9734 if (qp_mutexes
[i
].path
== md
.path
)
9736 /* If it is a proper subset of the mutex, create a
9739 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9742 qp_mutexes
[i
].prmask
&= ~mask
;
9743 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9745 /* Modify the mutex if there are more than one
9753 /* Remove the mutex. */
9754 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9762 add_qp_mutex (mask
);
9767 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9769 Any changes to a PR clears the mutex relations which include that PR. */
9772 clear_qp_mutex (mask
)
9778 while (i
< qp_mutexeslen
)
9780 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9784 fprintf (stderr
, " Clearing mutex relation");
9785 print_prmask (qp_mutexes
[i
].prmask
);
9786 fprintf (stderr
, "\n");
9788 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9795 /* Clear implies relations which contain PRs in the given masks.
9796 P1_MASK indicates the source of the implies relation, while P2_MASK
9797 indicates the implied PR. */
9800 clear_qp_implies (p1_mask
, p2_mask
)
9807 while (i
< qp_implieslen
)
9809 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9810 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9813 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9814 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9815 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9822 /* Add the PRs specified to the list of implied relations. */
9825 add_qp_imply (p1
, p2
)
9832 /* p0 is not meaningful here. */
9833 if (p1
== 0 || p2
== 0)
9839 /* If it exists already, ignore it. */
9840 for (i
= 0; i
< qp_implieslen
; i
++)
9842 if (qp_implies
[i
].p1
== p1
9843 && qp_implies
[i
].p2
== p2
9844 && qp_implies
[i
].path
== md
.path
9845 && !qp_implies
[i
].p2_branched
)
9849 if (qp_implieslen
== qp_impliestotlen
)
9851 qp_impliestotlen
+= 20;
9852 qp_implies
= (struct qp_imply
*)
9853 xrealloc ((void *) qp_implies
,
9854 qp_impliestotlen
* sizeof (struct qp_imply
));
9857 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9858 qp_implies
[qp_implieslen
].p1
= p1
;
9859 qp_implies
[qp_implieslen
].p2
= p2
;
9860 qp_implies
[qp_implieslen
].path
= md
.path
;
9861 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9863 /* Add in the implied transitive relations; for everything that p2 implies,
9864 make p1 imply that, too; for everything that implies p1, make it imply p2
9866 for (i
= 0; i
< qp_implieslen
; i
++)
9868 if (qp_implies
[i
].p1
== p2
)
9869 add_qp_imply (p1
, qp_implies
[i
].p2
);
9870 if (qp_implies
[i
].p2
== p1
)
9871 add_qp_imply (qp_implies
[i
].p1
, p2
);
9873 /* Add in mutex relations implied by this implies relation; for each mutex
9874 relation containing p2, duplicate it and replace p2 with p1. */
9875 bit
= (valueT
) 1 << p1
;
9876 mask
= (valueT
) 1 << p2
;
9877 for (i
= 0; i
< qp_mutexeslen
; i
++)
9879 if (qp_mutexes
[i
].prmask
& mask
)
9880 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9884 /* Add the PRs specified in the mask to the mutex list; this means that only
9885 one of the PRs can be true at any time. PR0 should never be included in
9895 if (qp_mutexeslen
== qp_mutexestotlen
)
9897 qp_mutexestotlen
+= 20;
9898 qp_mutexes
= (struct qpmutex
*)
9899 xrealloc ((void *) qp_mutexes
,
9900 qp_mutexestotlen
* sizeof (struct qpmutex
));
9904 fprintf (stderr
, " Registering mutex on");
9905 print_prmask (mask
);
9906 fprintf (stderr
, "\n");
9908 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9909 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9913 has_suffix_p (name
, suffix
)
9917 size_t namelen
= strlen (name
);
9918 size_t sufflen
= strlen (suffix
);
9920 if (namelen
<= sufflen
)
9922 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9926 clear_register_values ()
9930 fprintf (stderr
, " Clearing register values\n");
9931 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9932 gr_values
[i
].known
= 0;
9935 /* Keep track of register values/changes which affect DV tracking.
9937 optimization note: should add a flag to classes of insns where otherwise we
9938 have to examine a group of strings to identify them. */
9941 note_register_values (idesc
)
9942 struct ia64_opcode
*idesc
;
9944 valueT qp_changemask
= 0;
9947 /* Invalidate values for registers being written to. */
9948 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9950 if (idesc
->operands
[i
] == IA64_OPND_R1
9951 || idesc
->operands
[i
] == IA64_OPND_R2
9952 || idesc
->operands
[i
] == IA64_OPND_R3
)
9954 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9955 if (regno
> 0 && regno
< NELEMS (gr_values
))
9956 gr_values
[regno
].known
= 0;
9958 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9960 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9961 if (regno
> 0 && regno
< 4)
9962 gr_values
[regno
].known
= 0;
9964 else if (idesc
->operands
[i
] == IA64_OPND_P1
9965 || idesc
->operands
[i
] == IA64_OPND_P2
)
9967 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9968 qp_changemask
|= (valueT
) 1 << regno
;
9970 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9972 if (idesc
->operands
[2] & (valueT
) 0x10000)
9973 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9975 qp_changemask
= idesc
->operands
[2];
9978 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9980 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9981 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9983 qp_changemask
= idesc
->operands
[1];
9984 qp_changemask
&= ~(valueT
) 0xFFFF;
9989 /* Always clear qp branch flags on any PR change. */
9990 /* FIXME there may be exceptions for certain compares. */
9991 clear_qp_branch_flag (qp_changemask
);
9993 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9994 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9996 qp_changemask
|= ~(valueT
) 0xFFFF;
9997 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9999 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
10000 gr_values
[i
].known
= 0;
10002 clear_qp_mutex (qp_changemask
);
10003 clear_qp_implies (qp_changemask
, qp_changemask
);
10005 /* After a call, all register values are undefined, except those marked
10007 else if (strncmp (idesc
->name
, "br.call", 6) == 0
10008 || strncmp (idesc
->name
, "brl.call", 7) == 0)
10010 /* FIXME keep GR values which are marked as "safe_across_calls" */
10011 clear_register_values ();
10012 clear_qp_mutex (~qp_safe_across_calls
);
10013 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
10014 clear_qp_branch_flag (~qp_safe_across_calls
);
10016 else if (is_interruption_or_rfi (idesc
)
10017 || is_taken_branch (idesc
))
10019 clear_register_values ();
10020 clear_qp_mutex (~(valueT
) 0);
10021 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
10023 /* Look for mutex and implies relations. */
10024 else if ((idesc
->operands
[0] == IA64_OPND_P1
10025 || idesc
->operands
[0] == IA64_OPND_P2
)
10026 && (idesc
->operands
[1] == IA64_OPND_P1
10027 || idesc
->operands
[1] == IA64_OPND_P2
))
10029 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
10030 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
10031 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
10032 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
10034 /* If both PRs are PR0, we can't really do anything. */
10035 if (p1
== 0 && p2
== 0)
10038 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
10040 /* In general, clear mutexes and implies which include P1 or P2,
10041 with the following exceptions. */
10042 else if (has_suffix_p (idesc
->name
, ".or.andcm")
10043 || has_suffix_p (idesc
->name
, ".and.orcm"))
10045 clear_qp_implies (p2mask
, p1mask
);
10047 else if (has_suffix_p (idesc
->name
, ".andcm")
10048 || has_suffix_p (idesc
->name
, ".and"))
10050 clear_qp_implies (0, p1mask
| p2mask
);
10052 else if (has_suffix_p (idesc
->name
, ".orcm")
10053 || has_suffix_p (idesc
->name
, ".or"))
10055 clear_qp_mutex (p1mask
| p2mask
);
10056 clear_qp_implies (p1mask
| p2mask
, 0);
10062 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
10064 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10065 if (p1
== 0 || p2
== 0)
10066 clear_qp_mutex (p1mask
| p2mask
);
10068 added
= update_qp_mutex (p1mask
| p2mask
);
10070 if (CURR_SLOT
.qp_regno
== 0
10071 || has_suffix_p (idesc
->name
, ".unc"))
10073 if (added
== 0 && p1
&& p2
)
10074 add_qp_mutex (p1mask
| p2mask
);
10075 if (CURR_SLOT
.qp_regno
!= 0)
10078 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
10080 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10085 /* Look for mov imm insns into GRs. */
10086 else if (idesc
->operands
[0] == IA64_OPND_R1
10087 && (idesc
->operands
[1] == IA64_OPND_IMM22
10088 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10089 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10090 && (strcmp (idesc
->name
, "mov") == 0
10091 || strcmp (idesc
->name
, "movl") == 0))
10093 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10094 if (regno
> 0 && regno
< NELEMS (gr_values
))
10096 gr_values
[regno
].known
= 1;
10097 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10098 gr_values
[regno
].path
= md
.path
;
10101 fprintf (stderr
, " Know gr%d = ", regno
);
10102 fprintf_vma (stderr
, gr_values
[regno
].value
);
10103 fputs ("\n", stderr
);
10107 /* Look for dep.z imm insns. */
10108 else if (idesc
->operands
[0] == IA64_OPND_R1
10109 && idesc
->operands
[1] == IA64_OPND_IMM8
10110 && strcmp (idesc
->name
, "dep.z") == 0)
10112 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10113 if (regno
> 0 && regno
< NELEMS (gr_values
))
10115 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10117 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10118 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10119 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10120 gr_values
[regno
].known
= 1;
10121 gr_values
[regno
].value
= value
;
10122 gr_values
[regno
].path
= md
.path
;
10125 fprintf (stderr
, " Know gr%d = ", regno
);
10126 fprintf_vma (stderr
, gr_values
[regno
].value
);
10127 fputs ("\n", stderr
);
10133 clear_qp_mutex (qp_changemask
);
10134 clear_qp_implies (qp_changemask
, qp_changemask
);
10138 /* Return whether the given predicate registers are currently mutex. */
10141 qp_mutex (p1
, p2
, path
)
10151 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10152 for (i
= 0; i
< qp_mutexeslen
; i
++)
10154 if (qp_mutexes
[i
].path
>= path
10155 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10162 /* Return whether the given resource is in the given insn's list of chks
10163 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10167 resources_match (rs
, idesc
, note
, qp_regno
, path
)
10169 struct ia64_opcode
*idesc
;
10174 struct rsrc specs
[MAX_SPECS
];
10177 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10178 we don't need to check. One exception is note 11, which indicates that
10179 target predicates are written regardless of PR[qp]. */
10180 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10184 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10185 while (count
-- > 0)
10187 /* UNAT checking is a bit more specific than other resources */
10188 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10189 && specs
[count
].mem_offset
.hint
10190 && rs
->mem_offset
.hint
)
10192 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10194 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10195 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10202 /* Skip apparent PR write conflicts where both writes are an AND or both
10203 writes are an OR. */
10204 if (rs
->dependency
->specifier
== IA64_RS_PR
10205 || rs
->dependency
->specifier
== IA64_RS_PRr
10206 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10208 if (specs
[count
].cmp_type
!= CMP_NONE
10209 && specs
[count
].cmp_type
== rs
->cmp_type
)
10212 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10213 dv_mode
[rs
->dependency
->mode
],
10214 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10215 specs
[count
].index
: 63);
10220 " %s on parallel compare conflict %s vs %s on PR%d\n",
10221 dv_mode
[rs
->dependency
->mode
],
10222 dv_cmp_type
[rs
->cmp_type
],
10223 dv_cmp_type
[specs
[count
].cmp_type
],
10224 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10225 specs
[count
].index
: 63);
10229 /* If either resource is not specific, conservatively assume a conflict
10231 if (!specs
[count
].specific
|| !rs
->specific
)
10233 else if (specs
[count
].index
== rs
->index
)
10240 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10241 insert a stop to create the break. Update all resource dependencies
10242 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10243 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10244 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10248 insn_group_break (insert_stop
, qp_regno
, save_current
)
10255 if (insert_stop
&& md
.num_slots_in_use
> 0)
10256 PREV_SLOT
.end_of_insn_group
= 1;
10260 fprintf (stderr
, " Insn group break%s",
10261 (insert_stop
? " (w/stop)" : ""));
10263 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10264 fprintf (stderr
, "\n");
10268 while (i
< regdepslen
)
10270 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10273 && regdeps
[i
].qp_regno
!= qp_regno
)
10280 && CURR_SLOT
.src_file
== regdeps
[i
].file
10281 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10287 /* clear dependencies which are automatically cleared by a stop, or
10288 those that have reached the appropriate state of insn serialization */
10289 if (dep
->semantics
== IA64_DVS_IMPLIED
10290 || dep
->semantics
== IA64_DVS_IMPLIEDF
10291 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10293 print_dependency ("Removing", i
);
10294 regdeps
[i
] = regdeps
[--regdepslen
];
10298 if (dep
->semantics
== IA64_DVS_DATA
10299 || dep
->semantics
== IA64_DVS_INSTR
10300 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10302 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10303 regdeps
[i
].insn_srlz
= STATE_STOP
;
10304 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10305 regdeps
[i
].data_srlz
= STATE_STOP
;
10312 /* Add the given resource usage spec to the list of active dependencies. */
10315 mark_resource (idesc
, dep
, spec
, depind
, path
)
10316 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10317 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10322 if (regdepslen
== regdepstotlen
)
10324 regdepstotlen
+= 20;
10325 regdeps
= (struct rsrc
*)
10326 xrealloc ((void *) regdeps
,
10327 regdepstotlen
* sizeof (struct rsrc
));
10330 regdeps
[regdepslen
] = *spec
;
10331 regdeps
[regdepslen
].depind
= depind
;
10332 regdeps
[regdepslen
].path
= path
;
10333 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10334 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10336 print_dependency ("Adding", regdepslen
);
10342 print_dependency (action
, depind
)
10343 const char *action
;
10348 fprintf (stderr
, " %s %s '%s'",
10349 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10350 (regdeps
[depind
].dependency
)->name
);
10351 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10352 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10353 if (regdeps
[depind
].mem_offset
.hint
)
10355 fputs (" ", stderr
);
10356 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10357 fputs ("+", stderr
);
10358 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10360 fprintf (stderr
, "\n");
10365 instruction_serialization ()
10369 fprintf (stderr
, " Instruction serialization\n");
10370 for (i
= 0; i
< regdepslen
; i
++)
10371 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10372 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10376 data_serialization ()
10380 fprintf (stderr
, " Data serialization\n");
10381 while (i
< regdepslen
)
10383 if (regdeps
[i
].data_srlz
== STATE_STOP
10384 /* Note: as of 991210, all "other" dependencies are cleared by a
10385 data serialization. This might change with new tables */
10386 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10388 print_dependency ("Removing", i
);
10389 regdeps
[i
] = regdeps
[--regdepslen
];
10396 /* Insert stops and serializations as needed to avoid DVs. */
10399 remove_marked_resource (rs
)
10402 switch (rs
->dependency
->semantics
)
10404 case IA64_DVS_SPECIFIC
:
10406 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10407 /* ...fall through... */
10408 case IA64_DVS_INSTR
:
10410 fprintf (stderr
, "Inserting instr serialization\n");
10411 if (rs
->insn_srlz
< STATE_STOP
)
10412 insn_group_break (1, 0, 0);
10413 if (rs
->insn_srlz
< STATE_SRLZ
)
10415 struct slot oldslot
= CURR_SLOT
;
10416 /* Manually jam a srlz.i insn into the stream */
10417 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10418 CURR_SLOT
.user_template
= -1;
10419 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10420 instruction_serialization ();
10421 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10422 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10423 emit_one_bundle ();
10424 CURR_SLOT
= oldslot
;
10426 insn_group_break (1, 0, 0);
10428 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10429 "other" types of DV are eliminated
10430 by a data serialization */
10431 case IA64_DVS_DATA
:
10433 fprintf (stderr
, "Inserting data serialization\n");
10434 if (rs
->data_srlz
< STATE_STOP
)
10435 insn_group_break (1, 0, 0);
10437 struct slot oldslot
= CURR_SLOT
;
10438 /* Manually jam a srlz.d insn into the stream */
10439 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10440 CURR_SLOT
.user_template
= -1;
10441 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10442 data_serialization ();
10443 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10444 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10445 emit_one_bundle ();
10446 CURR_SLOT
= oldslot
;
10449 case IA64_DVS_IMPLIED
:
10450 case IA64_DVS_IMPLIEDF
:
10452 fprintf (stderr
, "Inserting stop\n");
10453 insn_group_break (1, 0, 0);
10460 /* Check the resources used by the given opcode against the current dependency
10463 The check is run once for each execution path encountered. In this case,
10464 a unique execution path is the sequence of instructions following a code
10465 entry point, e.g. the following has three execution paths, one starting
10466 at L0, one at L1, and one at L2.
10475 check_dependencies (idesc
)
10476 struct ia64_opcode
*idesc
;
10478 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10482 /* Note that the number of marked resources may change within the
10483 loop if in auto mode. */
10485 while (i
< regdepslen
)
10487 struct rsrc
*rs
= ®deps
[i
];
10488 const struct ia64_dependency
*dep
= rs
->dependency
;
10491 int start_over
= 0;
10493 if (dep
->semantics
== IA64_DVS_NONE
10494 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10500 note
= NOTE (opdeps
->chks
[chkind
]);
10502 /* Check this resource against each execution path seen thus far. */
10503 for (path
= 0; path
<= md
.path
; path
++)
10507 /* If the dependency wasn't on the path being checked, ignore it. */
10508 if (rs
->path
< path
)
10511 /* If the QP for this insn implies a QP which has branched, don't
10512 bother checking. Ed. NOTE: I don't think this check is terribly
10513 useful; what's the point of generating code which will only be
10514 reached if its QP is zero?
10515 This code was specifically inserted to handle the following code,
10516 based on notes from Intel's DV checking code, where p1 implies p2.
10522 if (CURR_SLOT
.qp_regno
!= 0)
10526 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10528 if (qp_implies
[implies
].path
>= path
10529 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10530 && qp_implies
[implies
].p2_branched
)
10540 if ((matchtype
= resources_match (rs
, idesc
, note
,
10541 CURR_SLOT
.qp_regno
, path
)) != 0)
10544 char pathmsg
[256] = "";
10545 char indexmsg
[256] = "";
10546 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10549 snprintf (pathmsg
, sizeof (pathmsg
),
10550 " when entry is at label '%s'",
10551 md
.entry_labels
[path
- 1]);
10552 if (matchtype
== 1 && rs
->index
>= 0)
10553 snprintf (indexmsg
, sizeof (indexmsg
),
10554 ", specific resource number is %d",
10556 snprintf (msg
, sizeof (msg
),
10557 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10559 (certain
? "violates" : "may violate"),
10560 dv_mode
[dep
->mode
], dep
->name
,
10561 dv_sem
[dep
->semantics
],
10562 pathmsg
, indexmsg
);
10564 if (md
.explicit_mode
)
10566 as_warn ("%s", msg
);
10567 if (path
< md
.path
)
10568 as_warn (_("Only the first path encountering the conflict is reported"));
10569 as_warn_where (rs
->file
, rs
->line
,
10570 _("This is the location of the conflicting usage"));
10571 /* Don't bother checking other paths, to avoid duplicating
10572 the same warning */
10578 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10580 remove_marked_resource (rs
);
10582 /* since the set of dependencies has changed, start over */
10583 /* FIXME -- since we're removing dvs as we go, we
10584 probably don't really need to start over... */
10597 /* Register new dependencies based on the given opcode. */
10600 mark_resources (idesc
)
10601 struct ia64_opcode
*idesc
;
10604 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10605 int add_only_qp_reads
= 0;
10607 /* A conditional branch only uses its resources if it is taken; if it is
10608 taken, we stop following that path. The other branch types effectively
10609 *always* write their resources. If it's not taken, register only QP
10611 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10613 add_only_qp_reads
= 1;
10617 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10619 for (i
= 0; i
< opdeps
->nregs
; i
++)
10621 const struct ia64_dependency
*dep
;
10622 struct rsrc specs
[MAX_SPECS
];
10627 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10628 note
= NOTE (opdeps
->regs
[i
]);
10630 if (add_only_qp_reads
10631 && !(dep
->mode
== IA64_DV_WAR
10632 && (dep
->specifier
== IA64_RS_PR
10633 || dep
->specifier
== IA64_RS_PRr
10634 || dep
->specifier
== IA64_RS_PR63
)))
10637 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10639 while (count
-- > 0)
10641 mark_resource (idesc
, dep
, &specs
[count
],
10642 DEP (opdeps
->regs
[i
]), md
.path
);
10645 /* The execution path may affect register values, which may in turn
10646 affect which indirect-access resources are accessed. */
10647 switch (dep
->specifier
)
10651 case IA64_RS_CPUID
:
10659 for (path
= 0; path
< md
.path
; path
++)
10661 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10662 while (count
-- > 0)
10663 mark_resource (idesc
, dep
, &specs
[count
],
10664 DEP (opdeps
->regs
[i
]), path
);
10671 /* Remove dependencies when they no longer apply. */
10674 update_dependencies (idesc
)
10675 struct ia64_opcode
*idesc
;
10679 if (strcmp (idesc
->name
, "srlz.i") == 0)
10681 instruction_serialization ();
10683 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10685 data_serialization ();
10687 else if (is_interruption_or_rfi (idesc
)
10688 || is_taken_branch (idesc
))
10690 /* Although technically the taken branch doesn't clear dependencies
10691 which require a srlz.[id], we don't follow the branch; the next
10692 instruction is assumed to start with a clean slate. */
10696 else if (is_conditional_branch (idesc
)
10697 && CURR_SLOT
.qp_regno
!= 0)
10699 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10701 for (i
= 0; i
< qp_implieslen
; i
++)
10703 /* If the conditional branch's predicate is implied by the predicate
10704 in an existing dependency, remove that dependency. */
10705 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10708 /* Note that this implied predicate takes a branch so that if
10709 a later insn generates a DV but its predicate implies this
10710 one, we can avoid the false DV warning. */
10711 qp_implies
[i
].p2_branched
= 1;
10712 while (depind
< regdepslen
)
10714 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10716 print_dependency ("Removing", depind
);
10717 regdeps
[depind
] = regdeps
[--regdepslen
];
10724 /* Any marked resources which have this same predicate should be
10725 cleared, provided that the QP hasn't been modified between the
10726 marking instruction and the branch. */
10729 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10734 while (i
< regdepslen
)
10736 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10737 && regdeps
[i
].link_to_qp_branch
10738 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10739 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10741 /* Treat like a taken branch */
10742 print_dependency ("Removing", i
);
10743 regdeps
[i
] = regdeps
[--regdepslen
];
10752 /* Examine the current instruction for dependency violations. */
10756 struct ia64_opcode
*idesc
;
10760 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10761 idesc
->name
, CURR_SLOT
.src_line
,
10762 idesc
->dependencies
->nchks
,
10763 idesc
->dependencies
->nregs
);
10766 /* Look through the list of currently marked resources; if the current
10767 instruction has the dependency in its chks list which uses that resource,
10768 check against the specific resources used. */
10769 check_dependencies (idesc
);
10771 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10772 then add them to the list of marked resources. */
10773 mark_resources (idesc
);
10775 /* There are several types of dependency semantics, and each has its own
10776 requirements for being cleared
10778 Instruction serialization (insns separated by interruption, rfi, or
10779 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10781 Data serialization (instruction serialization, or writer + srlz.d +
10782 reader, where writer and srlz.d are in separate groups) clears
10783 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10784 always be the case).
10786 Instruction group break (groups separated by stop, taken branch,
10787 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10789 update_dependencies (idesc
);
10791 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10792 warning. Keep track of as many as possible that are useful. */
10793 note_register_values (idesc
);
10795 /* We don't need or want this anymore. */
10796 md
.mem_offset
.hint
= 0;
10801 /* Translate one line of assembly. Pseudo ops and labels do not show
10807 char *saved_input_line_pointer
, *mnemonic
;
10808 const struct pseudo_opcode
*pdesc
;
10809 struct ia64_opcode
*idesc
;
10810 unsigned char qp_regno
;
10811 unsigned int flags
;
10814 saved_input_line_pointer
= input_line_pointer
;
10815 input_line_pointer
= str
;
10817 /* extract the opcode (mnemonic): */
10819 mnemonic
= input_line_pointer
;
10820 ch
= get_symbol_end ();
10821 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10824 *input_line_pointer
= ch
;
10825 (*pdesc
->handler
) (pdesc
->arg
);
10829 /* Find the instruction descriptor matching the arguments. */
10831 idesc
= ia64_find_opcode (mnemonic
);
10832 *input_line_pointer
= ch
;
10835 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10839 idesc
= parse_operands (idesc
);
10843 /* Handle the dynamic ops we can handle now: */
10844 if (idesc
->type
== IA64_TYPE_DYN
)
10846 if (strcmp (idesc
->name
, "add") == 0)
10848 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10849 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10853 ia64_free_opcode (idesc
);
10854 idesc
= ia64_find_opcode (mnemonic
);
10856 else if (strcmp (idesc
->name
, "mov") == 0)
10858 enum ia64_opnd opnd1
, opnd2
;
10861 opnd1
= idesc
->operands
[0];
10862 opnd2
= idesc
->operands
[1];
10863 if (opnd1
== IA64_OPND_AR3
)
10865 else if (opnd2
== IA64_OPND_AR3
)
10869 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10871 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10872 mnemonic
= "mov.i";
10873 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10874 mnemonic
= "mov.m";
10882 ia64_free_opcode (idesc
);
10883 idesc
= ia64_find_opcode (mnemonic
);
10884 while (idesc
!= NULL
10885 && (idesc
->operands
[0] != opnd1
10886 || idesc
->operands
[1] != opnd2
))
10887 idesc
= get_next_opcode (idesc
);
10891 else if (strcmp (idesc
->name
, "mov.i") == 0
10892 || strcmp (idesc
->name
, "mov.m") == 0)
10894 enum ia64_opnd opnd1
, opnd2
;
10897 opnd1
= idesc
->operands
[0];
10898 opnd2
= idesc
->operands
[1];
10899 if (opnd1
== IA64_OPND_AR3
)
10901 else if (opnd2
== IA64_OPND_AR3
)
10905 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10908 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10910 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10912 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10913 as_bad (_("AR %d can only be accessed by %c-unit"),
10914 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10918 else if (strcmp (idesc
->name
, "hint.b") == 0)
10924 case hint_b_warning
:
10925 as_warn (_("hint.b may be treated as nop"));
10928 as_bad (_("hint.b shouldn't be used"));
10934 if (md
.qp
.X_op
== O_register
)
10936 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10937 md
.qp
.X_op
= O_absent
;
10940 flags
= idesc
->flags
;
10942 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10944 /* The alignment frag has to end with a stop bit only if the
10945 next instruction after the alignment directive has to be
10946 the first instruction in an instruction group. */
10949 while (align_frag
->fr_type
!= rs_align_code
)
10951 align_frag
= align_frag
->fr_next
;
10955 /* align_frag can be NULL if there are directives in
10957 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10958 align_frag
->tc_frag_data
= 1;
10961 insn_group_break (1, 0, 0);
10965 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10967 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10971 /* Build the instruction. */
10972 CURR_SLOT
.qp_regno
= qp_regno
;
10973 CURR_SLOT
.idesc
= idesc
;
10974 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10975 dwarf2_where (&CURR_SLOT
.debug_line
);
10976 dwarf2_consume_line_info ();
10978 /* Add unwind entries, if there are any. */
10979 if (unwind
.current_entry
)
10981 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10982 unwind
.current_entry
= NULL
;
10984 if (unwind
.pending_saves
)
10986 if (unwind
.pending_saves
->next
)
10988 /* Attach the next pending save to the next slot so that its
10989 slot number will get set correctly. */
10990 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10991 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10994 unwind
.pending_saves
= NULL
;
10996 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10999 /* Check for dependency violations. */
11003 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
11004 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
11005 emit_one_bundle ();
11007 if ((flags
& IA64_OPCODE_LAST
) != 0)
11008 insn_group_break (1, 0, 0);
11010 md
.last_text_seg
= now_seg
;
11013 input_line_pointer
= saved_input_line_pointer
;
11016 /* Called when symbol NAME cannot be found in the symbol table.
11017 Should be used for dynamic valued symbols only. */
11020 md_undefined_symbol (name
)
11021 char *name ATTRIBUTE_UNUSED
;
11026 /* Called for any expression that can not be recognized. When the
11027 function is called, `input_line_pointer' will point to the start of
11034 switch (*input_line_pointer
)
11037 ++input_line_pointer
;
11038 expression_and_evaluate (e
);
11039 if (*input_line_pointer
!= ']')
11041 as_bad (_("Closing bracket missing"));
11046 if (e
->X_op
!= O_register
11047 || e
->X_add_number
< REG_GR
11048 || e
->X_add_number
> REG_GR
+ 127)
11050 as_bad (_("Index must be a general register"));
11051 e
->X_add_number
= REG_GR
;
11054 ++input_line_pointer
;
11065 ignore_rest_of_line ();
11068 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11069 a section symbol plus some offset. For relocs involving @fptr(),
11070 directives we don't want such adjustments since we need to have the
11071 original symbol's name in the reloc. */
11073 ia64_fix_adjustable (fix
)
11076 /* Prevent all adjustments to global symbols */
11077 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
11080 switch (fix
->fx_r_type
)
11082 case BFD_RELOC_IA64_FPTR64I
:
11083 case BFD_RELOC_IA64_FPTR32MSB
:
11084 case BFD_RELOC_IA64_FPTR32LSB
:
11085 case BFD_RELOC_IA64_FPTR64MSB
:
11086 case BFD_RELOC_IA64_FPTR64LSB
:
11087 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11088 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11098 ia64_force_relocation (fix
)
11101 switch (fix
->fx_r_type
)
11103 case BFD_RELOC_IA64_FPTR64I
:
11104 case BFD_RELOC_IA64_FPTR32MSB
:
11105 case BFD_RELOC_IA64_FPTR32LSB
:
11106 case BFD_RELOC_IA64_FPTR64MSB
:
11107 case BFD_RELOC_IA64_FPTR64LSB
:
11109 case BFD_RELOC_IA64_LTOFF22
:
11110 case BFD_RELOC_IA64_LTOFF64I
:
11111 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11112 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11113 case BFD_RELOC_IA64_PLTOFF22
:
11114 case BFD_RELOC_IA64_PLTOFF64I
:
11115 case BFD_RELOC_IA64_PLTOFF64MSB
:
11116 case BFD_RELOC_IA64_PLTOFF64LSB
:
11118 case BFD_RELOC_IA64_LTOFF22X
:
11119 case BFD_RELOC_IA64_LDXMOV
:
11126 return generic_force_reloc (fix
);
11129 /* Decide from what point a pc-relative relocation is relative to,
11130 relative to the pc-relative fixup. Er, relatively speaking. */
11132 ia64_pcrel_from_section (fix
, sec
)
11136 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11138 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11145 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11147 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11151 expr
.X_op
= O_pseudo_fixup
;
11152 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11153 expr
.X_add_number
= 0;
11154 expr
.X_add_symbol
= symbol
;
11155 emit_expr (&expr
, size
);
11158 /* This is called whenever some data item (not an instruction) needs a
11159 fixup. We pick the right reloc code depending on the byteorder
11160 currently in effect. */
11162 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
11168 bfd_reloc_code_real_type code
;
11173 /* There are no reloc for 8 and 16 bit quantities, but we allow
11174 them here since they will work fine as long as the expression
11175 is fully defined at the end of the pass over the source file. */
11176 case 1: code
= BFD_RELOC_8
; break;
11177 case 2: code
= BFD_RELOC_16
; break;
11179 if (target_big_endian
)
11180 code
= BFD_RELOC_IA64_DIR32MSB
;
11182 code
= BFD_RELOC_IA64_DIR32LSB
;
11186 /* In 32-bit mode, data8 could mean function descriptors too. */
11187 if (exp
->X_op
== O_pseudo_fixup
11188 && exp
->X_op_symbol
11189 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11190 && !(md
.flags
& EF_IA_64_ABI64
))
11192 if (target_big_endian
)
11193 code
= BFD_RELOC_IA64_IPLTMSB
;
11195 code
= BFD_RELOC_IA64_IPLTLSB
;
11196 exp
->X_op
= O_symbol
;
11201 if (target_big_endian
)
11202 code
= BFD_RELOC_IA64_DIR64MSB
;
11204 code
= BFD_RELOC_IA64_DIR64LSB
;
11209 if (exp
->X_op
== O_pseudo_fixup
11210 && exp
->X_op_symbol
11211 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11213 if (target_big_endian
)
11214 code
= BFD_RELOC_IA64_IPLTMSB
;
11216 code
= BFD_RELOC_IA64_IPLTLSB
;
11217 exp
->X_op
= O_symbol
;
11223 as_bad (_("Unsupported fixup size %d"), nbytes
);
11224 ignore_rest_of_line ();
11228 if (exp
->X_op
== O_pseudo_fixup
)
11230 exp
->X_op
= O_symbol
;
11231 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11232 /* ??? If code unchanged, unsupported. */
11235 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11236 /* We need to store the byte order in effect in case we're going
11237 to fix an 8 or 16 bit relocation (for which there no real
11238 relocs available). See md_apply_fix(). */
11239 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11242 /* Return the actual relocation we wish to associate with the pseudo
11243 reloc described by SYM and R_TYPE. SYM should be one of the
11244 symbols in the pseudo_func array, or NULL. */
11246 static bfd_reloc_code_real_type
11247 ia64_gen_real_reloc_type (sym
, r_type
)
11248 struct symbol
*sym
;
11249 bfd_reloc_code_real_type r_type
;
11251 bfd_reloc_code_real_type
new = 0;
11252 const char *type
= NULL
, *suffix
= "";
11259 switch (S_GET_VALUE (sym
))
11261 case FUNC_FPTR_RELATIVE
:
11264 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11265 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11266 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11267 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11268 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11269 default: type
= "FPTR"; break;
11273 case FUNC_GP_RELATIVE
:
11276 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11277 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11278 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11279 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11280 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11281 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11282 default: type
= "GPREL"; break;
11286 case FUNC_LT_RELATIVE
:
11289 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11290 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11291 default: type
= "LTOFF"; break;
11295 case FUNC_LT_RELATIVE_X
:
11298 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11299 default: type
= "LTOFF"; suffix
= "X"; break;
11303 case FUNC_PC_RELATIVE
:
11306 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11307 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11308 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11309 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11310 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11311 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11312 default: type
= "PCREL"; break;
11316 case FUNC_PLT_RELATIVE
:
11319 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11320 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11321 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11322 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11323 default: type
= "PLTOFF"; break;
11327 case FUNC_SEC_RELATIVE
:
11330 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11331 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11332 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11333 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11334 default: type
= "SECREL"; break;
11338 case FUNC_SEG_RELATIVE
:
11341 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11342 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11343 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11344 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11345 default: type
= "SEGREL"; break;
11349 case FUNC_LTV_RELATIVE
:
11352 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11353 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11354 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11355 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11356 default: type
= "LTV"; break;
11360 case FUNC_LT_FPTR_RELATIVE
:
11363 case BFD_RELOC_IA64_IMM22
:
11364 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11365 case BFD_RELOC_IA64_IMM64
:
11366 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11367 case BFD_RELOC_IA64_DIR32MSB
:
11368 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11369 case BFD_RELOC_IA64_DIR32LSB
:
11370 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11371 case BFD_RELOC_IA64_DIR64MSB
:
11372 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11373 case BFD_RELOC_IA64_DIR64LSB
:
11374 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11376 type
= "LTOFF_FPTR"; break;
11380 case FUNC_TP_RELATIVE
:
11383 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11384 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11385 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11386 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11387 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11388 default: type
= "TPREL"; break;
11392 case FUNC_LT_TP_RELATIVE
:
11395 case BFD_RELOC_IA64_IMM22
:
11396 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11398 type
= "LTOFF_TPREL"; break;
11402 case FUNC_DTP_MODULE
:
11405 case BFD_RELOC_IA64_DIR64MSB
:
11406 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11407 case BFD_RELOC_IA64_DIR64LSB
:
11408 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11410 type
= "DTPMOD"; break;
11414 case FUNC_LT_DTP_MODULE
:
11417 case BFD_RELOC_IA64_IMM22
:
11418 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11420 type
= "LTOFF_DTPMOD"; break;
11424 case FUNC_DTP_RELATIVE
:
11427 case BFD_RELOC_IA64_DIR32MSB
:
11428 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11429 case BFD_RELOC_IA64_DIR32LSB
:
11430 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11431 case BFD_RELOC_IA64_DIR64MSB
:
11432 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11433 case BFD_RELOC_IA64_DIR64LSB
:
11434 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11435 case BFD_RELOC_IA64_IMM14
:
11436 new = BFD_RELOC_IA64_DTPREL14
; break;
11437 case BFD_RELOC_IA64_IMM22
:
11438 new = BFD_RELOC_IA64_DTPREL22
; break;
11439 case BFD_RELOC_IA64_IMM64
:
11440 new = BFD_RELOC_IA64_DTPREL64I
; break;
11442 type
= "DTPREL"; break;
11446 case FUNC_LT_DTP_RELATIVE
:
11449 case BFD_RELOC_IA64_IMM22
:
11450 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11452 type
= "LTOFF_DTPREL"; break;
11456 case FUNC_IPLT_RELOC
:
11459 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11460 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11461 default: type
= "IPLT"; break;
11479 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11480 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11481 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11482 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11483 case BFD_RELOC_UNUSED
: width
= 13; break;
11484 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11485 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11486 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11490 /* This should be an error, but since previously there wasn't any
11491 diagnostic here, don't make it fail because of this for now. */
11492 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11497 /* Here is where generate the appropriate reloc for pseudo relocation
11500 ia64_validate_fix (fix
)
11503 switch (fix
->fx_r_type
)
11505 case BFD_RELOC_IA64_FPTR64I
:
11506 case BFD_RELOC_IA64_FPTR32MSB
:
11507 case BFD_RELOC_IA64_FPTR64LSB
:
11508 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11509 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11510 if (fix
->fx_offset
!= 0)
11511 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11512 _("No addend allowed in @fptr() relocation"));
11520 fix_insn (fix
, odesc
, value
)
11522 const struct ia64_operand
*odesc
;
11525 bfd_vma insn
[3], t0
, t1
, control_bits
;
11530 slot
= fix
->fx_where
& 0x3;
11531 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11533 /* Bundles are always in little-endian byte order */
11534 t0
= bfd_getl64 (fixpos
);
11535 t1
= bfd_getl64 (fixpos
+ 8);
11536 control_bits
= t0
& 0x1f;
11537 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11538 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11539 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11542 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11544 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11545 insn
[2] |= (((value
& 0x7f) << 13)
11546 | (((value
>> 7) & 0x1ff) << 27)
11547 | (((value
>> 16) & 0x1f) << 22)
11548 | (((value
>> 21) & 0x1) << 21)
11549 | (((value
>> 63) & 0x1) << 36));
11551 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11553 if (value
& ~0x3fffffffffffffffULL
)
11554 err
= "integer operand out of range";
11555 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11556 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11558 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11561 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11562 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11563 | (((value
>> 0) & 0xfffff) << 13));
11566 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11569 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11571 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11572 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11573 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11574 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11577 /* Attempt to simplify or even eliminate a fixup. The return value is
11578 ignored; perhaps it was once meaningful, but now it is historical.
11579 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11581 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11585 md_apply_fix (fix
, valP
, seg
)
11588 segT seg ATTRIBUTE_UNUSED
;
11591 valueT value
= *valP
;
11593 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11597 switch (fix
->fx_r_type
)
11599 case BFD_RELOC_IA64_PCREL21B
: break;
11600 case BFD_RELOC_IA64_PCREL21BI
: break;
11601 case BFD_RELOC_IA64_PCREL21F
: break;
11602 case BFD_RELOC_IA64_PCREL21M
: break;
11603 case BFD_RELOC_IA64_PCREL60B
: break;
11604 case BFD_RELOC_IA64_PCREL22
: break;
11605 case BFD_RELOC_IA64_PCREL64I
: break;
11606 case BFD_RELOC_IA64_PCREL32MSB
: break;
11607 case BFD_RELOC_IA64_PCREL32LSB
: break;
11608 case BFD_RELOC_IA64_PCREL64MSB
: break;
11609 case BFD_RELOC_IA64_PCREL64LSB
: break;
11611 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11618 switch (fix
->fx_r_type
)
11620 case BFD_RELOC_UNUSED
:
11621 /* This must be a TAG13 or TAG13b operand. There are no external
11622 relocs defined for them, so we must give an error. */
11623 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11624 _("%s must have a constant value"),
11625 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11629 case BFD_RELOC_IA64_TPREL14
:
11630 case BFD_RELOC_IA64_TPREL22
:
11631 case BFD_RELOC_IA64_TPREL64I
:
11632 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11633 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11634 case BFD_RELOC_IA64_DTPREL14
:
11635 case BFD_RELOC_IA64_DTPREL22
:
11636 case BFD_RELOC_IA64_DTPREL64I
:
11637 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11638 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11645 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11647 if (fix
->tc_fix_data
.bigendian
)
11648 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11650 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11655 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11660 /* Generate the BFD reloc to be stuck in the object file from the
11661 fixup used internally in the assembler. */
11664 tc_gen_reloc (sec
, fixp
)
11665 asection
*sec ATTRIBUTE_UNUSED
;
11670 reloc
= xmalloc (sizeof (*reloc
));
11671 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11672 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11673 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11674 reloc
->addend
= fixp
->fx_offset
;
11675 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11679 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11680 _("Cannot represent %s relocation in object file"),
11681 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11688 /* Turn a string in input_line_pointer into a floating point constant
11689 of type TYPE, and store the appropriate bytes in *LIT. The number
11690 of LITTLENUMS emitted is stored in *SIZE. An error message is
11691 returned, or NULL on OK. */
11693 #define MAX_LITTLENUMS 5
11696 md_atof (int type
, char *lit
, int *size
)
11698 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11728 return _("Unrecognized or unsupported floating point constant");
11730 t
= atof_ieee (input_line_pointer
, type
, words
);
11732 input_line_pointer
= t
;
11734 (*ia64_float_to_chars
) (lit
, words
, prec
);
11738 /* It is 10 byte floating point with 6 byte padding. */
11739 memset (&lit
[10], 0, 6);
11740 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11743 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11748 /* Handle ia64 specific semantics of the align directive. */
11751 ia64_md_do_align (n
, fill
, len
, max
)
11752 int n ATTRIBUTE_UNUSED
;
11753 const char *fill ATTRIBUTE_UNUSED
;
11754 int len ATTRIBUTE_UNUSED
;
11755 int max ATTRIBUTE_UNUSED
;
11757 if (subseg_text_p (now_seg
))
11758 ia64_flush_insns ();
11761 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11762 of an rs_align_code fragment. */
11765 ia64_handle_align (fragp
)
11770 const unsigned char *nop
;
11772 if (fragp
->fr_type
!= rs_align_code
)
11775 /* Check if this frag has to end with a stop bit. */
11776 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11778 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11779 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11781 /* If no paddings are needed, we check if we need a stop bit. */
11782 if (!bytes
&& fragp
->tc_frag_data
)
11784 if (fragp
->fr_fix
< 16)
11786 /* FIXME: It won't work with
11788 alloc r32=ar.pfs,1,2,4,0
11792 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11793 _("Can't add stop bit to mark end of instruction group"));
11796 /* Bundles are always in little-endian byte order. Make sure
11797 the previous bundle has the stop bit. */
11801 /* Make sure we are on a 16-byte boundary, in case someone has been
11802 putting data into a text section. */
11805 int fix
= bytes
& 15;
11806 memset (p
, 0, fix
);
11809 fragp
->fr_fix
+= fix
;
11812 /* Instruction bundles are always little-endian. */
11813 memcpy (p
, nop
, 16);
11814 fragp
->fr_var
= 16;
11818 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11823 number_to_chars_bigendian (lit
, (long) (*words
++),
11824 sizeof (LITTLENUM_TYPE
));
11825 lit
+= sizeof (LITTLENUM_TYPE
);
11830 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11835 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11836 sizeof (LITTLENUM_TYPE
));
11837 lit
+= sizeof (LITTLENUM_TYPE
);
11842 ia64_elf_section_change_hook (void)
11844 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11845 && elf_linked_to_section (now_seg
) == NULL
)
11846 elf_linked_to_section (now_seg
) = text_section
;
11847 dot_byteorder (-1);
11850 /* Check if a label should be made global. */
11852 ia64_check_label (symbolS
*label
)
11854 if (*input_line_pointer
== ':')
11856 S_SET_EXTERNAL (label
);
11857 input_line_pointer
++;
11861 /* Used to remember where .alias and .secalias directives are seen. We
11862 will rename symbol and section names when we are about to output
11863 the relocatable file. */
11866 char *file
; /* The file where the directive is seen. */
11867 unsigned int line
; /* The line number the directive is at. */
11868 const char *name
; /* The original name of the symbol. */
11871 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11872 .secalias. Otherwise, it is .alias. */
11874 dot_alias (int section
)
11876 char *name
, *alias
;
11880 const char *error_string
;
11883 struct hash_control
*ahash
, *nhash
;
11886 name
= input_line_pointer
;
11887 delim
= get_symbol_end ();
11888 end_name
= input_line_pointer
;
11891 if (name
== end_name
)
11893 as_bad (_("expected symbol name"));
11894 ignore_rest_of_line ();
11898 SKIP_WHITESPACE ();
11900 if (*input_line_pointer
!= ',')
11903 as_bad (_("expected comma after \"%s\""), name
);
11905 ignore_rest_of_line ();
11909 input_line_pointer
++;
11911 ia64_canonicalize_symbol_name (name
);
11913 /* We call demand_copy_C_string to check if alias string is valid.
11914 There should be a closing `"' and no `\0' in the string. */
11915 alias
= demand_copy_C_string (&len
);
11918 ignore_rest_of_line ();
11922 /* Make a copy of name string. */
11923 len
= strlen (name
) + 1;
11924 obstack_grow (¬es
, name
, len
);
11925 name
= obstack_finish (¬es
);
11930 ahash
= secalias_hash
;
11931 nhash
= secalias_name_hash
;
11936 ahash
= alias_hash
;
11937 nhash
= alias_name_hash
;
11940 /* Check if alias has been used before. */
11941 h
= (struct alias
*) hash_find (ahash
, alias
);
11944 if (strcmp (h
->name
, name
))
11945 as_bad (_("`%s' is already the alias of %s `%s'"),
11946 alias
, kind
, h
->name
);
11950 /* Check if name already has an alias. */
11951 a
= (const char *) hash_find (nhash
, name
);
11954 if (strcmp (a
, alias
))
11955 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11959 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11960 as_where (&h
->file
, &h
->line
);
11963 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11966 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11967 alias
, kind
, error_string
);
11971 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11974 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11975 alias
, kind
, error_string
);
11977 obstack_free (¬es
, name
);
11978 obstack_free (¬es
, alias
);
11981 demand_empty_rest_of_line ();
11984 /* It renames the original symbol name to its alias. */
11986 do_alias (const char *alias
, PTR value
)
11988 struct alias
*h
= (struct alias
*) value
;
11989 symbolS
*sym
= symbol_find (h
->name
);
11992 as_warn_where (h
->file
, h
->line
,
11993 _("symbol `%s' aliased to `%s' is not used"),
11996 S_SET_NAME (sym
, (char *) alias
);
11999 /* Called from write_object_file. */
12001 ia64_adjust_symtab (void)
12003 hash_traverse (alias_hash
, do_alias
);
12006 /* It renames the original section name to its alias. */
12008 do_secalias (const char *alias
, PTR value
)
12010 struct alias
*h
= (struct alias
*) value
;
12011 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
12014 as_warn_where (h
->file
, h
->line
,
12015 _("section `%s' aliased to `%s' is not used"),
12021 /* Called from write_object_file. */
12023 ia64_frob_file (void)
12025 hash_traverse (secalias_hash
, do_secalias
);