1 /* THIS FILE IS AUTOMAGICALLY GENERATED, DON'T EDIT IT */
13 #define ARG_IMM16 0x03
14 #define ARG_IMM32 0x04
16 #define ARG_IMMNMINUS1 0x05
17 #define ARG_IMM_1 0x06
18 #define ARG_IMM_2 0x07
19 #define ARG_DISP16 0x08
22 #define ARG_IMM1OR2 0x0b
23 #define ARG_DISP12 0x0b
25 #define ARG_DISP8 0x0c
26 #define ARG_IMM4M1 0x0d
27 #define CLASS_MASK 0x1fff0
32 #define CLASS_DISP 0x50
33 #define CLASS_IMM 0x60
35 #define CLASS_CTRL 0x80
36 #define CLASS_IGNORE 0x90
37 #define CLASS_ADDRESS 0xd0
38 #define CLASS_0CCC 0xe0
39 #define CLASS_1CCC 0xf0
40 #define CLASS_0DISP7 0x100
41 #define CLASS_1DISP7 0x200
42 #define CLASS_01II 0x300
43 #define CLASS_00II 0x400
44 #define CLASS_BIT 0x500
45 #define CLASS_FLAGS 0x600
46 #define CLASS_IR 0x700
47 #define CLASS_DISP8 0x800
48 #define CLASS_BIT_1OR2 0x900
49 #define CLASS_REG 0x7000
50 #define CLASS_REG_BYTE 0x2000
51 #define CLASS_REG_WORD 0x3000
52 #define CLASS_REG_QUAD 0x4000
53 #define CLASS_REG_LONG 0x5000
54 #define CLASS_REGN0 0x8000
55 #define CLASS_PR 0x10000
147 #define OPC_outibr 91
154 #define OPC_resflg 98
176 #define OPC_setflg 120
179 #define OPC_sindb 123
180 #define OPC_sinib 124
181 #define OPC_sinibr 125
189 #define OPC_soutb 133
190 #define OPC_soutd 134
191 #define OPC_soutdb 135
192 #define OPC_soutib 136
193 #define OPC_soutibr 137
206 #define OPC_testb 150
207 #define OPC_testl 151
209 #define OPC_trdrb 153
211 #define OPC_trirb 155
212 #define OPC_trtdrb 156
213 #define OPC_trtib 157
214 #define OPC_trtirb 158
215 #define OPC_trtrb 159
217 #define OPC_tsetb 161
223 #define OPC_lddrb 167
228 #define OPC_ext0e 172
229 #define OPC_ext0f 172
230 #define OPC_ext8e 172
231 #define OPC_ext8f 172
232 #define OPC_rsvd36 172
233 #define OPC_rsvd38 172
234 #define OPC_rsvd78 172
235 #define OPC_rsvd7e 172
236 #define OPC_rsvd9d 172
237 #define OPC_rsvd9f 172
238 #define OPC_rsvdb9 172
239 #define OPC_rsvdbf 172
241 #define OPC_ldctlb 174
243 #define OPC_trtdb 176
252 unsigned char opcode
;
253 void (*func
) PARAMS ((void));
254 unsigned int arg_info
[4];
255 unsigned int byte_info
[10];
261 opcode_entry_type z8k_table
[] = {
264 /* 1011 0101 ssss dddd *** adc rd,rs */
270 "adc",OPC_adc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
271 {CLASS_BIT
+0xb,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,0},
274 /* 1011 0100 ssss dddd *** adcb rbd,rbs */
280 "adcb",OPC_adcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
281 {CLASS_BIT
+0xb,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,1},
284 /* 0000 0001 ssN0 dddd *** add rd,@rs */
290 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
291 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,2},
294 /* 0100 0001 0000 dddd address_src *** add rd,address_src */
297 "add rd,address_src",16,9,
300 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
301 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,3},
304 /* 0100 0001 ssN0 dddd address_src *** add rd,address_src(rs) */
307 "add rd,address_src(rs)",16,10,
310 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
311 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,4},
314 /* 0000 0001 0000 dddd imm16 *** add rd,imm16 */
320 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
321 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,5},
324 /* 1000 0001 ssss dddd *** add rd,rs */
330 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
331 {CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,6},
334 /* 0000 0000 ssN0 dddd *** addb rbd,@rs */
340 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
341 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,7},
344 /* 0100 0000 0000 dddd address_src *** addb rbd,address_src */
347 "addb rbd,address_src",8,9,
350 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
351 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,8},
354 /* 0100 0000 ssN0 dddd address_src *** addb rbd,address_src(rs) */
357 "addb rbd,address_src(rs)",8,10,
360 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
361 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,9},
364 /* 0000 0000 0000 dddd imm8 imm8 *** addb rbd,imm8 */
370 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
371 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,10},
374 /* 1000 0000 ssss dddd *** addb rbd,rbs */
380 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
381 {CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,11},
384 /* 0001 0110 ssN0 dddd *** addl rrd,@rs */
387 "addl rrd,@rs",32,14,
390 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
391 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,12},
394 /* 0101 0110 0000 dddd address_src *** addl rrd,address_src */
397 "addl rrd,address_src",32,15,
400 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
401 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,13},
404 /* 0101 0110 ssN0 dddd address_src *** addl rrd,address_src(rs) */
407 "addl rrd,address_src(rs)",32,16,
410 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
411 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,14},
414 /* 0001 0110 0000 dddd imm32 *** addl rrd,imm32 */
417 "addl rrd,imm32",32,14,
420 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
421 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,15},
424 /* 1001 0110 ssss dddd *** addl rrd,rrs */
430 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
431 {CLASS_BIT
+9,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,16},
434 /* 0000 0111 ssN0 dddd *** and rd,@rs */
440 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
441 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,17},
444 /* 0100 0111 0000 dddd address_src *** and rd,address_src */
447 "and rd,address_src",16,9,
450 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
451 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,18},
454 /* 0100 0111 ssN0 dddd address_src *** and rd,address_src(rs) */
457 "and rd,address_src(rs)",16,10,
460 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
461 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,19},
464 /* 0000 0111 0000 dddd imm16 *** and rd,imm16 */
470 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
471 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,20},
474 /* 1000 0111 ssss dddd *** and rd,rs */
480 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
481 {CLASS_BIT
+8,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,21},
484 /* 0000 0110 ssN0 dddd *** andb rbd,@rs */
490 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
491 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,22},
494 /* 0100 0110 0000 dddd address_src *** andb rbd,address_src */
497 "andb rbd,address_src",8,9,
500 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
501 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,23},
504 /* 0100 0110 ssN0 dddd address_src *** andb rbd,address_src(rs) */
507 "andb rbd,address_src(rs)",8,10,
510 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
511 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,24},
514 /* 0000 0110 0000 dddd imm8 imm8 *** andb rbd,imm8 */
520 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
521 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,25},
524 /* 1000 0110 ssss dddd *** andb rbd,rbs */
530 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
531 {CLASS_BIT
+8,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,26},
534 /* 0010 0111 ddN0 imm4 *** bit @rd,imm4 */
540 "bit",OPC_bit
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
541 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,27},
544 /* 0110 0111 ddN0 imm4 address_dst *** bit address_dst(rd),imm4 */
547 "bit address_dst(rd),imm4",16,11,
550 "bit",OPC_bit
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
551 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,28},
554 /* 0110 0111 0000 imm4 address_dst *** bit address_dst,imm4 */
557 "bit address_dst,imm4",16,10,
560 "bit",OPC_bit
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
561 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,29},
564 /* 1010 0111 dddd imm4 *** bit rd,imm4 */
570 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
571 {CLASS_BIT
+0xa,CLASS_BIT
+7,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,30},
574 /* 0010 0111 0000 ssss 0000 dddd 0000 0000 *** bit rd,rs */
580 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
581 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,31},
584 /* 0010 0110 ddN0 imm4 *** bitb @rd,imm4 */
590 "bitb",OPC_bitb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
591 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,32},
594 /* 0110 0110 ddN0 imm4 address_dst *** bitb address_dst(rd),imm4 */
597 "bitb address_dst(rd),imm4",8,11,
600 "bitb",OPC_bitb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
601 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,33},
604 /* 0110 0110 0000 imm4 address_dst *** bitb address_dst,imm4 */
607 "bitb address_dst,imm4",8,10,
610 "bitb",OPC_bitb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
611 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,34},
614 /* 1010 0110 dddd imm4 *** bitb rbd,imm4 */
620 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
621 {CLASS_BIT
+0xa,CLASS_BIT
+6,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,35},
624 /* 0010 0110 0000 ssss 0000 dddd 0000 0000 *** bitb rbd,rs */
630 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
631 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,36},
634 /* 0011 0110 0000 0000 *** bpt */
641 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,37},
644 /* 0001 1111 ddN0 0000 *** call @rd */
650 "call",OPC_call
,0,{CLASS_IR
+(ARG_RD
),},
651 {CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,38},
654 /* 0101 1111 0000 0000 address_dst *** call address_dst */
657 "call address_dst",32,12,
660 "call",OPC_call
,0,{CLASS_DA
+(ARG_DST
),},
661 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,39},
664 /* 0101 1111 ddN0 0000 address_dst *** call address_dst(rd) */
667 "call address_dst(rd)",32,13,
670 "call",OPC_call
,0,{CLASS_X
+(ARG_RD
),},
671 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,40},
674 /* 1101 disp12 *** calr disp12 */
680 "calr",OPC_calr
,0,{CLASS_DISP
,},
681 {CLASS_BIT
+0xd,CLASS_DISP
+(ARG_DISP12
),0,0,0,0,0,0,0,},1,2,41},
684 /* 0000 1101 ddN0 1000 *** clr @rd */
690 "clr",OPC_clr
,0,{CLASS_IR
+(ARG_RD
),},
691 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,42},
694 /* 0100 1101 0000 1000 address_dst *** clr address_dst */
697 "clr address_dst",16,11,
700 "clr",OPC_clr
,0,{CLASS_DA
+(ARG_DST
),},
701 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,43},
704 /* 0100 1101 ddN0 1000 address_dst *** clr address_dst(rd) */
707 "clr address_dst(rd)",16,12,
710 "clr",OPC_clr
,0,{CLASS_X
+(ARG_RD
),},
711 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,44},
714 /* 1000 1101 dddd 1000 *** clr rd */
720 "clr",OPC_clr
,0,{CLASS_REG_WORD
+(ARG_RD
),},
721 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,45},
724 /* 0000 1100 ddN0 1000 *** clrb @rd */
730 "clrb",OPC_clrb
,0,{CLASS_IR
+(ARG_RD
),},
731 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,46},
734 /* 0100 1100 0000 1000 address_dst *** clrb address_dst */
737 "clrb address_dst",8,11,
740 "clrb",OPC_clrb
,0,{CLASS_DA
+(ARG_DST
),},
741 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,47},
744 /* 0100 1100 ddN0 1000 address_dst *** clrb address_dst(rd) */
747 "clrb address_dst(rd)",8,12,
750 "clrb",OPC_clrb
,0,{CLASS_X
+(ARG_RD
),},
751 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,48},
754 /* 1000 1100 dddd 1000 *** clrb rbd */
760 "clrb",OPC_clrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
761 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,49},
764 /* 0000 1101 ddN0 0000 *** com @rd */
770 "com",OPC_com
,0,{CLASS_IR
+(ARG_RD
),},
771 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,50},
774 /* 0100 1101 0000 0000 address_dst *** com address_dst */
777 "com address_dst",16,15,
780 "com",OPC_com
,0,{CLASS_DA
+(ARG_DST
),},
781 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,51},
784 /* 0100 1101 ddN0 0000 address_dst *** com address_dst(rd) */
787 "com address_dst(rd)",16,16,
790 "com",OPC_com
,0,{CLASS_X
+(ARG_RD
),},
791 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,52},
794 /* 1000 1101 dddd 0000 *** com rd */
800 "com",OPC_com
,0,{CLASS_REG_WORD
+(ARG_RD
),},
801 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,53},
804 /* 0000 1100 ddN0 0000 *** comb @rd */
810 "comb",OPC_comb
,0,{CLASS_IR
+(ARG_RD
),},
811 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,54},
814 /* 0100 1100 0000 0000 address_dst *** comb address_dst */
817 "comb address_dst",8,15,
820 "comb",OPC_comb
,0,{CLASS_DA
+(ARG_DST
),},
821 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,55},
824 /* 0100 1100 ddN0 0000 address_dst *** comb address_dst(rd) */
827 "comb address_dst(rd)",8,16,
830 "comb",OPC_comb
,0,{CLASS_X
+(ARG_RD
),},
831 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,56},
834 /* 1000 1100 dddd 0000 *** comb rbd */
840 "comb",OPC_comb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
841 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,57},
844 /* 1000 1101 flags 0101 *** comflg flags */
850 "comflg",OPC_comflg
,0,{CLASS_FLAGS
,},
851 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+5,0,0,0,0,0,},1,2,58},
854 /* 0000 1101 ddN0 0001 imm16 *** cp @rd,imm16 */
857 "cp @rd,imm16",16,11,
860 "cp",OPC_cp
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
861 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,59},
864 /* 0100 1101 ddN0 0001 address_dst imm16 *** cp address_dst(rd),imm16 */
867 "cp address_dst(rd),imm16",16,15,
870 "cp",OPC_cp
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
871 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,60},
874 /* 0100 1101 0000 0001 address_dst imm16 *** cp address_dst,imm16 */
877 "cp address_dst,imm16",16,14,
880 "cp",OPC_cp
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
881 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,61},
884 /* 0000 1011 ssN0 dddd *** cp rd,@rs */
890 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
891 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,62},
894 /* 0100 1011 0000 dddd address_src *** cp rd,address_src */
897 "cp rd,address_src",16,9,
900 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
901 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,63},
904 /* 0100 1011 ssN0 dddd address_src *** cp rd,address_src(rs) */
907 "cp rd,address_src(rs)",16,10,
910 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
911 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,64},
914 /* 0000 1011 0000 dddd imm16 *** cp rd,imm16 */
920 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
921 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,65},
924 /* 1000 1011 ssss dddd *** cp rd,rs */
930 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
931 {CLASS_BIT
+8,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,66},
934 /* 0000 1100 ddN0 0001 imm8 imm8 *** cpb @rd,imm8 */
940 "cpb",OPC_cpb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
941 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,67},
944 /* 0100 1100 ddN0 0001 address_dst imm8 imm8 *** cpb address_dst(rd),imm8 */
947 "cpb address_dst(rd),imm8",8,15,
950 "cpb",OPC_cpb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
951 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,68},
954 /* 0100 1100 0000 0001 address_dst imm8 imm8 *** cpb address_dst,imm8 */
957 "cpb address_dst,imm8",8,14,
960 "cpb",OPC_cpb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
961 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,69},
964 /* 0000 1010 ssN0 dddd *** cpb rbd,@rs */
970 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
971 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,70},
974 /* 0100 1010 0000 dddd address_src *** cpb rbd,address_src */
977 "cpb rbd,address_src",8,9,
980 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
981 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,71},
984 /* 0100 1010 ssN0 dddd address_src *** cpb rbd,address_src(rs) */
987 "cpb rbd,address_src(rs)",8,10,
990 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
991 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,72},
994 /* 0000 1010 0000 dddd imm8 imm8 *** cpb rbd,imm8 */
1000 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
1001 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,73},
1004 /* 1000 1010 ssss dddd *** cpb rbd,rbs */
1010 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1011 {CLASS_BIT
+8,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,74},
1014 /* 1011 1011 ssN0 1000 0000 rrrr dddd cccc *** cpd rd,@rs,rr,cc */
1017 "cpd rd,@rs,rr,cc",16,11,
1020 "cpd",OPC_cpd
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1021 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,75},
1024 /* 1011 1010 ssN0 1000 0000 rrrr dddd cccc *** cpdb rbd,@rs,rr,cc */
1027 "cpdb rbd,@rs,rr,cc",8,11,
1030 "cpdb",OPC_cpdb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1031 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,76},
1034 /* 1011 1011 ssN0 1100 0000 rrrr dddd cccc *** cpdr rd,@rs,rr,cc */
1037 "cpdr rd,@rs,rr,cc",16,11,
1040 "cpdr",OPC_cpdr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1041 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,77},
1044 /* 1011 1010 ssN0 1100 0000 rrrr dddd cccc *** cpdrb rbd,@rs,rr,cc */
1047 "cpdrb rbd,@rs,rr,cc",8,11,
1050 "cpdrb",OPC_cpdrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1051 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,78},
1054 /* 1011 1011 ssN0 0000 0000 rrrr dddd cccc *** cpi rd,@rs,rr,cc */
1057 "cpi rd,@rs,rr,cc",16,11,
1060 "cpi",OPC_cpi
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1061 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,79},
1064 /* 1011 1010 ssN0 0000 0000 rrrr dddd cccc *** cpib rbd,@rs,rr,cc */
1067 "cpib rbd,@rs,rr,cc",8,11,
1070 "cpib",OPC_cpib
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1071 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,80},
1074 /* 1011 1011 ssN0 0100 0000 rrrr dddd cccc *** cpir rd,@rs,rr,cc */
1077 "cpir rd,@rs,rr,cc",16,11,
1080 "cpir",OPC_cpir
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1081 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,81},
1084 /* 1011 1010 ssN0 0100 0000 rrrr dddd cccc *** cpirb rbd,@rs,rr,cc */
1087 "cpirb rbd,@rs,rr,cc",8,11,
1090 "cpirb",OPC_cpirb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1091 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,82},
1094 /* 0001 0000 ssN0 dddd *** cpl rrd,@rs */
1097 "cpl rrd,@rs",32,14,
1100 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1101 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,83},
1104 /* 0101 0000 0000 dddd address_src *** cpl rrd,address_src */
1107 "cpl rrd,address_src",32,15,
1110 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1111 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,84},
1114 /* 0101 0000 ssN0 dddd address_src *** cpl rrd,address_src(rs) */
1117 "cpl rrd,address_src(rs)",32,16,
1120 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1121 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,85},
1124 /* 0001 0000 0000 dddd imm32 *** cpl rrd,imm32 */
1127 "cpl rrd,imm32",32,14,
1130 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1131 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,86},
1134 /* 1001 0000 ssss dddd *** cpl rrd,rrs */
1140 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1141 {CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,87},
1144 /* 1011 1011 ssN0 1010 0000 rrrr ddN0 cccc *** cpsd @rd,@rs,rr,cc */
1147 "cpsd @rd,@rs,rr,cc",16,11,
1150 "cpsd",OPC_cpsd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1151 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,88},
1154 /* 1011 1010 ssN0 1010 0000 rrrr ddN0 cccc *** cpsdb @rd,@rs,rr,cc */
1157 "cpsdb @rd,@rs,rr,cc",8,11,
1160 "cpsdb",OPC_cpsdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1161 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,89},
1164 /* 1011 1011 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdr @rd,@rs,rr,cc */
1167 "cpsdr @rd,@rs,rr,cc",16,11,
1170 "cpsdr",OPC_cpsdr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1171 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,90},
1174 /* 1011 1010 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdrb @rd,@rs,rr,cc */
1177 "cpsdrb @rd,@rs,rr,cc",8,11,
1180 "cpsdrb",OPC_cpsdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1181 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,91},
1184 /* 1011 1011 ssN0 0010 0000 rrrr ddN0 cccc *** cpsi @rd,@rs,rr,cc */
1187 "cpsi @rd,@rs,rr,cc",16,11,
1190 "cpsi",OPC_cpsi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1191 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,92},
1194 /* 1011 1010 ssN0 0010 0000 rrrr ddN0 cccc *** cpsib @rd,@rs,rr,cc */
1197 "cpsib @rd,@rs,rr,cc",8,11,
1200 "cpsib",OPC_cpsib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1201 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,93},
1204 /* 1011 1011 ssN0 0110 0000 rrrr ddN0 cccc *** cpsir @rd,@rs,rr,cc */
1207 "cpsir @rd,@rs,rr,cc",16,11,
1210 "cpsir",OPC_cpsir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1211 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,94},
1214 /* 1011 1010 ssN0 0110 0000 rrrr ddN0 cccc *** cpsirb @rd,@rs,rr,cc */
1217 "cpsirb @rd,@rs,rr,cc",8,11,
1220 "cpsirb",OPC_cpsirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1221 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,95},
1224 /* 1011 0000 dddd 0000 *** dab rbd */
1230 "dab",OPC_dab
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
1231 {CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,96},
1234 /* 1111 dddd 0disp7 *** dbjnz rbd,disp7 */
1237 "dbjnz rbd,disp7",16,11,
1240 "dbjnz",OPC_dbjnz
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
1241 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_0DISP7
,0,0,0,0,0,0,},2,2,97},
1244 /* 0010 1011 ddN0 imm4m1 *** dec @rd,imm4m1 */
1247 "dec @rd,imm4m1",16,11,
1250 "dec",OPC_dec
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1251 {CLASS_BIT
+2,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,98},
1254 /* 0110 1011 ddN0 imm4m1 address_dst *** dec address_dst(rd),imm4m1 */
1257 "dec address_dst(rd),imm4m1",16,14,
1260 "dec",OPC_dec
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1261 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,99},
1264 /* 0110 1011 0000 imm4m1 address_dst *** dec address_dst,imm4m1 */
1267 "dec address_dst,imm4m1",16,13,
1270 "dec",OPC_dec
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1271 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,100},
1274 /* 1010 1011 dddd imm4m1 *** dec rd,imm4m1 */
1277 "dec rd,imm4m1",16,4,
1280 "dec",OPC_dec
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1281 {CLASS_BIT
+0xa,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,101},
1284 /* 0010 1010 ddN0 imm4m1 *** decb @rd,imm4m1 */
1287 "decb @rd,imm4m1",8,11,
1290 "decb",OPC_decb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1291 {CLASS_BIT
+2,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,102},
1294 /* 0110 1010 ddN0 imm4m1 address_dst *** decb address_dst(rd),imm4m1 */
1297 "decb address_dst(rd),imm4m1",8,14,
1300 "decb",OPC_decb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1301 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,103},
1304 /* 0110 1010 0000 imm4m1 address_dst *** decb address_dst,imm4m1 */
1307 "decb address_dst,imm4m1",8,13,
1310 "decb",OPC_decb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1311 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,104},
1314 /* 1010 1010 dddd imm4m1 *** decb rbd,imm4m1 */
1317 "decb rbd,imm4m1",8,4,
1320 "decb",OPC_decb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1321 {CLASS_BIT
+0xa,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,105},
1324 /* 0111 1100 0000 00ii *** di i2 */
1330 "di",OPC_di
,0,{CLASS_IMM
+(ARG_IMM2
),},
1331 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_00II
,0,0,0,0,0,},1,2,106},
1334 /* 0001 1011 ssN0 dddd *** div rrd,@rs */
1337 "div rrd,@rs",16,107,
1340 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1341 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,107},
1344 /* 0101 1011 0000 dddd address_src *** div rrd,address_src */
1347 "div rrd,address_src",16,107,
1350 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1351 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,108},
1354 /* 0101 1011 ssN0 dddd address_src *** div rrd,address_src(rs) */
1357 "div rrd,address_src(rs)",16,107,
1360 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1361 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,109},
1364 /* 0001 1011 0000 dddd imm16 *** div rrd,imm16 */
1367 "div rrd,imm16",16,107,
1370 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1371 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,110},
1374 /* 1001 1011 ssss dddd *** div rrd,rs */
1377 "div rrd,rs",16,107,
1380 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1381 {CLASS_BIT
+9,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,111},
1384 /* 0001 1010 ssN0 dddd *** divl rqd,@rs */
1387 "divl rqd,@rs",32,744,
1390 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1391 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,112},
1394 /* 0101 1010 0000 dddd address_src *** divl rqd,address_src */
1397 "divl rqd,address_src",32,745,
1400 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1401 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,113},
1404 /* 0101 1010 ssN0 dddd address_src *** divl rqd,address_src(rs) */
1407 "divl rqd,address_src(rs)",32,746,
1410 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1411 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,114},
1414 /* 0001 1010 0000 dddd imm32 *** divl rqd,imm32 */
1417 "divl rqd,imm32",32,744,
1420 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1421 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,115},
1424 /* 1001 1010 ssss dddd *** divl rqd,rrs */
1427 "divl rqd,rrs",32,744,
1430 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1431 {CLASS_BIT
+9,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,116},
1434 /* 1111 dddd 1disp7 *** djnz rd,disp7 */
1437 "djnz rd,disp7",16,11,
1440 "djnz",OPC_djnz
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
1441 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_1DISP7
,0,0,0,0,0,0,},2,2,117},
1444 /* 0111 1100 0000 01ii *** ei i2 */
1450 "ei",OPC_ei
,0,{CLASS_IMM
+(ARG_IMM2
),},
1451 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_01II
,0,0,0,0,0,},1,2,118},
1454 /* 0010 1101 ssN0 dddd *** ex rd,@rs */
1460 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1461 {CLASS_BIT
+2,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,119},
1464 /* 0110 1101 0000 dddd address_src *** ex rd,address_src */
1467 "ex rd,address_src",16,15,
1470 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1471 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,120},
1474 /* 0110 1101 ssN0 dddd address_src *** ex rd,address_src(rs) */
1477 "ex rd,address_src(rs)",16,16,
1480 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1481 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,121},
1484 /* 1010 1101 ssss dddd *** ex rd,rs */
1490 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1491 {CLASS_BIT
+0xa,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,122},
1494 /* 0010 1100 ssN0 dddd *** exb rbd,@rs */
1500 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1501 {CLASS_BIT
+2,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,123},
1504 /* 0110 1100 0000 dddd address_src *** exb rbd,address_src */
1507 "exb rbd,address_src",8,15,
1510 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1511 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,124},
1514 /* 0110 1100 ssN0 dddd address_src *** exb rbd,address_src(rs) */
1517 "exb rbd,address_src(rs)",8,16,
1520 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1521 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,125},
1524 /* 1010 1100 ssss dddd *** exb rbd,rbs */
1530 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1531 {CLASS_BIT
+0xa,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,126},
1534 /* 0000 1110 imm8 *** ext0e imm8 */
1540 "ext0e",OPC_ext0e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1541 {CLASS_BIT
+0,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,127},
1544 /* 0000 1111 imm8 *** ext0f imm8 */
1550 "ext0f",OPC_ext0f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1551 {CLASS_BIT
+0,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,128},
1554 /* 1000 1110 imm8 *** ext8e imm8 */
1560 "ext8e",OPC_ext8e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1561 {CLASS_BIT
+8,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,129},
1564 /* 1000 1111 imm8 *** ext8f imm8 */
1570 "ext8f",OPC_ext8f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1571 {CLASS_BIT
+8,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,130},
1574 /* 1011 0001 dddd 1010 *** exts rrd */
1580 "exts",OPC_exts
,0,{CLASS_REG_LONG
+(ARG_RD
),},
1581 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xa,0,0,0,0,0,},1,2,131},
1584 /* 1011 0001 dddd 0000 *** extsb rd */
1590 "extsb",OPC_extsb
,0,{CLASS_REG_WORD
+(ARG_RD
),},
1591 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,132},
1594 /* 1011 0001 dddd 0111 *** extsl rqd */
1600 "extsl",OPC_extsl
,0,{CLASS_REG_QUAD
+(ARG_RD
),},
1601 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,0,0,0,0,0,},1,2,133},
1604 /* 0111 1010 0000 0000 *** halt */
1610 "halt",OPC_halt
,0,{0},
1611 {CLASS_BIT
+7,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,134},
1614 /* 0011 1101 ssN0 dddd *** in rd,@rs */
1620 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1621 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,135},
1624 /* 0011 1101 dddd 0100 imm16 *** in rd,imm16 */
1627 "in rd,imm16",16,12,
1630 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1631 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,136},
1634 /* 0011 1100 ssN0 dddd *** inb rbd,@rs */
1640 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1641 {CLASS_BIT
+3,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,137},
1644 /* 0011 1010 dddd 0100 imm16 *** inb rbd,imm16 */
1647 "inb rbd,imm16",8,10,
1650 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1651 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,138},
1654 /* 0010 1001 ddN0 imm4m1 *** inc @rd,imm4m1 */
1657 "inc @rd,imm4m1",16,11,
1660 "inc",OPC_inc
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1661 {CLASS_BIT
+2,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,139},
1664 /* 0110 1001 ddN0 imm4m1 address_dst *** inc address_dst(rd),imm4m1 */
1667 "inc address_dst(rd),imm4m1",16,14,
1670 "inc",OPC_inc
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1671 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,140},
1674 /* 0110 1001 0000 imm4m1 address_dst *** inc address_dst,imm4m1 */
1677 "inc address_dst,imm4m1",16,13,
1680 "inc",OPC_inc
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1681 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,141},
1684 /* 1010 1001 dddd imm4m1 *** inc rd,imm4m1 */
1687 "inc rd,imm4m1",16,4,
1690 "inc",OPC_inc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1691 {CLASS_BIT
+0xa,CLASS_BIT
+9,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,142},
1694 /* 0010 1000 ddN0 imm4m1 *** incb @rd,imm4m1 */
1697 "incb @rd,imm4m1",8,11,
1700 "incb",OPC_incb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1701 {CLASS_BIT
+2,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,143},
1704 /* 0110 1000 ddN0 imm4m1 address_dst *** incb address_dst(rd),imm4m1 */
1707 "incb address_dst(rd),imm4m1",8,14,
1710 "incb",OPC_incb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1711 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,144},
1714 /* 0110 1000 0000 imm4m1 address_dst *** incb address_dst,imm4m1 */
1717 "incb address_dst,imm4m1",8,13,
1720 "incb",OPC_incb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1721 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,145},
1724 /* 1010 1000 dddd imm4m1 *** incb rbd,imm4m1 */
1727 "incb rbd,imm4m1",8,4,
1730 "incb",OPC_incb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1731 {CLASS_BIT
+0xa,CLASS_BIT
+8,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,146},
1734 /* 0011 1011 ssN0 1000 0000 aaaa ddN0 1000 *** ind @rd,@rs,ra */
1737 "ind @rd,@rs,ra",16,21,
1740 "ind",OPC_ind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1741 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,147},
1744 /* 0011 1010 ssN0 1000 0000 aaaa ddN0 1000 *** indb @rd,@rs,rba */
1747 "indb @rd,@rs,rba",8,21,
1750 "indb",OPC_indb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
1751 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,148},
1754 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 1000 *** inib @rd,@rs,ra */
1757 "inib @rd,@rs,ra",8,21,
1760 "inib",OPC_inib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1761 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,149},
1764 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 0000 *** inibr @rd,@rs,ra */
1767 "inibr @rd,@rs,ra",16,21,
1770 "inibr",OPC_inibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1771 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,150},
1774 /* 0111 1011 0000 0000 *** iret */
1780 "iret",OPC_iret
,0,{0},
1781 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,151},
1784 /* 0001 1110 ddN0 cccc *** jp cc,@rd */
1790 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_IR
+(ARG_RD
),},
1791 {CLASS_BIT
+1,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,152},
1794 /* 0101 1110 0000 cccc address_dst *** jp cc,address_dst */
1797 "jp cc,address_dst",16,7,
1800 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_DA
+(ARG_DST
),},
1801 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,153},
1804 /* 0101 1110 ddN0 cccc address_dst *** jp cc,address_dst(rd) */
1807 "jp cc,address_dst(rd)",16,8,
1810 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_X
+(ARG_RD
),},
1811 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,154},
1814 /* 1110 cccc disp8 *** jr cc,disp8 */
1820 "jr",OPC_jr
,0,{CLASS_CC
,CLASS_DISP
,},
1821 {CLASS_BIT
+0xe,CLASS_CC
,CLASS_DISP8
,0,0,0,0,0,0,},2,2,155},
1824 /* 0000 1101 ddN0 0101 imm16 *** ld @rd,imm16 */
1827 "ld @rd,imm16",16,7,
1830 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1831 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,156},
1834 /* 0010 1111 ddN0 ssss *** ld @rd,rs */
1840 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1841 {CLASS_BIT
+2,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,157},
1844 /* 0100 1101 ddN0 0101 address_dst imm16 *** ld address_dst(rd),imm16 */
1847 "ld address_dst(rd),imm16",16,15,
1850 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1851 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,158},
1854 /* 0110 1111 ddN0 ssss address_dst *** ld address_dst(rd),rs */
1857 "ld address_dst(rd),rs",16,12,
1860 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1861 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,159},
1864 /* 0100 1101 0000 0101 address_dst imm16 *** ld address_dst,imm16 */
1867 "ld address_dst,imm16",16,14,
1870 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
1871 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,160},
1874 /* 0110 1111 0000 ssss address_dst *** ld address_dst,rs */
1877 "ld address_dst,rs",16,11,
1880 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),},
1881 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,161},
1884 /* 0011 0011 ddN0 ssss imm16 *** ld rd(imm16),rs */
1887 "ld rd(imm16),rs",16,14,
1890 "ld",OPC_ld
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1891 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,162},
1894 /* 0111 0011 ddN0 ssss 0000 xxxx 0000 0000 *** ld rd(rx),rs */
1897 "ld rd(rx),rs",16,14,
1900 "ld",OPC_ld
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1901 {CLASS_BIT
+7,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,163},
1904 /* 0010 0001 ssN0 dddd *** ld rd,@rs */
1910 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1911 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,164},
1914 /* 0110 0001 0000 dddd address_src *** ld rd,address_src */
1917 "ld rd,address_src",16,9,
1920 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1921 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,165},
1924 /* 0110 0001 ssN0 dddd address_src *** ld rd,address_src(rs) */
1927 "ld rd,address_src(rs)",16,10,
1930 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1931 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,166},
1934 /* 0010 0001 0000 dddd imm16 *** ld rd,imm16 */
1940 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1941 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,167},
1944 /* 1010 0001 ssss dddd *** ld rd,rs */
1950 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1951 {CLASS_BIT
+0xa,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,168},
1954 /* 0011 0001 ssN0 dddd imm16 *** ld rd,rs(imm16) */
1957 "ld rd,rs(imm16)",16,14,
1960 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1961 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,169},
1964 /* 0111 0001 ssN0 dddd 0000 xxxx 0000 0000 *** ld rd,rs(rx) */
1967 "ld rd,rs(rx)",16,14,
1970 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1971 {CLASS_BIT
+7,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,170},
1974 /* 0111 0110 0000 dddd address_src *** lda prd,address_src */
1977 "lda prd,address_src",16,12,
1980 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1981 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,171},
1984 /* 0111 0110 ssN0 dddd address_src *** lda prd,address_src(rs) */
1987 "lda prd,address_src(rs)",16,13,
1990 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1991 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,172},
1994 /* 0011 0100 ssN0 dddd imm16 *** lda prd,rs(imm16) */
1997 "lda prd,rs(imm16)",16,15,
2000 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2001 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,173},
2004 /* 0111 0100 ssN0 dddd 0000 xxxx 0000 0000 *** lda prd,rs(rx) */
2007 "lda prd,rs(rx)",16,15,
2010 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2011 {CLASS_BIT
+7,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,174},
2014 /* 0011 0100 0000 dddd disp16 *** ldar prd,disp16 */
2017 "ldar prd,disp16",16,15,
2020 "ldar",OPC_ldar
,0,{CLASS_PR
+(ARG_RD
),CLASS_DISP
,},
2021 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,175},
2024 /* 0000 1100 ddN0 0101 imm8 imm8 *** ldb @rd,imm8 */
2030 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2031 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,176},
2034 /* 0010 1110 ddN0 ssss *** ldb @rd,rbs */
2040 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2041 {CLASS_BIT
+2,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,177},
2044 /* 0100 1100 ddN0 0101 address_dst imm8 imm8 *** ldb address_dst(rd),imm8 */
2047 "ldb address_dst(rd),imm8",8,15,
2050 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2051 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,178},
2054 /* 0110 1110 ddN0 ssss address_dst *** ldb address_dst(rd),rbs */
2057 "ldb address_dst(rd),rbs",8,12,
2060 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2061 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,179},
2064 /* 0100 1100 0000 0101 address_dst imm8 imm8 *** ldb address_dst,imm8 */
2067 "ldb address_dst,imm8",8,14,
2070 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
2071 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,180},
2074 /* 0110 1110 0000 ssss address_dst *** ldb address_dst,rbs */
2077 "ldb address_dst,rbs",8,11,
2080 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_BYTE
+(ARG_RS
),},
2081 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,181},
2084 /* 0010 0000 ssN0 dddd *** ldb rbd,@rs */
2090 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2091 {CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,182},
2094 /* 0110 0000 0000 dddd address_src *** ldb rbd,address_src */
2097 "ldb rbd,address_src",8,9,
2100 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2101 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,183},
2104 /* 0110 0000 ssN0 dddd address_src *** ldb rbd,address_src(rs) */
2107 "ldb rbd,address_src(rs)",8,10,
2110 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2111 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,184},
2114 /* 1100 dddd imm8 *** ldb rbd,imm8 */
2120 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2121 {CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},2,2,185},
2124 /* 1010 0000 ssss dddd *** ldb rbd,rbs */
2130 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2131 {CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,186},
2134 /* 0011 0000 ssN0 dddd imm16 *** ldb rbd,rs(imm16) */
2137 "ldb rbd,rs(imm16)",8,14,
2140 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2141 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,187},
2144 /* 0111 0000 ssN0 dddd 0000 xxxx 0000 0000 *** ldb rbd,rs(rx) */
2147 "ldb rbd,rs(rx)",8,14,
2150 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2151 {CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,188},
2154 /* 0011 0010 ddN0 ssss imm16 *** ldb rd(imm16),rbs */
2157 "ldb rd(imm16),rbs",8,14,
2160 "ldb",OPC_ldb
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2161 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,189},
2164 /* 0111 0010 ddN0 ssss 0000 xxxx 0000 0000 *** ldb rd(rx),rbs */
2167 "ldb rd(rx),rbs",8,14,
2170 "ldb",OPC_ldb
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2171 {CLASS_BIT
+7,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,190},
2174 /* 0111 1101 ssss 1ccc *** ldctl ctrl,rs */
2177 "ldctl ctrl,rs",32,7,
2180 "ldctl",OPC_ldctl
,0,{CLASS_CTRL
,CLASS_REG_WORD
+(ARG_RS
),},
2181 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_1CCC
,0,0,0,0,0,},2,2,191},
2184 /* 0111 1101 dddd 0ccc *** ldctl rd,ctrl */
2187 "ldctl rd,ctrl",32,7,
2190 "ldctl",OPC_ldctl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_CTRL
,},
2191 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_0CCC
,0,0,0,0,0,},2,2,192},
2194 /* 1000 1100 ssss 1001 *** ldctlb ctrl,rbs */
2197 "ldctlb ctrl,rbs",32,7,
2200 "ldctlb",OPC_ldctlb
,0,{CLASS_CTRL
,CLASS_REG_BYTE
+(ARG_RS
),},
2201 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_BIT
+9,0,0,0,0,0,},2,2,193},
2204 /* 1000 1100 dddd 0001 *** ldctlb rbd,ctrl */
2207 "ldctlb rbd,ctrl",32,7,
2210 "ldctlb",OPC_ldctlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_CTRL
,},
2211 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,0,0,0,0,0,},2,2,194},
2214 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 1000 *** ldd @rd,@rs,rr */
2217 "ldd @rd,@rs,rr",16,11,
2220 "ldd",OPC_ldd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2221 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,195},
2224 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 1000 *** lddb @rd,@rs,rr */
2227 "lddb @rd,@rs,rr",8,11,
2230 "lddb",OPC_lddb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2231 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,196},
2234 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 0000 *** lddr @rd,@rs,rr */
2237 "lddr @rd,@rs,rr",16,11,
2240 "lddr",OPC_lddr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2241 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,197},
2244 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 0000 *** lddrb @rd,@rs,rr */
2247 "lddrb @rd,@rs,rr",8,11,
2250 "lddrb",OPC_lddrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2251 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,198},
2254 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 1000 *** ldi @rd,@rs,rr */
2257 "ldi @rd,@rs,rr",16,11,
2260 "ldi",OPC_ldi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2261 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,199},
2264 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 1000 *** ldib @rd,@rs,rr */
2267 "ldib @rd,@rs,rr",8,11,
2270 "ldib",OPC_ldib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2271 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,200},
2274 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 0000 *** ldir @rd,@rs,rr */
2277 "ldir @rd,@rs,rr",16,11,
2280 "ldir",OPC_ldir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2281 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,201},
2284 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 0000 *** ldirb @rd,@rs,rr */
2287 "ldirb @rd,@rs,rr",8,11,
2290 "ldirb",OPC_ldirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2291 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,202},
2294 /* 1011 1101 dddd imm4 *** ldk rd,imm4 */
2300 "ldk",OPC_ldk
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2301 {CLASS_BIT
+0xb,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,203},
2304 /* 0001 1101 ddN0 ssss *** ldl @rd,rrs */
2307 "ldl @rd,rrs",32,11,
2310 "ldl",OPC_ldl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2311 {CLASS_BIT
+1,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,204},
2314 /* 0101 1101 ddN0 ssss address_dst *** ldl address_dst(rd),rrs */
2317 "ldl address_dst(rd),rrs",32,14,
2320 "ldl",OPC_ldl
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2321 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,205},
2324 /* 0101 1101 0000 ssss address_dst *** ldl address_dst,rrs */
2327 "ldl address_dst,rrs",32,15,
2330 "ldl",OPC_ldl
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_LONG
+(ARG_RS
),},
2331 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,206},
2334 /* 0011 0111 ddN0 ssss imm16 *** ldl rd(imm16),rrs */
2337 "ldl rd(imm16),rrs",32,17,
2340 "ldl",OPC_ldl
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2341 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,207},
2344 /* 0111 0111 ddN0 ssss 0000 xxxx 0000 0000 *** ldl rd(rx),rrs */
2347 "ldl rd(rx),rrs",32,17,
2350 "ldl",OPC_ldl
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2351 {CLASS_BIT
+7,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,208},
2354 /* 0001 0100 ssN0 dddd *** ldl rrd,@rs */
2357 "ldl rrd,@rs",32,11,
2360 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2361 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,209},
2364 /* 0101 0100 0000 dddd address_src *** ldl rrd,address_src */
2367 "ldl rrd,address_src",32,12,
2370 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2371 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,210},
2374 /* 0101 0100 ssN0 dddd address_src *** ldl rrd,address_src(rs) */
2377 "ldl rrd,address_src(rs)",32,13,
2380 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2381 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,211},
2384 /* 0001 0100 0000 dddd imm32 *** ldl rrd,imm32 */
2387 "ldl rrd,imm32",32,11,
2390 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2391 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,212},
2394 /* 1001 0100 ssss dddd *** ldl rrd,rrs */
2400 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2401 {CLASS_BIT
+9,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,213},
2404 /* 0011 0101 ssN0 dddd imm16 *** ldl rrd,rs(imm16) */
2407 "ldl rrd,rs(imm16)",32,17,
2410 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2411 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,214},
2414 /* 0111 0101 ssN0 dddd 0000 xxxx 0000 0000 *** ldl rrd,rs(rx) */
2417 "ldl rrd,rs(rx)",32,17,
2420 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2421 {CLASS_BIT
+7,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,215},
2424 /* 0001 1100 ddN0 1001 0000 ssss 0000 imm4m1 *** ldm @rd,rs,n */
2427 "ldm @rd,rs,n",16,11,
2430 "ldm",OPC_ldm
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2431 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),0,},3,4,216},
2434 /* 0101 1100 ddN0 1001 0000 ssss 0000 imm4m1 address_dst *** ldm address_dst(rd),rs,n */
2437 "ldm address_dst(rd),rs,n",16,15,
2440 "ldm",OPC_ldm
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2441 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,217},
2444 /* 0101 1100 0000 1001 0000 ssss 0000 imm4m1 address_dst *** ldm address_dst,rs,n */
2447 "ldm address_dst,rs,n",16,14,
2450 "ldm",OPC_ldm
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2451 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,218},
2454 /* 0001 1100 ssN0 0001 0000 dddd 0000 imm4m1 *** ldm rd,@rs,n */
2457 "ldm rd,@rs,n",16,11,
2460 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2461 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),0,},3,4,219},
2464 /* 0101 1100 ssN0 0001 0000 dddd 0000 imm4m1 address_src *** ldm rd,address_src(rs),n */
2467 "ldm rd,address_src(rs),n",16,15,
2470 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2471 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,220},
2474 /* 0101 1100 0000 0001 0000 dddd 0000 imm4m1 address_src *** ldm rd,address_src,n */
2477 "ldm rd,address_src,n",16,14,
2480 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),CLASS_IMM
+ (ARG_IMM4M1
),},
2481 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,221},
2484 /* 0011 1001 ssN0 0000 *** ldps @rs */
2490 "ldps",OPC_ldps
,0,{CLASS_IR
+(ARG_RS
),},
2491 {CLASS_BIT
+3,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,0,0,0,0,},1,2,222},
2494 /* 0111 1001 0000 0000 address_src *** ldps address_src */
2497 "ldps address_src",16,16,
2500 "ldps",OPC_ldps
,0,{CLASS_DA
+(ARG_SRC
),},
2501 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,223},
2504 /* 0111 1001 ssN0 0000 address_src *** ldps address_src(rs) */
2507 "ldps address_src(rs)",16,17,
2510 "ldps",OPC_ldps
,0,{CLASS_X
+(ARG_RS
),},
2511 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,224},
2514 /* 0011 0011 0000 ssss disp16 *** ldr disp16,rs */
2517 "ldr disp16,rs",16,14,
2520 "ldr",OPC_ldr
,0,{CLASS_DISP
,CLASS_REG_WORD
+(ARG_RS
),},
2521 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,225},
2524 /* 0011 0001 0000 dddd disp16 *** ldr rd,disp16 */
2527 "ldr rd,disp16",16,14,
2530 "ldr",OPC_ldr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
2531 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,226},
2534 /* 0011 0010 0000 ssss disp16 *** ldrb disp16,rbs */
2537 "ldrb disp16,rbs",8,14,
2540 "ldrb",OPC_ldrb
,0,{CLASS_DISP
,CLASS_REG_BYTE
+(ARG_RS
),},
2541 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,227},
2544 /* 0011 0000 0000 dddd disp16 *** ldrb rbd,disp16 */
2547 "ldrb rbd,disp16",8,14,
2550 "ldrb",OPC_ldrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
2551 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,228},
2554 /* 0011 0111 0000 ssss disp16 *** ldrl disp16,rrs */
2557 "ldrl disp16,rrs",32,17,
2560 "ldrl",OPC_ldrl
,0,{CLASS_DISP
,CLASS_REG_LONG
+(ARG_RS
),},
2561 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,229},
2564 /* 0011 0101 0000 dddd disp16 *** ldrl rrd,disp16 */
2567 "ldrl rrd,disp16",32,17,
2570 "ldrl",OPC_ldrl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DISP
,},
2571 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,230},
2574 /* 0111 1011 0000 1010 *** mbit */
2580 "mbit",OPC_mbit
,0,{0},
2581 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0xa,0,0,0,0,0,},0,2,231},
2584 /* 0111 1011 dddd 1101 *** mreq rd */
2590 "mreq",OPC_mreq
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2591 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,0,0,0,0,0,},1,2,232},
2594 /* 0111 1011 0000 1001 *** mres */
2600 "mres",OPC_mres
,0,{0},
2601 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+9,0,0,0,0,0,},0,2,233},
2604 /* 0111 1011 0000 1000 *** mset */
2610 "mset",OPC_mset
,0,{0},
2611 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+8,0,0,0,0,0,},0,2,234},
2614 /* 0001 1001 ssN0 dddd *** mult rrd,@rs */
2617 "mult rrd,@rs",16,70,
2620 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2621 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,235},
2624 /* 0101 1001 0000 dddd address_src *** mult rrd,address_src */
2627 "mult rrd,address_src",16,70,
2630 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2631 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,236},
2634 /* 0101 1001 ssN0 dddd address_src *** mult rrd,address_src(rs) */
2637 "mult rrd,address_src(rs)",16,70,
2640 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2641 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,237},
2644 /* 0001 1001 0000 dddd imm16 *** mult rrd,imm16 */
2647 "mult rrd,imm16",16,70,
2650 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2651 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,238},
2654 /* 1001 1001 ssss dddd *** mult rrd,rs */
2657 "mult rrd,rs",16,70,
2660 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2661 {CLASS_BIT
+9,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,239},
2664 /* 0001 1000 ssN0 dddd *** multl rqd,@rs */
2667 "multl rqd,@rs",32,282,
2670 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2671 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,240},
2674 /* 0101 1000 0000 dddd address_src *** multl rqd,address_src */
2677 "multl rqd,address_src",32,282,
2680 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2681 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,241},
2684 /* 0101 1000 ssN0 dddd address_src *** multl rqd,address_src(rs) */
2687 "multl rqd,address_src(rs)",32,282,
2690 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2691 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,242},
2694 /* 0001 1000 0000 dddd imm32 *** multl rqd,imm32 */
2697 "multl rqd,imm32",32,282,
2700 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2701 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,243},
2704 /* 1001 1000 ssss dddd *** multl rqd,rrs */
2707 "multl rqd,rrs",32,282,
2710 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2711 {CLASS_BIT
+9,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,244},
2714 /* 0000 1101 ddN0 0010 *** neg @rd */
2720 "neg",OPC_neg
,0,{CLASS_IR
+(ARG_RD
),},
2721 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,245},
2724 /* 0100 1101 0000 0010 address_dst *** neg address_dst */
2727 "neg address_dst",16,15,
2730 "neg",OPC_neg
,0,{CLASS_DA
+(ARG_DST
),},
2731 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,246},
2734 /* 0100 1101 ddN0 0010 address_dst *** neg address_dst(rd) */
2737 "neg address_dst(rd)",16,16,
2740 "neg",OPC_neg
,0,{CLASS_X
+(ARG_RD
),},
2741 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,247},
2744 /* 1000 1101 dddd 0010 *** neg rd */
2750 "neg",OPC_neg
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2751 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,248},
2754 /* 0000 1100 ddN0 0010 *** negb @rd */
2760 "negb",OPC_negb
,0,{CLASS_IR
+(ARG_RD
),},
2761 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,249},
2764 /* 0100 1100 0000 0010 address_dst *** negb address_dst */
2767 "negb address_dst",8,15,
2770 "negb",OPC_negb
,0,{CLASS_DA
+(ARG_DST
),},
2771 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,250},
2774 /* 0100 1100 ddN0 0010 address_dst *** negb address_dst(rd) */
2777 "negb address_dst(rd)",8,16,
2780 "negb",OPC_negb
,0,{CLASS_X
+(ARG_RD
),},
2781 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,251},
2784 /* 1000 1100 dddd 0010 *** negb rbd */
2790 "negb",OPC_negb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
2791 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,252},
2794 /* 1000 1101 0000 0111 *** nop */
2800 "nop",OPC_nop
,0,{0},
2801 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+7,0,0,0,0,0,},0,2,253},
2804 /* 0000 0101 ssN0 dddd *** or rd,@rs */
2810 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2811 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,254},
2814 /* 0100 0101 0000 dddd address_src *** or rd,address_src */
2817 "or rd,address_src",16,9,
2820 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2821 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,255},
2824 /* 0100 0101 ssN0 dddd address_src *** or rd,address_src(rs) */
2827 "or rd,address_src(rs)",16,10,
2830 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2831 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,256},
2834 /* 0000 0101 0000 dddd imm16 *** or rd,imm16 */
2840 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2841 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,257},
2844 /* 1000 0101 ssss dddd *** or rd,rs */
2850 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2851 {CLASS_BIT
+8,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,258},
2854 /* 0000 0100 ssN0 dddd *** orb rbd,@rs */
2860 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2861 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,259},
2864 /* 0100 0100 0000 dddd address_src *** orb rbd,address_src */
2867 "orb rbd,address_src",8,9,
2870 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2871 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,260},
2874 /* 0100 0100 ssN0 dddd address_src *** orb rbd,address_src(rs) */
2877 "orb rbd,address_src(rs)",8,10,
2880 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2881 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,261},
2884 /* 0000 0100 0000 dddd imm8 imm8 *** orb rbd,imm8 */
2890 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2891 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,262},
2894 /* 1000 0100 ssss dddd *** orb rbd,rbs */
2900 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2901 {CLASS_BIT
+8,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,263},
2904 /* 0011 1111 ddN0 ssss *** out @rd,rs */
2910 "out",OPC_out
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2911 {CLASS_BIT
+3,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,264},
2914 /* 0011 1011 ssss 0110 imm16 *** out imm16,rs */
2917 "out imm16,rs",16,0,
2920 "out",OPC_out
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
2921 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,265},
2924 /* 0011 1110 ddN0 ssss *** outb @rd,rbs */
2930 "outb",OPC_outb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2931 {CLASS_BIT
+3,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,266},
2934 /* 0011 1010 ssss 0110 imm16 *** outb imm16,rbs */
2937 "outb imm16,rbs",8,0,
2940 "outb",OPC_outb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
2941 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,267},
2944 /* 0011 1011 ssN0 1010 0000 aaaa ddN0 1000 *** outd @rd,@rs,ra */
2947 "outd @rd,@rs,ra",16,0,
2950 "outd",OPC_outd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2951 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,268},
2954 /* 0011 1010 ssN0 1010 0000 aaaa ddN0 1000 *** outdb @rd,@rs,rba */
2957 "outdb @rd,@rs,rba",16,0,
2960 "outdb",OPC_outdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
2961 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,269},
2964 /* 0011 1011 ssN0 0010 0000 aaaa ddN0 1000 *** outi @rd,@rs,ra */
2967 "outi @rd,@rs,ra",16,0,
2970 "outi",OPC_outi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2971 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,270},
2974 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 1000 *** outib @rd,@rs,ra */
2977 "outib @rd,@rs,ra",16,0,
2980 "outib",OPC_outib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2981 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,271},
2984 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 0000 *** outibr @rd,@rs,ra */
2987 "outibr @rd,@rs,ra",16,0,
2990 "outibr",OPC_outibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2991 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,272},
2994 /* 0001 0111 ssN0 ddN0 *** pop @rd,@rs */
2997 "pop @rd,@rs",16,12,
3000 "pop",OPC_pop
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3001 {CLASS_BIT
+1,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,273},
3004 /* 0101 0111 ssN0 ddN0 address_dst *** pop address_dst(rd),@rs */
3007 "pop address_dst(rd),@rs",16,16,
3010 "pop",OPC_pop
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3011 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,274},
3014 /* 0101 0111 ssN0 0000 address_dst *** pop address_dst,@rs */
3017 "pop address_dst,@rs",16,16,
3020 "pop",OPC_pop
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
3021 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,275},
3024 /* 1001 0111 ssN0 dddd *** pop rd,@rs */
3030 "pop",OPC_pop
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3031 {CLASS_BIT
+9,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,276},
3034 /* 0001 0101 ssN0 ddN0 *** popl @rd,@rs */
3037 "popl @rd,@rs",32,19,
3040 "popl",OPC_popl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3041 {CLASS_BIT
+1,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,277},
3044 /* 0101 0101 ssN0 ddN0 address_dst *** popl address_dst(rd),@rs */
3047 "popl address_dst(rd),@rs",32,23,
3050 "popl",OPC_popl
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3051 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,278},
3054 /* 0101 0101 ssN0 0000 address_dst *** popl address_dst,@rs */
3057 "popl address_dst,@rs",32,23,
3060 "popl",OPC_popl
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
3061 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,279},
3064 /* 1001 0101 ssN0 dddd *** popl rrd,@rs */
3067 "popl rrd,@rs",32,12,
3070 "popl",OPC_popl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3071 {CLASS_BIT
+9,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,280},
3074 /* 0001 0011 ddN0 ssN0 *** push @rd,@rs */
3077 "push @rd,@rs",16,13,
3080 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3081 {CLASS_BIT
+1,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,281},
3084 /* 0101 0011 ddN0 0000 address_src *** push @rd,address_src */
3087 "push @rd,address_src",16,14,
3090 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3091 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,282},
3094 /* 0101 0011 ddN0 ssN0 address_src *** push @rd,address_src(rs) */
3097 "push @rd,address_src(rs)",16,14,
3100 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3101 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,283},
3104 /* 0000 1101 ddN0 1001 imm16 *** push @rd,imm16 */
3107 "push @rd,imm16",16,12,
3110 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3111 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,284},
3114 /* 1001 0011 ddN0 ssss *** push @rd,rs */
3120 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3121 {CLASS_BIT
+9,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,285},
3124 /* 0001 0001 ddN0 ssN0 *** pushl @rd,@rs */
3127 "pushl @rd,@rs",32,20,
3130 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3131 {CLASS_BIT
+1,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,286},
3134 /* 0101 0001 ddN0 0000 address_src *** pushl @rd,address_src */
3137 "pushl @rd,address_src",32,21,
3140 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3141 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,287},
3144 /* 0101 0001 ddN0 ssN0 address_src *** pushl @rd,address_src(rs) */
3147 "pushl @rd,address_src(rs)",32,21,
3150 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3151 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,288},
3154 /* 1001 0001 ddN0 ssss *** pushl @rd,rrs */
3157 "pushl @rd,rrs",32,12,
3160 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
3161 {CLASS_BIT
+9,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,289},
3164 /* 0010 0011 ddN0 imm4 *** res @rd,imm4 */
3167 "res @rd,imm4",16,11,
3170 "res",OPC_res
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3171 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,290},
3174 /* 0110 0011 ddN0 imm4 address_dst *** res address_dst(rd),imm4 */
3177 "res address_dst(rd),imm4",16,14,
3180 "res",OPC_res
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3181 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,291},
3184 /* 0110 0011 0000 imm4 address_dst *** res address_dst,imm4 */
3187 "res address_dst,imm4",16,13,
3190 "res",OPC_res
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3191 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,292},
3194 /* 1010 0011 dddd imm4 *** res rd,imm4 */
3200 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3201 {CLASS_BIT
+0xa,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,293},
3204 /* 0010 0011 0000 ssss 0000 dddd 0000 0000 *** res rd,rs */
3210 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3211 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,294},
3214 /* 0010 0010 ddN0 imm4 *** resb @rd,imm4 */
3217 "resb @rd,imm4",8,11,
3220 "resb",OPC_resb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3221 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,295},
3224 /* 0110 0010 ddN0 imm4 address_dst *** resb address_dst(rd),imm4 */
3227 "resb address_dst(rd),imm4",8,14,
3230 "resb",OPC_resb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3231 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,296},
3234 /* 0110 0010 0000 imm4 address_dst *** resb address_dst,imm4 */
3237 "resb address_dst,imm4",8,13,
3240 "resb",OPC_resb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3241 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,297},
3244 /* 1010 0010 dddd imm4 *** resb rbd,imm4 */
3247 "resb rbd,imm4",8,4,
3250 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3251 {CLASS_BIT
+0xa,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,298},
3254 /* 0010 0010 0000 ssss 0000 dddd 0000 0000 *** resb rbd,rs */
3260 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3261 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,299},
3264 /* 1000 1101 flags 0011 *** resflg flags */
3267 "resflg flags",16,7,
3270 "resflg",OPC_resflg
,0,{CLASS_FLAGS
,},
3271 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+3,0,0,0,0,0,},1,2,300},
3274 /* 1001 1110 0000 cccc *** ret cc */
3280 "ret",OPC_ret
,0,{CLASS_CC
,},
3281 {CLASS_BIT
+9,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,0,0,0,0,0,},1,2,301},
3284 /* 1011 0011 dddd 00I0 *** rl rd,imm1or2 */
3287 "rl rd,imm1or2",16,6,
3290 "rl",OPC_rl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3291 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,302},
3294 /* 1011 0010 dddd 00I0 *** rlb rbd,imm1or2 */
3297 "rlb rbd,imm1or2",8,6,
3300 "rlb",OPC_rlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3301 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,303},
3304 /* 1011 0011 dddd 10I0 *** rlc rd,imm1or2 */
3307 "rlc rd,imm1or2",16,6,
3310 "rlc",OPC_rlc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3311 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,304},
3314 /* 1011 0010 dddd 10I0 *** rlcb rbd,imm1or2 */
3317 "rlcb rbd,imm1or2",8,9,
3320 "rlcb",OPC_rlcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3321 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,305},
3324 /* 1011 1110 aaaa bbbb *** rldb rbb,rba */
3330 "rldb",OPC_rldb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
3331 {CLASS_BIT
+0xb,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,306},
3334 /* 1011 0011 dddd 01I0 *** rr rd,imm1or2 */
3337 "rr rd,imm1or2",16,6,
3340 "rr",OPC_rr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3341 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,307},
3344 /* 1011 0010 dddd 01I0 *** rrb rbd,imm1or2 */
3347 "rrb rbd,imm1or2",8,6,
3350 "rrb",OPC_rrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3351 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,308},
3354 /* 1011 0011 dddd 11I0 *** rrc rd,imm1or2 */
3357 "rrc rd,imm1or2",16,6,
3360 "rrc",OPC_rrc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3361 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,309},
3364 /* 1011 0010 dddd 11I0 *** rrcb rbd,imm1or2 */
3367 "rrcb rbd,imm1or2",8,9,
3370 "rrcb",OPC_rrcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3371 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,310},
3374 /* 1011 1100 aaaa bbbb *** rrdb rbb,rba */
3380 "rrdb",OPC_rrdb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
3381 {CLASS_BIT
+0xb,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,311},
3384 /* 0011 0110 imm8 *** rsvd36 */
3390 "rsvd36",OPC_rsvd36
,0,{0},
3391 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,312},
3394 /* 0011 1000 imm8 *** rsvd38 */
3400 "rsvd38",OPC_rsvd38
,0,{0},
3401 {CLASS_BIT
+3,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,313},
3404 /* 0111 1000 imm8 *** rsvd78 */
3410 "rsvd78",OPC_rsvd78
,0,{0},
3411 {CLASS_BIT
+7,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,314},
3414 /* 0111 1110 imm8 *** rsvd7e */
3420 "rsvd7e",OPC_rsvd7e
,0,{0},
3421 {CLASS_BIT
+7,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,315},
3424 /* 1001 1101 imm8 *** rsvd9d */
3430 "rsvd9d",OPC_rsvd9d
,0,{0},
3431 {CLASS_BIT
+9,CLASS_BIT
+0xd,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,316},
3434 /* 1001 1111 imm8 *** rsvd9f */
3440 "rsvd9f",OPC_rsvd9f
,0,{0},
3441 {CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,317},
3444 /* 1011 1001 imm8 *** rsvdb9 */
3450 "rsvdb9",OPC_rsvdb9
,0,{0},
3451 {CLASS_BIT
+0xb,CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,318},
3454 /* 1011 1111 imm8 *** rsvdbf */
3460 "rsvdbf",OPC_rsvdbf
,0,{0},
3461 {CLASS_BIT
+0xb,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,319},
3464 /* 1011 0111 ssss dddd *** sbc rd,rs */
3470 "sbc",OPC_sbc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3471 {CLASS_BIT
+0xb,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,320},
3474 /* 1011 0110 ssss dddd *** sbcb rbd,rbs */
3480 "sbcb",OPC_sbcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3481 {CLASS_BIT
+0xb,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,321},
3484 /* 0111 1111 imm8 *** sc imm8 */
3490 "sc",OPC_sc
,0,{CLASS_IMM
+(ARG_IMM8
),},
3491 {CLASS_BIT
+7,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,322},
3494 /* 1011 0011 dddd 1011 0000 ssss 0000 0000 *** sda rd,rs */
3500 "sda",OPC_sda
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3501 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,323},
3504 /* 1011 0010 dddd 1011 0000 ssss 0000 0000 *** sdab rbd,rs */
3510 "sdab",OPC_sdab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3511 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,324},
3514 /* 1011 0011 dddd 1111 0000 ssss 0000 0000 *** sdal rrd,rs */
3517 "sdal rrd,rs",32,15,
3520 "sdal",OPC_sdal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3521 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,325},
3524 /* 1011 0011 dddd 0011 0000 ssss 0000 0000 *** sdl rd,rs */
3530 "sdl",OPC_sdl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3531 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,326},
3534 /* 1011 0010 dddd 0011 0000 ssss 0000 0000 *** sdlb rbd,rs */
3540 "sdlb",OPC_sdlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3541 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,327},
3544 /* 1011 0011 dddd 0111 0000 ssss 0000 0000 *** sdll rrd,rs */
3547 "sdll rrd,rs",32,15,
3550 "sdll",OPC_sdll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3551 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,328},
3554 /* 0010 0101 ddN0 imm4 *** set @rd,imm4 */
3557 "set @rd,imm4",16,11,
3560 "set",OPC_set
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3561 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,329},
3564 /* 0110 0101 ddN0 imm4 address_dst *** set address_dst(rd),imm4 */
3567 "set address_dst(rd),imm4",16,14,
3570 "set",OPC_set
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3571 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,330},
3574 /* 0110 0101 0000 imm4 address_dst *** set address_dst,imm4 */
3577 "set address_dst,imm4",16,13,
3580 "set",OPC_set
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3581 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,331},
3584 /* 1010 0101 dddd imm4 *** set rd,imm4 */
3590 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3591 {CLASS_BIT
+0xa,CLASS_BIT
+5,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,332},
3594 /* 0010 0101 0000 ssss 0000 dddd 0000 0000 *** set rd,rs */
3600 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3601 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,333},
3604 /* 0010 0100 ddN0 imm4 *** setb @rd,imm4 */
3607 "setb @rd,imm4",8,11,
3610 "setb",OPC_setb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3611 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,334},
3614 /* 0110 0100 ddN0 imm4 address_dst *** setb address_dst(rd),imm4 */
3617 "setb address_dst(rd),imm4",8,14,
3620 "setb",OPC_setb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3621 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,335},
3624 /* 0110 0100 0000 imm4 address_dst *** setb address_dst,imm4 */
3627 "setb address_dst,imm4",8,13,
3630 "setb",OPC_setb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3631 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,336},
3634 /* 1010 0100 dddd imm4 *** setb rbd,imm4 */
3637 "setb rbd,imm4",8,4,
3640 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3641 {CLASS_BIT
+0xa,CLASS_BIT
+4,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,337},
3644 /* 0010 0100 0000 ssss 0000 dddd 0000 0000 *** setb rbd,rs */
3650 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3651 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,338},
3654 /* 1000 1101 flags 0001 *** setflg flags */
3657 "setflg flags",16,7,
3660 "setflg",OPC_setflg
,0,{CLASS_FLAGS
,},
3661 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+1,0,0,0,0,0,},1,2,339},
3664 /* 0011 1011 dddd 0101 imm16 *** sin rd,imm16 */
3670 "sin",OPC_sin
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3671 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,340},
3674 /* 0011 1010 dddd 0101 imm16 *** sinb rbd,imm16 */
3677 "sinb rbd,imm16",8,0,
3680 "sinb",OPC_sinb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3681 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,341},
3684 /* 0011 1011 ssN0 1000 0001 aaaa ddN0 1000 *** sind @rd,@rs,ra */
3687 "sind @rd,@rs,ra",16,0,
3690 "sind",OPC_sind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3691 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,342},
3694 /* 0011 1010 ssN0 1000 0001 aaaa ddN0 1000 *** sindb @rd,@rs,rba */
3697 "sindb @rd,@rs,rba",8,0,
3700 "sindb",OPC_sindb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3701 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,343},
3704 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 1000 *** sinib @rd,@rs,ra */
3707 "sinib @rd,@rs,ra",8,0,
3710 "sinib",OPC_sinib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3711 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,344},
3714 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 0000 *** sinibr @rd,@rs,ra */
3717 "sinibr @rd,@rs,ra",16,0,
3720 "sinibr",OPC_sinibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3721 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,345},
3724 /* 1011 0011 dddd 1001 0000 0000 imm8 *** sla rd,imm8 */
3727 "sla rd,imm8",16,13,
3730 "sla",OPC_sla
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3731 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,346},
3734 /* 1011 0010 dddd 1001 iiii iiii 0000 imm4 *** slab rbd,imm4 */
3737 "slab rbd,imm4",8,13,
3740 "slab",OPC_slab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3741 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),0,},2,4,347},
3744 /* 1011 0011 dddd 1101 0000 0000 imm8 *** slal rrd,imm8 */
3747 "slal rrd,imm8",32,13,
3750 "slal",OPC_slal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3751 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,348},
3754 /* 1011 0011 dddd 0001 0000 0000 imm8 *** sll rd,imm8 */
3757 "sll rd,imm8",16,13,
3760 "sll",OPC_sll
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3761 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,349},
3764 /* 1011 0010 dddd 0001 iiii iiii 0000 imm4 *** sllb rbd,imm4 */
3767 "sllb rbd,imm4",8,13,
3770 "sllb",OPC_sllb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3771 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),0,},2,4,350},
3774 /* 1011 0011 dddd 0101 0000 0000 imm8 *** slll rrd,imm8 */
3777 "slll rrd,imm8",32,13,
3780 "slll",OPC_slll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3781 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,351},
3784 /* 0011 1011 ssss 0111 imm16 *** sout imm16,rs */
3787 "sout imm16,rs",16,0,
3790 "sout",OPC_sout
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
3791 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,352},
3794 /* 0011 1010 ssss 0111 imm16 *** soutb imm16,rbs */
3797 "soutb imm16,rbs",8,0,
3800 "soutb",OPC_soutb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
3801 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,353},
3804 /* 0011 1011 ssN0 1011 0000 aaaa ddN0 1000 *** soutd @rd,@rs,ra */
3807 "soutd @rd,@rs,ra",16,0,
3810 "soutd",OPC_soutd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3811 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,354},
3814 /* 0011 1010 ssN0 1011 0000 aaaa ddN0 1000 *** soutdb @rd,@rs,rba */
3817 "soutdb @rd,@rs,rba",8,0,
3820 "soutdb",OPC_soutdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3821 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,355},
3824 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 1000 *** soutib @rd,@rs,ra */
3827 "soutib @rd,@rs,ra",8,0,
3830 "soutib",OPC_soutib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3831 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,356},
3834 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 0000 *** soutibr @rd,@rs,ra */
3837 "soutibr @rd,@rs,ra",16,0,
3840 "soutibr",OPC_soutibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3841 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,357},
3844 /* 1011 0011 dddd 1001 1111 1111 nim8 *** sra rd,imm8 */
3847 "sra rd,imm8",16,13,
3850 "sra",OPC_sra
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3851 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,358},
3854 /* 1011 0010 dddd 1001 iiii iiii 1111 nim4 *** srab rbd,imm4 */
3857 "srab rbd,imm4",8,13,
3860 "srab",OPC_srab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3861 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM4
),0,},2,4,359},
3864 /* 1011 0011 dddd 1101 1111 1111 nim8 *** sral rrd,imm8 */
3867 "sral rrd,imm8",32,13,
3870 "sral",OPC_sral
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3871 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,360},
3874 /* 1011 0011 dddd 0001 1111 1111 nim8 *** srl rd,imm8 */
3877 "srl rd,imm8",16,13,
3880 "srl",OPC_srl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3881 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,361},
3884 /* 1011 0010 dddd 0001 iiii iiii 1111 nim4 *** srlb rbd,imm4 */
3887 "srlb rbd,imm4",8,13,
3890 "srlb",OPC_srlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3891 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM4
),0,},2,4,362},
3894 /* 1011 0011 dddd 0101 1111 1111 nim8 *** srll rrd,imm8 */
3897 "srll rrd,imm8",32,13,
3900 "srll",OPC_srll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3901 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,363},
3904 /* 0000 0011 ssN0 dddd *** sub rd,@rs */
3910 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3911 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,364},
3914 /* 0100 0011 0000 dddd address_src *** sub rd,address_src */
3917 "sub rd,address_src",16,9,
3920 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3921 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,365},
3924 /* 0100 0011 ssN0 dddd address_src *** sub rd,address_src(rs) */
3927 "sub rd,address_src(rs)",16,10,
3930 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3931 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,366},
3934 /* 0000 0011 0000 dddd imm16 *** sub rd,imm16 */
3937 "sub rd,imm16",16,7,
3940 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3941 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,367},
3944 /* 1000 0011 ssss dddd *** sub rd,rs */
3950 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3951 {CLASS_BIT
+8,CLASS_BIT
+3,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,368},
3954 /* 0000 0010 ssN0 dddd *** subb rbd,@rs */
3960 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3961 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,369},
3964 /* 0100 0010 0000 dddd address_src *** subb rbd,address_src */
3967 "subb rbd,address_src",8,9,
3970 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3971 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,370},
3974 /* 0100 0010 ssN0 dddd address_src *** subb rbd,address_src(rs) */
3977 "subb rbd,address_src(rs)",8,10,
3980 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3981 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,371},
3984 /* 0000 0010 0000 dddd imm8 imm8 *** subb rbd,imm8 */
3987 "subb rbd,imm8",8,7,
3990 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3991 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,372},
3994 /* 1000 0010 ssss dddd *** subb rbd,rbs */
4000 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4001 {CLASS_BIT
+8,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,373},
4004 /* 0001 0010 ssN0 dddd *** subl rrd,@rs */
4007 "subl rrd,@rs",32,14,
4010 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4011 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,374},
4014 /* 0101 0010 0000 dddd address_src *** subl rrd,address_src */
4017 "subl rrd,address_src",32,15,
4020 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4021 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,375},
4024 /* 0101 0010 ssN0 dddd address_src *** subl rrd,address_src(rs) */
4027 "subl rrd,address_src(rs)",32,16,
4030 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4031 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,376},
4034 /* 0001 0010 0000 dddd imm32 *** subl rrd,imm32 */
4037 "subl rrd,imm32",32,14,
4040 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
4041 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,377},
4044 /* 1001 0010 ssss dddd *** subl rrd,rrs */
4047 "subl rrd,rrs",32,8,
4050 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
4051 {CLASS_BIT
+9,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,378},
4054 /* 1010 1111 dddd cccc *** tcc cc,rd */
4060 "tcc",OPC_tcc
,0,{CLASS_CC
,CLASS_REG_WORD
+(ARG_RD
),},
4061 {CLASS_BIT
+0xa,CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,379},
4064 /* 1010 1110 dddd cccc *** tccb cc,rbd */
4070 "tccb",OPC_tccb
,0,{CLASS_CC
,CLASS_REG_BYTE
+(ARG_RD
),},
4071 {CLASS_BIT
+0xa,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,380},
4074 /* 0000 1101 ddN0 0100 *** test @rd */
4080 "test",OPC_test
,0,{CLASS_IR
+(ARG_RD
),},
4081 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,381},
4084 /* 0100 1101 0000 0100 address_dst *** test address_dst */
4087 "test address_dst",16,11,
4090 "test",OPC_test
,0,{CLASS_DA
+(ARG_DST
),},
4091 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,382},
4094 /* 0100 1101 ddN0 0100 address_dst *** test address_dst(rd) */
4097 "test address_dst(rd)",16,12,
4100 "test",OPC_test
,0,{CLASS_X
+(ARG_RD
),},
4101 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,383},
4104 /* 1000 1101 dddd 0100 *** test rd */
4110 "test",OPC_test
,0,{CLASS_REG_WORD
+(ARG_RD
),},
4111 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,384},
4114 /* 0000 1100 ddN0 0100 *** testb @rd */
4120 "testb",OPC_testb
,0,{CLASS_IR
+(ARG_RD
),},
4121 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,385},
4124 /* 0100 1100 0000 0100 address_dst *** testb address_dst */
4127 "testb address_dst",8,11,
4130 "testb",OPC_testb
,0,{CLASS_DA
+(ARG_DST
),},
4131 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,386},
4134 /* 0100 1100 ddN0 0100 address_dst *** testb address_dst(rd) */
4137 "testb address_dst(rd)",8,12,
4140 "testb",OPC_testb
,0,{CLASS_X
+(ARG_RD
),},
4141 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,387},
4144 /* 1000 1100 dddd 0100 *** testb rbd */
4150 "testb",OPC_testb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
4151 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,388},
4154 /* 0001 1100 ddN0 1000 *** testl @rd */
4160 "testl",OPC_testl
,0,{CLASS_IR
+(ARG_RD
),},
4161 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,389},
4164 /* 0101 1100 0000 1000 address_dst *** testl address_dst */
4167 "testl address_dst",32,16,
4170 "testl",OPC_testl
,0,{CLASS_DA
+(ARG_DST
),},
4171 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,390},
4174 /* 0101 1100 ddN0 1000 address_dst *** testl address_dst(rd) */
4177 "testl address_dst(rd)",32,17,
4180 "testl",OPC_testl
,0,{CLASS_X
+(ARG_RD
),},
4181 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,391},
4184 /* 1001 1100 dddd 1000 *** testl rrd */
4190 "testl",OPC_testl
,0,{CLASS_REG_LONG
+(ARG_RD
),},
4191 {CLASS_BIT
+9,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,392},
4194 /* 1011 1000 ddN0 1000 0000 aaaa ssN0 0000 *** trdb @rd,@rs,rba */
4197 "trdb @rd,@rs,rba",8,25,
4200 "trdb",OPC_trdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
4201 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,393},
4204 /* 1011 1000 ddN0 1100 0000 aaaa ssN0 0000 *** trdrb @rd,@rs,rba */
4207 "trdrb @rd,@rs,rba",8,25,
4210 "trdrb",OPC_trdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
4211 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,394},
4214 /* 1011 1000 ddN0 0000 0000 rrrr ssN0 0000 *** trib @rd,@rs,rbr */
4217 "trib @rd,@rs,rbr",8,25,
4220 "trib",OPC_trib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
4221 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,395},
4224 /* 1011 1000 ddN0 0100 0000 rrrr ssN0 0000 *** trirb @rd,@rs,rbr */
4227 "trirb @rd,@rs,rbr",8,25,
4230 "trirb",OPC_trirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
4231 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,396},
4234 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtdb @ra,@rb,rbr */
4237 "trtdb @ra,@rb,rbr",8,25,
4240 "trtdb",OPC_trtdb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4241 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,397},
4244 /* 1011 1000 aaN0 1110 0000 rrrr bbN0 1110 *** trtdrb @ra,@rb,rbr */
4247 "trtdrb @ra,@rb,rbr",8,25,
4250 "trtdrb",OPC_trtdrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4251 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,398},
4254 /* 1011 1000 aaN0 0010 0000 rrrr bbN0 0000 *** trtib @ra,@rb,rbr */
4257 "trtib @ra,@rb,rbr",8,25,
4260 "trtib",OPC_trtib
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4261 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,399},
4264 /* 1011 1000 aaN0 0110 0000 rrrr bbN0 1110 *** trtirb @ra,@rb,rbr */
4267 "trtirb @ra,@rb,rbr",8,25,
4270 "trtirb",OPC_trtirb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4271 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,400},
4274 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtrb @ra,@rb,rbr */
4277 "trtrb @ra,@rb,rbr",8,25,
4280 "trtrb",OPC_trtrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4281 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,401},
4284 /* 0000 1101 ddN0 0110 *** tset @rd */
4290 "tset",OPC_tset
,0,{CLASS_IR
+(ARG_RD
),},
4291 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,402},
4294 /* 0100 1101 0000 0110 address_dst *** tset address_dst */
4297 "tset address_dst",16,14,
4300 "tset",OPC_tset
,0,{CLASS_DA
+(ARG_DST
),},
4301 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,403},
4304 /* 0100 1101 ddN0 0110 address_dst *** tset address_dst(rd) */
4307 "tset address_dst(rd)",16,15,
4310 "tset",OPC_tset
,0,{CLASS_X
+(ARG_RD
),},
4311 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,404},
4314 /* 1000 1101 dddd 0110 *** tset rd */
4320 "tset",OPC_tset
,0,{CLASS_REG_WORD
+(ARG_RD
),},
4321 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,405},
4324 /* 0000 1100 ddN0 0110 *** tsetb @rd */
4330 "tsetb",OPC_tsetb
,0,{CLASS_IR
+(ARG_RD
),},
4331 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,406},
4334 /* 0100 1100 0000 0110 address_dst *** tsetb address_dst */
4337 "tsetb address_dst",8,14,
4340 "tsetb",OPC_tsetb
,0,{CLASS_DA
+(ARG_DST
),},
4341 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,407},
4344 /* 0100 1100 ddN0 0110 address_dst *** tsetb address_dst(rd) */
4347 "tsetb address_dst(rd)",8,15,
4350 "tsetb",OPC_tsetb
,0,{CLASS_X
+(ARG_RD
),},
4351 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,408},
4354 /* 1000 1100 dddd 0110 *** tsetb rbd */
4360 "tsetb",OPC_tsetb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
4361 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,409},
4364 /* 0000 1001 ssN0 dddd *** xor rd,@rs */
4370 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4371 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,410},
4374 /* 0100 1001 0000 dddd address_src *** xor rd,address_src */
4377 "xor rd,address_src",16,9,
4380 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4381 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,411},
4384 /* 0100 1001 ssN0 dddd address_src *** xor rd,address_src(rs) */
4387 "xor rd,address_src(rs)",16,10,
4390 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4391 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,412},
4394 /* 0000 1001 0000 dddd imm16 *** xor rd,imm16 */
4397 "xor rd,imm16",16,7,
4400 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
4401 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,413},
4404 /* 1000 1001 ssss dddd *** xor rd,rs */
4410 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
4411 {CLASS_BIT
+8,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,414},
4414 /* 0000 1000 ssN0 dddd *** xorb rbd,@rs */
4420 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4421 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,415},
4424 /* 0100 1000 0000 dddd address_src *** xorb rbd,address_src */
4427 "xorb rbd,address_src",8,9,
4430 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4431 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,416},
4434 /* 0100 1000 ssN0 dddd address_src *** xorb rbd,address_src(rs) */
4437 "xorb rbd,address_src(rs)",8,10,
4440 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4441 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,417},
4444 /* 0000 1000 0000 dddd imm8 imm8 *** xorb rbd,imm8 */
4447 "xorb rbd,imm8",8,7,
4450 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
4451 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,418},
4454 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
4460 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4461 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,419},
4464 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
4470 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4471 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,420},
4479 NULL
,0,0,{0,0,0,0},{0,0,0,0,0,0,0,0,0,0},0,0,0}