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* elf32-ppc.c (LWZU_0_X_11): Delete.
[binutils.git] / gas / config / tc-v850.c
blob33eef58399a8b8396863a1800d4dd9a0281898af
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/v850.h"
27 #include "dwarf2dbg.h"
28
29 /* Sign-extend a 16-bit number. */
30 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
31
32 /* Temporarily holds the reloc in a cons expression. */
33 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
34
35 /* Set to TRUE if we want to be pedantic about signed overflows. */
36 static bfd_boolean warn_signed_overflows = FALSE;
37 static bfd_boolean warn_unsigned_overflows = FALSE;
38
39 /* Indicates the target BFD machine number. */
40 static int machine = -1;
41
42 /* Indicates the target processor(s) for the assemble. */
43 static int processor_mask = -1;
44 \f
45 /* Structure to hold information about predefined registers. */
46 struct reg_name
47 {
48 const char *name;
49 int value;
50 };
51
52 /* Generic assembler global variables which must be defined by all
53 targets. */
54
55 /* Characters which always start a comment. */
56 const char comment_chars[] = "#";
57
58 /* Characters which start a comment at the beginning of a line. */
59 const char line_comment_chars[] = ";#";
60
61 /* Characters which may be used to separate multiple commands on a
62 single line. */
63 const char line_separator_chars[] = ";";
64
65 /* Characters which are used to indicate an exponent in a floating
66 point number. */
67 const char EXP_CHARS[] = "eE";
68
69 /* Characters which mean that a number is a floating point constant,
70 as in 0d1.0. */
71 const char FLT_CHARS[] = "dD";
72 \f
73 const relax_typeS md_relax_table[] =
74 {
75 /* Conditional branches. */
76 {0xff, -0x100, 2, 1},
77 {0x1fffff, -0x200000, 6, 0},
78 /* Unconditional branches. */
79 {0xff, -0x100, 2, 3},
80 {0x1fffff, -0x200000, 4, 0},
81 };
82
83 static int v850_relax = 0;
84
85 /* Fixups. */
86 #define MAX_INSN_FIXUPS 5
87
88 struct v850_fixup
89 {
90 expressionS exp;
91 int opindex;
92 bfd_reloc_code_real_type reloc;
93 };
94
95 struct v850_fixup fixups[MAX_INSN_FIXUPS];
96 static int fc;
97
98 struct v850_seg_entry
99 {
100 segT s;
101 const char *name;
102 flagword flags;
103 };
104
105 struct v850_seg_entry v850_seg_table[] =
106 {
107 { NULL, ".sdata",
108 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
109 | SEC_SMALL_DATA },
110 { NULL, ".tdata",
111 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
112 { NULL, ".zdata",
113 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
114 { NULL, ".sbss",
115 SEC_ALLOC | SEC_SMALL_DATA },
116 { NULL, ".tbss",
117 SEC_ALLOC },
118 { NULL, ".zbss",
119 SEC_ALLOC},
120 { NULL, ".rosdata",
121 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
122 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
123 { NULL, ".rozdata",
124 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
125 | SEC_HAS_CONTENTS },
126 { NULL, ".scommon",
127 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
128 | SEC_SMALL_DATA | SEC_IS_COMMON },
129 { NULL, ".tcommon",
130 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
131 | SEC_IS_COMMON },
132 { NULL, ".zcommon",
133 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
134 | SEC_IS_COMMON },
135 { NULL, ".call_table_data",
136 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
137 { NULL, ".call_table_text",
138 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
139 | SEC_HAS_CONTENTS},
140 { NULL, ".bss",
141 SEC_ALLOC }
142 };
143
144 #define SDATA_SECTION 0
145 #define TDATA_SECTION 1
146 #define ZDATA_SECTION 2
147 #define SBSS_SECTION 3
148 #define TBSS_SECTION 4
149 #define ZBSS_SECTION 5
150 #define ROSDATA_SECTION 6
151 #define ROZDATA_SECTION 7
152 #define SCOMMON_SECTION 8
153 #define TCOMMON_SECTION 9
154 #define ZCOMMON_SECTION 10
155 #define CALL_TABLE_DATA_SECTION 11
156 #define CALL_TABLE_TEXT_SECTION 12
157 #define BSS_SECTION 13
158
159 static void
160 do_v850_seg (int i, subsegT sub)
161 {
162 struct v850_seg_entry *seg = v850_seg_table + i;
163
164 obj_elf_section_change_hook ();
165
166 if (seg->s != NULL)
167 subseg_set (seg->s, sub);
168 else
169 {
170 seg->s = subseg_new (seg->name, sub);
171 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
172 if ((seg->flags & SEC_LOAD) == 0)
173 seg_info (seg->s)->bss = 1;
174 }
175 }
176
177 static void
178 v850_seg (int i)
179 {
180 subsegT sub = get_absolute_expression ();
181
182 do_v850_seg (i, sub);
183 demand_empty_rest_of_line ();
184 }
185
186 static void
187 v850_offset (int ignore ATTRIBUTE_UNUSED)
188 {
189 char *pfrag;
190 int temp = get_absolute_expression ();
191
192 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
193 (offsetT) temp, (char *) 0);
194 *pfrag = 0;
195
196 demand_empty_rest_of_line ();
197 }
198
199 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
200
201 static void
202 v850_comm (int area)
203 {
204 char *name;
205 char c;
206 char *p;
207 int temp;
208 unsigned int size;
209 symbolS *symbolP;
210 int have_align;
211
212 name = input_line_pointer;
213 c = get_symbol_end ();
214
215 /* Just after name is now '\0'. */
216 p = input_line_pointer;
217 *p = c;
218
219 SKIP_WHITESPACE ();
220
221 if (*input_line_pointer != ',')
222 {
223 as_bad (_("Expected comma after symbol-name"));
224 ignore_rest_of_line ();
225 return;
226 }
227
228 /* Skip ','. */
229 input_line_pointer++;
230
231 if ((temp = get_absolute_expression ()) < 0)
232 {
233 /* xgettext:c-format */
234 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
235 ignore_rest_of_line ();
236 return;
237 }
238
239 size = temp;
240 *p = 0;
241 symbolP = symbol_find_or_make (name);
242 *p = c;
243
244 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
245 {
246 as_bad (_("Ignoring attempt to re-define symbol"));
247 ignore_rest_of_line ();
248 return;
249 }
250
251 if (S_GET_VALUE (symbolP) != 0)
252 {
253 if (S_GET_VALUE (symbolP) != size)
254 /* xgettext:c-format */
255 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
256 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
257 }
258
259 know (symbol_get_frag (symbolP) == &zero_address_frag);
260
261 if (*input_line_pointer != ',')
262 have_align = 0;
263 else
264 {
265 have_align = 1;
266 input_line_pointer++;
267 SKIP_WHITESPACE ();
268 }
269
270 if (! have_align || *input_line_pointer != '"')
271 {
272 if (! have_align)
273 temp = 0;
274 else
275 {
276 temp = get_absolute_expression ();
277
278 if (temp < 0)
279 {
280 temp = 0;
281 as_warn (_("Common alignment negative; 0 assumed"));
282 }
283 }
284
285 if (symbol_get_obj (symbolP)->local)
286 {
287 segT old_sec;
288 int old_subsec;
289 char *pfrag;
290 int align;
291 flagword applicable;
292
293 old_sec = now_seg;
294 old_subsec = now_subseg;
295
296 applicable = bfd_applicable_section_flags (stdoutput);
297
298 applicable &= SEC_ALLOC;
299
300 switch (area)
301 {
302 case SCOMMON_SECTION:
303 do_v850_seg (SBSS_SECTION, 0);
304 break;
305
306 case ZCOMMON_SECTION:
307 do_v850_seg (ZBSS_SECTION, 0);
308 break;
309
310 case TCOMMON_SECTION:
311 do_v850_seg (TBSS_SECTION, 0);
312 break;
313 }
314
315 if (temp)
316 {
317 /* Convert to a power of 2 alignment. */
318 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
319 ;
320
321 if (temp != 1)
322 {
323 as_bad (_("Common alignment not a power of 2"));
324 ignore_rest_of_line ();
325 return;
326 }
327 }
328 else
329 align = 0;
330
331 record_alignment (now_seg, align);
332
333 if (align)
334 frag_align (align, 0, 0);
335
336 switch (area)
337 {
338 case SCOMMON_SECTION:
339 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
340 symbol_get_frag (symbolP)->fr_symbol = 0;
341 break;
342
343 case ZCOMMON_SECTION:
344 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
345 symbol_get_frag (symbolP)->fr_symbol = 0;
346 break;
347
348 case TCOMMON_SECTION:
349 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
350 symbol_get_frag (symbolP)->fr_symbol = 0;
351 break;
352
353 default:
354 abort ();
355 }
356
357 symbol_set_frag (symbolP, frag_now);
358 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
359 (offsetT) size, (char *) 0);
360 *pfrag = 0;
361 S_SET_SIZE (symbolP, size);
362
363 switch (area)
364 {
365 case SCOMMON_SECTION:
366 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
367 break;
368
369 case ZCOMMON_SECTION:
370 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
371 break;
372
373 case TCOMMON_SECTION:
374 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
375 break;
376
377 default:
378 abort ();
379 }
380
381 S_CLEAR_EXTERNAL (symbolP);
382 obj_elf_section_change_hook ();
383 subseg_set (old_sec, old_subsec);
384 }
385 else
386 {
387 segT old_sec;
388 int old_subsec;
389
390 allocate_common:
391 old_sec = now_seg;
392 old_subsec = now_subseg;
393
394 S_SET_VALUE (symbolP, (valueT) size);
395 S_SET_ALIGN (symbolP, temp);
396 S_SET_EXTERNAL (symbolP);
397
398 switch (area)
399 {
400 case SCOMMON_SECTION:
401 case ZCOMMON_SECTION:
402 case TCOMMON_SECTION:
403 do_v850_seg (area, 0);
404 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
405 break;
406
407 default:
408 abort ();
409 }
410
411 obj_elf_section_change_hook ();
412 subseg_set (old_sec, old_subsec);
413 }
414 }
415 else
416 {
417 input_line_pointer++;
418
419 /* @@ Some use the dot, some don't. Can we get some consistency?? */
420 if (*input_line_pointer == '.')
421 input_line_pointer++;
422
423 /* @@ Some say data, some say bss. */
424 if (strncmp (input_line_pointer, "bss\"", 4)
425 && strncmp (input_line_pointer, "data\"", 5))
426 {
427 while (*--input_line_pointer != '"')
428 ;
429 input_line_pointer--;
430 goto bad_common_segment;
431 }
432
433 while (*input_line_pointer++ != '"')
434 ;
435
436 goto allocate_common;
437 }
438
439 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
440
441 demand_empty_rest_of_line ();
442 return;
443
444 {
445 bad_common_segment:
446 p = input_line_pointer;
447 while (*p && *p != '\n')
448 p++;
449 c = *p;
450 *p = '\0';
451 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
452 *p = c;
453 input_line_pointer = p;
454 ignore_rest_of_line ();
455 return;
456 }
457 }
458
459 static void
460 set_machine (int number)
461 {
462 machine = number;
463 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
464
465 switch (machine)
466 {
467 case 0: processor_mask = PROCESSOR_V850; break;
468 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
469 case bfd_mach_v850e1: processor_mask = PROCESSOR_V850E; break;
470 }
471 }
472
473 static void
474 v850_longcode (int type)
475 {
476 expressionS ex;
477
478 if (! v850_relax)
479 {
480 if (type == 1)
481 as_warn (".longcall pseudo-op seen when not relaxing");
482 else
483 as_warn (".longjump pseudo-op seen when not relaxing");
484 }
485
486 expression (&ex);
487
488 if (ex.X_op != O_symbol || ex.X_add_number != 0)
489 {
490 as_bad ("bad .longcall format");
491 ignore_rest_of_line ();
492
493 return;
494 }
495
496 if (type == 1)
497 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
498 BFD_RELOC_V850_LONGCALL);
499 else
500 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
501 BFD_RELOC_V850_LONGJUMP);
502
503 demand_empty_rest_of_line ();
504 }
505
506 /* The target specific pseudo-ops which we support. */
507 const pseudo_typeS md_pseudo_table[] =
508 {
509 { "sdata", v850_seg, SDATA_SECTION },
510 { "tdata", v850_seg, TDATA_SECTION },
511 { "zdata", v850_seg, ZDATA_SECTION },
512 { "sbss", v850_seg, SBSS_SECTION },
513 { "tbss", v850_seg, TBSS_SECTION },
514 { "zbss", v850_seg, ZBSS_SECTION },
515 { "rosdata", v850_seg, ROSDATA_SECTION },
516 { "rozdata", v850_seg, ROZDATA_SECTION },
517 { "bss", v850_seg, BSS_SECTION },
518 { "offset", v850_offset, 0 },
519 { "word", cons, 4 },
520 { "zcomm", v850_comm, ZCOMMON_SECTION },
521 { "scomm", v850_comm, SCOMMON_SECTION },
522 { "tcomm", v850_comm, TCOMMON_SECTION },
523 { "v850", set_machine, 0 },
524 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
525 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
526 { "v850e", set_machine, bfd_mach_v850e },
527 { "v850e1", set_machine, bfd_mach_v850e1 },
528 { "longcall", v850_longcode, 1 },
529 { "longjump", v850_longcode, 2 },
530 { NULL, NULL, 0 }
531 };
532
533 /* Opcode hash table. */
534 static struct hash_control *v850_hash;
535
536 /* This table is sorted. Suitable for searching by a binary search. */
537 static const struct reg_name pre_defined_registers[] =
538 {
539 { "ep", 30 }, /* ep - element ptr. */
540 { "gp", 4 }, /* gp - global ptr. */
541 { "hp", 2 }, /* hp - handler stack ptr. */
542 { "lp", 31 }, /* lp - link ptr. */
543 { "r0", 0 },
544 { "r1", 1 },
545 { "r10", 10 },
546 { "r11", 11 },
547 { "r12", 12 },
548 { "r13", 13 },
549 { "r14", 14 },
550 { "r15", 15 },
551 { "r16", 16 },
552 { "r17", 17 },
553 { "r18", 18 },
554 { "r19", 19 },
555 { "r2", 2 },
556 { "r20", 20 },
557 { "r21", 21 },
558 { "r22", 22 },
559 { "r23", 23 },
560 { "r24", 24 },
561 { "r25", 25 },
562 { "r26", 26 },
563 { "r27", 27 },
564 { "r28", 28 },
565 { "r29", 29 },
566 { "r3", 3 },
567 { "r30", 30 },
568 { "r31", 31 },
569 { "r4", 4 },
570 { "r5", 5 },
571 { "r6", 6 },
572 { "r7", 7 },
573 { "r8", 8 },
574 { "r9", 9 },
575 { "sp", 3 }, /* sp - stack ptr. */
576 { "tp", 5 }, /* tp - text ptr. */
577 { "zero", 0 },
578 };
579
580 #define REG_NAME_CNT \
581 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
582
583 static const struct reg_name system_registers[] =
584 {
585 { "asid", 23 },
586 { "bpc", 22 },
587 { "bpav", 24 },
588 { "bpam", 25 },
589 { "bpdv", 26 },
590 { "bpdm", 27 },
591 { "ctbp", 20 },
592 { "ctpc", 16 },
593 { "ctpsw", 17 },
594 { "dbpc", 18 },
595 { "dbpsw", 19 },
596 { "dir", 21 },
597 { "ecr", 4 },
598 { "eipc", 0 },
599 { "eipsw", 1 },
600 { "fepc", 2 },
601 { "fepsw", 3 },
602 { "psw", 5 },
603 };
604
605 #define SYSREG_NAME_CNT \
606 (sizeof (system_registers) / sizeof (struct reg_name))
607
608 static const struct reg_name system_list_registers[] =
609 {
610 {"PS", 5 },
611 {"SR", 0 + 1}
612 };
613
614 #define SYSREGLIST_NAME_CNT \
615 (sizeof (system_list_registers) / sizeof (struct reg_name))
616
617 static const struct reg_name cc_names[] =
618 {
619 { "c", 0x1 },
620 { "e", 0x2 },
621 { "ge", 0xe },
622 { "gt", 0xf },
623 { "h", 0xb },
624 { "l", 0x1 },
625 { "le", 0x7 },
626 { "lt", 0x6 },
627 { "n", 0x4 },
628 { "nc", 0x9 },
629 { "ne", 0xa },
630 { "nh", 0x3 },
631 { "nl", 0x9 },
632 { "ns", 0xc },
633 { "nv", 0x8 },
634 { "nz", 0xa },
635 { "p", 0xc },
636 { "s", 0x4 },
637 { "sa", 0xd },
638 { "t", 0x5 },
639 { "v", 0x0 },
640 { "z", 0x2 },
641 };
642
643 #define CC_NAME_CNT \
644 (sizeof (cc_names) / sizeof (struct reg_name))
645
646 /* Do a binary search of the given register table to see if NAME is a
647 valid regiter name. Return the register number from the array on
648 success, or -1 on failure. */
649
650 static int
651 reg_name_search (const struct reg_name *regs,
652 int regcount,
653 const char *name,
654 bfd_boolean accept_numbers)
655 {
656 int middle, low, high;
657 int cmp;
658 symbolS *symbolP;
659
660 /* If the register name is a symbol, then evaluate it. */
661 if ((symbolP = symbol_find (name)) != NULL)
662 {
663 /* If the symbol is an alias for another name then use that.
664 If the symbol is an alias for a number, then return the number. */
665 if (symbol_equated_p (symbolP))
666 name
667 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
668 else if (accept_numbers)
669 {
670 int reg = S_GET_VALUE (symbolP);
671
672 if (reg >= 0 && reg <= 31)
673 return reg;
674 }
675
676 /* Otherwise drop through and try parsing name normally. */
677 }
678
679 low = 0;
680 high = regcount - 1;
681
682 do
683 {
684 middle = (low + high) / 2;
685 cmp = strcasecmp (name, regs[middle].name);
686 if (cmp < 0)
687 high = middle - 1;
688 else if (cmp > 0)
689 low = middle + 1;
690 else
691 return regs[middle].value;
692 }
693 while (low <= high);
694 return -1;
695 }
696
697 /* Summary of register_name().
698
699 in: Input_line_pointer points to 1st char of operand.
700
701 out: An expressionS.
702 The operand may have been a register: in this case, X_op == O_register,
703 X_add_number is set to the register number, and truth is returned.
704 Input_line_pointer->(next non-blank) char after operand, or is in
705 its original state. */
706
707 static bfd_boolean
708 register_name (expressionS *expressionP)
709 {
710 int reg_number;
711 char *name;
712 char *start;
713 char c;
714
715 /* Find the spelling of the operand. */
716 start = name = input_line_pointer;
717
718 c = get_symbol_end ();
719
720 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
721 name, FALSE);
722
723 /* Put back the delimiting char. */
724 *input_line_pointer = c;
725
726 /* Look to see if it's in the register table. */
727 if (reg_number >= 0)
728 {
729 expressionP->X_op = O_register;
730 expressionP->X_add_number = reg_number;
731
732 /* Make the rest nice. */
733 expressionP->X_add_symbol = NULL;
734 expressionP->X_op_symbol = NULL;
735
736 return TRUE;
737 }
738 else
739 {
740 /* Reset the line as if we had not done anything. */
741 input_line_pointer = start;
742
743 return FALSE;
744 }
745 }
746
747 /* Summary of system_register_name().
748
749 in: INPUT_LINE_POINTER points to 1st char of operand.
750 EXPRESSIONP points to an expression structure to be filled in.
751 ACCEPT_NUMBERS is true iff numerical register names may be used.
752 ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
753 accepted.
754
755 out: An expressionS structure in expressionP.
756 The operand may have been a register: in this case, X_op == O_register,
757 X_add_number is set to the register number, and truth is returned.
758 Input_line_pointer->(next non-blank) char after operand, or is in
759 its original state. */
760
761 static bfd_boolean
762 system_register_name (expressionS *expressionP,
763 bfd_boolean accept_numbers,
764 bfd_boolean accept_list_names)
765 {
766 int reg_number;
767 char *name;
768 char *start;
769 char c;
770
771 /* Find the spelling of the operand. */
772 start = name = input_line_pointer;
773
774 c = get_symbol_end ();
775 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
776 accept_numbers);
777
778 /* Put back the delimiting char. */
779 *input_line_pointer = c;
780
781 if (reg_number < 0
782 && accept_numbers)
783 {
784 /* Reset input_line pointer. */
785 input_line_pointer = start;
786
787 if (ISDIGIT (*input_line_pointer))
788 {
789 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
790
791 /* Make sure that the register number is allowable. */
792 if (reg_number < 0
793 || (reg_number > 5 && reg_number < 16)
794 || reg_number > 27)
795 reg_number = -1;
796 }
797 else if (accept_list_names)
798 {
799 c = get_symbol_end ();
800 reg_number = reg_name_search (system_list_registers,
801 SYSREGLIST_NAME_CNT, name, FALSE);
802
803 /* Put back the delimiting char. */
804 *input_line_pointer = c;
805 }
806 }
807
808 /* Look to see if it's in the register table. */
809 if (reg_number >= 0)
810 {
811 expressionP->X_op = O_register;
812 expressionP->X_add_number = reg_number;
813
814 /* Make the rest nice. */
815 expressionP->X_add_symbol = NULL;
816 expressionP->X_op_symbol = NULL;
817
818 return TRUE;
819 }
820 else
821 {
822 /* Reset the line as if we had not done anything. */
823 input_line_pointer = start;
824
825 return FALSE;
826 }
827 }
828
829 /* Summary of cc_name().
830
831 in: INPUT_LINE_POINTER points to 1st char of operand.
832
833 out: An expressionS.
834 The operand may have been a register: in this case, X_op == O_register,
835 X_add_number is set to the register number, and truth is returned.
836 Input_line_pointer->(next non-blank) char after operand, or is in
837 its original state. */
838
839 static bfd_boolean
840 cc_name (expressionS *expressionP)
841 {
842 int reg_number;
843 char *name;
844 char *start;
845 char c;
846
847 /* Find the spelling of the operand. */
848 start = name = input_line_pointer;
849
850 c = get_symbol_end ();
851 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
852
853 /* Put back the delimiting char. */
854 *input_line_pointer = c;
855
856 /* Look to see if it's in the register table. */
857 if (reg_number >= 0)
858 {
859 expressionP->X_op = O_constant;
860 expressionP->X_add_number = reg_number;
861
862 /* Make the rest nice. */
863 expressionP->X_add_symbol = NULL;
864 expressionP->X_op_symbol = NULL;
865
866 return TRUE;
867 }
868 else
869 {
870 /* Reset the line as if we had not done anything. */
871 input_line_pointer = start;
872
873 return FALSE;
874 }
875 }
876
877 static void
878 skip_white_space (void)
879 {
880 while (*input_line_pointer == ' '
881 || *input_line_pointer == '\t')
882 ++input_line_pointer;
883 }
884
885 /* Summary of parse_register_list ().
886
887 in: INPUT_LINE_POINTER points to 1st char of a list of registers.
888 INSN is the partially constructed instruction.
889 OPERAND is the operand being inserted.
890
891 out: NULL if the parse completed successfully, otherwise a
892 pointer to an error message is returned. If the parse
893 completes the correct bit fields in the instruction
894 will be filled in.
895
896 Parses register lists with the syntax:
897
898 { rX }
899 { rX, rY }
900 { rX - rY }
901 { rX - rY, rZ }
902 etc
903
904 and also parses constant expressions whoes bits indicate the
905 registers in the lists. The LSB in the expression refers to
906 the lowest numbered permissible register in the register list,
907 and so on upwards. System registers are considered to be very
908 high numbers. */
909
910 static char *
911 parse_register_list (unsigned long *insn,
912 const struct v850_operand *operand)
913 {
914 static int type1_regs[32] =
915 {
916 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
917 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
918 };
919 static int type2_regs[32] =
920 {
921 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
922 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
923 };
924 static int type3_regs[32] =
925 {
926 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
927 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
928 };
929 int *regs;
930 expressionS exp;
931
932 /* Select a register array to parse. */
933 switch (operand->shift)
934 {
935 case 0xffe00001: regs = type1_regs; break;
936 case 0xfff8000f: regs = type2_regs; break;
937 case 0xfff8001f: regs = type3_regs; break;
938 default:
939 as_bad (_("unknown operand shift: %x\n"), operand->shift);
940 return _("internal failure in parse_register_list");
941 }
942
943 skip_white_space ();
944
945 /* If the expression starts with a curly brace it is a register list.
946 Otherwise it is a constant expression, whoes bits indicate which
947 registers are to be included in the list. */
948 if (*input_line_pointer != '{')
949 {
950 int reg;
951 int i;
952
953 expression (&exp);
954
955 if (exp.X_op != O_constant)
956 return _("constant expression or register list expected");
957
958 if (regs == type1_regs)
959 {
960 if (exp.X_add_number & 0xFFFFF000)
961 return _("high bits set in register list expression");
962
963 for (reg = 20; reg < 32; reg++)
964 if (exp.X_add_number & (1 << (reg - 20)))
965 {
966 for (i = 0; i < 32; i++)
967 if (regs[i] == reg)
968 *insn |= (1 << i);
969 }
970 }
971 else if (regs == type2_regs)
972 {
973 if (exp.X_add_number & 0xFFFE0000)
974 return _("high bits set in register list expression");
975
976 for (reg = 1; reg < 16; reg++)
977 if (exp.X_add_number & (1 << (reg - 1)))
978 {
979 for (i = 0; i < 32; i++)
980 if (regs[i] == reg)
981 *insn |= (1 << i);
982 }
983
984 if (exp.X_add_number & (1 << 15))
985 *insn |= (1 << 3);
986
987 if (exp.X_add_number & (1 << 16))
988 *insn |= (1 << 19);
989 }
990 else /* regs == type3_regs */
991 {
992 if (exp.X_add_number & 0xFFFE0000)
993 return _("high bits set in register list expression");
994
995 for (reg = 16; reg < 32; reg++)
996 if (exp.X_add_number & (1 << (reg - 16)))
997 {
998 for (i = 0; i < 32; i++)
999 if (regs[i] == reg)
1000 *insn |= (1 << i);
1001 }
1002
1003 if (exp.X_add_number & (1 << 16))
1004 *insn |= (1 << 19);
1005 }
1006
1007 return NULL;
1008 }
1009
1010 input_line_pointer++;
1011
1012 /* Parse the register list until a terminator (closing curly brace or
1013 new-line) is found. */
1014 for (;;)
1015 {
1016 if (register_name (&exp))
1017 {
1018 int i;
1019
1020 /* Locate the given register in the list, and if it is there,
1021 insert the corresponding bit into the instruction. */
1022 for (i = 0; i < 32; i++)
1023 {
1024 if (regs[i] == exp.X_add_number)
1025 {
1026 *insn |= (1 << i);
1027 break;
1028 }
1029 }
1030
1031 if (i == 32)
1032 return _("illegal register included in list");
1033 }
1034 else if (system_register_name (&exp, TRUE, TRUE))
1035 {
1036 if (regs == type1_regs)
1037 {
1038 return _("system registers cannot be included in list");
1039 }
1040 else if (exp.X_add_number == 5)
1041 {
1042 if (regs == type2_regs)
1043 return _("PSW cannot be included in list");
1044 else
1045 *insn |= 0x8;
1046 }
1047 else if (exp.X_add_number < 4)
1048 *insn |= 0x80000;
1049 else
1050 return _("High value system registers cannot be included in list");
1051 }
1052 else if (*input_line_pointer == '}')
1053 {
1054 input_line_pointer++;
1055 break;
1056 }
1057 else if (*input_line_pointer == ',')
1058 {
1059 input_line_pointer++;
1060 continue;
1061 }
1062 else if (*input_line_pointer == '-')
1063 {
1064 /* We have encountered a range of registers: rX - rY. */
1065 int j;
1066 expressionS exp2;
1067
1068 /* Skip the dash. */
1069 ++input_line_pointer;
1070
1071 /* Get the second register in the range. */
1072 if (! register_name (&exp2))
1073 {
1074 return _("second register should follow dash in register list");
1075 exp2.X_add_number = exp.X_add_number;
1076 }
1077
1078 /* Add the rest of the registers in the range. */
1079 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1080 {
1081 int i;
1082
1083 /* Locate the given register in the list, and if it is there,
1084 insert the corresponding bit into the instruction. */
1085 for (i = 0; i < 32; i++)
1086 {
1087 if (regs[i] == j)
1088 {
1089 *insn |= (1 << i);
1090 break;
1091 }
1092 }
1093
1094 if (i == 32)
1095 return _("illegal register included in list");
1096 }
1097 }
1098 else
1099 break;
1100
1101 skip_white_space ();
1102 }
1103
1104 return NULL;
1105 }
1106
1107 const char *md_shortopts = "m:";
1108
1109 struct option md_longopts[] =
1110 {
1111 {NULL, no_argument, NULL, 0}
1112 };
1113
1114 size_t md_longopts_size = sizeof (md_longopts);
1115
1116 void
1117 md_show_usage (FILE *stream)
1118 {
1119 fprintf (stream, _(" V850 options:\n"));
1120 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1121 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1122 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1123 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1124 fprintf (stream, _(" -mv850e1 The code is targeted at the v850e1\n"));
1125 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1126 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1127 }
1128
1129 int
1130 md_parse_option (int c, char *arg)
1131 {
1132 if (c != 'm')
1133 return 0;
1134
1135 if (strcmp (arg, "warn-signed-overflow") == 0)
1136 warn_signed_overflows = TRUE;
1137
1138 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1139 warn_unsigned_overflows = TRUE;
1140
1141 else if (strcmp (arg, "v850") == 0)
1142 {
1143 machine = 0;
1144 processor_mask = PROCESSOR_V850;
1145 }
1146 else if (strcmp (arg, "v850e") == 0)
1147 {
1148 machine = bfd_mach_v850e;
1149 processor_mask = PROCESSOR_V850E;
1150 }
1151 else if (strcmp (arg, "v850e1") == 0)
1152 {
1153 machine = bfd_mach_v850e1;
1154 processor_mask = PROCESSOR_V850E1;
1155 }
1156 else if (strcmp (arg, "v850any") == 0)
1157 {
1158 /* Tell the world that this is for any v850 chip. */
1159 machine = 0;
1160
1161 /* But support instructions for the extended versions. */
1162 processor_mask = PROCESSOR_V850E;
1163 processor_mask |= PROCESSOR_V850E1;
1164 }
1165 else if (strcmp (arg, "relax") == 0)
1166 v850_relax = 1;
1167 else
1168 return 0;
1169
1170 return 1;
1171 }
1172
1173 symbolS *
1174 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1175 {
1176 return 0;
1177 }
1178
1179 char *
1180 md_atof (int type, char *litp, int *sizep)
1181 {
1182 int prec;
1183 LITTLENUM_TYPE words[4];
1184 char *t;
1185 int i;
1186
1187 switch (type)
1188 {
1189 case 'f':
1190 prec = 2;
1191 break;
1192
1193 case 'd':
1194 prec = 4;
1195 break;
1196
1197 default:
1198 *sizep = 0;
1199 return _("bad call to md_atof");
1200 }
1201
1202 t = atof_ieee (input_line_pointer, type, words);
1203 if (t)
1204 input_line_pointer = t;
1205
1206 *sizep = prec * 2;
1207
1208 for (i = prec - 1; i >= 0; i--)
1209 {
1210 md_number_to_chars (litp, (valueT) words[i], 2);
1211 litp += 2;
1212 }
1213
1214 return NULL;
1215 }
1216
1217 /* Very gross. */
1218
1219 void
1220 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
1221 asection *sec,
1222 fragS *fragP)
1223 {
1224 subseg_change (sec, 0);
1225
1226 /* In range conditional or unconditional branch. */
1227 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1228 {
1229 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1230 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1231 fragP->fr_fix += 2;
1232 }
1233 /* Out of range conditional branch. Emit a branch around a jump. */
1234 else if (fragP->fr_subtype == 1)
1235 {
1236 unsigned char *buffer =
1237 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1238
1239 /* Reverse the condition of the first branch. */
1240 buffer[0] ^= 0x08;
1241 /* Mask off all the displacement bits. */
1242 buffer[0] &= 0x8f;
1243 buffer[1] &= 0x07;
1244 /* Now set the displacement bits so that we branch
1245 around the unconditional branch. */
1246 buffer[0] |= 0x30;
1247
1248 /* Now create the unconditional branch + fixup to the final
1249 target. */
1250 md_number_to_chars ((char *) buffer + 2, 0x00000780, 4);
1251 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1252 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1253 (int) fragP->fr_opcode + 1);
1254 fragP->fr_fix += 6;
1255 }
1256 /* Out of range unconditional branch. Emit a jump. */
1257 else if (fragP->fr_subtype == 3)
1258 {
1259 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1260 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1261 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1262 (int) fragP->fr_opcode + 1);
1263 fragP->fr_fix += 4;
1264 }
1265 else
1266 abort ();
1267 }
1268
1269 valueT
1270 md_section_align (asection *seg, valueT addr)
1271 {
1272 int align = bfd_get_section_alignment (stdoutput, seg);
1273 return ((addr + (1 << align) - 1) & (-1 << align));
1274 }
1275
1276 void
1277 md_begin (void)
1278 {
1279 char *prev_name = "";
1280 const struct v850_opcode *op;
1281
1282 if (strncmp (TARGET_CPU, "v850e1", 6) == 0)
1283 {
1284 if (machine == -1)
1285 machine = bfd_mach_v850e1;
1286
1287 if (processor_mask == -1)
1288 processor_mask = PROCESSOR_V850E1;
1289 }
1290 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1291 {
1292 if (machine == -1)
1293 machine = bfd_mach_v850e;
1294
1295 if (processor_mask == -1)
1296 processor_mask = PROCESSOR_V850E;
1297 }
1298 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1299 {
1300 if (machine == -1)
1301 machine = 0;
1302
1303 if (processor_mask == -1)
1304 processor_mask = PROCESSOR_V850;
1305 }
1306 else
1307 /* xgettext:c-format */
1308 as_bad (_("Unable to determine default target processor from string: %s"),
1309 TARGET_CPU);
1310
1311 v850_hash = hash_new ();
1312
1313 /* Insert unique names into hash table. The V850 instruction set
1314 has many identical opcode names that have different opcodes based
1315 on the operands. This hash table then provides a quick index to
1316 the first opcode with a particular name in the opcode table. */
1317 op = v850_opcodes;
1318 while (op->name)
1319 {
1320 if (strcmp (prev_name, op->name))
1321 {
1322 prev_name = (char *) op->name;
1323 hash_insert (v850_hash, op->name, (char *) op);
1324 }
1325 op++;
1326 }
1327
1328 v850_seg_table[BSS_SECTION].s = bss_section;
1329 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1330 }
1331
1332 static bfd_reloc_code_real_type
1333 handle_lo16 (const struct v850_operand *operand)
1334 {
1335 if (operand != NULL)
1336 {
1337 if (operand->bits == -1)
1338 return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
1339
1340 if (!(operand->bits == 16 && operand->shift == 16)
1341 && !(operand->bits == 15 && operand->shift == 17))
1342 {
1343 as_bad (_("lo() relocation used on an instruction which does "
1344 "not support it"));
1345 return BFD_RELOC_64; /* Used to indicate an error condition. */
1346 }
1347 }
1348 return BFD_RELOC_LO16;
1349 }
1350
1351 static bfd_reloc_code_real_type
1352 handle_ctoff (const struct v850_operand *operand)
1353 {
1354 if (operand == NULL)
1355 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1356
1357 if (operand->bits != 6
1358 || operand->shift != 0)
1359 {
1360 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1361 return BFD_RELOC_64; /* Used to indicate an error condition. */
1362 }
1363
1364 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1365 }
1366
1367 static bfd_reloc_code_real_type
1368 handle_sdaoff (const struct v850_operand *operand)
1369 {
1370 if (operand == NULL)
1371 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1372
1373 if (operand->bits == 15 && operand->shift == 17)
1374 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1375
1376 if (operand->bits == -1)
1377 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1378
1379 if (operand->bits != 16
1380 || operand->shift != 16)
1381 {
1382 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1383 return BFD_RELOC_64; /* Used to indicate an error condition. */
1384 }
1385
1386 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1387 }
1388
1389 static bfd_reloc_code_real_type
1390 handle_zdaoff (const struct v850_operand *operand)
1391 {
1392 if (operand == NULL)
1393 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1394
1395 if (operand->bits == 15 && operand->shift == 17)
1396 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1397
1398 if (operand->bits == -1)
1399 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1400
1401 if (operand->bits != 16
1402 || operand->shift != 16)
1403 {
1404 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1405 /* Used to indicate an error condition. */
1406 return BFD_RELOC_64;
1407 }
1408
1409 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1410 }
1411
1412 static bfd_reloc_code_real_type
1413 handle_tdaoff (const struct v850_operand *operand)
1414 {
1415 if (operand == NULL)
1416 /* Data item, not an instruction. */
1417 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1418
1419 if (operand->bits == 6 && operand->shift == 1)
1420 /* sld.w/sst.w, operand: D8_6. */
1421 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1422
1423 if (operand->bits == 4 && operand->insert != NULL)
1424 /* sld.hu, operand: D5-4. */
1425 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1426
1427 if (operand->bits == 4 && operand->insert == NULL)
1428 /* sld.bu, operand: D4. */
1429 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1430
1431 if (operand->bits == 16 && operand->shift == 16)
1432 /* set1 & chums, operands: D16. */
1433 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1434
1435 if (operand->bits != 7)
1436 {
1437 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1438 /* Used to indicate an error condition. */
1439 return BFD_RELOC_64;
1440 }
1441
1442 return operand->insert != NULL
1443 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7. */
1444 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, operand: D7. */
1445 }
1446
1447 /* Warning: The code in this function relies upon the definitions
1448 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1449 matching the hard coded values contained herein. */
1450
1451 static bfd_reloc_code_real_type
1452 v850_reloc_prefix (const struct v850_operand *operand)
1453 {
1454 bfd_boolean paren_skipped = FALSE;
1455
1456 /* Skip leading opening parenthesis. */
1457 if (*input_line_pointer == '(')
1458 {
1459 ++input_line_pointer;
1460 paren_skipped = TRUE;
1461 }
1462
1463 #define CHECK_(name, reloc) \
1464 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
1465 { \
1466 input_line_pointer += strlen (name); \
1467 return reloc; \
1468 }
1469
1470 CHECK_ ("hi0", BFD_RELOC_HI16 );
1471 CHECK_ ("hi", BFD_RELOC_HI16_S );
1472 CHECK_ ("lo", handle_lo16 (operand) );
1473 CHECK_ ("sdaoff", handle_sdaoff (operand));
1474 CHECK_ ("zdaoff", handle_zdaoff (operand));
1475 CHECK_ ("tdaoff", handle_tdaoff (operand));
1476 CHECK_ ("hilo", BFD_RELOC_32 );
1477 CHECK_ ("ctoff", handle_ctoff (operand) );
1478
1479 /* Restore skipped parenthesis. */
1480 if (paren_skipped)
1481 --input_line_pointer;
1482
1483 return BFD_RELOC_UNUSED;
1484 }
1485
1486 /* Insert an operand value into an instruction. */
1487
1488 static unsigned long
1489 v850_insert_operand (unsigned long insn,
1490 const struct v850_operand *operand,
1491 offsetT val,
1492 char *file,
1493 unsigned int line,
1494 char *str)
1495 {
1496 if (operand->insert)
1497 {
1498 const char *message = NULL;
1499
1500 insn = operand->insert (insn, val, &message);
1501 if (message != NULL)
1502 {
1503 if ((operand->flags & V850_OPERAND_SIGNED)
1504 && ! warn_signed_overflows
1505 && strstr (message, "out of range") != NULL)
1506 {
1507 /* Skip warning... */
1508 }
1509 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1510 && ! warn_unsigned_overflows
1511 && strstr (message, "out of range") != NULL)
1512 {
1513 /* Skip warning... */
1514 }
1515 else if (str)
1516 {
1517 if (file == (char *) NULL)
1518 as_warn ("%s: %s", str, message);
1519 else
1520 as_warn_where (file, line, "%s: %s", str, message);
1521 }
1522 else
1523 {
1524 if (file == (char *) NULL)
1525 as_warn (message);
1526 else
1527 as_warn_where (file, line, message);
1528 }
1529 }
1530 }
1531 else
1532 {
1533 if (operand->bits != 32)
1534 {
1535 long min, max;
1536
1537 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1538 {
1539 if (! warn_signed_overflows)
1540 max = (1 << operand->bits) - 1;
1541 else
1542 max = (1 << (operand->bits - 1)) - 1;
1543
1544 min = -(1 << (operand->bits - 1));
1545 }
1546 else
1547 {
1548 max = (1 << operand->bits) - 1;
1549
1550 if (! warn_unsigned_overflows)
1551 min = -(1 << (operand->bits - 1));
1552 else
1553 min = 0;
1554 }
1555
1556 if (val < (offsetT) min || val > (offsetT) max)
1557 {
1558 char buf [128];
1559
1560 /* Restore min and mix to expected values for decimal ranges. */
1561 if ((operand->flags & V850_OPERAND_SIGNED)
1562 && ! warn_signed_overflows)
1563 max = (1 << (operand->bits - 1)) - 1;
1564
1565 if (! (operand->flags & V850_OPERAND_SIGNED)
1566 && ! warn_unsigned_overflows)
1567 min = 0;
1568
1569 if (str)
1570 sprintf (buf, "%s: ", str);
1571 else
1572 buf[0] = 0;
1573 strcat (buf, _("operand"));
1574
1575 as_bad_value_out_of_range (buf, val, (offsetT) min, (offsetT) max, file, line);
1576 }
1577 }
1578
1579 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1580 }
1581
1582 return insn;
1583 }
1584 \f
1585 static char copy_of_instruction[128];
1586
1587 void
1588 md_assemble (char *str)
1589 {
1590 char *s;
1591 char *start_of_operands;
1592 struct v850_opcode *opcode;
1593 struct v850_opcode *next_opcode;
1594 const unsigned char *opindex_ptr;
1595 int next_opindex;
1596 int relaxable = 0;
1597 unsigned long insn;
1598 unsigned long insn_size;
1599 char *f;
1600 int i;
1601 int match;
1602 bfd_boolean extra_data_after_insn = FALSE;
1603 unsigned extra_data_len = 0;
1604 unsigned long extra_data = 0;
1605 char *saved_input_line_pointer;
1606
1607 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1608
1609 /* Get the opcode. */
1610 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1611 continue;
1612
1613 if (*s != '\0')
1614 *s++ = '\0';
1615
1616 /* Find the first opcode with the proper name. */
1617 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1618 if (opcode == NULL)
1619 {
1620 /* xgettext:c-format */
1621 as_bad (_("Unrecognized opcode: `%s'"), str);
1622 ignore_rest_of_line ();
1623 return;
1624 }
1625
1626 str = s;
1627 while (ISSPACE (*str))
1628 ++str;
1629
1630 start_of_operands = str;
1631
1632 saved_input_line_pointer = input_line_pointer;
1633
1634 for (;;)
1635 {
1636 const char *errmsg = NULL;
1637
1638 match = 0;
1639
1640 if ((opcode->processors & processor_mask) == 0)
1641 {
1642 errmsg = _("Target processor does not support this instruction.");
1643 goto error;
1644 }
1645
1646 relaxable = 0;
1647 fc = 0;
1648 next_opindex = 0;
1649 insn = opcode->opcode;
1650 extra_data_after_insn = FALSE;
1651
1652 input_line_pointer = str = start_of_operands;
1653
1654 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1655 {
1656 const struct v850_operand *operand;
1657 char *hold;
1658 expressionS ex;
1659 bfd_reloc_code_real_type reloc;
1660
1661 if (next_opindex == 0)
1662 operand = &v850_operands[*opindex_ptr];
1663 else
1664 {
1665 operand = &v850_operands[next_opindex];
1666 next_opindex = 0;
1667 }
1668
1669 errmsg = NULL;
1670
1671 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1672 ++str;
1673
1674 if (operand->flags & V850_OPERAND_RELAX)
1675 relaxable = 1;
1676
1677 /* Gather the operand. */
1678 hold = input_line_pointer;
1679 input_line_pointer = str;
1680
1681 /* lo(), hi(), hi0(), etc... */
1682 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1683 {
1684 /* This is a fake reloc, used to indicate an error condition. */
1685 if (reloc == BFD_RELOC_64)
1686 {
1687 match = 1;
1688 goto error;
1689 }
1690
1691 expression (&ex);
1692
1693 if (ex.X_op == O_constant)
1694 {
1695 switch (reloc)
1696 {
1697 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1698 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1699 and the like. */
1700 /* Fall through. */
1701
1702 case BFD_RELOC_LO16:
1703 case BFD_RELOC_V850_LO16_SPLIT_OFFSET:
1704 {
1705 /* Truncate, then sign extend the value. */
1706 ex.X_add_number = SEXT16 (ex.X_add_number);
1707 break;
1708 }
1709
1710 case BFD_RELOC_HI16:
1711 {
1712 /* Truncate, then sign extend the value. */
1713 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1714 break;
1715 }
1716
1717 case BFD_RELOC_HI16_S:
1718 {
1719 /* Truncate, then sign extend the value. */
1720 int temp = (ex.X_add_number >> 16) & 0xffff;
1721
1722 temp += (ex.X_add_number >> 15) & 1;
1723
1724 ex.X_add_number = SEXT16 (temp);
1725 break;
1726 }
1727
1728 case BFD_RELOC_32:
1729 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1730 {
1731 errmsg = _("immediate operand is too large");
1732 goto error;
1733 }
1734
1735 extra_data_after_insn = TRUE;
1736 extra_data_len = 4;
1737 extra_data = 0;
1738 break;
1739
1740 default:
1741 fprintf (stderr, "reloc: %d\n", reloc);
1742 as_bad (_("AAARG -> unhandled constant reloc"));
1743 break;
1744 }
1745
1746 if (fc > MAX_INSN_FIXUPS)
1747 as_fatal (_("too many fixups"));
1748
1749 fixups[fc].exp = ex;
1750 fixups[fc].opindex = *opindex_ptr;
1751 fixups[fc].reloc = reloc;
1752 fc++;
1753 }
1754 else
1755 {
1756 if (reloc == BFD_RELOC_32)
1757 {
1758 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1759 {
1760 errmsg = _("immediate operand is too large");
1761 goto error;
1762 }
1763
1764 extra_data_after_insn = TRUE;
1765 extra_data_len = 4;
1766 extra_data = ex.X_add_number;
1767 }
1768
1769 if (fc > MAX_INSN_FIXUPS)
1770 as_fatal (_("too many fixups"));
1771
1772 fixups[fc].exp = ex;
1773 fixups[fc].opindex = *opindex_ptr;
1774 fixups[fc].reloc = reloc;
1775 fc++;
1776 }
1777 }
1778 else
1779 {
1780 errmsg = NULL;
1781
1782 if ((operand->flags & V850_OPERAND_REG) != 0)
1783 {
1784 if (!register_name (&ex))
1785 errmsg = _("invalid register name");
1786 else if ((operand->flags & V850_NOT_R0)
1787 && ex.X_add_number == 0)
1788 {
1789 errmsg = _("register r0 cannot be used here");
1790
1791 /* Force an error message to be generated by
1792 skipping over any following potential matches
1793 for this opcode. */
1794 opcode += 3;
1795 }
1796 }
1797 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1798 {
1799 if (!system_register_name (&ex, TRUE, FALSE))
1800 errmsg = _("invalid system register name");
1801 }
1802 else if ((operand->flags & V850_OPERAND_EP) != 0)
1803 {
1804 char *start = input_line_pointer;
1805 char c = get_symbol_end ();
1806
1807 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1808 {
1809 /* Put things back the way we found them. */
1810 *input_line_pointer = c;
1811 input_line_pointer = start;
1812 errmsg = _("expected EP register");
1813 goto error;
1814 }
1815
1816 *input_line_pointer = c;
1817 str = input_line_pointer;
1818 input_line_pointer = hold;
1819
1820 while (*str == ' ' || *str == ','
1821 || *str == '[' || *str == ']')
1822 ++str;
1823 continue;
1824 }
1825 else if ((operand->flags & V850_OPERAND_CC) != 0)
1826 {
1827 if (!cc_name (&ex))
1828 errmsg = _("invalid condition code name");
1829 }
1830 else if (operand->flags & V850E_PUSH_POP)
1831 {
1832 errmsg = parse_register_list (&insn, operand);
1833
1834 /* The parse_register_list() function has already done
1835 everything, so fake a dummy expression. */
1836 ex.X_op = O_constant;
1837 ex.X_add_number = 0;
1838 }
1839 else if (operand->flags & V850E_IMMEDIATE16)
1840 {
1841 expression (&ex);
1842
1843 if (ex.X_op != O_constant)
1844 errmsg = _("constant expression expected");
1845 else if (ex.X_add_number & 0xffff0000)
1846 {
1847 if (ex.X_add_number & 0xffff)
1848 errmsg = _("constant too big to fit into instruction");
1849 else if ((insn & 0x001fffc0) == 0x00130780)
1850 ex.X_add_number >>= 16;
1851 else
1852 errmsg = _("constant too big to fit into instruction");
1853 }
1854
1855 extra_data_after_insn = TRUE;
1856 extra_data_len = 2;
1857 extra_data = ex.X_add_number;
1858 ex.X_add_number = 0;
1859 }
1860 else if (operand->flags & V850E_IMMEDIATE32)
1861 {
1862 expression (&ex);
1863
1864 if (ex.X_op != O_constant)
1865 errmsg = _("constant expression expected");
1866
1867 extra_data_after_insn = TRUE;
1868 extra_data_len = 4;
1869 extra_data = ex.X_add_number;
1870 ex.X_add_number = 0;
1871 }
1872 else if (register_name (&ex)
1873 && (operand->flags & V850_OPERAND_REG) == 0)
1874 {
1875 char c;
1876 int exists = 0;
1877
1878 /* It is possible that an alias has been defined that
1879 matches a register name. For example the code may
1880 include a ".set ZERO, 0" directive, which matches
1881 the register name "zero". Attempt to reparse the
1882 field as an expression, and only complain if we
1883 cannot generate a constant. */
1884
1885 input_line_pointer = str;
1886
1887 c = get_symbol_end ();
1888
1889 if (symbol_find (str) != NULL)
1890 exists = 1;
1891
1892 *input_line_pointer = c;
1893 input_line_pointer = str;
1894
1895 expression (&ex);
1896
1897 if (ex.X_op != O_constant)
1898 {
1899 /* If this register is actually occurring too early on
1900 the parsing of the instruction, (because another
1901 field is missing) then report this. */
1902 if (opindex_ptr[1] != 0
1903 && (v850_operands[opindex_ptr[1]].flags
1904 & V850_OPERAND_REG))
1905 errmsg = _("syntax error: value is missing before the register name");
1906 else
1907 errmsg = _("syntax error: register not expected");
1908
1909 /* If we created a symbol in the process of this
1910 test then delete it now, so that it will not
1911 be output with the real symbols... */
1912 if (exists == 0
1913 && ex.X_op == O_symbol)
1914 symbol_remove (ex.X_add_symbol,
1915 &symbol_rootP, &symbol_lastP);
1916 }
1917 }
1918 else if (system_register_name (&ex, FALSE, FALSE)
1919 && (operand->flags & V850_OPERAND_SRG) == 0)
1920 errmsg = _("syntax error: system register not expected");
1921
1922 else if (cc_name (&ex)
1923 && (operand->flags & V850_OPERAND_CC) == 0)
1924 errmsg = _("syntax error: condition code not expected");
1925
1926 else
1927 {
1928 expression (&ex);
1929 /* Special case:
1930 If we are assembling a MOV instruction and the immediate
1931 value does not fit into the bits available then create a
1932 fake error so that the next MOV instruction will be
1933 selected. This one has a 32 bit immediate field. */
1934
1935 if (((insn & 0x07e0) == 0x0200)
1936 && operand->bits == 5 /* Do not match the CALLT instruction. */
1937 && ex.X_op == O_constant
1938 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
1939 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
1940 errmsg = _("immediate operand is too large");
1941 }
1942
1943 if (errmsg)
1944 goto error;
1945
1946 switch (ex.X_op)
1947 {
1948 case O_illegal:
1949 errmsg = _("illegal operand");
1950 goto error;
1951 case O_absent:
1952 errmsg = _("missing operand");
1953 goto error;
1954 case O_register:
1955 if ((operand->flags
1956 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1957 {
1958 errmsg = _("invalid operand");
1959 goto error;
1960 }
1961 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1962 NULL, 0, copy_of_instruction);
1963 break;
1964
1965 case O_constant:
1966 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1967 NULL, 0, copy_of_instruction);
1968 break;
1969
1970 default:
1971 /* We need to generate a fixup for this expression. */
1972 if (fc >= MAX_INSN_FIXUPS)
1973 as_fatal (_("too many fixups"));
1974
1975 fixups[fc].exp = ex;
1976 fixups[fc].opindex = *opindex_ptr;
1977 fixups[fc].reloc = BFD_RELOC_UNUSED;
1978 ++fc;
1979 break;
1980 }
1981 }
1982
1983 str = input_line_pointer;
1984 input_line_pointer = hold;
1985
1986 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
1987 || *str == ')')
1988 ++str;
1989 }
1990 match = 1;
1991
1992 error:
1993 if (match == 0)
1994 {
1995 next_opcode = opcode + 1;
1996 if (next_opcode->name != NULL
1997 && strcmp (next_opcode->name, opcode->name) == 0)
1998 {
1999 opcode = next_opcode;
2000
2001 /* Skip versions that are not supported by the target
2002 processor. */
2003 if ((opcode->processors & processor_mask) == 0)
2004 goto error;
2005
2006 continue;
2007 }
2008
2009 as_bad ("%s: %s", copy_of_instruction, errmsg);
2010
2011 if (*input_line_pointer == ']')
2012 ++input_line_pointer;
2013
2014 ignore_rest_of_line ();
2015 input_line_pointer = saved_input_line_pointer;
2016 return;
2017 }
2018 break;
2019 }
2020
2021 while (ISSPACE (*str))
2022 ++str;
2023
2024 if (*str != '\0')
2025 /* xgettext:c-format */
2026 as_bad (_("junk at end of line: `%s'"), str);
2027
2028 input_line_pointer = str;
2029
2030 /* Tie dwarf2 debug info to the address at the start of the insn.
2031 We can't do this after the insn has been output as the current
2032 frag may have been closed off. eg. by frag_var. */
2033 dwarf2_emit_insn (0);
2034
2035 /* Write out the instruction. */
2036
2037 if (relaxable && fc > 0)
2038 {
2039 insn_size = 2;
2040 fc = 0;
2041
2042 if (!strcmp (opcode->name, "br"))
2043 {
2044 f = frag_var (rs_machine_dependent, 4, 2, 2,
2045 fixups[0].exp.X_add_symbol,
2046 fixups[0].exp.X_add_number,
2047 (char *) fixups[0].opindex);
2048 md_number_to_chars (f, insn, insn_size);
2049 md_number_to_chars (f + 2, 0, 2);
2050 }
2051 else
2052 {
2053 f = frag_var (rs_machine_dependent, 6, 4, 0,
2054 fixups[0].exp.X_add_symbol,
2055 fixups[0].exp.X_add_number,
2056 (char *) fixups[0].opindex);
2057 md_number_to_chars (f, insn, insn_size);
2058 md_number_to_chars (f + 2, 0, 4);
2059 }
2060 }
2061 else
2062 {
2063 /* Four byte insns have an opcode with the two high bits on. */
2064 if ((insn & 0x0600) == 0x0600)
2065 insn_size = 4;
2066 else
2067 insn_size = 2;
2068
2069 /* Special case: 32 bit MOV. */
2070 if ((insn & 0xffe0) == 0x0620)
2071 insn_size = 2;
2072
2073 f = frag_more (insn_size);
2074 md_number_to_chars (f, insn, insn_size);
2075
2076 if (extra_data_after_insn)
2077 {
2078 f = frag_more (extra_data_len);
2079 md_number_to_chars (f, extra_data, extra_data_len);
2080
2081 extra_data_after_insn = FALSE;
2082 }
2083 }
2084
2085 /* Create any fixups. At this point we do not use a
2086 bfd_reloc_code_real_type, but instead just use the
2087 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2088 handle fixups for any operand type, although that is admittedly
2089 not a very exciting feature. We pick a BFD reloc type in
2090 md_apply_fix3. */
2091 for (i = 0; i < fc; i++)
2092 {
2093 const struct v850_operand *operand;
2094 bfd_reloc_code_real_type reloc;
2095
2096 operand = &v850_operands[fixups[i].opindex];
2097
2098 reloc = fixups[i].reloc;
2099
2100 if (reloc != BFD_RELOC_UNUSED)
2101 {
2102 reloc_howto_type *reloc_howto =
2103 bfd_reloc_type_lookup (stdoutput, reloc);
2104 int size;
2105 int address;
2106 fixS *fixP;
2107
2108 if (!reloc_howto)
2109 abort ();
2110
2111 size = bfd_get_reloc_size (reloc_howto);
2112
2113 /* XXX This will abort on an R_V850_8 reloc -
2114 is this reloc actually used? */
2115 if (size != 2 && size != 4)
2116 abort ();
2117
2118 address = (f - frag_now->fr_literal) + insn_size - size;
2119
2120 if (reloc == BFD_RELOC_32)
2121 address += 2;
2122
2123 fixP = fix_new_exp (frag_now, address, size,
2124 &fixups[i].exp,
2125 reloc_howto->pc_relative,
2126 reloc);
2127
2128 switch (reloc)
2129 {
2130 case BFD_RELOC_LO16:
2131 case BFD_RELOC_V850_LO16_SPLIT_OFFSET:
2132 case BFD_RELOC_HI16:
2133 case BFD_RELOC_HI16_S:
2134 fixP->fx_no_overflow = 1;
2135 break;
2136 default:
2137 break;
2138 }
2139 }
2140 else
2141 {
2142 fix_new_exp (frag_now,
2143 f - frag_now->fr_literal, 4,
2144 & fixups[i].exp,
2145 (operand->flags & V850_OPERAND_DISP) != 0,
2146 (bfd_reloc_code_real_type) (fixups[i].opindex
2147 + (int) BFD_RELOC_UNUSED));
2148 }
2149 }
2150
2151 input_line_pointer = saved_input_line_pointer;
2152 }
2153
2154 /* If while processing a fixup, a reloc really needs to be created
2155 then it is done here. */
2156
2157 arelent *
2158 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2159 {
2160 arelent *reloc;
2161
2162 reloc = xmalloc (sizeof (arelent));
2163 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2164 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2165 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2166
2167 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2168 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2169 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2170 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2171 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2172 reloc->addend = fixp->fx_offset;
2173 else
2174 {
2175 if (fixp->fx_r_type == BFD_RELOC_32
2176 && fixp->fx_pcrel)
2177 fixp->fx_r_type = BFD_RELOC_32_PCREL;
2178
2179 reloc->addend = fixp->fx_addnumber;
2180 }
2181
2182 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2183
2184 if (reloc->howto == NULL)
2185 {
2186 as_bad_where (fixp->fx_file, fixp->fx_line,
2187 /* xgettext:c-format */
2188 _("reloc %d not supported by object file format"),
2189 (int) fixp->fx_r_type);
2190
2191 xfree (reloc);
2192
2193 return NULL;
2194 }
2195
2196 return reloc;
2197 }
2198
2199 void
2200 v850_handle_align (fragS * frag)
2201 {
2202 if (v850_relax
2203 && frag->fr_type == rs_align
2204 && frag->fr_address + frag->fr_fix > 0
2205 && frag->fr_offset > 1
2206 && now_seg != bss_section
2207 && now_seg != v850_seg_table[SBSS_SECTION].s
2208 && now_seg != v850_seg_table[TBSS_SECTION].s
2209 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2210 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2211 BFD_RELOC_V850_ALIGN);
2212 }
2213
2214 /* Return current size of variable part of frag. */
2215
2216 int
2217 md_estimate_size_before_relax (fragS *fragp, asection *seg ATTRIBUTE_UNUSED)
2218 {
2219 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2220 abort ();
2221
2222 return md_relax_table[fragp->fr_subtype].rlx_length;
2223 }
2224
2225 long
2226 v850_pcrel_from_section (fixS *fixp, segT section)
2227 {
2228 /* If the symbol is undefined, or in a section other than our own,
2229 or it is weak (in which case it may well be in another section,
2230 then let the linker figure it out. */
2231 if (fixp->fx_addsy != (symbolS *) NULL
2232 && (! S_IS_DEFINED (fixp->fx_addsy)
2233 || S_IS_WEAK (fixp->fx_addsy)
2234 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2235 return 0;
2236
2237 return fixp->fx_frag->fr_address + fixp->fx_where;
2238 }
2239
2240 void
2241 md_apply_fix3 (fixS *fixP, valueT *valueP, segT seg ATTRIBUTE_UNUSED)
2242 {
2243 valueT value = * valueP;
2244 char *where;
2245
2246 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2247 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2248 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
2249 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2250 {
2251 fixP->fx_done = 0;
2252 return;
2253 }
2254
2255 if (fixP->fx_addsy == (symbolS *) NULL)
2256 fixP->fx_addnumber = value,
2257 fixP->fx_done = 1;
2258
2259 else if (fixP->fx_pcrel)
2260 fixP->fx_addnumber = fixP->fx_offset;
2261
2262 else
2263 {
2264 value = fixP->fx_offset;
2265 if (fixP->fx_subsy != (symbolS *) NULL)
2266 {
2267 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2268 value -= S_GET_VALUE (fixP->fx_subsy);
2269 else
2270 /* We don't actually support subtracting a symbol. */
2271 as_bad_where (fixP->fx_file, fixP->fx_line,
2272 _("expression too complex"));
2273 }
2274 fixP->fx_addnumber = value;
2275 }
2276
2277 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2278 {
2279 int opindex;
2280 const struct v850_operand *operand;
2281 unsigned long insn;
2282
2283 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2284 operand = &v850_operands[opindex];
2285
2286 /* Fetch the instruction, insert the fully resolved operand
2287 value, and stuff the instruction back again.
2288
2289 Note the instruction has been stored in little endian
2290 format! */
2291 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2292
2293 insn = bfd_getl32 ((unsigned char *) where);
2294 insn = v850_insert_operand (insn, operand, (offsetT) value,
2295 fixP->fx_file, fixP->fx_line, NULL);
2296 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2297
2298 if (fixP->fx_done)
2299 /* Nothing else to do here. */
2300 return;
2301
2302 /* Determine a BFD reloc value based on the operand information.
2303 We are only prepared to turn a few of the operands into relocs. */
2304
2305 if (operand->bits == 22)
2306 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2307 else if (operand->bits == 9)
2308 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2309 else
2310 {
2311 as_bad_where (fixP->fx_file, fixP->fx_line,
2312 _("unresolved expression that must be resolved"));
2313 fixP->fx_done = 1;
2314 return;
2315 }
2316 }
2317 else if (fixP->fx_done)
2318 {
2319 /* We still have to insert the value into memory! */
2320 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2321
2322 if (fixP->fx_r_type == BFD_RELOC_V850_LO16_SPLIT_OFFSET)
2323 bfd_putl32 (((value << 16) & 0xfffe0000)
2324 | ((value << 5) & 0x20)
2325 | (bfd_getl32 (where) & ~0xfffe0020), where);
2326 else if (fixP->fx_size == 1)
2327 *where = value & 0xff;
2328 else if (fixP->fx_size == 2)
2329 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2330 else if (fixP->fx_size == 4)
2331 bfd_putl32 (value, (unsigned char *) where);
2332 }
2333 }
2334 \f
2335 /* Parse a cons expression. We have to handle hi(), lo(), etc
2336 on the v850. */
2337
2338 void
2339 parse_cons_expression_v850 (expressionS *exp)
2340 {
2341 /* See if there's a reloc prefix like hi() we have to handle. */
2342 hold_cons_reloc = v850_reloc_prefix (NULL);
2343
2344 /* Do normal expression parsing. */
2345 expression (exp);
2346 }
2347
2348 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2349 found a reloc prefix, then we use that reloc, else we choose an
2350 appropriate one based on the size of the expression. */
2351
2352 void
2353 cons_fix_new_v850 (fragS *frag,
2354 int where,
2355 int size,
2356 expressionS *exp)
2357 {
2358 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2359 {
2360 if (size == 4)
2361 hold_cons_reloc = BFD_RELOC_32;
2362 if (size == 2)
2363 hold_cons_reloc = BFD_RELOC_16;
2364 if (size == 1)
2365 hold_cons_reloc = BFD_RELOC_8;
2366 }
2367
2368 if (exp != NULL)
2369 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2370 else
2371 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2372
2373 hold_cons_reloc = BFD_RELOC_UNUSED;
2374 }
2375
2376 bfd_boolean
2377 v850_fix_adjustable (fixS *fixP)
2378 {
2379 if (fixP->fx_addsy == NULL)
2380 return 1;
2381
2382 /* Don't adjust function names. */
2383 if (S_IS_FUNCTION (fixP->fx_addsy))
2384 return 0;
2385
2386 /* We need the symbol name for the VTABLE entries. */
2387 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2388 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2389 return 0;
2390
2391 return 1;
2392 }
2393
2394 int
2395 v850_force_relocation (struct fix *fixP)
2396 {
2397 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2398 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2399 return 1;
2400
2401 if (v850_relax
2402 && (fixP->fx_pcrel
2403 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2404 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2405 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2406 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
2407 return 1;
2408
2409 return generic_force_reloc (fixP);
2410 }
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