1 2005-11-14 David Ung <davidu@mips.com>
3 * mips16-opc.c: Add MIPS16e save/restore opcodes.
4 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
5 codes for save/restore.
7 2005-11-10 Andreas Schwab <schwab@suse.de>
9 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
12 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
14 * m32c-desc.c: Regenerated.
16 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
19 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
20 ms1-opc.c, ms1-opc.h: Regenerated.
22 2005-11-07 Steve Ellcey <sje@cup.hp.com>
24 * configure: Regenerate after modifying bfd/warning.m4.
26 2005-11-07 Alan Modra <amodra@bigpond.net.au>
28 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
29 ignored rex prefixes here.
30 (print_insn): Instead, handle them similarly to fwait followed
33 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
35 * iq2000-desc.c: Regenerated.
36 * iq2000-desc.h: Likewise.
37 * iq2000-dis.c: Likewise.
38 * iq2000-opc.c: Likewise.
40 2005-11-02 Paul Brook <paul@codesourcery.com>
42 * arm-dis.c (print_insn_thumb32): Word align blx target address.
44 2005-10-31 Alan Modra <amodra@bigpond.net.au>
46 * arm-dis.c (print_insn): Warning fix.
48 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
50 * Makefile.am: Run "make dep-am".
51 * Makefile.in: Regenerated.
53 * dep-in.sed: Replace " ./" with " ".
55 2005-10-28 Dave Brolley <brolley@redhat.com>
57 * All CGEN-generated sources: Regenerate.
59 Contribute the following changes:
60 2005-09-19 Dave Brolley <brolley@redhat.com>
62 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
63 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
66 2005-02-16 Dave Brolley <brolley@redhat.com>
68 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
69 cgen_isa_mask_* to cgen_bitset_*.
70 * cgen-opc.c: Likewise.
72 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
74 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
75 * *-dis.c: Regenerate.
77 2003-06-05 DJ Delorie <dj@redhat.com>
79 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
80 it, as it may point to a reused buffer. Set prev_isas when we
83 2002-12-13 Dave Brolley <brolley@redhat.com>
85 * cgen-opc.c (cgen_isa_mask_create): New support function for
87 (cgen_isa_mask_init): Ditto.
88 (cgen_isa_mask_clear): Ditto.
89 (cgen_isa_mask_add): Ditto.
90 (cgen_isa_mask_set): Ditto.
91 (cgen_isa_supported): Ditto.
92 (cgen_isa_mask_compare): Ditto.
93 (cgen_isa_mask_intersection): Ditto.
94 (cgen_isa_mask_copy): Ditto.
95 (cgen_isa_mask_combine): Ditto.
96 * cgen-dis.in (libiberty.h): #include it.
97 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
98 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
99 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
100 * Makefile.in: Regenerated.
102 2005-10-27 DJ Delorie <dj@redhat.com>
104 * m32c-asm.c: Regenerate.
105 * m32c-desc.c: Regenerate.
106 * m32c-desc.h: Regenerate.
107 * m32c-dis.c: Regenerate.
108 * m32c-ibld.c: Regenerate.
109 * m32c-opc.c: Regenerate.
110 * m32c-opc.h: Regenerate.
112 2005-10-26 DJ Delorie <dj@redhat.com>
114 * m32c-asm.c: Regenerate.
115 * m32c-desc.c: Regenerate.
116 * m32c-desc.h: Regenerate.
117 * m32c-dis.c: Regenerate.
118 * m32c-ibld.c: Regenerate.
119 * m32c-opc.c: Regenerate.
120 * m32c-opc.h: Regenerate.
122 2005-10-26 Paul Brook <paul@codesourcery.com>
124 * arm-dis.c (arm_opcodes): Correct "sel" entry.
126 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
128 * m32r-asm.c: Regenerate.
130 2005-10-25 DJ Delorie <dj@redhat.com>
132 * m32c-asm.c: Regenerate.
133 * m32c-desc.c: Regenerate.
134 * m32c-desc.h: Regenerate.
135 * m32c-dis.c: Regenerate.
136 * m32c-ibld.c: Regenerate.
137 * m32c-opc.c: Regenerate.
138 * m32c-opc.h: Regenerate.
140 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
142 * configure.in: Add target architecture bfd_arch_z80.
143 * configure: Regenerated.
144 * disassemble.c (disassembler)<ARCH_z80>: Add case
146 * z80-dis.c: New file.
148 2005-10-25 Alan Modra <amodra@bigpond.net.au>
150 * po/POTFILES.in: Regenerate.
151 * po/opcodes.pot: Regenerate.
153 2005-10-24 Jan Beulich <jbeulich@novell.com>
155 * ia64-asmtab.c: Regenerate.
157 2005-10-21 DJ Delorie <dj@redhat.com>
159 * m32c-asm.c: Regenerate.
160 * m32c-desc.c: Regenerate.
161 * m32c-desc.h: Regenerate.
162 * m32c-dis.c: Regenerate.
163 * m32c-ibld.c: Regenerate.
164 * m32c-opc.c: Regenerate.
165 * m32c-opc.h: Regenerate.
167 2005-10-21 Nick Clifton <nickc@redhat.com>
169 * bfin-dis.c: Tidy up code, removing redundant constructs.
171 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
173 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
176 2005-10-18 Nick Clifton <nickc@redhat.com>
178 * m32r-asm.c: Regenerate after updating m32r.opc.
180 2005-10-18 Jie Zhang <jie.zhang@analog.com>
182 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
183 reading instruction from memory.
185 2005-10-18 Nick Clifton <nickc@redhat.com>
187 * m32r-asm.c: Regenerate after updating m32r.opc.
189 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
191 * m32r-asm.c: Regenerate after updating m32r.opc.
193 2005-10-08 James Lemke <jim@wasabisystems.com>
195 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
198 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
200 * ppc-dis.c (struct dis_private): Remove.
201 (powerpc_dialect): Avoid aliasing warnings.
202 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
204 2005-09-30 Nick Clifton <nickc@redhat.com>
206 * po/ga.po: New Irish translation.
207 * configure.in (ALL_LINGUAS): Add "ga".
208 * configure: Regenerate.
210 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
212 * Makefile.am: Run "make dep-am".
213 * Makefile.in: Regenerated.
214 * aclocal.m4: Likewise.
215 * configure: Likewise.
217 2005-09-30 Catherine Moore <clm@cm00re.com>
219 * Makefile.am: Bfin support.
220 * Makefile.in: Regenerated.
221 * aclocal.m4: Regenerated.
222 * bfin-dis.c: New file.
223 * configure.in: Bfin support.
224 * configure: Regenerated.
225 * disassemble.c (ARCH_bfin): Define.
226 (disassembler): Add case for bfd_arch_bfin.
228 2005-09-28 Jan Beulich <jbeulich@novell.com>
230 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
233 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
234 (dis386): Document and use new 'V' meta character. Use it for
235 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
236 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
237 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
238 data prefix as used whenever DFLAG was examined. Handle 'V'.
239 (intel_operand_size): Use stack_v_mode.
240 (OP_E): Use stack_v_mode, but handle only the special case of
241 64-bit mode without operand size override here; fall through to
242 v_mode case otherwise.
243 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
244 and no operand size override is present.
245 (OP_J): Use get32s for obtaining the displacement also when rex64
248 2005-09-08 Paul Brook <paul@codesourcery.com>
250 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
252 2005-09-06 Chao-ying Fu <fu@mips.com>
254 * mips-opc.c (MT32): New define.
255 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
256 bottom to avoid opcode collision with "mftr" and "mttr".
258 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
259 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
262 2005-09-02 Paul Brook <paul@codesourcery.com>
264 * arm-dis.c (coprocessor_opcodes): Add null terminator.
266 2005-09-02 Paul Brook <paul@codesourcery.com>
268 * arm-dis.c (coprocessor_opcodes): New.
269 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
270 (print_insn_coprocessor): New function.
271 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
273 (print_insn_thumb32): Use print_insn_coprocessor.
275 2005-08-30 Paul Brook <paul@codesourcery.com>
277 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
279 2005-08-26 Jan Beulich <jbeulich@novell.com>
281 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
283 (OP_E): Call intel_operand_size, move call site out of mode
285 (OP_OFF): Call intel_operand_size if suffix_always. Remove
286 ATTRIBUTE_UNUSED from parameters.
287 (OP_OFF64): Likewise.
288 (OP_ESreg): Call intel_operand_size.
289 (OP_DSreg): Likewise.
290 (OP_DIR): Use colon rather than semicolon as separator of far
293 2005-08-25 Chao-ying Fu <fu@mips.com>
295 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
296 (mips_builtin_opcodes): Add DSP instructions.
297 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
299 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
302 2005-08-23 David Ung <davidu@mips.com>
304 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
305 instructions to the table.
307 2005-08-18 Alan Modra <amodra@bigpond.net.au>
309 * a29k-dis.c: Delete.
310 * Makefile.am: Remove a29k support.
311 * configure.in: Likewise.
312 * disassemble.c: Likewise.
313 * Makefile.in: Regenerate.
314 * configure: Regenerate.
315 * po/POTFILES.in: Regenerate.
317 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
319 * ppc-dis.c (powerpc_dialect): Handle e300.
320 (print_ppc_disassembler_options): Likewise.
321 * ppc-opc.c (PPCE300): Define.
322 (powerpc_opcodes): Mark icbt as available for the e300.
324 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
326 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
327 Use "rp" instead of "%r2" in "b,l" insns.
329 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
331 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
332 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
334 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
335 and 4 bit optional masks.
336 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
337 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
338 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
339 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
340 (s390_opformats): Likewise.
341 * s390-opc.txt: Add new instructions for cpu type z9-109.
343 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
345 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
347 2005-07-29 Paul Brook <paul@codesourcery.com>
349 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
351 2005-07-29 Paul Brook <paul@codesourcery.com>
353 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
354 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
356 2005-07-25 DJ Delorie <dj@redhat.com>
358 * m32c-asm.c Regenerate.
359 * m32c-dis.c Regenerate.
361 2005-07-20 DJ Delorie <dj@redhat.com>
363 * disassemble.c (disassemble_init_for_target): M32C ISAs are
364 enums, so convert them to bit masks, which attributes are.
366 2005-07-18 Nick Clifton <nickc@redhat.com>
368 * configure.in: Restore alpha ordering to list of arches.
369 * configure: Regenerate.
370 * disassemble.c: Restore alpha ordering to list of arches.
372 2005-07-18 Nick Clifton <nickc@redhat.com>
374 * m32c-asm.c: Regenerate.
375 * m32c-desc.c: Regenerate.
376 * m32c-desc.h: Regenerate.
377 * m32c-dis.c: Regenerate.
378 * m32c-ibld.h: Regenerate.
379 * m32c-opc.c: Regenerate.
380 * m32c-opc.h: Regenerate.
382 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
384 * i386-dis.c (PNI_Fixup): Update comment.
385 (VMX_Fixup): Properly handle the suffix check.
387 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
389 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
392 2005-07-16 Alan Modra <amodra@bigpond.net.au>
394 * Makefile.am: Run "make dep-am".
395 (stamp-m32c): Fix cpu dependencies.
396 * Makefile.in: Regenerate.
397 * ip2k-dis.c: Regenerate.
399 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
401 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
402 (VMX_Fixup): New. Fix up Intel VMX Instructions.
406 (dis386_twobyte): Updated entries 0x78 and 0x79.
407 (twobyte_has_modrm): Likewise.
408 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
409 (OP_G): Handle m_mode.
411 2005-07-14 Jim Blandy <jimb@redhat.com>
413 Add support for the Renesas M32C and M16C.
414 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
415 * m32c-desc.h, m32c-opc.h: New.
416 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
417 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
419 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
420 m32c-ibld.lo, m32c-opc.lo.
421 (CLEANFILES): List stamp-m32c.
422 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
423 (CGEN_CPUS): Add m32c.
424 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
425 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
426 (m32c_opc_h): New variable.
427 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
428 (m32c-opc.lo): New rules.
429 * Makefile.in: Regenerated.
430 * configure.in: Add case for bfd_m32c_arch.
431 * configure: Regenerated.
432 * disassemble.c (ARCH_m32c): New.
433 [ARCH_m32c]: #include "m32c-desc.h".
434 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
435 (disassemble_init_for_target) [ARCH_m32c]: Same.
437 * cgen-ops.h, cgen-types.h: New files.
438 * Makefile.am (HFILES): List them.
439 * Makefile.in: Regenerated.
441 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
443 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
444 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
445 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
446 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
447 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
448 v850-dis.c: Fix format bugs.
449 * ia64-gen.c (fail, warn): Add format attribute.
450 * or32-opc.c (debug): Likewise.
452 2005-07-07 Khem Raj <kraj@mvista.com>
454 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
457 2005-07-06 Alan Modra <amodra@bigpond.net.au>
459 * Makefile.am (stamp-m32r): Fix path to cpu files.
460 (stamp-m32r, stamp-iq2000): Likewise.
461 * Makefile.in: Regenerate.
462 * m32r-asm.c: Regenerate.
463 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
464 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
466 2005-07-05 Nick Clifton <nickc@redhat.com>
468 * iq2000-asm.c: Regenerate.
469 * ms1-asm.c: Regenerate.
471 2005-07-05 Jan Beulich <jbeulich@novell.com>
473 * i386-dis.c (SVME_Fixup): New.
474 (grps): Use it for the lidt entry.
475 (PNI_Fixup): Call OP_M rather than OP_E.
476 (INVLPG_Fixup): Likewise.
478 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
480 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
482 2005-07-01 Nick Clifton <nickc@redhat.com>
484 * a29k-dis.c: Update to ISO C90 style function declarations and
486 * alpha-opc.c: Likewise.
487 * arc-dis.c: Likewise.
488 * arc-opc.c: Likewise.
489 * avr-dis.c: Likewise.
490 * cgen-asm.in: Likewise.
491 * cgen-dis.in: Likewise.
492 * cgen-ibld.in: Likewise.
493 * cgen-opc.c: Likewise.
494 * cris-dis.c: Likewise.
495 * d10v-dis.c: Likewise.
496 * d30v-dis.c: Likewise.
497 * d30v-opc.c: Likewise.
498 * dis-buf.c: Likewise.
499 * dlx-dis.c: Likewise.
500 * h8300-dis.c: Likewise.
501 * h8500-dis.c: Likewise.
502 * hppa-dis.c: Likewise.
503 * i370-dis.c: Likewise.
504 * i370-opc.c: Likewise.
505 * m10200-dis.c: Likewise.
506 * m10300-dis.c: Likewise.
507 * m68k-dis.c: Likewise.
508 * m88k-dis.c: Likewise.
509 * mips-dis.c: Likewise.
510 * mmix-dis.c: Likewise.
511 * msp430-dis.c: Likewise.
512 * ns32k-dis.c: Likewise.
513 * or32-dis.c: Likewise.
514 * or32-opc.c: Likewise.
515 * pdp11-dis.c: Likewise.
516 * pj-dis.c: Likewise.
517 * s390-dis.c: Likewise.
518 * sh-dis.c: Likewise.
519 * sh64-dis.c: Likewise.
520 * sparc-dis.c: Likewise.
521 * sparc-opc.c: Likewise.
522 * sysdep.h: Likewise.
523 * tic30-dis.c: Likewise.
524 * tic4x-dis.c: Likewise.
525 * tic80-dis.c: Likewise.
526 * v850-dis.c: Likewise.
527 * v850-opc.c: Likewise.
528 * vax-dis.c: Likewise.
529 * w65-dis.c: Likewise.
530 * z8kgen.c: Likewise.
532 * fr30-*: Regenerate.
534 * ip2k-*: Regenerate.
535 * iq2000-*: Regenerate.
536 * m32r-*: Regenerate.
538 * openrisc-*: Regenerate.
539 * xstormy16-*: Regenerate.
541 2005-06-23 Ben Elliston <bje@gnu.org>
543 * m68k-dis.c: Use ISC C90.
544 * m68k-opc.c: Formatting fixes.
546 2005-06-16 David Ung <davidu@mips.com>
548 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
549 instructions to the table; seb/seh/sew/zeb/zeh/zew.
551 2005-06-15 Dave Brolley <brolley@redhat.com>
553 Contribute Morpho ms1 on behalf of Red Hat
554 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
555 ms1-opc.h: New files, Morpho ms1 target.
557 2004-05-14 Stan Cox <scox@redhat.com>
559 * disassemble.c (ARCH_ms1): Define.
560 (disassembler): Handle bfd_arch_ms1
562 2004-05-13 Michael Snyder <msnyder@redhat.com>
564 * Makefile.am, Makefile.in: Add ms1 target.
565 * configure.in: Ditto.
567 2005-06-08 Zack Weinberg <zack@codesourcery.com>
569 * arm-opc.h: Delete; fold contents into ...
570 * arm-dis.c: ... here. Move includes of internal COFF headers
571 next to includes of internal ELF headers.
572 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
573 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
574 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
575 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
576 (iwmmxt_wwnames, iwmmxt_wwssnames):
578 (regnames): Remove iWMMXt coprocessor register sets.
579 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
580 (get_arm_regnames): Adjust fourth argument to match above changes.
581 (set_iwmmxt_regnames): Delete.
582 (print_insn_arm): Constify 'c'. Use ISO syntax for function
583 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
584 and iwmmxt_cregnames, not set_iwmmxt_regnames.
585 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
586 ISO syntax for function pointer calls.
588 2005-06-07 Zack Weinberg <zack@codesourcery.com>
590 * arm-dis.c: Split up the comments describing the format codes, so
591 that the ARM and 16-bit Thumb opcode tables each have comments
592 preceding them that describe all the codes, and only the codes,
593 valid in those tables. (32-bit Thumb table is already like this.)
594 Reorder the lists in all three comments to match the order in
595 which the codes are implemented.
596 Remove all forward declarations of static functions. Convert all
597 function definitions to ISO C format.
598 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
600 (print_insn_thumb16): Remove unused case 'I'.
601 (print_insn): Update for changed calling convention of subroutines.
603 2005-05-25 Jan Beulich <jbeulich@novell.com>
605 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
606 hex (but retain it being displayed as signed). Remove redundant
607 checks. Add handling of displacements for 16-bit addressing in Intel
610 2005-05-25 Jan Beulich <jbeulich@novell.com>
612 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
613 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
614 masking of 'rm' in 16-bit memory address handling.
616 2005-05-19 Anton Blanchard <anton@samba.org>
618 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
619 (print_ppc_disassembler_options): Document it.
620 * ppc-opc.c (SVC_LEV): Define.
621 (LEV): Allow optional operand.
623 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
624 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
626 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
628 * Makefile.in: Regenerate.
630 2005-05-17 Zack Weinberg <zack@codesourcery.com>
632 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
633 instructions. Adjust disassembly of some opcodes to match
635 (thumb32_opcodes): New table.
636 (print_insn_thumb): Rename print_insn_thumb16; don't handle
637 two-halfword branches here.
638 (print_insn_thumb32): New function.
639 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
640 and print_insn_thumb32. Be consistent about order of
641 halfwords when printing 32-bit instructions.
643 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
646 * i386-dis.c (branch_v_mode): New.
647 (indirEv): Use branch_v_mode instead of v_mode.
648 (OP_E): Handle branch_v_mode.
650 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
652 * d10v-dis.c (dis_2_short): Support 64bit host.
654 2005-05-07 Nick Clifton <nickc@redhat.com>
656 * po/nl.po: Updated translation.
658 2005-05-07 Nick Clifton <nickc@redhat.com>
660 * Update the address and phone number of the FSF organization in
661 the GPL notices in the following files:
662 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
663 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
664 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
665 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
666 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
667 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
668 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
669 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
670 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
671 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
672 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
673 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
674 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
675 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
676 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
677 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
678 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
679 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
680 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
681 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
682 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
683 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
684 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
685 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
686 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
687 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
688 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
689 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
690 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
691 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
692 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
693 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
694 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
696 2005-05-05 James E Wilson <wilson@specifixinc.com>
698 * ia64-opc.c: Include sysdep.h before libiberty.h.
700 2005-05-05 Nick Clifton <nickc@redhat.com>
702 * configure.in (ALL_LINGUAS): Add vi.
703 * configure: Regenerate.
706 2005-04-26 Jerome Guitton <guitton@gnat.com>
708 * configure.in: Fix the check for basename declaration.
709 * configure: Regenerate.
711 2005-04-19 Alan Modra <amodra@bigpond.net.au>
713 * ppc-opc.c (RTO): Define.
714 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
715 entries to suit PPC440.
717 2005-04-18 Mark Kettenis <kettenis@gnu.org>
719 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
722 2005-04-14 Nick Clifton <nickc@redhat.com>
724 * po/fi.po: New translation: Finnish.
725 * configure.in (ALL_LINGUAS): Add fi.
726 * configure: Regenerate.
728 2005-04-14 Alan Modra <amodra@bigpond.net.au>
730 * Makefile.am (NO_WERROR): Define.
731 * configure.in: Invoke AM_BINUTILS_WARNINGS.
732 * Makefile.in: Regenerate.
733 * aclocal.m4: Regenerate.
734 * configure: Regenerate.
736 2005-04-04 Nick Clifton <nickc@redhat.com>
738 * fr30-asm.c: Regenerate.
739 * frv-asm.c: Regenerate.
740 * iq2000-asm.c: Regenerate.
741 * m32r-asm.c: Regenerate.
742 * openrisc-asm.c: Regenerate.
744 2005-04-01 Jan Beulich <jbeulich@novell.com>
746 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
747 visible operands in Intel mode. The first operand of monitor is
750 2005-04-01 Jan Beulich <jbeulich@novell.com>
752 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
753 easier future additions.
755 2005-03-31 Jerome Guitton <guitton@gnat.com>
757 * configure.in: Check for basename.
758 * configure: Regenerate.
761 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
763 * i386-dis.c (SEG_Fixup): New.
765 (dis386): Use "Sv" for 0x8c and 0x8e.
767 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
768 Nick Clifton <nickc@redhat.com>
770 * vax-dis.c: (entry_addr): New varible: An array of user supplied
771 function entry mask addresses.
772 (entry_addr_occupied_slots): New variable: The number of occupied
773 elements in entry_addr.
774 (entry_addr_total_slots): New variable: The total number of
775 elements in entry_addr.
776 (parse_disassembler_options): New function. Fills in the entry_addr
778 (free_entry_array): New function. Release the memory used by the
779 entry addr array. Suppressed because there is no way to call it.
780 (is_function_entry): Check if a given address is a function's
781 start address by looking at supplied entry mask addresses and
782 symbol information, if available.
783 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
785 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
787 * cris-dis.c (print_with_operands): Use ~31L for long instead
790 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
792 * mmix-opc.c (O): Revert the last change.
795 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
797 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
800 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
802 * mmix-opc.c (O, Z): Force expression as unsigned long.
804 2005-03-18 Nick Clifton <nickc@redhat.com>
806 * ip2k-asm.c: Regenerate.
807 * op/opcodes.pot: Regenerate.
809 2005-03-16 Nick Clifton <nickc@redhat.com>
810 Ben Elliston <bje@au.ibm.com>
812 * configure.in (werror): New switch: Add -Werror to the
813 compiler command line. Enabled by default. Disable via
815 * configure: Regenerate.
817 2005-03-16 Alan Modra <amodra@bigpond.net.au>
819 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
822 2005-03-15 Alan Modra <amodra@bigpond.net.au>
824 * po/es.po: Commit new Spanish translation.
826 * po/fr.po: Commit new French translation.
828 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
830 * vax-dis.c: Fix spelling error
831 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
832 of just "Entry mask: < r1 ... >"
834 2005-03-12 Zack Weinberg <zack@codesourcery.com>
836 * arm-dis.c (arm_opcodes): Document %E and %V.
837 Add entries for v6T2 ARM instructions:
838 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
839 (print_insn_arm): Add support for %E and %V.
840 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
842 2005-03-10 Jeff Baker <jbaker@qnx.com>
843 Alan Modra <amodra@bigpond.net.au>
845 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
846 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
848 (XSPRG_MASK): Mask off extra bits now part of sprg field.
849 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
850 mfsprg4..7 after msprg and consolidate.
852 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
854 * vax-dis.c (entry_mask_bit): New array.
855 (print_insn_vax): Decode function entry mask.
857 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
859 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
861 2005-03-05 Alan Modra <amodra@bigpond.net.au>
863 * po/opcodes.pot: Regenerate.
865 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
867 * arc-dis.c (a4_decoding_class): New enum.
868 (dsmOneArcInst): Use the enum values for the decoding class.
869 Remove redundant case in the switch for decodingClass value 11.
871 2005-03-02 Jan Beulich <jbeulich@novell.com>
873 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
875 (OP_C): Consider lock prefix in non-64-bit modes.
877 2005-02-24 Alan Modra <amodra@bigpond.net.au>
879 * cris-dis.c (format_hex): Remove ineffective warning fix.
880 * crx-dis.c (make_instruction): Warning fix.
881 * frv-asm.c: Regenerate.
883 2005-02-23 Nick Clifton <nickc@redhat.com>
885 * cgen-dis.in: Use bfd_byte for buffers that are passed to
888 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
890 * crx-dis.c (make_instruction): Move argument structure into inner
891 scope and ensure that all of its fields are initialised before
894 * fr30-asm.c: Regenerate.
895 * fr30-dis.c: Regenerate.
896 * frv-asm.c: Regenerate.
897 * frv-dis.c: Regenerate.
898 * ip2k-asm.c: Regenerate.
899 * ip2k-dis.c: Regenerate.
900 * iq2000-asm.c: Regenerate.
901 * iq2000-dis.c: Regenerate.
902 * m32r-asm.c: Regenerate.
903 * m32r-dis.c: Regenerate.
904 * openrisc-asm.c: Regenerate.
905 * openrisc-dis.c: Regenerate.
906 * xstormy16-asm.c: Regenerate.
907 * xstormy16-dis.c: Regenerate.
909 2005-02-22 Alan Modra <amodra@bigpond.net.au>
911 * arc-ext.c: Warning fixes.
912 * arc-ext.h: Likewise.
913 * cgen-opc.c: Likewise.
914 * ia64-gen.c: Likewise.
915 * maxq-dis.c: Likewise.
916 * ns32k-dis.c: Likewise.
917 * w65-dis.c: Likewise.
918 * ia64-asmtab.c: Regenerate.
920 2005-02-22 Alan Modra <amodra@bigpond.net.au>
922 * fr30-desc.c: Regenerate.
923 * fr30-desc.h: Regenerate.
924 * fr30-opc.c: Regenerate.
925 * fr30-opc.h: Regenerate.
926 * frv-desc.c: Regenerate.
927 * frv-desc.h: Regenerate.
928 * frv-opc.c: Regenerate.
929 * frv-opc.h: Regenerate.
930 * ip2k-desc.c: Regenerate.
931 * ip2k-desc.h: Regenerate.
932 * ip2k-opc.c: Regenerate.
933 * ip2k-opc.h: Regenerate.
934 * iq2000-desc.c: Regenerate.
935 * iq2000-desc.h: Regenerate.
936 * iq2000-opc.c: Regenerate.
937 * iq2000-opc.h: Regenerate.
938 * m32r-desc.c: Regenerate.
939 * m32r-desc.h: Regenerate.
940 * m32r-opc.c: Regenerate.
941 * m32r-opc.h: Regenerate.
942 * m32r-opinst.c: Regenerate.
943 * openrisc-desc.c: Regenerate.
944 * openrisc-desc.h: Regenerate.
945 * openrisc-opc.c: Regenerate.
946 * openrisc-opc.h: Regenerate.
947 * xstormy16-desc.c: Regenerate.
948 * xstormy16-desc.h: Regenerate.
949 * xstormy16-opc.c: Regenerate.
950 * xstormy16-opc.h: Regenerate.
952 2005-02-21 Alan Modra <amodra@bigpond.net.au>
954 * Makefile.am: Run "make dep-am"
955 * Makefile.in: Regenerate.
957 2005-02-15 Nick Clifton <nickc@redhat.com>
959 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
960 compile time warnings.
961 (print_keyword): Likewise.
962 (default_print_insn): Likewise.
964 * fr30-desc.c: Regenerated.
965 * fr30-desc.h: Regenerated.
966 * fr30-dis.c: Regenerated.
967 * fr30-opc.c: Regenerated.
968 * fr30-opc.h: Regenerated.
969 * frv-desc.c: Regenerated.
970 * frv-dis.c: Regenerated.
971 * frv-opc.c: Regenerated.
972 * ip2k-asm.c: Regenerated.
973 * ip2k-desc.c: Regenerated.
974 * ip2k-desc.h: Regenerated.
975 * ip2k-dis.c: Regenerated.
976 * ip2k-opc.c: Regenerated.
977 * ip2k-opc.h: Regenerated.
978 * iq2000-desc.c: Regenerated.
979 * iq2000-dis.c: Regenerated.
980 * iq2000-opc.c: Regenerated.
981 * m32r-asm.c: Regenerated.
982 * m32r-desc.c: Regenerated.
983 * m32r-desc.h: Regenerated.
984 * m32r-dis.c: Regenerated.
985 * m32r-opc.c: Regenerated.
986 * m32r-opc.h: Regenerated.
987 * m32r-opinst.c: Regenerated.
988 * openrisc-desc.c: Regenerated.
989 * openrisc-desc.h: Regenerated.
990 * openrisc-dis.c: Regenerated.
991 * openrisc-opc.c: Regenerated.
992 * openrisc-opc.h: Regenerated.
993 * xstormy16-desc.c: Regenerated.
994 * xstormy16-desc.h: Regenerated.
995 * xstormy16-dis.c: Regenerated.
996 * xstormy16-opc.c: Regenerated.
997 * xstormy16-opc.h: Regenerated.
999 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1001 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1004 2005-02-11 Nick Clifton <nickc@redhat.com>
1006 * iq2000-asm.c: Regenerate.
1008 * frv-dis.c: Regenerate.
1010 2005-02-07 Jim Blandy <jimb@redhat.com>
1012 * Makefile.am (CGEN): Load guile.scm before calling the main
1014 * Makefile.in: Regenerated.
1015 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1016 Simply pass the cgen-opc.scm path to ${cgen} as its first
1017 argument; ${cgen} itself now contains the '-s', or whatever is
1018 appropriate for the Scheme being used.
1020 2005-01-31 Andrew Cagney <cagney@gnu.org>
1022 * configure: Regenerate to track ../gettext.m4.
1024 2005-01-31 Jan Beulich <jbeulich@novell.com>
1026 * ia64-gen.c (NELEMS): Define.
1027 (shrink): Generate alias with missing second predicate register when
1028 opcode has two outputs and these are both predicates.
1029 * ia64-opc-i.c (FULL17): Define.
1030 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1031 here to generate output template.
1032 (TBITCM, TNATCM): Undefine after use.
1033 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1034 first input. Add ld16 aliases without ar.csd as second output. Add
1035 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1036 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1037 ar.ccv as third/fourth inputs. Consolidate through...
1038 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1039 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1040 * ia64-asmtab.c: Regenerate.
1042 2005-01-27 Andrew Cagney <cagney@gnu.org>
1044 * configure: Regenerate to track ../gettext.m4 change.
1046 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1048 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1049 * frv-asm.c: Rebuilt.
1050 * frv-desc.c: Rebuilt.
1051 * frv-desc.h: Rebuilt.
1052 * frv-dis.c: Rebuilt.
1053 * frv-ibld.c: Rebuilt.
1054 * frv-opc.c: Rebuilt.
1055 * frv-opc.h: Rebuilt.
1057 2005-01-24 Andrew Cagney <cagney@gnu.org>
1059 * configure: Regenerate, ../gettext.m4 was updated.
1061 2005-01-21 Fred Fish <fnf@specifixinc.com>
1063 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1064 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1065 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1066 * mips-dis.c: Ditto.
1068 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1070 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1072 2005-01-19 Fred Fish <fnf@specifixinc.com>
1074 * mips-dis.c (no_aliases): New disassembly option flag.
1075 (set_default_mips_dis_options): Init no_aliases to zero.
1076 (parse_mips_dis_option): Handle no-aliases option.
1077 (print_insn_mips): Ignore table entries that are aliases
1078 if no_aliases is set.
1079 (print_insn_mips16): Ditto.
1080 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1081 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1082 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1083 * mips16-opc.c (mips16_opcodes): Ditto.
1085 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1087 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1088 (inheritance diagram): Add missing edge.
1089 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1090 easier for the testsuite.
1091 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1092 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1093 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1094 arch_sh2a_or_sh4_up child.
1095 (sh_table): Do renaming as above.
1096 Correct comment for ldc.l for gas testsuite to read.
1097 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1098 Correct comments for movy.w and movy.l for gas testsuite to read.
1099 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1101 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1103 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1105 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1107 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1109 2005-01-10 Andreas Schwab <schwab@suse.de>
1111 * disassemble.c (disassemble_init_for_target) <case
1112 bfd_arch_ia64>: Set skip_zeroes to 16.
1113 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1115 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1117 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1119 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1121 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1122 memory references. Convert avr_operand() to C90 formatting.
1124 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1126 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1128 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1130 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1131 (no_op_insn): Initialize array with instructions that have no
1133 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1135 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1137 * arm-dis.c: Correct top-level comment.
1139 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1141 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1142 architecuture defining the insn.
1143 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1144 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1146 Also include opcode/arm.h.
1147 * Makefile.am (arm-dis.lo): Update dependency list.
1148 * Makefile.in: Regenerate.
1150 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1152 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1153 reflect the change to the short immediate syntax.
1155 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1157 * or32-opc.c (debug): Warning fix.
1158 * po/POTFILES.in: Regenerate.
1160 * maxq-dis.c: Formatting.
1161 (print_insn): Warning fix.
1163 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1165 * arm-dis.c (WORD_ADDRESS): Define.
1166 (print_insn): Use it. Correct big-endian end-of-section handling.
1168 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1169 Vineet Sharma <vineets@noida.hcltech.com>
1171 * maxq-dis.c: New file.
1172 * disassemble.c (ARCH_maxq): Define.
1173 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1175 * configure.in: Add case for bfd_maxq_arch.
1176 * configure: Regenerate.
1177 * Makefile.am: Add support for maxq-dis.c
1178 * Makefile.in: Regenerate.
1179 * aclocal.m4: Regenerate.
1181 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1183 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1185 * crx-dis.c: Likewise.
1187 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1189 Generally, handle CRISv32.
1190 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1191 (struct cris_disasm_data): New type.
1192 (format_reg, format_hex, cris_constraint, print_flags)
1193 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1195 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1196 (print_insn_crisv32_without_register_prefix)
1197 (print_insn_crisv10_v32_with_register_prefix)
1198 (print_insn_crisv10_v32_without_register_prefix)
1199 (cris_parse_disassembler_options): New functions.
1200 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1201 parameter. All callers changed.
1202 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1204 (cris_constraint) <case 'Y', 'U'>: New cases.
1205 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1207 (print_with_operands) <case 'Y'>: New case.
1208 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1209 <case 'N', 'Y', 'Q'>: New cases.
1210 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1211 (print_insn_cris_with_register_prefix)
1212 (print_insn_cris_without_register_prefix): Call
1213 cris_parse_disassembler_options.
1214 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1215 for CRISv32 and the size of immediate operands. New v32-only
1216 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1217 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1218 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1219 Change brp to be v3..v10.
1220 (cris_support_regs): New vector.
1221 (cris_opcodes): Update head comment. New format characters '[',
1222 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1223 Add new opcodes for v32 and adjust existing opcodes to accommodate
1224 differences to earlier variants.
1225 (cris_cond15s): New vector.
1227 2004-11-04 Jan Beulich <jbeulich@novell.com>
1229 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1231 (Mp): Use f_mode rather than none at all.
1232 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1233 replaces what previously was x_mode; x_mode now means 128-bit SSE
1235 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1236 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1237 pinsrw's second operand is Edqw.
1238 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1239 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1240 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1241 mode when an operand size override is present or always suffixing.
1242 More instructions will need to be added to this group.
1243 (putop): Handle new macro chars 'C' (short/long suffix selector),
1244 'I' (Intel mode override for following macro char), and 'J' (for
1245 adding the 'l' prefix to far branches in AT&T mode). When an
1246 alternative was specified in the template, honor macro character when
1247 specified for Intel mode.
1248 (OP_E): Handle new *_mode values. Correct pointer specifications for
1249 memory operands. Consolidate output of index register.
1250 (OP_G): Handle new *_mode values.
1251 (OP_I): Handle const_1_mode.
1252 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1253 respective opcode prefix bits have been consumed.
1254 (OP_EM, OP_EX): Provide some default handling for generating pointer
1257 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1259 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1262 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1264 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1265 (getregliststring): Support HI/LO and user registers.
1266 * crx-opc.c (crx_instruction): Update data structure according to the
1267 rearrangement done in CRX opcode header file.
1268 (crx_regtab): Likewise.
1269 (crx_optab): Likewise.
1270 (crx_instruction): Reorder load/stor instructions, remove unsupported
1272 support new Co-Processor instruction 'cpi'.
1274 2004-10-27 Nick Clifton <nickc@redhat.com>
1276 * opcodes/iq2000-asm.c: Regenerate.
1277 * opcodes/iq2000-desc.c: Regenerate.
1278 * opcodes/iq2000-desc.h: Regenerate.
1279 * opcodes/iq2000-dis.c: Regenerate.
1280 * opcodes/iq2000-ibld.c: Regenerate.
1281 * opcodes/iq2000-opc.c: Regenerate.
1282 * opcodes/iq2000-opc.h: Regenerate.
1284 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1286 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1287 us4, us5 (respectively).
1288 Remove unsupported 'popa' instruction.
1289 Reverse operands order in store co-processor instructions.
1291 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1293 * Makefile.am: Run "make dep-am"
1294 * Makefile.in: Regenerate.
1296 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1298 * xtensa-dis.c: Use ISO C90 formatting.
1300 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1302 * ppc-opc.c: Revert 2004-09-09 change.
1304 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1306 * xtensa-dis.c (state_names): Delete.
1307 (fetch_data): Use xtensa_isa_maxlength.
1308 (print_xtensa_operand): Replace operand parameter with opcode/operand
1309 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1310 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1311 instruction bundles. Use xmalloc instead of malloc.
1313 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1315 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1318 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1320 * crx-opc.c (crx_instruction): Support Co-processor insns.
1321 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1322 (getregliststring): Change function to use the above enum.
1323 (print_arg): Handle CO-Processor insns.
1324 (crx_cinvs): Add 'b' option to invalidate the branch-target
1327 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1329 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1330 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1331 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1332 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1333 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1335 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1337 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1340 2004-09-30 Paul Brook <paul@codesourcery.com>
1342 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1343 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1345 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1347 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1348 (CONFIG_STATUS_DEPENDENCIES): New.
1349 (Makefile): Removed.
1350 (config.status): Likewise.
1351 * Makefile.in: Regenerated.
1353 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1355 * Makefile.am: Run "make dep-am".
1356 * Makefile.in: Regenerate.
1357 * aclocal.m4: Regenerate.
1358 * configure: Regenerate.
1359 * po/POTFILES.in: Regenerate.
1360 * po/opcodes.pot: Regenerate.
1362 2004-09-11 Andreas Schwab <schwab@suse.de>
1364 * configure: Rebuild.
1366 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1368 * ppc-opc.c (L): Make this field not optional.
1370 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1372 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1373 Fix parameter to 'm[t|f]csr' insns.
1375 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1377 * configure.in: Autoupdate to autoconf 2.59.
1378 * aclocal.m4: Rebuild with aclocal 1.4p6.
1379 * configure: Rebuild with autoconf 2.59.
1380 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1381 bfd changes for autoconf 2.59 on the way).
1382 * config.in: Rebuild with autoheader 2.59.
1384 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1386 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1388 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1390 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1391 (GRPPADLCK2): New define.
1392 (twobyte_has_modrm): True for 0xA6.
1393 (grps): GRPPADLCK2 for opcode 0xA6.
1395 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1397 Introduce SH2a support.
1398 * sh-opc.h (arch_sh2a_base): Renumber.
1399 (arch_sh2a_nofpu_base): Remove.
1400 (arch_sh_base_mask): Adjust.
1401 (arch_opann_mask): New.
1402 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1403 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1404 (sh_table): Adjust whitespace.
1405 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1406 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1407 instruction list throughout.
1408 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1409 of arch_sh2a in instruction list throughout.
1410 (arch_sh2e_up): Accomodate above changes.
1411 (arch_sh2_up): Ditto.
1412 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1413 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1414 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1415 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1416 * sh-opc.h (arch_sh2a_nofpu): New.
1417 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1418 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1420 2004-01-20 DJ Delorie <dj@redhat.com>
1421 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1422 2003-12-29 DJ Delorie <dj@redhat.com>
1423 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1424 sh_opcode_info, sh_table): Add sh2a support.
1425 (arch_op32): New, to tag 32-bit opcodes.
1426 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1427 2003-12-02 Michael Snyder <msnyder@redhat.com>
1428 * sh-opc.h (arch_sh2a): Add.
1429 * sh-dis.c (arch_sh2a): Handle.
1430 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1432 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1434 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1436 2004-07-22 Nick Clifton <nickc@redhat.com>
1439 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1440 insns - this is done by objdump itself.
1441 * h8500-dis.c (print_insn_h8500): Likewise.
1443 2004-07-21 Jan Beulich <jbeulich@novell.com>
1445 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1446 regardless of address size prefix in effect.
1447 (ptr_reg): Size or address registers does not depend on rex64, but
1448 on the presence of an address size override.
1449 (OP_MMX): Use rex.x only for xmm registers.
1450 (OP_EM): Use rex.z only for xmm registers.
1452 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1454 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1455 move/branch operations to the bottom so that VR5400 multimedia
1456 instructions take precedence in disassembly.
1458 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1460 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1461 ISA-specific "break" encoding.
1463 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1465 * arm-opc.h: Fix typo in comment.
1467 2004-07-11 Andreas Schwab <schwab@suse.de>
1469 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1471 2004-07-09 Andreas Schwab <schwab@suse.de>
1473 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1475 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1477 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1478 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1479 (crx-dis.lo): New target.
1480 (crx-opc.lo): Likewise.
1481 * Makefile.in: Regenerate.
1482 * configure.in: Handle bfd_crx_arch.
1483 * configure: Regenerate.
1484 * crx-dis.c: New file.
1485 * crx-opc.c: New file.
1486 * disassemble.c (ARCH_crx): Define.
1487 (disassembler): Handle ARCH_crx.
1489 2004-06-29 James E Wilson <wilson@specifixinc.com>
1491 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1492 * ia64-asmtab.c: Regnerate.
1494 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1496 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1497 (extract_fxm): Don't test dialect.
1498 (XFXFXM_MASK): Include the power4 bit.
1499 (XFXM): Add p4 param.
1500 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1502 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1504 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1505 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1507 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1509 * ppc-opc.c (BH, XLBH_MASK): Define.
1510 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1512 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1514 * i386-dis.c (x_mode): Comment.
1515 (two_source_ops): File scope.
1516 (float_mem): Correct fisttpll and fistpll.
1517 (float_mem_mode): New table.
1519 (OP_E): Correct intel mode PTR output.
1520 (ptr_reg): Use open_char and close_char.
1521 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1522 operands. Set two_source_ops.
1524 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1526 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1527 instead of _raw_size.
1529 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1531 * ia64-gen.c (in_iclass): Handle more postinc st
1533 * ia64-asmtab.c: Rebuilt.
1535 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1537 * s390-opc.txt: Correct architecture mask for some opcodes.
1538 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1539 in the esa mode as well.
1541 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1543 * sh-dis.c (target_arch): Make unsigned.
1544 (print_insn_sh): Replace (most of) switch with a call to
1545 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1546 * sh-opc.h: Redefine architecture flags values.
1547 Add sh3-nommu architecture.
1548 Reorganise <arch>_up macros so they make more visual sense.
1549 (SH_MERGE_ARCH_SET): Define new macro.
1550 (SH_VALID_BASE_ARCH_SET): Likewise.
1551 (SH_VALID_MMU_ARCH_SET): Likewise.
1552 (SH_VALID_CO_ARCH_SET): Likewise.
1553 (SH_VALID_ARCH_SET): Likewise.
1554 (SH_MERGE_ARCH_SET_VALID): Likewise.
1555 (SH_ARCH_SET_HAS_FPU): Likewise.
1556 (SH_ARCH_SET_HAS_DSP): Likewise.
1557 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1558 (sh_get_arch_from_bfd_mach): Add prototype.
1559 (sh_get_arch_up_from_bfd_mach): Likewise.
1560 (sh_get_bfd_mach_from_arch_set): Likewise.
1561 (sh_merge_bfd_arc): Likewise.
1563 2004-05-24 Peter Barada <peter@the-baradas.com>
1565 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1566 into new match_insn_m68k function. Loop over canidate
1567 matches and select first that completely matches.
1568 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1569 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1570 to verify addressing for MAC/EMAC.
1571 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1572 reigster halves since 'fpu' and 'spl' look misleading.
1573 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1574 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1575 first, tighten up match masks.
1576 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1577 'size' from special case code in print_insn_m68k to
1578 determine decode size of insns.
1580 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1582 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1583 well as when -mpower4.
1585 2004-05-13 Nick Clifton <nickc@redhat.com>
1587 * po/fr.po: Updated French translation.
1589 2004-05-05 Peter Barada <peter@the-baradas.com>
1591 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1592 variants in arch_mask. Only set m68881/68851 for 68k chips.
1593 * m68k-op.c: Switch from ColdFire chips to core variants.
1595 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1598 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1600 2004-04-29 Ben Elliston <bje@au.ibm.com>
1602 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1603 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1605 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1607 * sh-dis.c (print_insn_sh): Print the value in constant pool
1608 as a symbol if it looks like a symbol.
1610 2004-04-22 Peter Barada <peter@the-baradas.com>
1612 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1613 appropriate ColdFire architectures.
1614 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1616 Add EMAC instructions, fix MAC instructions. Remove
1617 macmw/macml/msacmw/msacml instructions since mask addressing now
1620 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1622 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1623 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1624 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1625 macro. Adjust all users.
1627 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1629 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1632 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1634 * m32r-asm.c: Regenerate.
1636 2004-03-29 Stan Shebs <shebs@apple.com>
1638 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1641 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1643 * aclocal.m4: Regenerate.
1644 * config.in: Regenerate.
1645 * configure: Regenerate.
1646 * po/POTFILES.in: Regenerate.
1647 * po/opcodes.pot: Regenerate.
1649 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1651 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1653 * ppc-opc.c (RA0): Define.
1654 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1655 (RAOPT): Rename from RAO. Update all uses.
1656 (powerpc_opcodes): Use RA0 as appropriate.
1658 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1660 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1662 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1664 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1666 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1668 * i386-dis.c (GRPPLOCK): Delete.
1669 (grps): Delete GRPPLOCK entry.
1671 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1673 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1675 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1676 (GRPPADLCK): Define.
1677 (dis386): Use NOP_Fixup on "nop".
1678 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1679 (twobyte_has_modrm): Set for 0xa7.
1680 (padlock_table): Delete. Move to..
1681 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1683 (print_insn): Revert PADLOCK_SPECIAL code.
1684 (OP_E): Delete sfence, lfence, mfence checks.
1686 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1688 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1689 (INVLPG_Fixup): New function.
1690 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1692 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1694 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1695 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1696 (padlock_table): New struct with PadLock instructions.
1697 (print_insn): Handle PADLOCK_SPECIAL.
1699 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1701 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1702 (OP_E): Twiddle clflush to sfence here.
1704 2004-03-08 Nick Clifton <nickc@redhat.com>
1706 * po/de.po: Updated German translation.
1708 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1710 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1711 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1712 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1715 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1717 * frv-asm.c: Regenerate.
1718 * frv-desc.c: Regenerate.
1719 * frv-desc.h: Regenerate.
1720 * frv-dis.c: Regenerate.
1721 * frv-ibld.c: Regenerate.
1722 * frv-opc.c: Regenerate.
1723 * frv-opc.h: Regenerate.
1725 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1727 * frv-desc.c, frv-opc.c: Regenerate.
1729 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1731 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1733 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1735 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1736 Also correct mistake in the comment.
1738 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1740 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1741 ensure that double registers have even numbers.
1742 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1743 that reserved instruction 0xfffd does not decode the same
1745 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1746 REG_N refers to a double register.
1747 Add REG_N_B01 nibble type and use it instead of REG_NM
1749 Adjust the bit patterns in a few comments.
1751 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1753 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1755 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1757 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1759 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1761 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1763 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1765 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1766 mtivor32, mtivor33, mtivor34.
1768 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1770 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1772 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1774 * arm-opc.h Maverick accumulator register opcode fixes.
1776 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1778 * m32r-dis.c: Regenerate.
1780 2004-01-27 Michael Snyder <msnyder@redhat.com>
1782 * sh-opc.h (sh_table): "fsrra", not "fssra".
1784 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1786 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1789 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1791 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1793 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1795 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1796 1. Don't print scale factor on AT&T mode when index missing.
1798 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1800 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1801 when loaded into XR registers.
1803 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1805 * frv-desc.h: Regenerate.
1806 * frv-desc.c: Regenerate.
1807 * frv-opc.c: Regenerate.
1809 2004-01-13 Michael Snyder <msnyder@redhat.com>
1811 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1813 2004-01-09 Paul Brook <paul@codesourcery.com>
1815 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1818 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1820 * Makefile.am (libopcodes_la_DEPENDENCIES)
1821 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1822 comment about the problem.
1823 * Makefile.in: Regenerate.
1825 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1827 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1828 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1829 cut&paste errors in shifting/truncating numerical operands.
1830 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1831 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1832 (parse_uslo16): Likewise.
1833 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1834 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1835 (parse_s12): Likewise.
1836 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1837 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1838 (parse_uslo16): Likewise.
1839 (parse_uhi16): Parse gothi and gotfuncdeschi.
1840 (parse_d12): Parse got12 and gotfuncdesc12.
1841 (parse_s12): Likewise.
1843 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1845 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1846 instruction which looks similar to an 'rla' instruction.
1848 For older changes see ChangeLog-0203
1854 version-control: never