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2007-06-04 Olivier Hainque <hainque@adacore.com>
[binutils.git] / gas / config / tc-avr.c
blob2de962dd2b2ab4b4aae52ce515ab6a02e54794c2
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27
28 struct avr_opcodes_s
29 {
30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
35 };
36
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
39
40 struct avr_opcodes_s avr_opcodes[] =
41 {
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44 };
45
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
49
50 const char *md_shortopts = "m:";
51 struct mcu_type_s
52 {
53 char *name;
54 int isa;
55 int mach;
56 };
57
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
62 static struct mcu_type_s mcu_types[] =
63 {
64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
72 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
83 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
85 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
89 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
101 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
102 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
103 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
104 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
105 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
106 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
107 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
108 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
109 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
110 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
111 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
112 {"atmega8hva", AVR_ISA_PWMx, bfd_mach_avr4},
113 {"at90pwm1", AVR_ISA_PWMx, bfd_mach_avr4},
114 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
115 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
116 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
117 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
118 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
119 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
120 {"atmega164p", AVR_ISA_M323, bfd_mach_avr5},
121 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
122 {"atmega165p", AVR_ISA_M323, bfd_mach_avr5},
123 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
124 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
125 {"atmega169p", AVR_ISA_M323, bfd_mach_avr5},
126 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
127 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega324p", AVR_ISA_M323, bfd_mach_avr5},
129 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega325p", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
132 {"atmega329p", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
134 {"atmega3250p",AVR_ISA_M323, bfd_mach_avr5},
135 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
136 {"atmega3290p",AVR_ISA_M323, bfd_mach_avr5},
137 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
138 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
139 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
140 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
141 {"atmega644p", AVR_ISA_M323, bfd_mach_avr5},
142 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
143 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
144 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
145 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
146 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
147 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
148 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
149 {"atmega16hva",AVR_ISA_M323, bfd_mach_avr5},
150 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
151 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
152 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
153 {"at90usb82", AVR_ISA_M323, bfd_mach_avr5},
154 {"at90usb162", AVR_ISA_M323, bfd_mach_avr5},
155 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
156 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
157 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
158 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
159 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
160 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
161 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
162 {NULL, 0, 0}
163 };
164
165 /* Current MCU type. */
166 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
167 static struct mcu_type_s * avr_mcu = & default_mcu;
168
169 /* AVR target-specific switches. */
170 struct avr_opt_s
171 {
172 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
173 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
174 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
175 };
176
177 static struct avr_opt_s avr_opt = { 0, 0, 0 };
178
179 const char EXP_CHARS[] = "eE";
180 const char FLT_CHARS[] = "dD";
181
182 static void avr_set_arch (int);
183
184 /* The target specific pseudo-ops which we support. */
185 const pseudo_typeS md_pseudo_table[] =
186 {
187 {"arch", avr_set_arch, 0},
188 { NULL, NULL, 0}
189 };
190
191 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
192
193 #define EXP_MOD_NAME(i) exp_mod[i].name
194 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
195 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
196 #define HAVE_PM_P(i) exp_mod[i].have_pm
197
198 struct exp_mod_s
199 {
200 char * name;
201 bfd_reloc_code_real_type reloc;
202 bfd_reloc_code_real_type neg_reloc;
203 int have_pm;
204 };
205
206 static struct exp_mod_s exp_mod[] =
207 {
208 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
209 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
210 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
211 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
212 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
213 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
214 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
215 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
216 };
217
218 /* A union used to store indicies into the exp_mod[] array
219 in a hash table which expects void * data types. */
220 typedef union
221 {
222 void * ptr;
223 int index;
224 } mod_index;
225
226 /* Opcode hash table. */
227 static struct hash_control *avr_hash;
228
229 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
230 static struct hash_control *avr_mod_hash;
231
232 #define OPTION_MMCU 'm'
233 enum options
234 {
235 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
236 OPTION_NO_SKIP_BUG,
237 OPTION_NO_WRAP
238 };
239
240 struct option md_longopts[] =
241 {
242 { "mmcu", required_argument, NULL, OPTION_MMCU },
243 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
244 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
245 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
246 { NULL, no_argument, NULL, 0 }
247 };
248
249 size_t md_longopts_size = sizeof (md_longopts);
250
251 /* Display nicely formatted list of known MCU names. */
252
253 static void
254 show_mcu_list (FILE *stream)
255 {
256 int i, x;
257
258 fprintf (stream, _("Known MCU names:"));
259 x = 1000;
260
261 for (i = 0; mcu_types[i].name; i++)
262 {
263 int len = strlen (mcu_types[i].name);
264
265 x += len + 1;
266
267 if (x < 75)
268 fprintf (stream, " %s", mcu_types[i].name);
269 else
270 {
271 fprintf (stream, "\n %s", mcu_types[i].name);
272 x = len + 2;
273 }
274 }
275
276 fprintf (stream, "\n");
277 }
278
279 static inline char *
280 skip_space (char *s)
281 {
282 while (*s == ' ' || *s == '\t')
283 ++s;
284 return s;
285 }
286
287 /* Extract one word from FROM and copy it to TO. */
288
289 static char *
290 extract_word (char *from, char *to, int limit)
291 {
292 char *op_start;
293 char *op_end;
294 int size = 0;
295
296 /* Drop leading whitespace. */
297 from = skip_space (from);
298 *to = 0;
299
300 /* Find the op code end. */
301 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
302 {
303 to[size++] = *op_end++;
304 if (size + 1 >= limit)
305 break;
306 }
307
308 to[size] = 0;
309 return op_end;
310 }
311
312 int
313 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
314 asection *seg ATTRIBUTE_UNUSED)
315 {
316 abort ();
317 return 0;
318 }
319
320 void
321 md_show_usage (FILE *stream)
322 {
323 fprintf (stream,
324 _("AVR options:\n"
325 " -mmcu=[avr-name] select microcontroller variant\n"
326 " [avr-name] can be:\n"
327 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
328 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
329 " avr3 - ATmega103, ATmega603\n"
330 " avr4 - ATmega83, ATmega85\n"
331 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
332 " or immediate microcontroller name.\n"));
333 fprintf (stream,
334 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
335 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
336 " (default for avr4, avr5)\n"
337 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
338 " (default for avr3, avr5)\n"));
339 show_mcu_list (stream);
340 }
341
342 static void
343 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
344 {
345 char str[20];
346
347 input_line_pointer = extract_word (input_line_pointer, str, 20);
348 md_parse_option (OPTION_MMCU, str);
349 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
350 }
351
352 int
353 md_parse_option (int c, char *arg)
354 {
355 switch (c)
356 {
357 case OPTION_MMCU:
358 {
359 int i;
360 char *s = alloca (strlen (arg) + 1);
361
362 {
363 char *t = s;
364 char *arg1 = arg;
365
366 do
367 *t = TOLOWER (*arg1++);
368 while (*t++);
369 }
370
371 for (i = 0; mcu_types[i].name; ++i)
372 if (strcmp (mcu_types[i].name, s) == 0)
373 break;
374
375 if (!mcu_types[i].name)
376 {
377 show_mcu_list (stderr);
378 as_fatal (_("unknown MCU: %s\n"), arg);
379 }
380
381 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
382 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
383 as .arch ... in the asm output at the same time. */
384 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
385 avr_mcu = &mcu_types[i];
386 else
387 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
388 avr_mcu->name, mcu_types[i].name);
389 return 1;
390 }
391 case OPTION_ALL_OPCODES:
392 avr_opt.all_opcodes = 1;
393 return 1;
394 case OPTION_NO_SKIP_BUG:
395 avr_opt.no_skip_bug = 1;
396 return 1;
397 case OPTION_NO_WRAP:
398 avr_opt.no_wrap = 1;
399 return 1;
400 }
401
402 return 0;
403 }
404
405 symbolS *
406 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
407 {
408 return NULL;
409 }
410
411 /* Turn a string in input_line_pointer into a floating point constant
412 of type TYPE, and store the appropriate bytes in *LITP. The number
413 of LITTLENUMS emitted is stored in *SIZEP. An error message is
414 returned, or NULL on OK. */
415
416 char *
417 md_atof (int type, char *litP, int *sizeP)
418 {
419 int prec;
420 LITTLENUM_TYPE words[4];
421 LITTLENUM_TYPE *wordP;
422 char *t;
423
424 switch (type)
425 {
426 case 'f':
427 prec = 2;
428 break;
429 case 'd':
430 prec = 4;
431 break;
432 default:
433 *sizeP = 0;
434 return _("bad call to md_atof");
435 }
436
437 t = atof_ieee (input_line_pointer, type, words);
438 if (t)
439 input_line_pointer = t;
440
441 *sizeP = prec * sizeof (LITTLENUM_TYPE);
442
443 /* This loop outputs the LITTLENUMs in REVERSE order. */
444 for (wordP = words + prec - 1; prec--;)
445 {
446 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
447 litP += sizeof (LITTLENUM_TYPE);
448 }
449
450 return NULL;
451 }
452
453 void
454 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
455 asection *sec ATTRIBUTE_UNUSED,
456 fragS *fragP ATTRIBUTE_UNUSED)
457 {
458 abort ();
459 }
460
461 void
462 md_begin (void)
463 {
464 unsigned int i;
465 struct avr_opcodes_s *opcode;
466
467 avr_hash = hash_new ();
468
469 /* Insert unique names into hash table. This hash table then provides a
470 quick index to the first opcode with a particular name in the opcode
471 table. */
472 for (opcode = avr_opcodes; opcode->name; opcode++)
473 hash_insert (avr_hash, opcode->name, (char *) opcode);
474
475 avr_mod_hash = hash_new ();
476
477 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
478 {
479 mod_index m;
480
481 m.index = i + 10;
482 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
483 }
484
485 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
486 }
487
488 /* Resolve STR as a constant expression and return the result.
489 If result greater than MAX then error. */
490
491 static unsigned int
492 avr_get_constant (char *str, int max)
493 {
494 expressionS ex;
495
496 str = skip_space (str);
497 input_line_pointer = str;
498 expression (& ex);
499
500 if (ex.X_op != O_constant)
501 as_bad (_("constant value required"));
502
503 if (ex.X_add_number > max || ex.X_add_number < 0)
504 as_bad (_("number must be less than %d"), max + 1);
505
506 return ex.X_add_number;
507 }
508
509 /* Parse for ldd/std offset. */
510
511 static void
512 avr_offset_expression (expressionS *exp)
513 {
514 char *str = input_line_pointer;
515 char *tmp;
516 char op[8];
517
518 tmp = str;
519 str = extract_word (str, op, sizeof (op));
520
521 input_line_pointer = tmp;
522 expression (exp);
523
524 /* Warn about expressions that fail to use lo8 (). */
525 if (exp->X_op == O_constant)
526 {
527 int x = exp->X_add_number;
528
529 if (x < -255 || x > 255)
530 as_warn (_("constant out of 8-bit range: %d"), x);
531 }
532 }
533
534 /* Parse ordinary expression. */
535
536 static char *
537 parse_exp (char *s, expressionS *op)
538 {
539 input_line_pointer = s;
540 expression (op);
541 if (op->X_op == O_absent)
542 as_bad (_("missing operand"));
543 return input_line_pointer;
544 }
545
546 /* Parse special expressions (needed for LDI command):
547 xx8 (address)
548 xx8 (-address)
549 pm_xx8 (address)
550 pm_xx8 (-address)
551 where xx is: hh, hi, lo. */
552
553 static bfd_reloc_code_real_type
554 avr_ldi_expression (expressionS *exp)
555 {
556 char *str = input_line_pointer;
557 char *tmp;
558 char op[8];
559 int mod;
560 int linker_stubs_should_be_generated = 0;
561
562 tmp = str;
563
564 str = extract_word (str, op, sizeof (op));
565
566 if (op[0])
567 {
568 mod_index m;
569
570 m.ptr = hash_find (avr_mod_hash, op);
571 mod = m.index;
572
573 if (mod)
574 {
575 int closes = 0;
576
577 mod -= 10;
578 str = skip_space (str);
579
580 if (*str == '(')
581 {
582 bfd_reloc_code_real_type reloc_to_return;
583 int neg_p = 0;
584
585 ++str;
586
587 if (strncmp ("pm(", str, 3) == 0
588 || strncmp ("gs(",str,3) == 0
589 || strncmp ("-(gs(",str,5) == 0
590 || strncmp ("-(pm(", str, 5) == 0)
591 {
592 if (HAVE_PM_P (mod))
593 {
594 ++mod;
595 ++closes;
596 }
597 else
598 as_bad (_("illegal expression"));
599
600 if (str[0] == 'g' || str[2] == 'g')
601 linker_stubs_should_be_generated = 1;
602
603 if (*str == '-')
604 {
605 neg_p = 1;
606 ++closes;
607 str += 5;
608 }
609 else
610 str += 3;
611 }
612
613 if (*str == '-' && *(str + 1) == '(')
614 {
615 neg_p ^= 1;
616 ++closes;
617 str += 2;
618 }
619
620 input_line_pointer = str;
621 expression (exp);
622
623 do
624 {
625 if (*input_line_pointer != ')')
626 {
627 as_bad (_("`)' required"));
628 break;
629 }
630 input_line_pointer++;
631 }
632 while (closes--);
633
634 reloc_to_return =
635 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
636 if (linker_stubs_should_be_generated)
637 {
638 switch (reloc_to_return)
639 {
640 case BFD_RELOC_AVR_LO8_LDI_PM:
641 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
642 break;
643 case BFD_RELOC_AVR_HI8_LDI_PM:
644 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
645 break;
646
647 default:
648 as_warn (_("expression dangerous with linker stubs"));
649 }
650 }
651 return reloc_to_return;
652 }
653 }
654 }
655
656 input_line_pointer = tmp;
657 expression (exp);
658
659 /* Warn about expressions that fail to use lo8 (). */
660 if (exp->X_op == O_constant)
661 {
662 int x = exp->X_add_number;
663
664 if (x < -255 || x > 255)
665 as_warn (_("constant out of 8-bit range: %d"), x);
666 }
667
668 return BFD_RELOC_AVR_LDI;
669 }
670
671 /* Parse one instruction operand.
672 Return operand bitmask. Also fixups can be generated. */
673
674 static unsigned int
675 avr_operand (struct avr_opcodes_s *opcode,
676 int where,
677 char *op,
678 char **line)
679 {
680 expressionS op_expr;
681 unsigned int op_mask = 0;
682 char *str = skip_space (*line);
683
684 switch (*op)
685 {
686 /* Any register operand. */
687 case 'w':
688 case 'd':
689 case 'r':
690 case 'a':
691 case 'v':
692 if (*str == 'r' || *str == 'R')
693 {
694 char r_name[20];
695
696 str = extract_word (str, r_name, sizeof (r_name));
697 op_mask = 0xff;
698 if (ISDIGIT (r_name[1]))
699 {
700 if (r_name[2] == '\0')
701 op_mask = r_name[1] - '0';
702 else if (r_name[1] != '0'
703 && ISDIGIT (r_name[2])
704 && r_name[3] == '\0')
705 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
706 }
707 }
708 else
709 {
710 op_mask = avr_get_constant (str, 31);
711 str = input_line_pointer;
712 }
713
714 if (op_mask <= 31)
715 {
716 switch (*op)
717 {
718 case 'a':
719 if (op_mask < 16 || op_mask > 23)
720 as_bad (_("register r16-r23 required"));
721 op_mask -= 16;
722 break;
723
724 case 'd':
725 if (op_mask < 16)
726 as_bad (_("register number above 15 required"));
727 op_mask -= 16;
728 break;
729
730 case 'v':
731 if (op_mask & 1)
732 as_bad (_("even register number required"));
733 op_mask >>= 1;
734 break;
735
736 case 'w':
737 if ((op_mask & 1) || op_mask < 24)
738 as_bad (_("register r24, r26, r28 or r30 required"));
739 op_mask = (op_mask - 24) >> 1;
740 break;
741 }
742 break;
743 }
744 as_bad (_("register name or number from 0 to 31 required"));
745 break;
746
747 case 'e':
748 {
749 char c;
750
751 if (*str == '-')
752 {
753 str = skip_space (str + 1);
754 op_mask = 0x1002;
755 }
756 c = TOLOWER (*str);
757 if (c == 'x')
758 op_mask |= 0x100c;
759 else if (c == 'y')
760 op_mask |= 0x8;
761 else if (c != 'z')
762 as_bad (_("pointer register (X, Y or Z) required"));
763
764 str = skip_space (str + 1);
765 if (*str == '+')
766 {
767 ++str;
768 if (op_mask & 2)
769 as_bad (_("cannot both predecrement and postincrement"));
770 op_mask |= 0x1001;
771 }
772
773 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
774 registers, no predecrement, no postincrement. */
775 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
776 && !(avr_mcu->isa & AVR_ISA_SRAM))
777 as_bad (_("addressing mode not supported"));
778 }
779 break;
780
781 case 'z':
782 if (*str == '-')
783 as_bad (_("can't predecrement"));
784
785 if (! (*str == 'z' || *str == 'Z'))
786 as_bad (_("pointer register Z required"));
787
788 str = skip_space (str + 1);
789
790 if (*str == '+')
791 {
792 ++str;
793 op_mask |= 1;
794 }
795 break;
796
797 case 'b':
798 {
799 char c = TOLOWER (*str++);
800
801 if (c == 'y')
802 op_mask |= 0x8;
803 else if (c != 'z')
804 as_bad (_("pointer register (Y or Z) required"));
805 str = skip_space (str);
806 if (*str++ == '+')
807 {
808 input_line_pointer = str;
809 avr_offset_expression (& op_expr);
810 str = input_line_pointer;
811 fix_new_exp (frag_now, where, 3,
812 &op_expr, FALSE, BFD_RELOC_AVR_6);
813 }
814 }
815 break;
816
817 case 'h':
818 str = parse_exp (str, &op_expr);
819 fix_new_exp (frag_now, where, opcode->insn_size * 2,
820 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
821 break;
822
823 case 'L':
824 str = parse_exp (str, &op_expr);
825 fix_new_exp (frag_now, where, opcode->insn_size * 2,
826 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
827 break;
828
829 case 'l':
830 str = parse_exp (str, &op_expr);
831 fix_new_exp (frag_now, where, opcode->insn_size * 2,
832 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
833 break;
834
835 case 'i':
836 str = parse_exp (str, &op_expr);
837 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
838 &op_expr, FALSE, BFD_RELOC_16);
839 break;
840
841 case 'M':
842 {
843 bfd_reloc_code_real_type r_type;
844
845 input_line_pointer = str;
846 r_type = avr_ldi_expression (&op_expr);
847 str = input_line_pointer;
848 fix_new_exp (frag_now, where, 3,
849 &op_expr, FALSE, r_type);
850 }
851 break;
852
853 case 'n':
854 {
855 unsigned int x;
856
857 x = ~avr_get_constant (str, 255);
858 str = input_line_pointer;
859 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
860 }
861 break;
862
863 case 'K':
864 input_line_pointer = str;
865 avr_offset_expression (& op_expr);
866 str = input_line_pointer;
867 fix_new_exp (frag_now, where, 3,
868 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
869 break;
870
871 case 'S':
872 case 's':
873 {
874 unsigned int x;
875
876 x = avr_get_constant (str, 7);
877 str = input_line_pointer;
878 if (*op == 'S')
879 x <<= 4;
880 op_mask |= x;
881 }
882 break;
883
884 case 'P':
885 {
886 unsigned int x;
887
888 x = avr_get_constant (str, 63);
889 str = input_line_pointer;
890 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
891 }
892 break;
893
894 case 'p':
895 {
896 unsigned int x;
897
898 x = avr_get_constant (str, 31);
899 str = input_line_pointer;
900 op_mask |= x << 3;
901 }
902 break;
903
904 case '?':
905 break;
906
907 default:
908 as_bad (_("unknown constraint `%c'"), *op);
909 }
910
911 *line = str;
912 return op_mask;
913 }
914
915 /* Parse instruction operands.
916 Return binary opcode. */
917
918 static unsigned int
919 avr_operands (struct avr_opcodes_s *opcode, char **line)
920 {
921 char *op = opcode->constraints;
922 unsigned int bin = opcode->bin_opcode;
923 char *frag = frag_more (opcode->insn_size * 2);
924 char *str = *line;
925 int where = frag - frag_now->fr_literal;
926 static unsigned int prev = 0; /* Previous opcode. */
927
928 /* Opcode have operands. */
929 if (*op)
930 {
931 unsigned int reg1 = 0;
932 unsigned int reg2 = 0;
933 int reg1_present = 0;
934 int reg2_present = 0;
935
936 /* Parse first operand. */
937 if (REGISTER_P (*op))
938 reg1_present = 1;
939 reg1 = avr_operand (opcode, where, op, &str);
940 ++op;
941
942 /* Parse second operand. */
943 if (*op)
944 {
945 if (*op == ',')
946 ++op;
947
948 if (*op == '=')
949 {
950 reg2 = reg1;
951 reg2_present = 1;
952 }
953 else
954 {
955 if (REGISTER_P (*op))
956 reg2_present = 1;
957
958 str = skip_space (str);
959 if (*str++ != ',')
960 as_bad (_("`,' required"));
961 str = skip_space (str);
962
963 reg2 = avr_operand (opcode, where, op, &str);
964 }
965
966 if (reg1_present && reg2_present)
967 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
968 else if (reg2_present)
969 reg2 <<= 4;
970 }
971 if (reg1_present)
972 reg1 <<= 4;
973 bin |= reg1 | reg2;
974 }
975
976 /* Detect undefined combinations (like ld r31,Z+). */
977 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
978 as_warn (_("undefined combination of operands"));
979
980 if (opcode->insn_size == 2)
981 {
982 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
983 (AVR core bug, fixed in the newer devices). */
984 if (!(avr_opt.no_skip_bug ||
985 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
986 && AVR_SKIP_P (prev))
987 as_warn (_("skipping two-word instruction"));
988
989 bfd_putl32 ((bfd_vma) bin, frag);
990 }
991 else
992 bfd_putl16 ((bfd_vma) bin, frag);
993
994 prev = bin;
995 *line = str;
996 return bin;
997 }
998
999 /* GAS will call this function for each section at the end of the assembly,
1000 to permit the CPU backend to adjust the alignment of a section. */
1001
1002 valueT
1003 md_section_align (asection *seg, valueT addr)
1004 {
1005 int align = bfd_get_section_alignment (stdoutput, seg);
1006 return ((addr + (1 << align) - 1) & (-1 << align));
1007 }
1008
1009 /* If you define this macro, it should return the offset between the
1010 address of a PC relative fixup and the position from which the PC
1011 relative adjustment should be made. On many processors, the base
1012 of a PC relative instruction is the next instruction, so this
1013 macro would return the length of an instruction. */
1014
1015 long
1016 md_pcrel_from_section (fixS *fixp, segT sec)
1017 {
1018 if (fixp->fx_addsy != (symbolS *) NULL
1019 && (!S_IS_DEFINED (fixp->fx_addsy)
1020 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1021 return 0;
1022
1023 return fixp->fx_frag->fr_address + fixp->fx_where;
1024 }
1025
1026 /* GAS will call this for each fixup. It should store the correct
1027 value in the object file. */
1028
1029 void
1030 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1031 {
1032 unsigned char *where;
1033 unsigned long insn;
1034 long value = *valP;
1035
1036 if (fixP->fx_addsy == (symbolS *) NULL)
1037 fixP->fx_done = 1;
1038
1039 else if (fixP->fx_pcrel)
1040 {
1041 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1042
1043 if (s == seg || s == absolute_section)
1044 {
1045 value += S_GET_VALUE (fixP->fx_addsy);
1046 fixP->fx_done = 1;
1047 }
1048 }
1049
1050 /* We don't actually support subtracting a symbol. */
1051 if (fixP->fx_subsy != (symbolS *) NULL)
1052 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1053
1054 switch (fixP->fx_r_type)
1055 {
1056 default:
1057 fixP->fx_no_overflow = 1;
1058 break;
1059 case BFD_RELOC_AVR_7_PCREL:
1060 case BFD_RELOC_AVR_13_PCREL:
1061 case BFD_RELOC_32:
1062 case BFD_RELOC_16:
1063 case BFD_RELOC_AVR_CALL:
1064 break;
1065 }
1066
1067 if (fixP->fx_done)
1068 {
1069 /* Fetch the instruction, insert the fully resolved operand
1070 value, and stuff the instruction back again. */
1071 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1072 insn = bfd_getl16 (where);
1073
1074 switch (fixP->fx_r_type)
1075 {
1076 case BFD_RELOC_AVR_7_PCREL:
1077 if (value & 1)
1078 as_bad_where (fixP->fx_file, fixP->fx_line,
1079 _("odd address operand: %ld"), value);
1080
1081 /* Instruction addresses are always right-shifted by 1. */
1082 value >>= 1;
1083 --value; /* Correct PC. */
1084
1085 if (value < -64 || value > 63)
1086 as_bad_where (fixP->fx_file, fixP->fx_line,
1087 _("operand out of range: %ld"), value);
1088 value = (value << 3) & 0x3f8;
1089 bfd_putl16 ((bfd_vma) (value | insn), where);
1090 break;
1091
1092 case BFD_RELOC_AVR_13_PCREL:
1093 if (value & 1)
1094 as_bad_where (fixP->fx_file, fixP->fx_line,
1095 _("odd address operand: %ld"), value);
1096
1097 /* Instruction addresses are always right-shifted by 1. */
1098 value >>= 1;
1099 --value; /* Correct PC. */
1100
1101 if (value < -2048 || value > 2047)
1102 {
1103 /* No wrap for devices with >8K of program memory. */
1104 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1105 as_bad_where (fixP->fx_file, fixP->fx_line,
1106 _("operand out of range: %ld"), value);
1107 }
1108
1109 value &= 0xfff;
1110 bfd_putl16 ((bfd_vma) (value | insn), where);
1111 break;
1112
1113 case BFD_RELOC_32:
1114 bfd_putl16 ((bfd_vma) value, where);
1115 break;
1116
1117 case BFD_RELOC_16:
1118 bfd_putl16 ((bfd_vma) value, where);
1119 break;
1120
1121 case BFD_RELOC_AVR_16_PM:
1122 bfd_putl16 ((bfd_vma) (value >> 1), where);
1123 break;
1124
1125 case BFD_RELOC_AVR_LDI:
1126 if (value > 255)
1127 as_bad_where (fixP->fx_file, fixP->fx_line,
1128 _("operand out of range: %ld"), value);
1129 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1130 break;
1131
1132 case BFD_RELOC_AVR_6:
1133 if ((value > 63) || (value < 0))
1134 as_bad_where (fixP->fx_file, fixP->fx_line,
1135 _("operand out of range: %ld"), value);
1136 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1137 break;
1138
1139 case BFD_RELOC_AVR_6_ADIW:
1140 if ((value > 63) || (value < 0))
1141 as_bad_where (fixP->fx_file, fixP->fx_line,
1142 _("operand out of range: %ld"), value);
1143 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1144 break;
1145
1146 case BFD_RELOC_AVR_LO8_LDI:
1147 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1148 break;
1149
1150 case BFD_RELOC_AVR_HI8_LDI:
1151 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1152 break;
1153
1154 case BFD_RELOC_AVR_MS8_LDI:
1155 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1156 break;
1157
1158 case BFD_RELOC_AVR_HH8_LDI:
1159 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1160 break;
1161
1162 case BFD_RELOC_AVR_LO8_LDI_NEG:
1163 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1164 break;
1165
1166 case BFD_RELOC_AVR_HI8_LDI_NEG:
1167 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1168 break;
1169
1170 case BFD_RELOC_AVR_MS8_LDI_NEG:
1171 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1172 break;
1173
1174 case BFD_RELOC_AVR_HH8_LDI_NEG:
1175 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1176 break;
1177
1178 case BFD_RELOC_AVR_LO8_LDI_PM:
1179 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1180 break;
1181
1182 case BFD_RELOC_AVR_HI8_LDI_PM:
1183 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1184 break;
1185
1186 case BFD_RELOC_AVR_HH8_LDI_PM:
1187 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1188 break;
1189
1190 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1191 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1192 break;
1193
1194 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1195 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1196 break;
1197
1198 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1199 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1200 break;
1201
1202 case BFD_RELOC_AVR_CALL:
1203 {
1204 unsigned long x;
1205
1206 x = bfd_getl16 (where);
1207 if (value & 1)
1208 as_bad_where (fixP->fx_file, fixP->fx_line,
1209 _("odd address operand: %ld"), value);
1210 value >>= 1;
1211 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1212 bfd_putl16 ((bfd_vma) x, where);
1213 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1214 }
1215 break;
1216
1217 default:
1218 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1219 fixP->fx_line, fixP->fx_r_type);
1220 break;
1221 }
1222 }
1223 else
1224 {
1225 switch (fixP->fx_r_type)
1226 {
1227 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1228 case -BFD_RELOC_AVR_HI8_LDI:
1229 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1230 case -BFD_RELOC_AVR_LO8_LDI:
1231 as_bad_where (fixP->fx_file, fixP->fx_line,
1232 _("only constant expression allowed"));
1233 fixP->fx_done = 1;
1234 break;
1235 default:
1236 break;
1237 }
1238 }
1239 }
1240
1241 /* GAS will call this to generate a reloc, passing the resulting reloc
1242 to `bfd_install_relocation'. This currently works poorly, as
1243 `bfd_install_relocation' often does the wrong thing, and instances of
1244 `tc_gen_reloc' have been written to work around the problems, which
1245 in turns makes it difficult to fix `bfd_install_relocation'. */
1246
1247 /* If while processing a fixup, a reloc really needs to be created
1248 then it is done here. */
1249
1250 arelent *
1251 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1252 fixS *fixp)
1253 {
1254 arelent *reloc;
1255
1256 if (fixp->fx_addsy && fixp->fx_subsy)
1257 {
1258 long value = 0;
1259
1260 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1261 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1262 {
1263 as_bad_where (fixp->fx_file, fixp->fx_line,
1264 "Difference of symbols in different sections is not supported");
1265 return NULL;
1266 }
1267
1268 /* We are dealing with two symbols defined in the same section.
1269 Let us fix-up them here. */
1270 value += S_GET_VALUE (fixp->fx_addsy);
1271 value -= S_GET_VALUE (fixp->fx_subsy);
1272
1273 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1274 only takes it's second operands for the fixup value. */
1275 fixp->fx_addsy = NULL;
1276 fixp->fx_subsy = NULL;
1277 md_apply_fix (fixp, (valueT *) &value, NULL);
1278
1279 return NULL;
1280 }
1281
1282 reloc = xmalloc (sizeof (arelent));
1283
1284 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1285 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1286
1287 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1288 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1289 if (reloc->howto == (reloc_howto_type *) NULL)
1290 {
1291 as_bad_where (fixp->fx_file, fixp->fx_line,
1292 _("reloc %d not supported by object file format"),
1293 (int) fixp->fx_r_type);
1294 return NULL;
1295 }
1296
1297 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1298 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1299 reloc->address = fixp->fx_offset;
1300
1301 reloc->addend = fixp->fx_offset;
1302
1303 return reloc;
1304 }
1305
1306 void
1307 md_assemble (char *str)
1308 {
1309 struct avr_opcodes_s *opcode;
1310 char op[11];
1311
1312 str = skip_space (extract_word (str, op, sizeof (op)));
1313
1314 if (!op[0])
1315 as_bad (_("can't find opcode "));
1316
1317 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1318
1319 if (opcode == NULL)
1320 {
1321 as_bad (_("unknown opcode `%s'"), op);
1322 return;
1323 }
1324
1325 /* Special case for opcodes with optional operands (lpm, elpm) -
1326 version with operands exists in avr_opcodes[] in the next entry. */
1327
1328 if (*str && *opcode->constraints == '?')
1329 ++opcode;
1330
1331 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1332 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1333
1334 /* We used to set input_line_pointer to the result of get_operands,
1335 but that is wrong. Our caller assumes we don't change it. */
1336 {
1337 char *t = input_line_pointer;
1338
1339 avr_operands (opcode, &str);
1340 if (*skip_space (str))
1341 as_bad (_("garbage at end of line"));
1342 input_line_pointer = t;
1343 }
1344 }
1345
1346 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1347 `avr_cons_fix_new'. */
1348 static int exp_mod_pm = 0;
1349
1350 /* Parse special CONS expression: pm (expression)
1351 or alternatively: gs (expression).
1352 These are used for addressing program memory.
1353 Relocation: BFD_RELOC_AVR_16_PM. */
1354
1355 void
1356 avr_parse_cons_expression (expressionS *exp, int nbytes)
1357 {
1358 char *tmp;
1359
1360 exp_mod_pm = 0;
1361
1362 tmp = input_line_pointer = skip_space (input_line_pointer);
1363
1364 if (nbytes == 2)
1365 {
1366 char *pm_name1 = "pm";
1367 char *pm_name2 = "gs";
1368 int len = strlen (pm_name1);
1369 /* len must be the same for both pm identifiers. */
1370
1371 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1372 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1373 {
1374 input_line_pointer = skip_space (input_line_pointer + len);
1375
1376 if (*input_line_pointer == '(')
1377 {
1378 input_line_pointer = skip_space (input_line_pointer + 1);
1379 exp_mod_pm = 1;
1380 expression (exp);
1381
1382 if (*input_line_pointer == ')')
1383 ++input_line_pointer;
1384 else
1385 {
1386 as_bad (_("`)' required"));
1387 exp_mod_pm = 0;
1388 }
1389
1390 return;
1391 }
1392
1393 input_line_pointer = tmp;
1394 }
1395 }
1396
1397 expression (exp);
1398 }
1399
1400 void
1401 avr_cons_fix_new (fragS *frag,
1402 int where,
1403 int nbytes,
1404 expressionS *exp)
1405 {
1406 if (exp_mod_pm == 0)
1407 {
1408 if (nbytes == 2)
1409 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1410 else if (nbytes == 4)
1411 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1412 else
1413 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1414 }
1415 else
1416 {
1417 if (nbytes == 2)
1418 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1419 else
1420 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1421 exp_mod_pm = 0;
1422 }
1423 }
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