Fix regression from change
[binutils.git] / opcodes / tilegx-opc.c
blob682dd1b1aab3e7b9b1bd1b084636bc4b62aa237e
1 /* TILE-Gx opcode information.
3 Copyright 2011 Free Software Foundation, Inc.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
18 MA 02110-1301, USA. */
20 /* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */
21 #define BFD_RELOC(x) BFD_RELOC_##x
23 #include "bfd.h"
25 /* Special registers. */
26 #define TREG_LR 55
27 #define TREG_SN 56
28 #define TREG_ZERO 63
30 #if defined(__KERNEL__) || defined(_LIBC)
31 /* FIXME: Rename this. */
32 #include <asm/opcode-tile_64.h>
33 #define DISASM_ONLY
34 #else
35 #include "opcode/tilegx.h"
36 #endif
38 #ifdef __KERNEL__
39 #include <linux/stddef.h>
40 #else
41 #include <stddef.h>
42 #endif
44 const struct tilegx_opcode tilegx_opcodes[336] =
46 { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
47 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
48 #ifndef DISASM_ONLY
50 0ULL,
51 0xffffffff80000000ULL,
52 0ULL,
53 0ULL,
54 0ULL
57 -1ULL,
58 0x286a44ae00000000ULL,
59 -1ULL,
60 -1ULL,
61 -1ULL
63 #endif
65 { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
66 { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } },
67 #ifndef DISASM_ONLY
69 0xc00000007ff00fffULL,
70 0xfff807ff80000000ULL,
71 0x0000000078000fffULL,
72 0x3c0007ff80000000ULL,
73 0ULL
76 0x0000000040300fffULL,
77 0x181807ff80000000ULL,
78 0x0000000010000fffULL,
79 0x0c0007ff80000000ULL,
80 -1ULL
82 #endif
84 { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
85 { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } },
86 #ifndef DISASM_ONLY
88 0xc000000070000fffULL,
89 0xf80007ff80000000ULL,
90 0ULL,
91 0ULL,
92 0ULL
95 0x0000000070000fffULL,
96 0x380007ff80000000ULL,
97 -1ULL,
98 -1ULL,
99 -1ULL
101 #endif
103 { "ld4s_tls", TILEGX_OPC_LD4S_TLS, 0x2, 3, TREG_ZERO, 1,
104 { { 0, }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
105 #ifndef DISASM_ONLY
107 0ULL,
108 0xfffff80000000000ULL,
109 0ULL,
110 0ULL,
111 0ULL
114 -1ULL,
115 0x1858000000000000ULL,
116 -1ULL,
117 -1ULL,
118 -1ULL
120 #endif
122 { "ld_tls", TILEGX_OPC_LD_TLS, 0x2, 3, TREG_ZERO, 1,
123 { { 0, }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
124 #ifndef DISASM_ONLY
126 0ULL,
127 0xfffff80000000000ULL,
128 0ULL,
129 0ULL,
130 0ULL
133 -1ULL,
134 0x18a0000000000000ULL,
135 -1ULL,
136 -1ULL,
137 -1ULL
139 #endif
141 { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
142 { { 8, 9 }, { 6, 7 }, { 10, 11 }, { 12, 13 }, { 0, } },
143 #ifndef DISASM_ONLY
145 0xc00000007ffff000ULL,
146 0xfffff80000000000ULL,
147 0x00000000780ff000ULL,
148 0x3c07f80000000000ULL,
149 0ULL
152 0x000000005107f000ULL,
153 0x283bf80000000000ULL,
154 0x00000000500bf000ULL,
155 0x2c05f80000000000ULL,
156 -1ULL
158 #endif
160 { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
161 { { 8, 0 }, { 6, 1 }, { 10, 2 }, { 12, 3 }, { 0, } },
162 #ifndef DISASM_ONLY
164 0xc00000007ff00fc0ULL,
165 0xfff807e000000000ULL,
166 0x0000000078000fc0ULL,
167 0x3c0007e000000000ULL,
168 0ULL
171 0x0000000040100fc0ULL,
172 0x180807e000000000ULL,
173 0x0000000000000fc0ULL,
174 0x040007e000000000ULL,
175 -1ULL
177 #endif
179 { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
180 { { 8, 4 }, { 6, 5 }, { 0, }, { 0, }, { 0, } },
181 #ifndef DISASM_ONLY
183 0xc000000070000fc0ULL,
184 0xf80007e000000000ULL,
185 0ULL,
186 0ULL,
187 0ULL
190 0x0000000010000fc0ULL,
191 0x000007e000000000ULL,
192 -1ULL,
193 -1ULL,
194 -1ULL
196 #endif
198 { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
199 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
200 #ifndef DISASM_ONLY
202 0ULL,
203 0xfffff81f80000000ULL,
204 0ULL,
205 0ULL,
206 0xc3f8000004000000ULL
209 -1ULL,
210 0x286a801f80000000ULL,
211 -1ULL,
212 -1ULL,
213 0x41f8000004000000ULL
215 #endif
217 { "prefetch_add_l1", TILEGX_OPC_PREFETCH_ADD_L1, 0x2, 2, TREG_ZERO, 1,
218 { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
219 #ifndef DISASM_ONLY
221 0ULL,
222 0xfff8001f80000000ULL,
223 0ULL,
224 0ULL,
225 0ULL
228 -1ULL,
229 0x1840001f80000000ULL,
230 -1ULL,
231 -1ULL,
232 -1ULL
234 #endif
236 { "prefetch_add_l1_fault", TILEGX_OPC_PREFETCH_ADD_L1_FAULT, 0x2, 2, TREG_ZERO, 1,
237 { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
238 #ifndef DISASM_ONLY
240 0ULL,
241 0xfff8001f80000000ULL,
242 0ULL,
243 0ULL,
244 0ULL
247 -1ULL,
248 0x1838001f80000000ULL,
249 -1ULL,
250 -1ULL,
251 -1ULL
253 #endif
255 { "prefetch_add_l2", TILEGX_OPC_PREFETCH_ADD_L2, 0x2, 2, TREG_ZERO, 1,
256 { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
257 #ifndef DISASM_ONLY
259 0ULL,
260 0xfff8001f80000000ULL,
261 0ULL,
262 0ULL,
263 0ULL
266 -1ULL,
267 0x1850001f80000000ULL,
268 -1ULL,
269 -1ULL,
270 -1ULL
272 #endif
274 { "prefetch_add_l2_fault", TILEGX_OPC_PREFETCH_ADD_L2_FAULT, 0x2, 2, TREG_ZERO, 1,
275 { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
276 #ifndef DISASM_ONLY
278 0ULL,
279 0xfff8001f80000000ULL,
280 0ULL,
281 0ULL,
282 0ULL
285 -1ULL,
286 0x1848001f80000000ULL,
287 -1ULL,
288 -1ULL,
289 -1ULL
291 #endif
293 { "prefetch_add_l3", TILEGX_OPC_PREFETCH_ADD_L3, 0x2, 2, TREG_ZERO, 1,
294 { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
295 #ifndef DISASM_ONLY
297 0ULL,
298 0xfff8001f80000000ULL,
299 0ULL,
300 0ULL,
301 0ULL
304 -1ULL,
305 0x1860001f80000000ULL,
306 -1ULL,
307 -1ULL,
308 -1ULL
310 #endif
312 { "prefetch_add_l3_fault", TILEGX_OPC_PREFETCH_ADD_L3_FAULT, 0x2, 2, TREG_ZERO, 1,
313 { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
314 #ifndef DISASM_ONLY
316 0ULL,
317 0xfff8001f80000000ULL,
318 0ULL,
319 0ULL,
320 0ULL
323 -1ULL,
324 0x1858001f80000000ULL,
325 -1ULL,
326 -1ULL,
327 -1ULL
329 #endif
331 { "prefetch_l1", TILEGX_OPC_PREFETCH_L1, 0x12, 1, TREG_ZERO, 1,
332 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
333 #ifndef DISASM_ONLY
335 0ULL,
336 0xfffff81f80000000ULL,
337 0ULL,
338 0ULL,
339 0xc3f8000004000000ULL
342 -1ULL,
343 0x286a801f80000000ULL,
344 -1ULL,
345 -1ULL,
346 0x41f8000004000000ULL
348 #endif
350 { "prefetch_l1_fault", TILEGX_OPC_PREFETCH_L1_FAULT, 0x12, 1, TREG_ZERO, 1,
351 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
352 #ifndef DISASM_ONLY
354 0ULL,
355 0xfffff81f80000000ULL,
356 0ULL,
357 0ULL,
358 0xc3f8000004000000ULL
361 -1ULL,
362 0x286a781f80000000ULL,
363 -1ULL,
364 -1ULL,
365 0x41f8000000000000ULL
367 #endif
369 { "prefetch_l2", TILEGX_OPC_PREFETCH_L2, 0x12, 1, TREG_ZERO, 1,
370 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
371 #ifndef DISASM_ONLY
373 0ULL,
374 0xfffff81f80000000ULL,
375 0ULL,
376 0ULL,
377 0xc3f8000004000000ULL
380 -1ULL,
381 0x286a901f80000000ULL,
382 -1ULL,
383 -1ULL,
384 0x43f8000004000000ULL
386 #endif
388 { "prefetch_l2_fault", TILEGX_OPC_PREFETCH_L2_FAULT, 0x12, 1, TREG_ZERO, 1,
389 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
390 #ifndef DISASM_ONLY
392 0ULL,
393 0xfffff81f80000000ULL,
394 0ULL,
395 0ULL,
396 0xc3f8000004000000ULL
399 -1ULL,
400 0x286a881f80000000ULL,
401 -1ULL,
402 -1ULL,
403 0x43f8000000000000ULL
405 #endif
407 { "prefetch_l3", TILEGX_OPC_PREFETCH_L3, 0x12, 1, TREG_ZERO, 1,
408 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
409 #ifndef DISASM_ONLY
411 0ULL,
412 0xfffff81f80000000ULL,
413 0ULL,
414 0ULL,
415 0xc3f8000004000000ULL
418 -1ULL,
419 0x286aa01f80000000ULL,
420 -1ULL,
421 -1ULL,
422 0x83f8000000000000ULL
424 #endif
426 { "prefetch_l3_fault", TILEGX_OPC_PREFETCH_L3_FAULT, 0x12, 1, TREG_ZERO, 1,
427 { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
428 #ifndef DISASM_ONLY
430 0ULL,
431 0xfffff81f80000000ULL,
432 0ULL,
433 0ULL,
434 0xc3f8000004000000ULL
437 -1ULL,
438 0x286a981f80000000ULL,
439 -1ULL,
440 -1ULL,
441 0x81f8000004000000ULL
443 #endif
445 { "raise", TILEGX_OPC_RAISE, 0x2, 0, TREG_ZERO, 1,
446 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
447 #ifndef DISASM_ONLY
449 0ULL,
450 0xffffffff80000000ULL,
451 0ULL,
452 0ULL,
453 0ULL
456 -1ULL,
457 0x286a44ae80000000ULL,
458 -1ULL,
459 -1ULL,
460 -1ULL
462 #endif
464 { "add", TILEGX_OPC_ADD, 0xf, 3, TREG_ZERO, 1,
465 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
466 #ifndef DISASM_ONLY
468 0xc00000007ffc0000ULL,
469 0xfffe000000000000ULL,
470 0x00000000780c0000ULL,
471 0x3c06000000000000ULL,
472 0ULL
475 0x00000000500c0000ULL,
476 0x2806000000000000ULL,
477 0x0000000028040000ULL,
478 0x1802000000000000ULL,
479 -1ULL
481 #endif
483 { "addi", TILEGX_OPC_ADDI, 0xf, 3, TREG_ZERO, 1,
484 { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
485 #ifndef DISASM_ONLY
487 0xc00000007ff00000ULL,
488 0xfff8000000000000ULL,
489 0x0000000078000000ULL,
490 0x3c00000000000000ULL,
491 0ULL
494 0x0000000040100000ULL,
495 0x1808000000000000ULL,
496 0ULL,
497 0x0400000000000000ULL,
498 -1ULL
500 #endif
502 { "addli", TILEGX_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1,
503 { { 8, 9, 4 }, { 6, 7, 5 }, { 0, }, { 0, }, { 0, } },
504 #ifndef DISASM_ONLY
506 0xc000000070000000ULL,
507 0xf800000000000000ULL,
508 0ULL,
509 0ULL,
510 0ULL
513 0x0000000010000000ULL,
514 0ULL,
515 -1ULL,
516 -1ULL,
517 -1ULL
519 #endif
521 { "addx", TILEGX_OPC_ADDX, 0xf, 3, TREG_ZERO, 1,
522 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
523 #ifndef DISASM_ONLY
525 0xc00000007ffc0000ULL,
526 0xfffe000000000000ULL,
527 0x00000000780c0000ULL,
528 0x3c06000000000000ULL,
529 0ULL
532 0x0000000050080000ULL,
533 0x2804000000000000ULL,
534 0x0000000028000000ULL,
535 0x1800000000000000ULL,
536 -1ULL
538 #endif
540 { "addxi", TILEGX_OPC_ADDXI, 0xf, 3, TREG_ZERO, 1,
541 { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
542 #ifndef DISASM_ONLY
544 0xc00000007ff00000ULL,
545 0xfff8000000000000ULL,
546 0x0000000078000000ULL,
547 0x3c00000000000000ULL,
548 0ULL
551 0x0000000040200000ULL,
552 0x1810000000000000ULL,
553 0x0000000008000000ULL,
554 0x0800000000000000ULL,
555 -1ULL
557 #endif
559 { "addxli", TILEGX_OPC_ADDXLI, 0x3, 3, TREG_ZERO, 1,
560 { { 8, 9, 4 }, { 6, 7, 5 }, { 0, }, { 0, }, { 0, } },
561 #ifndef DISASM_ONLY
563 0xc000000070000000ULL,
564 0xf800000000000000ULL,
565 0ULL,
566 0ULL,
567 0ULL
570 0x0000000020000000ULL,
571 0x0800000000000000ULL,
572 -1ULL,
573 -1ULL,
574 -1ULL
576 #endif
578 { "addxsc", TILEGX_OPC_ADDXSC, 0x3, 3, TREG_ZERO, 1,
579 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
580 #ifndef DISASM_ONLY
582 0xc00000007ffc0000ULL,
583 0xfffe000000000000ULL,
584 0ULL,
585 0ULL,
586 0ULL
589 0x0000000050040000ULL,
590 0x2802000000000000ULL,
591 -1ULL,
592 -1ULL,
593 -1ULL
595 #endif
597 { "and", TILEGX_OPC_AND, 0xf, 3, TREG_ZERO, 1,
598 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
599 #ifndef DISASM_ONLY
601 0xc00000007ffc0000ULL,
602 0xfffe000000000000ULL,
603 0x00000000780c0000ULL,
604 0x3c06000000000000ULL,
605 0ULL
608 0x0000000050100000ULL,
609 0x2808000000000000ULL,
610 0x0000000050000000ULL,
611 0x2c00000000000000ULL,
612 -1ULL
614 #endif
616 { "andi", TILEGX_OPC_ANDI, 0xf, 3, TREG_ZERO, 1,
617 { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
618 #ifndef DISASM_ONLY
620 0xc00000007ff00000ULL,
621 0xfff8000000000000ULL,
622 0x0000000078000000ULL,
623 0x3c00000000000000ULL,
624 0ULL
627 0x0000000040300000ULL,
628 0x1818000000000000ULL,
629 0x0000000010000000ULL,
630 0x0c00000000000000ULL,
631 -1ULL
633 #endif
635 { "beqz", TILEGX_OPC_BEQZ, 0x2, 2, TREG_ZERO, 1,
636 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
637 #ifndef DISASM_ONLY
639 0ULL,
640 0xffc0000000000000ULL,
641 0ULL,
642 0ULL,
643 0ULL
646 -1ULL,
647 0x1440000000000000ULL,
648 -1ULL,
649 -1ULL,
650 -1ULL
652 #endif
654 { "beqzt", TILEGX_OPC_BEQZT, 0x2, 2, TREG_ZERO, 1,
655 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
656 #ifndef DISASM_ONLY
658 0ULL,
659 0xffc0000000000000ULL,
660 0ULL,
661 0ULL,
662 0ULL
665 -1ULL,
666 0x1400000000000000ULL,
667 -1ULL,
668 -1ULL,
669 -1ULL
671 #endif
673 { "bfexts", TILEGX_OPC_BFEXTS, 0x1, 4, TREG_ZERO, 1,
674 { { 8, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
675 #ifndef DISASM_ONLY
677 0xc00000007f000000ULL,
678 0ULL,
679 0ULL,
680 0ULL,
681 0ULL
684 0x0000000034000000ULL,
685 -1ULL,
686 -1ULL,
687 -1ULL,
688 -1ULL
690 #endif
692 { "bfextu", TILEGX_OPC_BFEXTU, 0x1, 4, TREG_ZERO, 1,
693 { { 8, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
694 #ifndef DISASM_ONLY
696 0xc00000007f000000ULL,
697 0ULL,
698 0ULL,
699 0ULL,
700 0ULL
703 0x0000000035000000ULL,
704 -1ULL,
705 -1ULL,
706 -1ULL,
707 -1ULL
709 #endif
711 { "bfins", TILEGX_OPC_BFINS, 0x1, 4, TREG_ZERO, 1,
712 { { 23, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
713 #ifndef DISASM_ONLY
715 0xc00000007f000000ULL,
716 0ULL,
717 0ULL,
718 0ULL,
719 0ULL
722 0x0000000036000000ULL,
723 -1ULL,
724 -1ULL,
725 -1ULL,
726 -1ULL
728 #endif
730 { "bgez", TILEGX_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1,
731 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
732 #ifndef DISASM_ONLY
734 0ULL,
735 0xffc0000000000000ULL,
736 0ULL,
737 0ULL,
738 0ULL
741 -1ULL,
742 0x14c0000000000000ULL,
743 -1ULL,
744 -1ULL,
745 -1ULL
747 #endif
749 { "bgezt", TILEGX_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1,
750 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
751 #ifndef DISASM_ONLY
753 0ULL,
754 0xffc0000000000000ULL,
755 0ULL,
756 0ULL,
757 0ULL
760 -1ULL,
761 0x1480000000000000ULL,
762 -1ULL,
763 -1ULL,
764 -1ULL
766 #endif
768 { "bgtz", TILEGX_OPC_BGTZ, 0x2, 2, TREG_ZERO, 1,
769 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
770 #ifndef DISASM_ONLY
772 0ULL,
773 0xffc0000000000000ULL,
774 0ULL,
775 0ULL,
776 0ULL
779 -1ULL,
780 0x1540000000000000ULL,
781 -1ULL,
782 -1ULL,
783 -1ULL
785 #endif
787 { "bgtzt", TILEGX_OPC_BGTZT, 0x2, 2, TREG_ZERO, 1,
788 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
789 #ifndef DISASM_ONLY
791 0ULL,
792 0xffc0000000000000ULL,
793 0ULL,
794 0ULL,
795 0ULL
798 -1ULL,
799 0x1500000000000000ULL,
800 -1ULL,
801 -1ULL,
802 -1ULL
804 #endif
806 { "blbc", TILEGX_OPC_BLBC, 0x2, 2, TREG_ZERO, 1,
807 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
808 #ifndef DISASM_ONLY
810 0ULL,
811 0xffc0000000000000ULL,
812 0ULL,
813 0ULL,
814 0ULL
817 -1ULL,
818 0x15c0000000000000ULL,
819 -1ULL,
820 -1ULL,
821 -1ULL
823 #endif
825 { "blbct", TILEGX_OPC_BLBCT, 0x2, 2, TREG_ZERO, 1,
826 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
827 #ifndef DISASM_ONLY
829 0ULL,
830 0xffc0000000000000ULL,
831 0ULL,
832 0ULL,
833 0ULL
836 -1ULL,
837 0x1580000000000000ULL,
838 -1ULL,
839 -1ULL,
840 -1ULL
842 #endif
844 { "blbs", TILEGX_OPC_BLBS, 0x2, 2, TREG_ZERO, 1,
845 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
846 #ifndef DISASM_ONLY
848 0ULL,
849 0xffc0000000000000ULL,
850 0ULL,
851 0ULL,
852 0ULL
855 -1ULL,
856 0x1640000000000000ULL,
857 -1ULL,
858 -1ULL,
859 -1ULL
861 #endif
863 { "blbst", TILEGX_OPC_BLBST, 0x2, 2, TREG_ZERO, 1,
864 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
865 #ifndef DISASM_ONLY
867 0ULL,
868 0xffc0000000000000ULL,
869 0ULL,
870 0ULL,
871 0ULL
874 -1ULL,
875 0x1600000000000000ULL,
876 -1ULL,
877 -1ULL,
878 -1ULL
880 #endif
882 { "blez", TILEGX_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1,
883 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
884 #ifndef DISASM_ONLY
886 0ULL,
887 0xffc0000000000000ULL,
888 0ULL,
889 0ULL,
890 0ULL
893 -1ULL,
894 0x16c0000000000000ULL,
895 -1ULL,
896 -1ULL,
897 -1ULL
899 #endif
901 { "blezt", TILEGX_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1,
902 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
903 #ifndef DISASM_ONLY
905 0ULL,
906 0xffc0000000000000ULL,
907 0ULL,
908 0ULL,
909 0ULL
912 -1ULL,
913 0x1680000000000000ULL,
914 -1ULL,
915 -1ULL,
916 -1ULL
918 #endif
920 { "bltz", TILEGX_OPC_BLTZ, 0x2, 2, TREG_ZERO, 1,
921 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
922 #ifndef DISASM_ONLY
924 0ULL,
925 0xffc0000000000000ULL,
926 0ULL,
927 0ULL,
928 0ULL
931 -1ULL,
932 0x1740000000000000ULL,
933 -1ULL,
934 -1ULL,
935 -1ULL
937 #endif
939 { "bltzt", TILEGX_OPC_BLTZT, 0x2, 2, TREG_ZERO, 1,
940 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
941 #ifndef DISASM_ONLY
943 0ULL,
944 0xffc0000000000000ULL,
945 0ULL,
946 0ULL,
947 0ULL
950 -1ULL,
951 0x1700000000000000ULL,
952 -1ULL,
953 -1ULL,
954 -1ULL
956 #endif
958 { "bnez", TILEGX_OPC_BNEZ, 0x2, 2, TREG_ZERO, 1,
959 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
960 #ifndef DISASM_ONLY
962 0ULL,
963 0xffc0000000000000ULL,
964 0ULL,
965 0ULL,
966 0ULL
969 -1ULL,
970 0x17c0000000000000ULL,
971 -1ULL,
972 -1ULL,
973 -1ULL
975 #endif
977 { "bnezt", TILEGX_OPC_BNEZT, 0x2, 2, TREG_ZERO, 1,
978 { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
979 #ifndef DISASM_ONLY
981 0ULL,
982 0xffc0000000000000ULL,
983 0ULL,
984 0ULL,
985 0ULL
988 -1ULL,
989 0x1780000000000000ULL,
990 -1ULL,
991 -1ULL,
992 -1ULL
994 #endif
996 { "clz", TILEGX_OPC_CLZ, 0x5, 2, TREG_ZERO, 1,
997 { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
998 #ifndef DISASM_ONLY
1000 0xc00000007ffff000ULL,
1001 0ULL,
1002 0x00000000780ff000ULL,
1003 0ULL,
1004 0ULL
1007 0x0000000051481000ULL,
1008 -1ULL,
1009 0x00000000300c1000ULL,
1010 -1ULL,
1011 -1ULL
1013 #endif
1015 { "cmoveqz", TILEGX_OPC_CMOVEQZ, 0x5, 3, TREG_ZERO, 1,
1016 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
1017 #ifndef DISASM_ONLY
1019 0xc00000007ffc0000ULL,
1020 0ULL,
1021 0x00000000780c0000ULL,
1022 0ULL,
1023 0ULL
1026 0x0000000050140000ULL,
1027 -1ULL,
1028 0x0000000048000000ULL,
1029 -1ULL,
1030 -1ULL
1032 #endif
1034 { "cmovnez", TILEGX_OPC_CMOVNEZ, 0x5, 3, TREG_ZERO, 1,
1035 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
1036 #ifndef DISASM_ONLY
1038 0xc00000007ffc0000ULL,
1039 0ULL,
1040 0x00000000780c0000ULL,
1041 0ULL,
1042 0ULL
1045 0x0000000050180000ULL,
1046 -1ULL,
1047 0x0000000048040000ULL,
1048 -1ULL,
1049 -1ULL
1051 #endif
1053 { "cmpeq", TILEGX_OPC_CMPEQ, 0xf, 3, TREG_ZERO, 1,
1054 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1055 #ifndef DISASM_ONLY
1057 0xc00000007ffc0000ULL,
1058 0xfffe000000000000ULL,
1059 0x00000000780c0000ULL,
1060 0x3c06000000000000ULL,
1061 0ULL
1064 0x00000000501c0000ULL,
1065 0x280a000000000000ULL,
1066 0x0000000040000000ULL,
1067 0x2404000000000000ULL,
1068 -1ULL
1070 #endif
1072 { "cmpeqi", TILEGX_OPC_CMPEQI, 0xf, 3, TREG_ZERO, 1,
1073 { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
1074 #ifndef DISASM_ONLY
1076 0xc00000007ff00000ULL,
1077 0xfff8000000000000ULL,
1078 0x0000000078000000ULL,
1079 0x3c00000000000000ULL,
1080 0ULL
1083 0x0000000040400000ULL,
1084 0x1820000000000000ULL,
1085 0x0000000018000000ULL,
1086 0x1000000000000000ULL,
1087 -1ULL
1089 #endif
1091 { "cmpexch", TILEGX_OPC_CMPEXCH, 0x2, 3, TREG_ZERO, 1,
1092 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1093 #ifndef DISASM_ONLY
1095 0ULL,
1096 0xfffe000000000000ULL,
1097 0ULL,
1098 0ULL,
1099 0ULL
1102 -1ULL,
1103 0x280e000000000000ULL,
1104 -1ULL,
1105 -1ULL,
1106 -1ULL
1108 #endif
1110 { "cmpexch4", TILEGX_OPC_CMPEXCH4, 0x2, 3, TREG_ZERO, 1,
1111 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1112 #ifndef DISASM_ONLY
1114 0ULL,
1115 0xfffe000000000000ULL,
1116 0ULL,
1117 0ULL,
1118 0ULL
1121 -1ULL,
1122 0x280c000000000000ULL,
1123 -1ULL,
1124 -1ULL,
1125 -1ULL
1127 #endif
1129 { "cmples", TILEGX_OPC_CMPLES, 0xf, 3, TREG_ZERO, 1,
1130 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1131 #ifndef DISASM_ONLY
1133 0xc00000007ffc0000ULL,
1134 0xfffe000000000000ULL,
1135 0x00000000780c0000ULL,
1136 0x3c06000000000000ULL,
1137 0ULL
1140 0x0000000050200000ULL,
1141 0x2810000000000000ULL,
1142 0x0000000038000000ULL,
1143 0x2000000000000000ULL,
1144 -1ULL
1146 #endif
1148 { "cmpleu", TILEGX_OPC_CMPLEU, 0xf, 3, TREG_ZERO, 1,
1149 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1150 #ifndef DISASM_ONLY
1152 0xc00000007ffc0000ULL,
1153 0xfffe000000000000ULL,
1154 0x00000000780c0000ULL,
1155 0x3c06000000000000ULL,
1156 0ULL
1159 0x0000000050240000ULL,
1160 0x2812000000000000ULL,
1161 0x0000000038040000ULL,
1162 0x2002000000000000ULL,
1163 -1ULL
1165 #endif
1167 { "cmplts", TILEGX_OPC_CMPLTS, 0xf, 3, TREG_ZERO, 1,
1168 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1169 #ifndef DISASM_ONLY
1171 0xc00000007ffc0000ULL,
1172 0xfffe000000000000ULL,
1173 0x00000000780c0000ULL,
1174 0x3c06000000000000ULL,
1175 0ULL
1178 0x0000000050280000ULL,
1179 0x2814000000000000ULL,
1180 0x0000000038080000ULL,
1181 0x2004000000000000ULL,
1182 -1ULL
1184 #endif
1186 { "cmpltsi", TILEGX_OPC_CMPLTSI, 0xf, 3, TREG_ZERO, 1,
1187 { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
1188 #ifndef DISASM_ONLY
1190 0xc00000007ff00000ULL,
1191 0xfff8000000000000ULL,
1192 0x0000000078000000ULL,
1193 0x3c00000000000000ULL,
1194 0ULL
1197 0x0000000040500000ULL,
1198 0x1828000000000000ULL,
1199 0x0000000020000000ULL,
1200 0x1400000000000000ULL,
1201 -1ULL
1203 #endif
1205 { "cmpltu", TILEGX_OPC_CMPLTU, 0xf, 3, TREG_ZERO, 1,
1206 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1207 #ifndef DISASM_ONLY
1209 0xc00000007ffc0000ULL,
1210 0xfffe000000000000ULL,
1211 0x00000000780c0000ULL,
1212 0x3c06000000000000ULL,
1213 0ULL
1216 0x00000000502c0000ULL,
1217 0x2816000000000000ULL,
1218 0x00000000380c0000ULL,
1219 0x2006000000000000ULL,
1220 -1ULL
1222 #endif
1224 { "cmpltui", TILEGX_OPC_CMPLTUI, 0x3, 3, TREG_ZERO, 1,
1225 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
1226 #ifndef DISASM_ONLY
1228 0xc00000007ff00000ULL,
1229 0xfff8000000000000ULL,
1230 0ULL,
1231 0ULL,
1232 0ULL
1235 0x0000000040600000ULL,
1236 0x1830000000000000ULL,
1237 -1ULL,
1238 -1ULL,
1239 -1ULL
1241 #endif
1243 { "cmpne", TILEGX_OPC_CMPNE, 0xf, 3, TREG_ZERO, 1,
1244 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1245 #ifndef DISASM_ONLY
1247 0xc00000007ffc0000ULL,
1248 0xfffe000000000000ULL,
1249 0x00000000780c0000ULL,
1250 0x3c06000000000000ULL,
1251 0ULL
1254 0x0000000050300000ULL,
1255 0x2818000000000000ULL,
1256 0x0000000040040000ULL,
1257 0x2406000000000000ULL,
1258 -1ULL
1260 #endif
1262 { "cmul", TILEGX_OPC_CMUL, 0x1, 3, TREG_ZERO, 1,
1263 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1264 #ifndef DISASM_ONLY
1266 0xc00000007ffc0000ULL,
1267 0ULL,
1268 0ULL,
1269 0ULL,
1270 0ULL
1273 0x00000000504c0000ULL,
1274 -1ULL,
1275 -1ULL,
1276 -1ULL,
1277 -1ULL
1279 #endif
1281 { "cmula", TILEGX_OPC_CMULA, 0x1, 3, TREG_ZERO, 1,
1282 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1283 #ifndef DISASM_ONLY
1285 0xc00000007ffc0000ULL,
1286 0ULL,
1287 0ULL,
1288 0ULL,
1289 0ULL
1292 0x0000000050380000ULL,
1293 -1ULL,
1294 -1ULL,
1295 -1ULL,
1296 -1ULL
1298 #endif
1300 { "cmulaf", TILEGX_OPC_CMULAF, 0x1, 3, TREG_ZERO, 1,
1301 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1302 #ifndef DISASM_ONLY
1304 0xc00000007ffc0000ULL,
1305 0ULL,
1306 0ULL,
1307 0ULL,
1308 0ULL
1311 0x0000000050340000ULL,
1312 -1ULL,
1313 -1ULL,
1314 -1ULL,
1315 -1ULL
1317 #endif
1319 { "cmulf", TILEGX_OPC_CMULF, 0x1, 3, TREG_ZERO, 1,
1320 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1321 #ifndef DISASM_ONLY
1323 0xc00000007ffc0000ULL,
1324 0ULL,
1325 0ULL,
1326 0ULL,
1327 0ULL
1330 0x0000000050400000ULL,
1331 -1ULL,
1332 -1ULL,
1333 -1ULL,
1334 -1ULL
1336 #endif
1338 { "cmulfr", TILEGX_OPC_CMULFR, 0x1, 3, TREG_ZERO, 1,
1339 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1340 #ifndef DISASM_ONLY
1342 0xc00000007ffc0000ULL,
1343 0ULL,
1344 0ULL,
1345 0ULL,
1346 0ULL
1349 0x00000000503c0000ULL,
1350 -1ULL,
1351 -1ULL,
1352 -1ULL,
1353 -1ULL
1355 #endif
1357 { "cmulh", TILEGX_OPC_CMULH, 0x1, 3, TREG_ZERO, 1,
1358 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1359 #ifndef DISASM_ONLY
1361 0xc00000007ffc0000ULL,
1362 0ULL,
1363 0ULL,
1364 0ULL,
1365 0ULL
1368 0x0000000050480000ULL,
1369 -1ULL,
1370 -1ULL,
1371 -1ULL,
1372 -1ULL
1374 #endif
1376 { "cmulhr", TILEGX_OPC_CMULHR, 0x1, 3, TREG_ZERO, 1,
1377 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1378 #ifndef DISASM_ONLY
1380 0xc00000007ffc0000ULL,
1381 0ULL,
1382 0ULL,
1383 0ULL,
1384 0ULL
1387 0x0000000050440000ULL,
1388 -1ULL,
1389 -1ULL,
1390 -1ULL,
1391 -1ULL
1393 #endif
1395 { "crc32_32", TILEGX_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1,
1396 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1397 #ifndef DISASM_ONLY
1399 0xc00000007ffc0000ULL,
1400 0ULL,
1401 0ULL,
1402 0ULL,
1403 0ULL
1406 0x0000000050500000ULL,
1407 -1ULL,
1408 -1ULL,
1409 -1ULL,
1410 -1ULL
1412 #endif
1414 { "crc32_8", TILEGX_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1,
1415 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1416 #ifndef DISASM_ONLY
1418 0xc00000007ffc0000ULL,
1419 0ULL,
1420 0ULL,
1421 0ULL,
1422 0ULL
1425 0x0000000050540000ULL,
1426 -1ULL,
1427 -1ULL,
1428 -1ULL,
1429 -1ULL
1431 #endif
1433 { "ctz", TILEGX_OPC_CTZ, 0x5, 2, TREG_ZERO, 1,
1434 { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
1435 #ifndef DISASM_ONLY
1437 0xc00000007ffff000ULL,
1438 0ULL,
1439 0x00000000780ff000ULL,
1440 0ULL,
1441 0ULL
1444 0x0000000051482000ULL,
1445 -1ULL,
1446 0x00000000300c2000ULL,
1447 -1ULL,
1448 -1ULL
1450 #endif
1452 { "dblalign", TILEGX_OPC_DBLALIGN, 0x1, 3, TREG_ZERO, 1,
1453 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1454 #ifndef DISASM_ONLY
1456 0xc00000007ffc0000ULL,
1457 0ULL,
1458 0ULL,
1459 0ULL,
1460 0ULL
1463 0x0000000050640000ULL,
1464 -1ULL,
1465 -1ULL,
1466 -1ULL,
1467 -1ULL
1469 #endif
1471 { "dblalign2", TILEGX_OPC_DBLALIGN2, 0x3, 3, TREG_ZERO, 1,
1472 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1473 #ifndef DISASM_ONLY
1475 0xc00000007ffc0000ULL,
1476 0xfffe000000000000ULL,
1477 0ULL,
1478 0ULL,
1479 0ULL
1482 0x0000000050580000ULL,
1483 0x281a000000000000ULL,
1484 -1ULL,
1485 -1ULL,
1486 -1ULL
1488 #endif
1490 { "dblalign4", TILEGX_OPC_DBLALIGN4, 0x3, 3, TREG_ZERO, 1,
1491 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1492 #ifndef DISASM_ONLY
1494 0xc00000007ffc0000ULL,
1495 0xfffe000000000000ULL,
1496 0ULL,
1497 0ULL,
1498 0ULL
1501 0x00000000505c0000ULL,
1502 0x281c000000000000ULL,
1503 -1ULL,
1504 -1ULL,
1505 -1ULL
1507 #endif
1509 { "dblalign6", TILEGX_OPC_DBLALIGN6, 0x3, 3, TREG_ZERO, 1,
1510 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1511 #ifndef DISASM_ONLY
1513 0xc00000007ffc0000ULL,
1514 0xfffe000000000000ULL,
1515 0ULL,
1516 0ULL,
1517 0ULL
1520 0x0000000050600000ULL,
1521 0x281e000000000000ULL,
1522 -1ULL,
1523 -1ULL,
1524 -1ULL
1526 #endif
1528 { "drain", TILEGX_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0,
1529 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
1530 #ifndef DISASM_ONLY
1532 0ULL,
1533 0xfffff80000000000ULL,
1534 0ULL,
1535 0ULL,
1536 0ULL
1539 -1ULL,
1540 0x286a080000000000ULL,
1541 -1ULL,
1542 -1ULL,
1543 -1ULL
1545 #endif
1547 { "dtlbpr", TILEGX_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1,
1548 { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
1549 #ifndef DISASM_ONLY
1551 0ULL,
1552 0xfffff80000000000ULL,
1553 0ULL,
1554 0ULL,
1555 0ULL
1558 -1ULL,
1559 0x286a100000000000ULL,
1560 -1ULL,
1561 -1ULL,
1562 -1ULL
1564 #endif
1566 { "exch", TILEGX_OPC_EXCH, 0x2, 3, TREG_ZERO, 1,
1567 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1568 #ifndef DISASM_ONLY
1570 0ULL,
1571 0xfffe000000000000ULL,
1572 0ULL,
1573 0ULL,
1574 0ULL
1577 -1ULL,
1578 0x2822000000000000ULL,
1579 -1ULL,
1580 -1ULL,
1581 -1ULL
1583 #endif
1585 { "exch4", TILEGX_OPC_EXCH4, 0x2, 3, TREG_ZERO, 1,
1586 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1587 #ifndef DISASM_ONLY
1589 0ULL,
1590 0xfffe000000000000ULL,
1591 0ULL,
1592 0ULL,
1593 0ULL
1596 -1ULL,
1597 0x2820000000000000ULL,
1598 -1ULL,
1599 -1ULL,
1600 -1ULL
1602 #endif
1604 { "fdouble_add_flags", TILEGX_OPC_FDOUBLE_ADD_FLAGS, 0x1, 3, TREG_ZERO, 1,
1605 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1606 #ifndef DISASM_ONLY
1608 0xc00000007ffc0000ULL,
1609 0ULL,
1610 0ULL,
1611 0ULL,
1612 0ULL
1615 0x00000000506c0000ULL,
1616 -1ULL,
1617 -1ULL,
1618 -1ULL,
1619 -1ULL
1621 #endif
1623 { "fdouble_addsub", TILEGX_OPC_FDOUBLE_ADDSUB, 0x1, 3, TREG_ZERO, 1,
1624 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1625 #ifndef DISASM_ONLY
1627 0xc00000007ffc0000ULL,
1628 0ULL,
1629 0ULL,
1630 0ULL,
1631 0ULL
1634 0x0000000050680000ULL,
1635 -1ULL,
1636 -1ULL,
1637 -1ULL,
1638 -1ULL
1640 #endif
1642 { "fdouble_mul_flags", TILEGX_OPC_FDOUBLE_MUL_FLAGS, 0x1, 3, TREG_ZERO, 1,
1643 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1644 #ifndef DISASM_ONLY
1646 0xc00000007ffc0000ULL,
1647 0ULL,
1648 0ULL,
1649 0ULL,
1650 0ULL
1653 0x0000000050700000ULL,
1654 -1ULL,
1655 -1ULL,
1656 -1ULL,
1657 -1ULL
1659 #endif
1661 { "fdouble_pack1", TILEGX_OPC_FDOUBLE_PACK1, 0x1, 3, TREG_ZERO, 1,
1662 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1663 #ifndef DISASM_ONLY
1665 0xc00000007ffc0000ULL,
1666 0ULL,
1667 0ULL,
1668 0ULL,
1669 0ULL
1672 0x0000000050740000ULL,
1673 -1ULL,
1674 -1ULL,
1675 -1ULL,
1676 -1ULL
1678 #endif
1680 { "fdouble_pack2", TILEGX_OPC_FDOUBLE_PACK2, 0x1, 3, TREG_ZERO, 1,
1681 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1682 #ifndef DISASM_ONLY
1684 0xc00000007ffc0000ULL,
1685 0ULL,
1686 0ULL,
1687 0ULL,
1688 0ULL
1691 0x0000000050780000ULL,
1692 -1ULL,
1693 -1ULL,
1694 -1ULL,
1695 -1ULL
1697 #endif
1699 { "fdouble_sub_flags", TILEGX_OPC_FDOUBLE_SUB_FLAGS, 0x1, 3, TREG_ZERO, 1,
1700 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1701 #ifndef DISASM_ONLY
1703 0xc00000007ffc0000ULL,
1704 0ULL,
1705 0ULL,
1706 0ULL,
1707 0ULL
1710 0x00000000507c0000ULL,
1711 -1ULL,
1712 -1ULL,
1713 -1ULL,
1714 -1ULL
1716 #endif
1718 { "fdouble_unpack_max", TILEGX_OPC_FDOUBLE_UNPACK_MAX, 0x1, 3, TREG_ZERO, 1,
1719 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1720 #ifndef DISASM_ONLY
1722 0xc00000007ffc0000ULL,
1723 0ULL,
1724 0ULL,
1725 0ULL,
1726 0ULL
1729 0x0000000050800000ULL,
1730 -1ULL,
1731 -1ULL,
1732 -1ULL,
1733 -1ULL
1735 #endif
1737 { "fdouble_unpack_min", TILEGX_OPC_FDOUBLE_UNPACK_MIN, 0x1, 3, TREG_ZERO, 1,
1738 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1739 #ifndef DISASM_ONLY
1741 0xc00000007ffc0000ULL,
1742 0ULL,
1743 0ULL,
1744 0ULL,
1745 0ULL
1748 0x0000000050840000ULL,
1749 -1ULL,
1750 -1ULL,
1751 -1ULL,
1752 -1ULL
1754 #endif
1756 { "fetchadd", TILEGX_OPC_FETCHADD, 0x2, 3, TREG_ZERO, 1,
1757 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1758 #ifndef DISASM_ONLY
1760 0ULL,
1761 0xfffe000000000000ULL,
1762 0ULL,
1763 0ULL,
1764 0ULL
1767 -1ULL,
1768 0x282a000000000000ULL,
1769 -1ULL,
1770 -1ULL,
1771 -1ULL
1773 #endif
1775 { "fetchadd4", TILEGX_OPC_FETCHADD4, 0x2, 3, TREG_ZERO, 1,
1776 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1777 #ifndef DISASM_ONLY
1779 0ULL,
1780 0xfffe000000000000ULL,
1781 0ULL,
1782 0ULL,
1783 0ULL
1786 -1ULL,
1787 0x2824000000000000ULL,
1788 -1ULL,
1789 -1ULL,
1790 -1ULL
1792 #endif
1794 { "fetchaddgez", TILEGX_OPC_FETCHADDGEZ, 0x2, 3, TREG_ZERO, 1,
1795 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1796 #ifndef DISASM_ONLY
1798 0ULL,
1799 0xfffe000000000000ULL,
1800 0ULL,
1801 0ULL,
1802 0ULL
1805 -1ULL,
1806 0x2828000000000000ULL,
1807 -1ULL,
1808 -1ULL,
1809 -1ULL
1811 #endif
1813 { "fetchaddgez4", TILEGX_OPC_FETCHADDGEZ4, 0x2, 3, TREG_ZERO, 1,
1814 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1815 #ifndef DISASM_ONLY
1817 0ULL,
1818 0xfffe000000000000ULL,
1819 0ULL,
1820 0ULL,
1821 0ULL
1824 -1ULL,
1825 0x2826000000000000ULL,
1826 -1ULL,
1827 -1ULL,
1828 -1ULL
1830 #endif
1832 { "fetchand", TILEGX_OPC_FETCHAND, 0x2, 3, TREG_ZERO, 1,
1833 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1834 #ifndef DISASM_ONLY
1836 0ULL,
1837 0xfffe000000000000ULL,
1838 0ULL,
1839 0ULL,
1840 0ULL
1843 -1ULL,
1844 0x282e000000000000ULL,
1845 -1ULL,
1846 -1ULL,
1847 -1ULL
1849 #endif
1851 { "fetchand4", TILEGX_OPC_FETCHAND4, 0x2, 3, TREG_ZERO, 1,
1852 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1853 #ifndef DISASM_ONLY
1855 0ULL,
1856 0xfffe000000000000ULL,
1857 0ULL,
1858 0ULL,
1859 0ULL
1862 -1ULL,
1863 0x282c000000000000ULL,
1864 -1ULL,
1865 -1ULL,
1866 -1ULL
1868 #endif
1870 { "fetchor", TILEGX_OPC_FETCHOR, 0x2, 3, TREG_ZERO, 1,
1871 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1872 #ifndef DISASM_ONLY
1874 0ULL,
1875 0xfffe000000000000ULL,
1876 0ULL,
1877 0ULL,
1878 0ULL
1881 -1ULL,
1882 0x2832000000000000ULL,
1883 -1ULL,
1884 -1ULL,
1885 -1ULL
1887 #endif
1889 { "fetchor4", TILEGX_OPC_FETCHOR4, 0x2, 3, TREG_ZERO, 1,
1890 { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
1891 #ifndef DISASM_ONLY
1893 0ULL,
1894 0xfffe000000000000ULL,
1895 0ULL,
1896 0ULL,
1897 0ULL
1900 -1ULL,
1901 0x2830000000000000ULL,
1902 -1ULL,
1903 -1ULL,
1904 -1ULL
1906 #endif
1908 { "finv", TILEGX_OPC_FINV, 0x2, 1, TREG_ZERO, 1,
1909 { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
1910 #ifndef DISASM_ONLY
1912 0ULL,
1913 0xfffff80000000000ULL,
1914 0ULL,
1915 0ULL,
1916 0ULL
1919 -1ULL,
1920 0x286a180000000000ULL,
1921 -1ULL,
1922 -1ULL,
1923 -1ULL
1925 #endif
1927 { "flush", TILEGX_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1,
1928 { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
1929 #ifndef DISASM_ONLY
1931 0ULL,
1932 0xfffff80000000000ULL,
1933 0ULL,
1934 0ULL,
1935 0ULL
1938 -1ULL,
1939 0x286a280000000000ULL,
1940 -1ULL,
1941 -1ULL,
1942 -1ULL
1944 #endif
1946 { "flushwb", TILEGX_OPC_FLUSHWB, 0x2, 0, TREG_ZERO, 1,
1947 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
1948 #ifndef DISASM_ONLY
1950 0ULL,
1951 0xfffff80000000000ULL,
1952 0ULL,
1953 0ULL,
1954 0ULL
1957 -1ULL,
1958 0x286a200000000000ULL,
1959 -1ULL,
1960 -1ULL,
1961 -1ULL
1963 #endif
1965 { "fnop", TILEGX_OPC_FNOP, 0xf, 0, TREG_ZERO, 1,
1966 { { }, { }, { }, { }, { 0, } },
1967 #ifndef DISASM_ONLY
1969 0xc00000007ffff000ULL,
1970 0xfffff80000000000ULL,
1971 0x00000000780ff000ULL,
1972 0x3c07f80000000000ULL,
1973 0ULL
1976 0x0000000051483000ULL,
1977 0x286a300000000000ULL,
1978 0x00000000300c3000ULL,
1979 0x1c06400000000000ULL,
1980 -1ULL
1982 #endif
1984 { "fsingle_add1", TILEGX_OPC_FSINGLE_ADD1, 0x1, 3, TREG_ZERO, 1,
1985 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1986 #ifndef DISASM_ONLY
1988 0xc00000007ffc0000ULL,
1989 0ULL,
1990 0ULL,
1991 0ULL,
1992 0ULL
1995 0x0000000050880000ULL,
1996 -1ULL,
1997 -1ULL,
1998 -1ULL,
1999 -1ULL
2001 #endif
2003 { "fsingle_addsub2", TILEGX_OPC_FSINGLE_ADDSUB2, 0x1, 3, TREG_ZERO, 1,
2004 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2005 #ifndef DISASM_ONLY
2007 0xc00000007ffc0000ULL,
2008 0ULL,
2009 0ULL,
2010 0ULL,
2011 0ULL
2014 0x00000000508c0000ULL,
2015 -1ULL,
2016 -1ULL,
2017 -1ULL,
2018 -1ULL
2020 #endif
2022 { "fsingle_mul1", TILEGX_OPC_FSINGLE_MUL1, 0x1, 3, TREG_ZERO, 1,
2023 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2024 #ifndef DISASM_ONLY
2026 0xc00000007ffc0000ULL,
2027 0ULL,
2028 0ULL,
2029 0ULL,
2030 0ULL
2033 0x0000000050900000ULL,
2034 -1ULL,
2035 -1ULL,
2036 -1ULL,
2037 -1ULL
2039 #endif
2041 { "fsingle_mul2", TILEGX_OPC_FSINGLE_MUL2, 0x1, 3, TREG_ZERO, 1,
2042 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2043 #ifndef DISASM_ONLY
2045 0xc00000007ffc0000ULL,
2046 0ULL,
2047 0ULL,
2048 0ULL,
2049 0ULL
2052 0x0000000050940000ULL,
2053 -1ULL,
2054 -1ULL,
2055 -1ULL,
2056 -1ULL
2058 #endif
2060 { "fsingle_pack1", TILEGX_OPC_FSINGLE_PACK1, 0x5, 2, TREG_ZERO, 1,
2061 { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
2062 #ifndef DISASM_ONLY
2064 0xc00000007ffff000ULL,
2065 0ULL,
2066 0x00000000780ff000ULL,
2067 0ULL,
2068 0ULL
2071 0x0000000051484000ULL,
2072 -1ULL,
2073 0x00000000300c4000ULL,
2074 -1ULL,
2075 -1ULL
2077 #endif
2079 { "fsingle_pack2", TILEGX_OPC_FSINGLE_PACK2, 0x1, 3, TREG_ZERO, 1,
2080 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2081 #ifndef DISASM_ONLY
2083 0xc00000007ffc0000ULL,
2084 0ULL,
2085 0ULL,
2086 0ULL,
2087 0ULL
2090 0x0000000050980000ULL,
2091 -1ULL,
2092 -1ULL,
2093 -1ULL,
2094 -1ULL
2096 #endif
2098 { "fsingle_sub1", TILEGX_OPC_FSINGLE_SUB1, 0x1, 3, TREG_ZERO, 1,
2099 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2100 #ifndef DISASM_ONLY
2102 0xc00000007ffc0000ULL,
2103 0ULL,
2104 0ULL,
2105 0ULL,
2106 0ULL
2109 0x00000000509c0000ULL,
2110 -1ULL,
2111 -1ULL,
2112 -1ULL,
2113 -1ULL
2115 #endif
2117 { "icoh", TILEGX_OPC_ICOH, 0x2, 1, TREG_ZERO, 1,
2118 { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
2119 #ifndef DISASM_ONLY
2121 0ULL,
2122 0xfffff80000000000ULL,
2123 0ULL,
2124 0ULL,
2125 0ULL
2128 -1ULL,
2129 0x286a380000000000ULL,
2130 -1ULL,
2131 -1ULL,
2132 -1ULL
2134 #endif
2136 { "ill", TILEGX_OPC_ILL, 0xa, 0, TREG_ZERO, 1,
2137 { { 0, }, { }, { 0, }, { }, { 0, } },
2138 #ifndef DISASM_ONLY
2140 0ULL,
2141 0xfffff80000000000ULL,
2142 0ULL,
2143 0x3c07f80000000000ULL,
2144 0ULL
2147 -1ULL,
2148 0x286a400000000000ULL,
2149 -1ULL,
2150 0x1c06480000000000ULL,
2151 -1ULL
2153 #endif
2155 { "inv", TILEGX_OPC_INV, 0x2, 1, TREG_ZERO, 1,
2156 { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
2157 #ifndef DISASM_ONLY
2159 0ULL,
2160 0xfffff80000000000ULL,
2161 0ULL,
2162 0ULL,
2163 0ULL
2166 -1ULL,
2167 0x286a480000000000ULL,
2168 -1ULL,
2169 -1ULL,
2170 -1ULL
2172 #endif
2174 { "iret", TILEGX_OPC_IRET, 0x2, 0, TREG_ZERO, 1,
2175 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
2176 #ifndef DISASM_ONLY
2178 0ULL,
2179 0xfffff80000000000ULL,
2180 0ULL,
2181 0ULL,
2182 0ULL
2185 -1ULL,
2186 0x286a500000000000ULL,
2187 -1ULL,
2188 -1ULL,
2189 -1ULL
2191 #endif
2193 { "j", TILEGX_OPC_J, 0x2, 1, TREG_ZERO, 1,
2194 { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } },
2195 #ifndef DISASM_ONLY
2197 0ULL,
2198 0xfc00000000000000ULL,
2199 0ULL,
2200 0ULL,
2201 0ULL
2204 -1ULL,
2205 0x2400000000000000ULL,
2206 -1ULL,
2207 -1ULL,
2208 -1ULL
2210 #endif
2212 { "jal", TILEGX_OPC_JAL, 0x2, 1, TREG_LR, 1,
2213 { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } },
2214 #ifndef DISASM_ONLY
2216 0ULL,
2217 0xfc00000000000000ULL,
2218 0ULL,
2219 0ULL,
2220 0ULL
2223 -1ULL,
2224 0x2000000000000000ULL,
2225 -1ULL,
2226 -1ULL,
2227 -1ULL
2229 #endif
2231 { "jalr", TILEGX_OPC_JALR, 0xa, 1, TREG_LR, 1,
2232 { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
2233 #ifndef DISASM_ONLY
2235 0ULL,
2236 0xfffff80000000000ULL,
2237 0ULL,
2238 0x3c07f80000000000ULL,
2239 0ULL
2242 -1ULL,
2243 0x286a600000000000ULL,
2244 -1ULL,
2245 0x1c06580000000000ULL,
2246 -1ULL
2248 #endif
2250 { "jalrp", TILEGX_OPC_JALRP, 0xa, 1, TREG_LR, 1,
2251 { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
2252 #ifndef DISASM_ONLY
2254 0ULL,
2255 0xfffff80000000000ULL,
2256 0ULL,
2257 0x3c07f80000000000ULL,
2258 0ULL
2261 -1ULL,
2262 0x286a580000000000ULL,
2263 -1ULL,
2264 0x1c06500000000000ULL,
2265 -1ULL
2267 #endif
2269 { "jr", TILEGX_OPC_JR, 0xa, 1, TREG_ZERO, 1,
2270 { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
2271 #ifndef DISASM_ONLY
2273 0ULL,
2274 0xfffff80000000000ULL,
2275 0ULL,
2276 0x3c07f80000000000ULL,
2277 0ULL
2280 -1ULL,
2281 0x286a700000000000ULL,
2282 -1ULL,
2283 0x1c06680000000000ULL,
2284 -1ULL
2286 #endif
2288 { "jrp", TILEGX_OPC_JRP, 0xa, 1, TREG_ZERO, 1,
2289 { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
2290 #ifndef DISASM_ONLY
2292 0ULL,
2293 0xfffff80000000000ULL,
2294 0ULL,
2295 0x3c07f80000000000ULL,
2296 0ULL
2299 -1ULL,
2300 0x286a680000000000ULL,
2301 -1ULL,
2302 0x1c06600000000000ULL,
2303 -1ULL
2305 #endif
2307 { "ld", TILEGX_OPC_LD, 0x12, 2, TREG_ZERO, 1,
2308 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2309 #ifndef DISASM_ONLY
2311 0ULL,
2312 0xfffff80000000000ULL,
2313 0ULL,
2314 0ULL,
2315 0xc200000004000000ULL
2318 -1ULL,
2319 0x286ae80000000000ULL,
2320 -1ULL,
2321 -1ULL,
2322 0x8200000004000000ULL
2324 #endif
2326 { "ld1s", TILEGX_OPC_LD1S, 0x12, 2, TREG_ZERO, 1,
2327 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2328 #ifndef DISASM_ONLY
2330 0ULL,
2331 0xfffff80000000000ULL,
2332 0ULL,
2333 0ULL,
2334 0xc200000004000000ULL
2337 -1ULL,
2338 0x286a780000000000ULL,
2339 -1ULL,
2340 -1ULL,
2341 0x4000000000000000ULL
2343 #endif
2345 { "ld1s_add", TILEGX_OPC_LD1S_ADD, 0x2, 3, TREG_ZERO, 1,
2346 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2347 #ifndef DISASM_ONLY
2349 0ULL,
2350 0xfff8000000000000ULL,
2351 0ULL,
2352 0ULL,
2353 0ULL
2356 -1ULL,
2357 0x1838000000000000ULL,
2358 -1ULL,
2359 -1ULL,
2360 -1ULL
2362 #endif
2364 { "ld1u", TILEGX_OPC_LD1U, 0x12, 2, TREG_ZERO, 1,
2365 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2366 #ifndef DISASM_ONLY
2368 0ULL,
2369 0xfffff80000000000ULL,
2370 0ULL,
2371 0ULL,
2372 0xc200000004000000ULL
2375 -1ULL,
2376 0x286a800000000000ULL,
2377 -1ULL,
2378 -1ULL,
2379 0x4000000004000000ULL
2381 #endif
2383 { "ld1u_add", TILEGX_OPC_LD1U_ADD, 0x2, 3, TREG_ZERO, 1,
2384 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2385 #ifndef DISASM_ONLY
2387 0ULL,
2388 0xfff8000000000000ULL,
2389 0ULL,
2390 0ULL,
2391 0ULL
2394 -1ULL,
2395 0x1840000000000000ULL,
2396 -1ULL,
2397 -1ULL,
2398 -1ULL
2400 #endif
2402 { "ld2s", TILEGX_OPC_LD2S, 0x12, 2, TREG_ZERO, 1,
2403 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2404 #ifndef DISASM_ONLY
2406 0ULL,
2407 0xfffff80000000000ULL,
2408 0ULL,
2409 0ULL,
2410 0xc200000004000000ULL
2413 -1ULL,
2414 0x286a880000000000ULL,
2415 -1ULL,
2416 -1ULL,
2417 0x4200000000000000ULL
2419 #endif
2421 { "ld2s_add", TILEGX_OPC_LD2S_ADD, 0x2, 3, TREG_ZERO, 1,
2422 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2423 #ifndef DISASM_ONLY
2425 0ULL,
2426 0xfff8000000000000ULL,
2427 0ULL,
2428 0ULL,
2429 0ULL
2432 -1ULL,
2433 0x1848000000000000ULL,
2434 -1ULL,
2435 -1ULL,
2436 -1ULL
2438 #endif
2440 { "ld2u", TILEGX_OPC_LD2U, 0x12, 2, TREG_ZERO, 1,
2441 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2442 #ifndef DISASM_ONLY
2444 0ULL,
2445 0xfffff80000000000ULL,
2446 0ULL,
2447 0ULL,
2448 0xc200000004000000ULL
2451 -1ULL,
2452 0x286a900000000000ULL,
2453 -1ULL,
2454 -1ULL,
2455 0x4200000004000000ULL
2457 #endif
2459 { "ld2u_add", TILEGX_OPC_LD2U_ADD, 0x2, 3, TREG_ZERO, 1,
2460 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2461 #ifndef DISASM_ONLY
2463 0ULL,
2464 0xfff8000000000000ULL,
2465 0ULL,
2466 0ULL,
2467 0ULL
2470 -1ULL,
2471 0x1850000000000000ULL,
2472 -1ULL,
2473 -1ULL,
2474 -1ULL
2476 #endif
2478 { "ld4s", TILEGX_OPC_LD4S, 0x12, 2, TREG_ZERO, 1,
2479 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2480 #ifndef DISASM_ONLY
2482 0ULL,
2483 0xfffff80000000000ULL,
2484 0ULL,
2485 0ULL,
2486 0xc200000004000000ULL
2489 -1ULL,
2490 0x286a980000000000ULL,
2491 -1ULL,
2492 -1ULL,
2493 0x8000000004000000ULL
2495 #endif
2497 { "ld4s_add", TILEGX_OPC_LD4S_ADD, 0x2, 3, TREG_ZERO, 1,
2498 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2499 #ifndef DISASM_ONLY
2501 0ULL,
2502 0xfff8000000000000ULL,
2503 0ULL,
2504 0ULL,
2505 0ULL
2508 -1ULL,
2509 0x1858000000000000ULL,
2510 -1ULL,
2511 -1ULL,
2512 -1ULL
2514 #endif
2516 { "ld4u", TILEGX_OPC_LD4U, 0x12, 2, TREG_ZERO, 1,
2517 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
2518 #ifndef DISASM_ONLY
2520 0ULL,
2521 0xfffff80000000000ULL,
2522 0ULL,
2523 0ULL,
2524 0xc200000004000000ULL
2527 -1ULL,
2528 0x286aa00000000000ULL,
2529 -1ULL,
2530 -1ULL,
2531 0x8200000000000000ULL
2533 #endif
2535 { "ld4u_add", TILEGX_OPC_LD4U_ADD, 0x2, 3, TREG_ZERO, 1,
2536 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2537 #ifndef DISASM_ONLY
2539 0ULL,
2540 0xfff8000000000000ULL,
2541 0ULL,
2542 0ULL,
2543 0ULL
2546 -1ULL,
2547 0x1860000000000000ULL,
2548 -1ULL,
2549 -1ULL,
2550 -1ULL
2552 #endif
2554 { "ld_add", TILEGX_OPC_LD_ADD, 0x2, 3, TREG_ZERO, 1,
2555 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2556 #ifndef DISASM_ONLY
2558 0ULL,
2559 0xfff8000000000000ULL,
2560 0ULL,
2561 0ULL,
2562 0ULL
2565 -1ULL,
2566 0x18a0000000000000ULL,
2567 -1ULL,
2568 -1ULL,
2569 -1ULL
2571 #endif
2573 { "ldna", TILEGX_OPC_LDNA, 0x2, 2, TREG_ZERO, 1,
2574 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2575 #ifndef DISASM_ONLY
2577 0ULL,
2578 0xfffff80000000000ULL,
2579 0ULL,
2580 0ULL,
2581 0ULL
2584 -1ULL,
2585 0x286aa80000000000ULL,
2586 -1ULL,
2587 -1ULL,
2588 -1ULL
2590 #endif
2592 { "ldna_add", TILEGX_OPC_LDNA_ADD, 0x2, 3, TREG_ZERO, 1,
2593 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2594 #ifndef DISASM_ONLY
2596 0ULL,
2597 0xfff8000000000000ULL,
2598 0ULL,
2599 0ULL,
2600 0ULL
2603 -1ULL,
2604 0x18a8000000000000ULL,
2605 -1ULL,
2606 -1ULL,
2607 -1ULL
2609 #endif
2611 { "ldnt", TILEGX_OPC_LDNT, 0x2, 2, TREG_ZERO, 1,
2612 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2613 #ifndef DISASM_ONLY
2615 0ULL,
2616 0xfffff80000000000ULL,
2617 0ULL,
2618 0ULL,
2619 0ULL
2622 -1ULL,
2623 0x286ae00000000000ULL,
2624 -1ULL,
2625 -1ULL,
2626 -1ULL
2628 #endif
2630 { "ldnt1s", TILEGX_OPC_LDNT1S, 0x2, 2, TREG_ZERO, 1,
2631 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2632 #ifndef DISASM_ONLY
2634 0ULL,
2635 0xfffff80000000000ULL,
2636 0ULL,
2637 0ULL,
2638 0ULL
2641 -1ULL,
2642 0x286ab00000000000ULL,
2643 -1ULL,
2644 -1ULL,
2645 -1ULL
2647 #endif
2649 { "ldnt1s_add", TILEGX_OPC_LDNT1S_ADD, 0x2, 3, TREG_ZERO, 1,
2650 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2651 #ifndef DISASM_ONLY
2653 0ULL,
2654 0xfff8000000000000ULL,
2655 0ULL,
2656 0ULL,
2657 0ULL
2660 -1ULL,
2661 0x1868000000000000ULL,
2662 -1ULL,
2663 -1ULL,
2664 -1ULL
2666 #endif
2668 { "ldnt1u", TILEGX_OPC_LDNT1U, 0x2, 2, TREG_ZERO, 1,
2669 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2670 #ifndef DISASM_ONLY
2672 0ULL,
2673 0xfffff80000000000ULL,
2674 0ULL,
2675 0ULL,
2676 0ULL
2679 -1ULL,
2680 0x286ab80000000000ULL,
2681 -1ULL,
2682 -1ULL,
2683 -1ULL
2685 #endif
2687 { "ldnt1u_add", TILEGX_OPC_LDNT1U_ADD, 0x2, 3, TREG_ZERO, 1,
2688 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2689 #ifndef DISASM_ONLY
2691 0ULL,
2692 0xfff8000000000000ULL,
2693 0ULL,
2694 0ULL,
2695 0ULL
2698 -1ULL,
2699 0x1870000000000000ULL,
2700 -1ULL,
2701 -1ULL,
2702 -1ULL
2704 #endif
2706 { "ldnt2s", TILEGX_OPC_LDNT2S, 0x2, 2, TREG_ZERO, 1,
2707 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2708 #ifndef DISASM_ONLY
2710 0ULL,
2711 0xfffff80000000000ULL,
2712 0ULL,
2713 0ULL,
2714 0ULL
2717 -1ULL,
2718 0x286ac00000000000ULL,
2719 -1ULL,
2720 -1ULL,
2721 -1ULL
2723 #endif
2725 { "ldnt2s_add", TILEGX_OPC_LDNT2S_ADD, 0x2, 3, TREG_ZERO, 1,
2726 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2727 #ifndef DISASM_ONLY
2729 0ULL,
2730 0xfff8000000000000ULL,
2731 0ULL,
2732 0ULL,
2733 0ULL
2736 -1ULL,
2737 0x1878000000000000ULL,
2738 -1ULL,
2739 -1ULL,
2740 -1ULL
2742 #endif
2744 { "ldnt2u", TILEGX_OPC_LDNT2U, 0x2, 2, TREG_ZERO, 1,
2745 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2746 #ifndef DISASM_ONLY
2748 0ULL,
2749 0xfffff80000000000ULL,
2750 0ULL,
2751 0ULL,
2752 0ULL
2755 -1ULL,
2756 0x286ac80000000000ULL,
2757 -1ULL,
2758 -1ULL,
2759 -1ULL
2761 #endif
2763 { "ldnt2u_add", TILEGX_OPC_LDNT2U_ADD, 0x2, 3, TREG_ZERO, 1,
2764 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2765 #ifndef DISASM_ONLY
2767 0ULL,
2768 0xfff8000000000000ULL,
2769 0ULL,
2770 0ULL,
2771 0ULL
2774 -1ULL,
2775 0x1880000000000000ULL,
2776 -1ULL,
2777 -1ULL,
2778 -1ULL
2780 #endif
2782 { "ldnt4s", TILEGX_OPC_LDNT4S, 0x2, 2, TREG_ZERO, 1,
2783 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2784 #ifndef DISASM_ONLY
2786 0ULL,
2787 0xfffff80000000000ULL,
2788 0ULL,
2789 0ULL,
2790 0ULL
2793 -1ULL,
2794 0x286ad00000000000ULL,
2795 -1ULL,
2796 -1ULL,
2797 -1ULL
2799 #endif
2801 { "ldnt4s_add", TILEGX_OPC_LDNT4S_ADD, 0x2, 3, TREG_ZERO, 1,
2802 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2803 #ifndef DISASM_ONLY
2805 0ULL,
2806 0xfff8000000000000ULL,
2807 0ULL,
2808 0ULL,
2809 0ULL
2812 -1ULL,
2813 0x1888000000000000ULL,
2814 -1ULL,
2815 -1ULL,
2816 -1ULL
2818 #endif
2820 { "ldnt4u", TILEGX_OPC_LDNT4U, 0x2, 2, TREG_ZERO, 1,
2821 { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
2822 #ifndef DISASM_ONLY
2824 0ULL,
2825 0xfffff80000000000ULL,
2826 0ULL,
2827 0ULL,
2828 0ULL
2831 -1ULL,
2832 0x286ad80000000000ULL,
2833 -1ULL,
2834 -1ULL,
2835 -1ULL
2837 #endif
2839 { "ldnt4u_add", TILEGX_OPC_LDNT4U_ADD, 0x2, 3, TREG_ZERO, 1,
2840 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2841 #ifndef DISASM_ONLY
2843 0ULL,
2844 0xfff8000000000000ULL,
2845 0ULL,
2846 0ULL,
2847 0ULL
2850 -1ULL,
2851 0x1890000000000000ULL,
2852 -1ULL,
2853 -1ULL,
2854 -1ULL
2856 #endif
2858 { "ldnt_add", TILEGX_OPC_LDNT_ADD, 0x2, 3, TREG_ZERO, 1,
2859 { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
2860 #ifndef DISASM_ONLY
2862 0ULL,
2863 0xfff8000000000000ULL,
2864 0ULL,
2865 0ULL,
2866 0ULL
2869 -1ULL,
2870 0x1898000000000000ULL,
2871 -1ULL,
2872 -1ULL,
2873 -1ULL
2875 #endif
2877 { "lnk", TILEGX_OPC_LNK, 0xa, 1, TREG_ZERO, 1,
2878 { { 0, }, { 6 }, { 0, }, { 12 }, { 0, } },
2879 #ifndef DISASM_ONLY
2881 0ULL,
2882 0xfffff80000000000ULL,
2883 0ULL,
2884 0x3c07f80000000000ULL,
2885 0ULL
2888 -1ULL,
2889 0x286af00000000000ULL,
2890 -1ULL,
2891 0x1c06700000000000ULL,
2892 -1ULL
2894 #endif
2896 { "mf", TILEGX_OPC_MF, 0x2, 0, TREG_ZERO, 1,
2897 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
2898 #ifndef DISASM_ONLY
2900 0ULL,
2901 0xfffff80000000000ULL,
2902 0ULL,
2903 0ULL,
2904 0ULL
2907 -1ULL,
2908 0x286af80000000000ULL,
2909 -1ULL,
2910 -1ULL,
2911 -1ULL
2913 #endif
2915 { "mfspr", TILEGX_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1,
2916 { { 0, }, { 6, 27 }, { 0, }, { 0, }, { 0, } },
2917 #ifndef DISASM_ONLY
2919 0ULL,
2920 0xfff8000000000000ULL,
2921 0ULL,
2922 0ULL,
2923 0ULL
2926 -1ULL,
2927 0x18b0000000000000ULL,
2928 -1ULL,
2929 -1ULL,
2930 -1ULL
2932 #endif
2934 { "mm", TILEGX_OPC_MM, 0x1, 4, TREG_ZERO, 1,
2935 { { 23, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
2936 #ifndef DISASM_ONLY
2938 0xc00000007f000000ULL,
2939 0ULL,
2940 0ULL,
2941 0ULL,
2942 0ULL
2945 0x0000000037000000ULL,
2946 -1ULL,
2947 -1ULL,
2948 -1ULL,
2949 -1ULL
2951 #endif
2953 { "mnz", TILEGX_OPC_MNZ, 0xf, 3, TREG_ZERO, 1,
2954 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
2955 #ifndef DISASM_ONLY
2957 0xc00000007ffc0000ULL,
2958 0xfffe000000000000ULL,
2959 0x00000000780c0000ULL,
2960 0x3c06000000000000ULL,
2961 0ULL
2964 0x0000000050a00000ULL,
2965 0x2834000000000000ULL,
2966 0x0000000048080000ULL,
2967 0x2804000000000000ULL,
2968 -1ULL
2970 #endif
2972 { "mtspr", TILEGX_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1,
2973 { { 0, }, { 28, 7 }, { 0, }, { 0, }, { 0, } },
2974 #ifndef DISASM_ONLY
2976 0ULL,
2977 0xfff8000000000000ULL,
2978 0ULL,
2979 0ULL,
2980 0ULL
2983 -1ULL,
2984 0x18b8000000000000ULL,
2985 -1ULL,
2986 -1ULL,
2987 -1ULL
2989 #endif
2991 { "mul_hs_hs", TILEGX_OPC_MUL_HS_HS, 0x5, 3, TREG_ZERO, 1,
2992 { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
2993 #ifndef DISASM_ONLY
2995 0xc00000007ffc0000ULL,
2996 0ULL,
2997 0x00000000780c0000ULL,
2998 0ULL,
2999 0ULL
3002 0x0000000050d40000ULL,
3003 -1ULL,
3004 0x0000000068000000ULL,
3005 -1ULL,
3006 -1ULL
3008 #endif
3010 { "mul_hs_hu", TILEGX_OPC_MUL_HS_HU, 0x1, 3, TREG_ZERO, 1,
3011 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3012 #ifndef DISASM_ONLY
3014 0xc00000007ffc0000ULL,
3015 0ULL,
3016 0ULL,
3017 0ULL,
3018 0ULL
3021 0x0000000050d80000ULL,
3022 -1ULL,
3023 -1ULL,
3024 -1ULL,
3025 -1ULL
3027 #endif
3029 { "mul_hs_ls", TILEGX_OPC_MUL_HS_LS, 0x1, 3, TREG_ZERO, 1,
3030 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3031 #ifndef DISASM_ONLY
3033 0xc00000007ffc0000ULL,
3034 0ULL,
3035 0ULL,
3036 0ULL,
3037 0ULL
3040 0x0000000050dc0000ULL,
3041 -1ULL,
3042 -1ULL,
3043 -1ULL,
3044 -1ULL
3046 #endif
3048 { "mul_hs_lu", TILEGX_OPC_MUL_HS_LU, 0x1, 3, TREG_ZERO, 1,
3049 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3050 #ifndef DISASM_ONLY
3052 0xc00000007ffc0000ULL,
3053 0ULL,
3054 0ULL,
3055 0ULL,
3056 0ULL
3059 0x0000000050e00000ULL,
3060 -1ULL,
3061 -1ULL,
3062 -1ULL,
3063 -1ULL
3065 #endif
3067 { "mul_hu_hu", TILEGX_OPC_MUL_HU_HU, 0x5, 3, TREG_ZERO, 1,
3068 { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3069 #ifndef DISASM_ONLY
3071 0xc00000007ffc0000ULL,
3072 0ULL,
3073 0x00000000780c0000ULL,
3074 0ULL,
3075 0ULL
3078 0x0000000050e40000ULL,
3079 -1ULL,
3080 0x0000000068040000ULL,
3081 -1ULL,
3082 -1ULL
3084 #endif
3086 { "mul_hu_ls", TILEGX_OPC_MUL_HU_LS, 0x1, 3, TREG_ZERO, 1,
3087 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3088 #ifndef DISASM_ONLY
3090 0xc00000007ffc0000ULL,
3091 0ULL,
3092 0ULL,
3093 0ULL,
3094 0ULL
3097 0x0000000050e80000ULL,
3098 -1ULL,
3099 -1ULL,
3100 -1ULL,
3101 -1ULL
3103 #endif
3105 { "mul_hu_lu", TILEGX_OPC_MUL_HU_LU, 0x1, 3, TREG_ZERO, 1,
3106 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3107 #ifndef DISASM_ONLY
3109 0xc00000007ffc0000ULL,
3110 0ULL,
3111 0ULL,
3112 0ULL,
3113 0ULL
3116 0x0000000050ec0000ULL,
3117 -1ULL,
3118 -1ULL,
3119 -1ULL,
3120 -1ULL
3122 #endif
3124 { "mul_ls_ls", TILEGX_OPC_MUL_LS_LS, 0x5, 3, TREG_ZERO, 1,
3125 { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3126 #ifndef DISASM_ONLY
3128 0xc00000007ffc0000ULL,
3129 0ULL,
3130 0x00000000780c0000ULL,
3131 0ULL,
3132 0ULL
3135 0x0000000050f00000ULL,
3136 -1ULL,
3137 0x0000000068080000ULL,
3138 -1ULL,
3139 -1ULL
3141 #endif
3143 { "mul_ls_lu", TILEGX_OPC_MUL_LS_LU, 0x1, 3, TREG_ZERO, 1,
3144 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3145 #ifndef DISASM_ONLY
3147 0xc00000007ffc0000ULL,
3148 0ULL,
3149 0ULL,
3150 0ULL,
3151 0ULL
3154 0x0000000050f40000ULL,
3155 -1ULL,
3156 -1ULL,
3157 -1ULL,
3158 -1ULL
3160 #endif
3162 { "mul_lu_lu", TILEGX_OPC_MUL_LU_LU, 0x5, 3, TREG_ZERO, 1,
3163 { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3164 #ifndef DISASM_ONLY
3166 0xc00000007ffc0000ULL,
3167 0ULL,
3168 0x00000000780c0000ULL,
3169 0ULL,
3170 0ULL
3173 0x0000000050f80000ULL,
3174 -1ULL,
3175 0x00000000680c0000ULL,
3176 -1ULL,
3177 -1ULL
3179 #endif
3181 { "mula_hs_hs", TILEGX_OPC_MULA_HS_HS, 0x5, 3, TREG_ZERO, 1,
3182 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3183 #ifndef DISASM_ONLY
3185 0xc00000007ffc0000ULL,
3186 0ULL,
3187 0x00000000780c0000ULL,
3188 0ULL,
3189 0ULL
3192 0x0000000050a80000ULL,
3193 -1ULL,
3194 0x0000000070000000ULL,
3195 -1ULL,
3196 -1ULL
3198 #endif
3200 { "mula_hs_hu", TILEGX_OPC_MULA_HS_HU, 0x1, 3, TREG_ZERO, 1,
3201 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3202 #ifndef DISASM_ONLY
3204 0xc00000007ffc0000ULL,
3205 0ULL,
3206 0ULL,
3207 0ULL,
3208 0ULL
3211 0x0000000050ac0000ULL,
3212 -1ULL,
3213 -1ULL,
3214 -1ULL,
3215 -1ULL
3217 #endif
3219 { "mula_hs_ls", TILEGX_OPC_MULA_HS_LS, 0x1, 3, TREG_ZERO, 1,
3220 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3221 #ifndef DISASM_ONLY
3223 0xc00000007ffc0000ULL,
3224 0ULL,
3225 0ULL,
3226 0ULL,
3227 0ULL
3230 0x0000000050b00000ULL,
3231 -1ULL,
3232 -1ULL,
3233 -1ULL,
3234 -1ULL
3236 #endif
3238 { "mula_hs_lu", TILEGX_OPC_MULA_HS_LU, 0x1, 3, TREG_ZERO, 1,
3239 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3240 #ifndef DISASM_ONLY
3242 0xc00000007ffc0000ULL,
3243 0ULL,
3244 0ULL,
3245 0ULL,
3246 0ULL
3249 0x0000000050b40000ULL,
3250 -1ULL,
3251 -1ULL,
3252 -1ULL,
3253 -1ULL
3255 #endif
3257 { "mula_hu_hu", TILEGX_OPC_MULA_HU_HU, 0x5, 3, TREG_ZERO, 1,
3258 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3259 #ifndef DISASM_ONLY
3261 0xc00000007ffc0000ULL,
3262 0ULL,
3263 0x00000000780c0000ULL,
3264 0ULL,
3265 0ULL
3268 0x0000000050b80000ULL,
3269 -1ULL,
3270 0x0000000070040000ULL,
3271 -1ULL,
3272 -1ULL
3274 #endif
3276 { "mula_hu_ls", TILEGX_OPC_MULA_HU_LS, 0x1, 3, TREG_ZERO, 1,
3277 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3278 #ifndef DISASM_ONLY
3280 0xc00000007ffc0000ULL,
3281 0ULL,
3282 0ULL,
3283 0ULL,
3284 0ULL
3287 0x0000000050bc0000ULL,
3288 -1ULL,
3289 -1ULL,
3290 -1ULL,
3291 -1ULL
3293 #endif
3295 { "mula_hu_lu", TILEGX_OPC_MULA_HU_LU, 0x1, 3, TREG_ZERO, 1,
3296 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3297 #ifndef DISASM_ONLY
3299 0xc00000007ffc0000ULL,
3300 0ULL,
3301 0ULL,
3302 0ULL,
3303 0ULL
3306 0x0000000050c00000ULL,
3307 -1ULL,
3308 -1ULL,
3309 -1ULL,
3310 -1ULL
3312 #endif
3314 { "mula_ls_ls", TILEGX_OPC_MULA_LS_LS, 0x5, 3, TREG_ZERO, 1,
3315 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3316 #ifndef DISASM_ONLY
3318 0xc00000007ffc0000ULL,
3319 0ULL,
3320 0x00000000780c0000ULL,
3321 0ULL,
3322 0ULL
3325 0x0000000050c40000ULL,
3326 -1ULL,
3327 0x0000000070080000ULL,
3328 -1ULL,
3329 -1ULL
3331 #endif
3333 { "mula_ls_lu", TILEGX_OPC_MULA_LS_LU, 0x1, 3, TREG_ZERO, 1,
3334 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3335 #ifndef DISASM_ONLY
3337 0xc00000007ffc0000ULL,
3338 0ULL,
3339 0ULL,
3340 0ULL,
3341 0ULL
3344 0x0000000050c80000ULL,
3345 -1ULL,
3346 -1ULL,
3347 -1ULL,
3348 -1ULL
3350 #endif
3352 { "mula_lu_lu", TILEGX_OPC_MULA_LU_LU, 0x5, 3, TREG_ZERO, 1,
3353 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3354 #ifndef DISASM_ONLY
3356 0xc00000007ffc0000ULL,
3357 0ULL,
3358 0x00000000780c0000ULL,
3359 0ULL,
3360 0ULL
3363 0x0000000050cc0000ULL,
3364 -1ULL,
3365 0x00000000700c0000ULL,
3366 -1ULL,
3367 -1ULL
3369 #endif
3371 { "mulax", TILEGX_OPC_MULAX, 0x5, 3, TREG_ZERO, 1,
3372 { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3373 #ifndef DISASM_ONLY
3375 0xc00000007ffc0000ULL,
3376 0ULL,
3377 0x00000000780c0000ULL,
3378 0ULL,
3379 0ULL
3382 0x0000000050a40000ULL,
3383 -1ULL,
3384 0x0000000040080000ULL,
3385 -1ULL,
3386 -1ULL
3388 #endif
3390 { "mulx", TILEGX_OPC_MULX, 0x5, 3, TREG_ZERO, 1,
3391 { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3392 #ifndef DISASM_ONLY
3394 0xc00000007ffc0000ULL,
3395 0ULL,
3396 0x00000000780c0000ULL,
3397 0ULL,
3398 0ULL
3401 0x0000000050d00000ULL,
3402 -1ULL,
3403 0x00000000400c0000ULL,
3404 -1ULL,
3405 -1ULL
3407 #endif
3409 { "mz", TILEGX_OPC_MZ, 0xf, 3, TREG_ZERO, 1,
3410 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3411 #ifndef DISASM_ONLY
3413 0xc00000007ffc0000ULL,
3414 0xfffe000000000000ULL,
3415 0x00000000780c0000ULL,
3416 0x3c06000000000000ULL,
3417 0ULL
3420 0x0000000050fc0000ULL,
3421 0x2836000000000000ULL,
3422 0x00000000480c0000ULL,
3423 0x2806000000000000ULL,
3424 -1ULL
3426 #endif
3428 { "nap", TILEGX_OPC_NAP, 0x2, 0, TREG_ZERO, 0,
3429 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
3430 #ifndef DISASM_ONLY
3432 0ULL,
3433 0xfffff80000000000ULL,
3434 0ULL,
3435 0ULL,
3436 0ULL
3439 -1ULL,
3440 0x286b000000000000ULL,
3441 -1ULL,
3442 -1ULL,
3443 -1ULL
3445 #endif
3447 { "nop", TILEGX_OPC_NOP, 0xf, 0, TREG_ZERO, 1,
3448 { { }, { }, { }, { }, { 0, } },
3449 #ifndef DISASM_ONLY
3451 0xc00000007ffff000ULL,
3452 0xfffff80000000000ULL,
3453 0x00000000780ff000ULL,
3454 0x3c07f80000000000ULL,
3455 0ULL
3458 0x0000000051485000ULL,
3459 0x286b080000000000ULL,
3460 0x00000000300c5000ULL,
3461 0x1c06780000000000ULL,
3462 -1ULL
3464 #endif
3466 { "nor", TILEGX_OPC_NOR, 0xf, 3, TREG_ZERO, 1,
3467 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3468 #ifndef DISASM_ONLY
3470 0xc00000007ffc0000ULL,
3471 0xfffe000000000000ULL,
3472 0x00000000780c0000ULL,
3473 0x3c06000000000000ULL,
3474 0ULL
3477 0x0000000051000000ULL,
3478 0x2838000000000000ULL,
3479 0x0000000050040000ULL,
3480 0x2c02000000000000ULL,
3481 -1ULL
3483 #endif
3485 { "or", TILEGX_OPC_OR, 0xf, 3, TREG_ZERO, 1,
3486 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3487 #ifndef DISASM_ONLY
3489 0xc00000007ffc0000ULL,
3490 0xfffe000000000000ULL,
3491 0x00000000780c0000ULL,
3492 0x3c06000000000000ULL,
3493 0ULL
3496 0x0000000051040000ULL,
3497 0x283a000000000000ULL,
3498 0x0000000050080000ULL,
3499 0x2c04000000000000ULL,
3500 -1ULL
3502 #endif
3504 { "ori", TILEGX_OPC_ORI, 0x3, 3, TREG_ZERO, 1,
3505 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
3506 #ifndef DISASM_ONLY
3508 0xc00000007ff00000ULL,
3509 0xfff8000000000000ULL,
3510 0ULL,
3511 0ULL,
3512 0ULL
3515 0x0000000040700000ULL,
3516 0x18c0000000000000ULL,
3517 -1ULL,
3518 -1ULL,
3519 -1ULL
3521 #endif
3523 { "pcnt", TILEGX_OPC_PCNT, 0x5, 2, TREG_ZERO, 1,
3524 { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
3525 #ifndef DISASM_ONLY
3527 0xc00000007ffff000ULL,
3528 0ULL,
3529 0x00000000780ff000ULL,
3530 0ULL,
3531 0ULL
3534 0x0000000051486000ULL,
3535 -1ULL,
3536 0x00000000300c6000ULL,
3537 -1ULL,
3538 -1ULL
3540 #endif
3542 { "revbits", TILEGX_OPC_REVBITS, 0x5, 2, TREG_ZERO, 1,
3543 { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
3544 #ifndef DISASM_ONLY
3546 0xc00000007ffff000ULL,
3547 0ULL,
3548 0x00000000780ff000ULL,
3549 0ULL,
3550 0ULL
3553 0x0000000051487000ULL,
3554 -1ULL,
3555 0x00000000300c7000ULL,
3556 -1ULL,
3557 -1ULL
3559 #endif
3561 { "revbytes", TILEGX_OPC_REVBYTES, 0x5, 2, TREG_ZERO, 1,
3562 { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
3563 #ifndef DISASM_ONLY
3565 0xc00000007ffff000ULL,
3566 0ULL,
3567 0x00000000780ff000ULL,
3568 0ULL,
3569 0ULL
3572 0x0000000051488000ULL,
3573 -1ULL,
3574 0x00000000300c8000ULL,
3575 -1ULL,
3576 -1ULL
3578 #endif
3580 { "rotl", TILEGX_OPC_ROTL, 0xf, 3, TREG_ZERO, 1,
3581 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3582 #ifndef DISASM_ONLY
3584 0xc00000007ffc0000ULL,
3585 0xfffe000000000000ULL,
3586 0x00000000780c0000ULL,
3587 0x3c06000000000000ULL,
3588 0ULL
3591 0x0000000051080000ULL,
3592 0x283c000000000000ULL,
3593 0x0000000058000000ULL,
3594 0x3000000000000000ULL,
3595 -1ULL
3597 #endif
3599 { "rotli", TILEGX_OPC_ROTLI, 0xf, 3, TREG_ZERO, 1,
3600 { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3601 #ifndef DISASM_ONLY
3603 0xc00000007ffc0000ULL,
3604 0xfffe000000000000ULL,
3605 0x00000000780c0000ULL,
3606 0x3c06000000000000ULL,
3607 0ULL
3610 0x0000000060040000ULL,
3611 0x3002000000000000ULL,
3612 0x0000000078000000ULL,
3613 0x3800000000000000ULL,
3614 -1ULL
3616 #endif
3618 { "shl", TILEGX_OPC_SHL, 0xf, 3, TREG_ZERO, 1,
3619 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3620 #ifndef DISASM_ONLY
3622 0xc00000007ffc0000ULL,
3623 0xfffe000000000000ULL,
3624 0x00000000780c0000ULL,
3625 0x3c06000000000000ULL,
3626 0ULL
3629 0x0000000051280000ULL,
3630 0x284c000000000000ULL,
3631 0x0000000058040000ULL,
3632 0x3002000000000000ULL,
3633 -1ULL
3635 #endif
3637 { "shl16insli", TILEGX_OPC_SHL16INSLI, 0x3, 3, TREG_ZERO, 1,
3638 { { 8, 9, 4 }, { 6, 7, 5 }, { 0, }, { 0, }, { 0, } },
3639 #ifndef DISASM_ONLY
3641 0xc000000070000000ULL,
3642 0xf800000000000000ULL,
3643 0ULL,
3644 0ULL,
3645 0ULL
3648 0x0000000070000000ULL,
3649 0x3800000000000000ULL,
3650 -1ULL,
3651 -1ULL,
3652 -1ULL
3654 #endif
3656 { "shl1add", TILEGX_OPC_SHL1ADD, 0xf, 3, TREG_ZERO, 1,
3657 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3658 #ifndef DISASM_ONLY
3660 0xc00000007ffc0000ULL,
3661 0xfffe000000000000ULL,
3662 0x00000000780c0000ULL,
3663 0x3c06000000000000ULL,
3664 0ULL
3667 0x0000000051100000ULL,
3668 0x2840000000000000ULL,
3669 0x0000000030000000ULL,
3670 0x1c00000000000000ULL,
3671 -1ULL
3673 #endif
3675 { "shl1addx", TILEGX_OPC_SHL1ADDX, 0xf, 3, TREG_ZERO, 1,
3676 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3677 #ifndef DISASM_ONLY
3679 0xc00000007ffc0000ULL,
3680 0xfffe000000000000ULL,
3681 0x00000000780c0000ULL,
3682 0x3c06000000000000ULL,
3683 0ULL
3686 0x00000000510c0000ULL,
3687 0x283e000000000000ULL,
3688 0x0000000060040000ULL,
3689 0x3402000000000000ULL,
3690 -1ULL
3692 #endif
3694 { "shl2add", TILEGX_OPC_SHL2ADD, 0xf, 3, TREG_ZERO, 1,
3695 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3696 #ifndef DISASM_ONLY
3698 0xc00000007ffc0000ULL,
3699 0xfffe000000000000ULL,
3700 0x00000000780c0000ULL,
3701 0x3c06000000000000ULL,
3702 0ULL
3705 0x0000000051180000ULL,
3706 0x2844000000000000ULL,
3707 0x0000000030040000ULL,
3708 0x1c02000000000000ULL,
3709 -1ULL
3711 #endif
3713 { "shl2addx", TILEGX_OPC_SHL2ADDX, 0xf, 3, TREG_ZERO, 1,
3714 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3715 #ifndef DISASM_ONLY
3717 0xc00000007ffc0000ULL,
3718 0xfffe000000000000ULL,
3719 0x00000000780c0000ULL,
3720 0x3c06000000000000ULL,
3721 0ULL
3724 0x0000000051140000ULL,
3725 0x2842000000000000ULL,
3726 0x0000000060080000ULL,
3727 0x3404000000000000ULL,
3728 -1ULL
3730 #endif
3732 { "shl3add", TILEGX_OPC_SHL3ADD, 0xf, 3, TREG_ZERO, 1,
3733 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3734 #ifndef DISASM_ONLY
3736 0xc00000007ffc0000ULL,
3737 0xfffe000000000000ULL,
3738 0x00000000780c0000ULL,
3739 0x3c06000000000000ULL,
3740 0ULL
3743 0x0000000051200000ULL,
3744 0x2848000000000000ULL,
3745 0x0000000030080000ULL,
3746 0x1c04000000000000ULL,
3747 -1ULL
3749 #endif
3751 { "shl3addx", TILEGX_OPC_SHL3ADDX, 0xf, 3, TREG_ZERO, 1,
3752 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3753 #ifndef DISASM_ONLY
3755 0xc00000007ffc0000ULL,
3756 0xfffe000000000000ULL,
3757 0x00000000780c0000ULL,
3758 0x3c06000000000000ULL,
3759 0ULL
3762 0x00000000511c0000ULL,
3763 0x2846000000000000ULL,
3764 0x00000000600c0000ULL,
3765 0x3406000000000000ULL,
3766 -1ULL
3768 #endif
3770 { "shli", TILEGX_OPC_SHLI, 0xf, 3, TREG_ZERO, 1,
3771 { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3772 #ifndef DISASM_ONLY
3774 0xc00000007ffc0000ULL,
3775 0xfffe000000000000ULL,
3776 0x00000000780c0000ULL,
3777 0x3c06000000000000ULL,
3778 0ULL
3781 0x0000000060080000ULL,
3782 0x3004000000000000ULL,
3783 0x0000000078040000ULL,
3784 0x3802000000000000ULL,
3785 -1ULL
3787 #endif
3789 { "shlx", TILEGX_OPC_SHLX, 0x3, 3, TREG_ZERO, 1,
3790 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
3791 #ifndef DISASM_ONLY
3793 0xc00000007ffc0000ULL,
3794 0xfffe000000000000ULL,
3795 0ULL,
3796 0ULL,
3797 0ULL
3800 0x0000000051240000ULL,
3801 0x284a000000000000ULL,
3802 -1ULL,
3803 -1ULL,
3804 -1ULL
3806 #endif
3808 { "shlxi", TILEGX_OPC_SHLXI, 0x3, 3, TREG_ZERO, 1,
3809 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
3810 #ifndef DISASM_ONLY
3812 0xc00000007ffc0000ULL,
3813 0xfffe000000000000ULL,
3814 0ULL,
3815 0ULL,
3816 0ULL
3819 0x00000000600c0000ULL,
3820 0x3006000000000000ULL,
3821 -1ULL,
3822 -1ULL,
3823 -1ULL
3825 #endif
3827 { "shrs", TILEGX_OPC_SHRS, 0xf, 3, TREG_ZERO, 1,
3828 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3829 #ifndef DISASM_ONLY
3831 0xc00000007ffc0000ULL,
3832 0xfffe000000000000ULL,
3833 0x00000000780c0000ULL,
3834 0x3c06000000000000ULL,
3835 0ULL
3838 0x00000000512c0000ULL,
3839 0x284e000000000000ULL,
3840 0x0000000058080000ULL,
3841 0x3004000000000000ULL,
3842 -1ULL
3844 #endif
3846 { "shrsi", TILEGX_OPC_SHRSI, 0xf, 3, TREG_ZERO, 1,
3847 { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3848 #ifndef DISASM_ONLY
3850 0xc00000007ffc0000ULL,
3851 0xfffe000000000000ULL,
3852 0x00000000780c0000ULL,
3853 0x3c06000000000000ULL,
3854 0ULL
3857 0x0000000060100000ULL,
3858 0x3008000000000000ULL,
3859 0x0000000078080000ULL,
3860 0x3804000000000000ULL,
3861 -1ULL
3863 #endif
3865 { "shru", TILEGX_OPC_SHRU, 0xf, 3, TREG_ZERO, 1,
3866 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3867 #ifndef DISASM_ONLY
3869 0xc00000007ffc0000ULL,
3870 0xfffe000000000000ULL,
3871 0x00000000780c0000ULL,
3872 0x3c06000000000000ULL,
3873 0ULL
3876 0x0000000051340000ULL,
3877 0x2852000000000000ULL,
3878 0x00000000580c0000ULL,
3879 0x3006000000000000ULL,
3880 -1ULL
3882 #endif
3884 { "shrui", TILEGX_OPC_SHRUI, 0xf, 3, TREG_ZERO, 1,
3885 { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3886 #ifndef DISASM_ONLY
3888 0xc00000007ffc0000ULL,
3889 0xfffe000000000000ULL,
3890 0x00000000780c0000ULL,
3891 0x3c06000000000000ULL,
3892 0ULL
3895 0x0000000060140000ULL,
3896 0x300a000000000000ULL,
3897 0x00000000780c0000ULL,
3898 0x3806000000000000ULL,
3899 -1ULL
3901 #endif
3903 { "shrux", TILEGX_OPC_SHRUX, 0x3, 3, TREG_ZERO, 1,
3904 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
3905 #ifndef DISASM_ONLY
3907 0xc00000007ffc0000ULL,
3908 0xfffe000000000000ULL,
3909 0ULL,
3910 0ULL,
3911 0ULL
3914 0x0000000051300000ULL,
3915 0x2850000000000000ULL,
3916 -1ULL,
3917 -1ULL,
3918 -1ULL
3920 #endif
3922 { "shruxi", TILEGX_OPC_SHRUXI, 0x3, 3, TREG_ZERO, 1,
3923 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
3924 #ifndef DISASM_ONLY
3926 0xc00000007ffc0000ULL,
3927 0xfffe000000000000ULL,
3928 0ULL,
3929 0ULL,
3930 0ULL
3933 0x0000000060180000ULL,
3934 0x300c000000000000ULL,
3935 -1ULL,
3936 -1ULL,
3937 -1ULL
3939 #endif
3941 { "shufflebytes", TILEGX_OPC_SHUFFLEBYTES, 0x1, 3, TREG_ZERO, 1,
3942 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3943 #ifndef DISASM_ONLY
3945 0xc00000007ffc0000ULL,
3946 0ULL,
3947 0ULL,
3948 0ULL,
3949 0ULL
3952 0x0000000051380000ULL,
3953 -1ULL,
3954 -1ULL,
3955 -1ULL,
3956 -1ULL
3958 #endif
3960 { "st", TILEGX_OPC_ST, 0x12, 2, TREG_ZERO, 1,
3961 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
3962 #ifndef DISASM_ONLY
3964 0ULL,
3965 0xfffe000000000000ULL,
3966 0ULL,
3967 0ULL,
3968 0xc200000004000000ULL
3971 -1ULL,
3972 0x2862000000000000ULL,
3973 -1ULL,
3974 -1ULL,
3975 0xc200000004000000ULL
3977 #endif
3979 { "st1", TILEGX_OPC_ST1, 0x12, 2, TREG_ZERO, 1,
3980 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
3981 #ifndef DISASM_ONLY
3983 0ULL,
3984 0xfffe000000000000ULL,
3985 0ULL,
3986 0ULL,
3987 0xc200000004000000ULL
3990 -1ULL,
3991 0x2854000000000000ULL,
3992 -1ULL,
3993 -1ULL,
3994 0xc000000000000000ULL
3996 #endif
3998 { "st1_add", TILEGX_OPC_ST1_ADD, 0x2, 3, TREG_ZERO, 1,
3999 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4000 #ifndef DISASM_ONLY
4002 0ULL,
4003 0xfff8000000000000ULL,
4004 0ULL,
4005 0ULL,
4006 0ULL
4009 -1ULL,
4010 0x18c8000000000000ULL,
4011 -1ULL,
4012 -1ULL,
4013 -1ULL
4015 #endif
4017 { "st2", TILEGX_OPC_ST2, 0x12, 2, TREG_ZERO, 1,
4018 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
4019 #ifndef DISASM_ONLY
4021 0ULL,
4022 0xfffe000000000000ULL,
4023 0ULL,
4024 0ULL,
4025 0xc200000004000000ULL
4028 -1ULL,
4029 0x2856000000000000ULL,
4030 -1ULL,
4031 -1ULL,
4032 0xc000000004000000ULL
4034 #endif
4036 { "st2_add", TILEGX_OPC_ST2_ADD, 0x2, 3, TREG_ZERO, 1,
4037 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4038 #ifndef DISASM_ONLY
4040 0ULL,
4041 0xfff8000000000000ULL,
4042 0ULL,
4043 0ULL,
4044 0ULL
4047 -1ULL,
4048 0x18d0000000000000ULL,
4049 -1ULL,
4050 -1ULL,
4051 -1ULL
4053 #endif
4055 { "st4", TILEGX_OPC_ST4, 0x12, 2, TREG_ZERO, 1,
4056 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
4057 #ifndef DISASM_ONLY
4059 0ULL,
4060 0xfffe000000000000ULL,
4061 0ULL,
4062 0ULL,
4063 0xc200000004000000ULL
4066 -1ULL,
4067 0x2858000000000000ULL,
4068 -1ULL,
4069 -1ULL,
4070 0xc200000000000000ULL
4072 #endif
4074 { "st4_add", TILEGX_OPC_ST4_ADD, 0x2, 3, TREG_ZERO, 1,
4075 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4076 #ifndef DISASM_ONLY
4078 0ULL,
4079 0xfff8000000000000ULL,
4080 0ULL,
4081 0ULL,
4082 0ULL
4085 -1ULL,
4086 0x18d8000000000000ULL,
4087 -1ULL,
4088 -1ULL,
4089 -1ULL
4091 #endif
4093 { "st_add", TILEGX_OPC_ST_ADD, 0x2, 3, TREG_ZERO, 1,
4094 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4095 #ifndef DISASM_ONLY
4097 0ULL,
4098 0xfff8000000000000ULL,
4099 0ULL,
4100 0ULL,
4101 0ULL
4104 -1ULL,
4105 0x1900000000000000ULL,
4106 -1ULL,
4107 -1ULL,
4108 -1ULL
4110 #endif
4112 { "stnt", TILEGX_OPC_STNT, 0x2, 2, TREG_ZERO, 1,
4113 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
4114 #ifndef DISASM_ONLY
4116 0ULL,
4117 0xfffe000000000000ULL,
4118 0ULL,
4119 0ULL,
4120 0ULL
4123 -1ULL,
4124 0x2860000000000000ULL,
4125 -1ULL,
4126 -1ULL,
4127 -1ULL
4129 #endif
4131 { "stnt1", TILEGX_OPC_STNT1, 0x2, 2, TREG_ZERO, 1,
4132 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
4133 #ifndef DISASM_ONLY
4135 0ULL,
4136 0xfffe000000000000ULL,
4137 0ULL,
4138 0ULL,
4139 0ULL
4142 -1ULL,
4143 0x285a000000000000ULL,
4144 -1ULL,
4145 -1ULL,
4146 -1ULL
4148 #endif
4150 { "stnt1_add", TILEGX_OPC_STNT1_ADD, 0x2, 3, TREG_ZERO, 1,
4151 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4152 #ifndef DISASM_ONLY
4154 0ULL,
4155 0xfff8000000000000ULL,
4156 0ULL,
4157 0ULL,
4158 0ULL
4161 -1ULL,
4162 0x18e0000000000000ULL,
4163 -1ULL,
4164 -1ULL,
4165 -1ULL
4167 #endif
4169 { "stnt2", TILEGX_OPC_STNT2, 0x2, 2, TREG_ZERO, 1,
4170 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
4171 #ifndef DISASM_ONLY
4173 0ULL,
4174 0xfffe000000000000ULL,
4175 0ULL,
4176 0ULL,
4177 0ULL
4180 -1ULL,
4181 0x285c000000000000ULL,
4182 -1ULL,
4183 -1ULL,
4184 -1ULL
4186 #endif
4188 { "stnt2_add", TILEGX_OPC_STNT2_ADD, 0x2, 3, TREG_ZERO, 1,
4189 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4190 #ifndef DISASM_ONLY
4192 0ULL,
4193 0xfff8000000000000ULL,
4194 0ULL,
4195 0ULL,
4196 0ULL
4199 -1ULL,
4200 0x18e8000000000000ULL,
4201 -1ULL,
4202 -1ULL,
4203 -1ULL
4205 #endif
4207 { "stnt4", TILEGX_OPC_STNT4, 0x2, 2, TREG_ZERO, 1,
4208 { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
4209 #ifndef DISASM_ONLY
4211 0ULL,
4212 0xfffe000000000000ULL,
4213 0ULL,
4214 0ULL,
4215 0ULL
4218 -1ULL,
4219 0x285e000000000000ULL,
4220 -1ULL,
4221 -1ULL,
4222 -1ULL
4224 #endif
4226 { "stnt4_add", TILEGX_OPC_STNT4_ADD, 0x2, 3, TREG_ZERO, 1,
4227 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4228 #ifndef DISASM_ONLY
4230 0ULL,
4231 0xfff8000000000000ULL,
4232 0ULL,
4233 0ULL,
4234 0ULL
4237 -1ULL,
4238 0x18f0000000000000ULL,
4239 -1ULL,
4240 -1ULL,
4241 -1ULL
4243 #endif
4245 { "stnt_add", TILEGX_OPC_STNT_ADD, 0x2, 3, TREG_ZERO, 1,
4246 { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4247 #ifndef DISASM_ONLY
4249 0ULL,
4250 0xfff8000000000000ULL,
4251 0ULL,
4252 0ULL,
4253 0ULL
4256 -1ULL,
4257 0x18f8000000000000ULL,
4258 -1ULL,
4259 -1ULL,
4260 -1ULL
4262 #endif
4264 { "sub", TILEGX_OPC_SUB, 0xf, 3, TREG_ZERO, 1,
4265 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
4266 #ifndef DISASM_ONLY
4268 0xc00000007ffc0000ULL,
4269 0xfffe000000000000ULL,
4270 0x00000000780c0000ULL,
4271 0x3c06000000000000ULL,
4272 0ULL
4275 0x0000000051440000ULL,
4276 0x2868000000000000ULL,
4277 0x00000000280c0000ULL,
4278 0x1806000000000000ULL,
4279 -1ULL
4281 #endif
4283 { "subx", TILEGX_OPC_SUBX, 0xf, 3, TREG_ZERO, 1,
4284 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
4285 #ifndef DISASM_ONLY
4287 0xc00000007ffc0000ULL,
4288 0xfffe000000000000ULL,
4289 0x00000000780c0000ULL,
4290 0x3c06000000000000ULL,
4291 0ULL
4294 0x0000000051400000ULL,
4295 0x2866000000000000ULL,
4296 0x0000000028080000ULL,
4297 0x1804000000000000ULL,
4298 -1ULL
4300 #endif
4302 { "subxsc", TILEGX_OPC_SUBXSC, 0x3, 3, TREG_ZERO, 1,
4303 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4304 #ifndef DISASM_ONLY
4306 0xc00000007ffc0000ULL,
4307 0xfffe000000000000ULL,
4308 0ULL,
4309 0ULL,
4310 0ULL
4313 0x00000000513c0000ULL,
4314 0x2864000000000000ULL,
4315 -1ULL,
4316 -1ULL,
4317 -1ULL
4319 #endif
4321 { "swint0", TILEGX_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0,
4322 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
4323 #ifndef DISASM_ONLY
4325 0ULL,
4326 0xfffff80000000000ULL,
4327 0ULL,
4328 0ULL,
4329 0ULL
4332 -1ULL,
4333 0x286b100000000000ULL,
4334 -1ULL,
4335 -1ULL,
4336 -1ULL
4338 #endif
4340 { "swint1", TILEGX_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0,
4341 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
4342 #ifndef DISASM_ONLY
4344 0ULL,
4345 0xfffff80000000000ULL,
4346 0ULL,
4347 0ULL,
4348 0ULL
4351 -1ULL,
4352 0x286b180000000000ULL,
4353 -1ULL,
4354 -1ULL,
4355 -1ULL
4357 #endif
4359 { "swint2", TILEGX_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0,
4360 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
4361 #ifndef DISASM_ONLY
4363 0ULL,
4364 0xfffff80000000000ULL,
4365 0ULL,
4366 0ULL,
4367 0ULL
4370 -1ULL,
4371 0x286b200000000000ULL,
4372 -1ULL,
4373 -1ULL,
4374 -1ULL
4376 #endif
4378 { "swint3", TILEGX_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0,
4379 { { 0, }, { }, { 0, }, { 0, }, { 0, } },
4380 #ifndef DISASM_ONLY
4382 0ULL,
4383 0xfffff80000000000ULL,
4384 0ULL,
4385 0ULL,
4386 0ULL
4389 -1ULL,
4390 0x286b280000000000ULL,
4391 -1ULL,
4392 -1ULL,
4393 -1ULL
4395 #endif
4397 { "tblidxb0", TILEGX_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1,
4398 { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4399 #ifndef DISASM_ONLY
4401 0xc00000007ffff000ULL,
4402 0ULL,
4403 0x00000000780ff000ULL,
4404 0ULL,
4405 0ULL
4408 0x0000000051489000ULL,
4409 -1ULL,
4410 0x00000000300c9000ULL,
4411 -1ULL,
4412 -1ULL
4414 #endif
4416 { "tblidxb1", TILEGX_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1,
4417 { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4418 #ifndef DISASM_ONLY
4420 0xc00000007ffff000ULL,
4421 0ULL,
4422 0x00000000780ff000ULL,
4423 0ULL,
4424 0ULL
4427 0x000000005148a000ULL,
4428 -1ULL,
4429 0x00000000300ca000ULL,
4430 -1ULL,
4431 -1ULL
4433 #endif
4435 { "tblidxb2", TILEGX_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1,
4436 { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4437 #ifndef DISASM_ONLY
4439 0xc00000007ffff000ULL,
4440 0ULL,
4441 0x00000000780ff000ULL,
4442 0ULL,
4443 0ULL
4446 0x000000005148b000ULL,
4447 -1ULL,
4448 0x00000000300cb000ULL,
4449 -1ULL,
4450 -1ULL
4452 #endif
4454 { "tblidxb3", TILEGX_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1,
4455 { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4456 #ifndef DISASM_ONLY
4458 0xc00000007ffff000ULL,
4459 0ULL,
4460 0x00000000780ff000ULL,
4461 0ULL,
4462 0ULL
4465 0x000000005148c000ULL,
4466 -1ULL,
4467 0x00000000300cc000ULL,
4468 -1ULL,
4469 -1ULL
4471 #endif
4473 { "v1add", TILEGX_OPC_V1ADD, 0x3, 3, TREG_ZERO, 1,
4474 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4475 #ifndef DISASM_ONLY
4477 0xc00000007ffc0000ULL,
4478 0xfffe000000000000ULL,
4479 0ULL,
4480 0ULL,
4481 0ULL
4484 0x0000000051500000ULL,
4485 0x286e000000000000ULL,
4486 -1ULL,
4487 -1ULL,
4488 -1ULL
4490 #endif
4492 { "v1addi", TILEGX_OPC_V1ADDI, 0x3, 3, TREG_ZERO, 1,
4493 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
4494 #ifndef DISASM_ONLY
4496 0xc00000007ff00000ULL,
4497 0xfff8000000000000ULL,
4498 0ULL,
4499 0ULL,
4500 0ULL
4503 0x0000000040800000ULL,
4504 0x1908000000000000ULL,
4505 -1ULL,
4506 -1ULL,
4507 -1ULL
4509 #endif
4511 { "v1adduc", TILEGX_OPC_V1ADDUC, 0x3, 3, TREG_ZERO, 1,
4512 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4513 #ifndef DISASM_ONLY
4515 0xc00000007ffc0000ULL,
4516 0xfffe000000000000ULL,
4517 0ULL,
4518 0ULL,
4519 0ULL
4522 0x00000000514c0000ULL,
4523 0x286c000000000000ULL,
4524 -1ULL,
4525 -1ULL,
4526 -1ULL
4528 #endif
4530 { "v1adiffu", TILEGX_OPC_V1ADIFFU, 0x1, 3, TREG_ZERO, 1,
4531 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4532 #ifndef DISASM_ONLY
4534 0xc00000007ffc0000ULL,
4535 0ULL,
4536 0ULL,
4537 0ULL,
4538 0ULL
4541 0x0000000051540000ULL,
4542 -1ULL,
4543 -1ULL,
4544 -1ULL,
4545 -1ULL
4547 #endif
4549 { "v1avgu", TILEGX_OPC_V1AVGU, 0x1, 3, TREG_ZERO, 1,
4550 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4551 #ifndef DISASM_ONLY
4553 0xc00000007ffc0000ULL,
4554 0ULL,
4555 0ULL,
4556 0ULL,
4557 0ULL
4560 0x0000000051580000ULL,
4561 -1ULL,
4562 -1ULL,
4563 -1ULL,
4564 -1ULL
4566 #endif
4568 { "v1cmpeq", TILEGX_OPC_V1CMPEQ, 0x3, 3, TREG_ZERO, 1,
4569 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4570 #ifndef DISASM_ONLY
4572 0xc00000007ffc0000ULL,
4573 0xfffe000000000000ULL,
4574 0ULL,
4575 0ULL,
4576 0ULL
4579 0x00000000515c0000ULL,
4580 0x2870000000000000ULL,
4581 -1ULL,
4582 -1ULL,
4583 -1ULL
4585 #endif
4587 { "v1cmpeqi", TILEGX_OPC_V1CMPEQI, 0x3, 3, TREG_ZERO, 1,
4588 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
4589 #ifndef DISASM_ONLY
4591 0xc00000007ff00000ULL,
4592 0xfff8000000000000ULL,
4593 0ULL,
4594 0ULL,
4595 0ULL
4598 0x0000000040900000ULL,
4599 0x1910000000000000ULL,
4600 -1ULL,
4601 -1ULL,
4602 -1ULL
4604 #endif
4606 { "v1cmples", TILEGX_OPC_V1CMPLES, 0x3, 3, TREG_ZERO, 1,
4607 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4608 #ifndef DISASM_ONLY
4610 0xc00000007ffc0000ULL,
4611 0xfffe000000000000ULL,
4612 0ULL,
4613 0ULL,
4614 0ULL
4617 0x0000000051600000ULL,
4618 0x2872000000000000ULL,
4619 -1ULL,
4620 -1ULL,
4621 -1ULL
4623 #endif
4625 { "v1cmpleu", TILEGX_OPC_V1CMPLEU, 0x3, 3, TREG_ZERO, 1,
4626 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4627 #ifndef DISASM_ONLY
4629 0xc00000007ffc0000ULL,
4630 0xfffe000000000000ULL,
4631 0ULL,
4632 0ULL,
4633 0ULL
4636 0x0000000051640000ULL,
4637 0x2874000000000000ULL,
4638 -1ULL,
4639 -1ULL,
4640 -1ULL
4642 #endif
4644 { "v1cmplts", TILEGX_OPC_V1CMPLTS, 0x3, 3, TREG_ZERO, 1,
4645 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4646 #ifndef DISASM_ONLY
4648 0xc00000007ffc0000ULL,
4649 0xfffe000000000000ULL,
4650 0ULL,
4651 0ULL,
4652 0ULL
4655 0x0000000051680000ULL,
4656 0x2876000000000000ULL,
4657 -1ULL,
4658 -1ULL,
4659 -1ULL
4661 #endif
4663 { "v1cmpltsi", TILEGX_OPC_V1CMPLTSI, 0x3, 3, TREG_ZERO, 1,
4664 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
4665 #ifndef DISASM_ONLY
4667 0xc00000007ff00000ULL,
4668 0xfff8000000000000ULL,
4669 0ULL,
4670 0ULL,
4671 0ULL
4674 0x0000000040a00000ULL,
4675 0x1918000000000000ULL,
4676 -1ULL,
4677 -1ULL,
4678 -1ULL
4680 #endif
4682 { "v1cmpltu", TILEGX_OPC_V1CMPLTU, 0x3, 3, TREG_ZERO, 1,
4683 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4684 #ifndef DISASM_ONLY
4686 0xc00000007ffc0000ULL,
4687 0xfffe000000000000ULL,
4688 0ULL,
4689 0ULL,
4690 0ULL
4693 0x00000000516c0000ULL,
4694 0x2878000000000000ULL,
4695 -1ULL,
4696 -1ULL,
4697 -1ULL
4699 #endif
4701 { "v1cmpltui", TILEGX_OPC_V1CMPLTUI, 0x3, 3, TREG_ZERO, 1,
4702 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
4703 #ifndef DISASM_ONLY
4705 0xc00000007ff00000ULL,
4706 0xfff8000000000000ULL,
4707 0ULL,
4708 0ULL,
4709 0ULL
4712 0x0000000040b00000ULL,
4713 0x1920000000000000ULL,
4714 -1ULL,
4715 -1ULL,
4716 -1ULL
4718 #endif
4720 { "v1cmpne", TILEGX_OPC_V1CMPNE, 0x3, 3, TREG_ZERO, 1,
4721 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4722 #ifndef DISASM_ONLY
4724 0xc00000007ffc0000ULL,
4725 0xfffe000000000000ULL,
4726 0ULL,
4727 0ULL,
4728 0ULL
4731 0x0000000051700000ULL,
4732 0x287a000000000000ULL,
4733 -1ULL,
4734 -1ULL,
4735 -1ULL
4737 #endif
4739 { "v1ddotpu", TILEGX_OPC_V1DDOTPU, 0x1, 3, TREG_ZERO, 1,
4740 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4741 #ifndef DISASM_ONLY
4743 0xc00000007ffc0000ULL,
4744 0ULL,
4745 0ULL,
4746 0ULL,
4747 0ULL
4750 0x0000000052880000ULL,
4751 -1ULL,
4752 -1ULL,
4753 -1ULL,
4754 -1ULL
4756 #endif
4758 { "v1ddotpua", TILEGX_OPC_V1DDOTPUA, 0x1, 3, TREG_ZERO, 1,
4759 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4760 #ifndef DISASM_ONLY
4762 0xc00000007ffc0000ULL,
4763 0ULL,
4764 0ULL,
4765 0ULL,
4766 0ULL
4769 0x0000000052840000ULL,
4770 -1ULL,
4771 -1ULL,
4772 -1ULL,
4773 -1ULL
4775 #endif
4777 { "v1ddotpus", TILEGX_OPC_V1DDOTPUS, 0x1, 3, TREG_ZERO, 1,
4778 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4779 #ifndef DISASM_ONLY
4781 0xc00000007ffc0000ULL,
4782 0ULL,
4783 0ULL,
4784 0ULL,
4785 0ULL
4788 0x0000000051780000ULL,
4789 -1ULL,
4790 -1ULL,
4791 -1ULL,
4792 -1ULL
4794 #endif
4796 { "v1ddotpusa", TILEGX_OPC_V1DDOTPUSA, 0x1, 3, TREG_ZERO, 1,
4797 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4798 #ifndef DISASM_ONLY
4800 0xc00000007ffc0000ULL,
4801 0ULL,
4802 0ULL,
4803 0ULL,
4804 0ULL
4807 0x0000000051740000ULL,
4808 -1ULL,
4809 -1ULL,
4810 -1ULL,
4811 -1ULL
4813 #endif
4815 { "v1dotp", TILEGX_OPC_V1DOTP, 0x1, 3, TREG_ZERO, 1,
4816 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4817 #ifndef DISASM_ONLY
4819 0xc00000007ffc0000ULL,
4820 0ULL,
4821 0ULL,
4822 0ULL,
4823 0ULL
4826 0x0000000051880000ULL,
4827 -1ULL,
4828 -1ULL,
4829 -1ULL,
4830 -1ULL
4832 #endif
4834 { "v1dotpa", TILEGX_OPC_V1DOTPA, 0x1, 3, TREG_ZERO, 1,
4835 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4836 #ifndef DISASM_ONLY
4838 0xc00000007ffc0000ULL,
4839 0ULL,
4840 0ULL,
4841 0ULL,
4842 0ULL
4845 0x00000000517c0000ULL,
4846 -1ULL,
4847 -1ULL,
4848 -1ULL,
4849 -1ULL
4851 #endif
4853 { "v1dotpu", TILEGX_OPC_V1DOTPU, 0x1, 3, TREG_ZERO, 1,
4854 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4855 #ifndef DISASM_ONLY
4857 0xc00000007ffc0000ULL,
4858 0ULL,
4859 0ULL,
4860 0ULL,
4861 0ULL
4864 0x0000000052900000ULL,
4865 -1ULL,
4866 -1ULL,
4867 -1ULL,
4868 -1ULL
4870 #endif
4872 { "v1dotpua", TILEGX_OPC_V1DOTPUA, 0x1, 3, TREG_ZERO, 1,
4873 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4874 #ifndef DISASM_ONLY
4876 0xc00000007ffc0000ULL,
4877 0ULL,
4878 0ULL,
4879 0ULL,
4880 0ULL
4883 0x00000000528c0000ULL,
4884 -1ULL,
4885 -1ULL,
4886 -1ULL,
4887 -1ULL
4889 #endif
4891 { "v1dotpus", TILEGX_OPC_V1DOTPUS, 0x1, 3, TREG_ZERO, 1,
4892 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4893 #ifndef DISASM_ONLY
4895 0xc00000007ffc0000ULL,
4896 0ULL,
4897 0ULL,
4898 0ULL,
4899 0ULL
4902 0x0000000051840000ULL,
4903 -1ULL,
4904 -1ULL,
4905 -1ULL,
4906 -1ULL
4908 #endif
4910 { "v1dotpusa", TILEGX_OPC_V1DOTPUSA, 0x1, 3, TREG_ZERO, 1,
4911 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4912 #ifndef DISASM_ONLY
4914 0xc00000007ffc0000ULL,
4915 0ULL,
4916 0ULL,
4917 0ULL,
4918 0ULL
4921 0x0000000051800000ULL,
4922 -1ULL,
4923 -1ULL,
4924 -1ULL,
4925 -1ULL
4927 #endif
4929 { "v1int_h", TILEGX_OPC_V1INT_H, 0x3, 3, TREG_ZERO, 1,
4930 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4931 #ifndef DISASM_ONLY
4933 0xc00000007ffc0000ULL,
4934 0xfffe000000000000ULL,
4935 0ULL,
4936 0ULL,
4937 0ULL
4940 0x00000000518c0000ULL,
4941 0x287c000000000000ULL,
4942 -1ULL,
4943 -1ULL,
4944 -1ULL
4946 #endif
4948 { "v1int_l", TILEGX_OPC_V1INT_L, 0x3, 3, TREG_ZERO, 1,
4949 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4950 #ifndef DISASM_ONLY
4952 0xc00000007ffc0000ULL,
4953 0xfffe000000000000ULL,
4954 0ULL,
4955 0ULL,
4956 0ULL
4959 0x0000000051900000ULL,
4960 0x287e000000000000ULL,
4961 -1ULL,
4962 -1ULL,
4963 -1ULL
4965 #endif
4967 { "v1maxu", TILEGX_OPC_V1MAXU, 0x3, 3, TREG_ZERO, 1,
4968 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
4969 #ifndef DISASM_ONLY
4971 0xc00000007ffc0000ULL,
4972 0xfffe000000000000ULL,
4973 0ULL,
4974 0ULL,
4975 0ULL
4978 0x0000000051940000ULL,
4979 0x2880000000000000ULL,
4980 -1ULL,
4981 -1ULL,
4982 -1ULL
4984 #endif
4986 { "v1maxui", TILEGX_OPC_V1MAXUI, 0x3, 3, TREG_ZERO, 1,
4987 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
4988 #ifndef DISASM_ONLY
4990 0xc00000007ff00000ULL,
4991 0xfff8000000000000ULL,
4992 0ULL,
4993 0ULL,
4994 0ULL
4997 0x0000000040c00000ULL,
4998 0x1928000000000000ULL,
4999 -1ULL,
5000 -1ULL,
5001 -1ULL
5003 #endif
5005 { "v1minu", TILEGX_OPC_V1MINU, 0x3, 3, TREG_ZERO, 1,
5006 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5007 #ifndef DISASM_ONLY
5009 0xc00000007ffc0000ULL,
5010 0xfffe000000000000ULL,
5011 0ULL,
5012 0ULL,
5013 0ULL
5016 0x0000000051980000ULL,
5017 0x2882000000000000ULL,
5018 -1ULL,
5019 -1ULL,
5020 -1ULL
5022 #endif
5024 { "v1minui", TILEGX_OPC_V1MINUI, 0x3, 3, TREG_ZERO, 1,
5025 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5026 #ifndef DISASM_ONLY
5028 0xc00000007ff00000ULL,
5029 0xfff8000000000000ULL,
5030 0ULL,
5031 0ULL,
5032 0ULL
5035 0x0000000040d00000ULL,
5036 0x1930000000000000ULL,
5037 -1ULL,
5038 -1ULL,
5039 -1ULL
5041 #endif
5043 { "v1mnz", TILEGX_OPC_V1MNZ, 0x3, 3, TREG_ZERO, 1,
5044 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5045 #ifndef DISASM_ONLY
5047 0xc00000007ffc0000ULL,
5048 0xfffe000000000000ULL,
5049 0ULL,
5050 0ULL,
5051 0ULL
5054 0x00000000519c0000ULL,
5055 0x2884000000000000ULL,
5056 -1ULL,
5057 -1ULL,
5058 -1ULL
5060 #endif
5062 { "v1multu", TILEGX_OPC_V1MULTU, 0x1, 3, TREG_ZERO, 1,
5063 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5064 #ifndef DISASM_ONLY
5066 0xc00000007ffc0000ULL,
5067 0ULL,
5068 0ULL,
5069 0ULL,
5070 0ULL
5073 0x0000000051a00000ULL,
5074 -1ULL,
5075 -1ULL,
5076 -1ULL,
5077 -1ULL
5079 #endif
5081 { "v1mulu", TILEGX_OPC_V1MULU, 0x1, 3, TREG_ZERO, 1,
5082 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5083 #ifndef DISASM_ONLY
5085 0xc00000007ffc0000ULL,
5086 0ULL,
5087 0ULL,
5088 0ULL,
5089 0ULL
5092 0x0000000051a80000ULL,
5093 -1ULL,
5094 -1ULL,
5095 -1ULL,
5096 -1ULL
5098 #endif
5100 { "v1mulus", TILEGX_OPC_V1MULUS, 0x1, 3, TREG_ZERO, 1,
5101 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5102 #ifndef DISASM_ONLY
5104 0xc00000007ffc0000ULL,
5105 0ULL,
5106 0ULL,
5107 0ULL,
5108 0ULL
5111 0x0000000051a40000ULL,
5112 -1ULL,
5113 -1ULL,
5114 -1ULL,
5115 -1ULL
5117 #endif
5119 { "v1mz", TILEGX_OPC_V1MZ, 0x3, 3, TREG_ZERO, 1,
5120 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5121 #ifndef DISASM_ONLY
5123 0xc00000007ffc0000ULL,
5124 0xfffe000000000000ULL,
5125 0ULL,
5126 0ULL,
5127 0ULL
5130 0x0000000051ac0000ULL,
5131 0x2886000000000000ULL,
5132 -1ULL,
5133 -1ULL,
5134 -1ULL
5136 #endif
5138 { "v1sadau", TILEGX_OPC_V1SADAU, 0x1, 3, TREG_ZERO, 1,
5139 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5140 #ifndef DISASM_ONLY
5142 0xc00000007ffc0000ULL,
5143 0ULL,
5144 0ULL,
5145 0ULL,
5146 0ULL
5149 0x0000000051b00000ULL,
5150 -1ULL,
5151 -1ULL,
5152 -1ULL,
5153 -1ULL
5155 #endif
5157 { "v1sadu", TILEGX_OPC_V1SADU, 0x1, 3, TREG_ZERO, 1,
5158 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5159 #ifndef DISASM_ONLY
5161 0xc00000007ffc0000ULL,
5162 0ULL,
5163 0ULL,
5164 0ULL,
5165 0ULL
5168 0x0000000051b40000ULL,
5169 -1ULL,
5170 -1ULL,
5171 -1ULL,
5172 -1ULL
5174 #endif
5176 { "v1shl", TILEGX_OPC_V1SHL, 0x3, 3, TREG_ZERO, 1,
5177 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5178 #ifndef DISASM_ONLY
5180 0xc00000007ffc0000ULL,
5181 0xfffe000000000000ULL,
5182 0ULL,
5183 0ULL,
5184 0ULL
5187 0x0000000051b80000ULL,
5188 0x2888000000000000ULL,
5189 -1ULL,
5190 -1ULL,
5191 -1ULL
5193 #endif
5195 { "v1shli", TILEGX_OPC_V1SHLI, 0x3, 3, TREG_ZERO, 1,
5196 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
5197 #ifndef DISASM_ONLY
5199 0xc00000007ffc0000ULL,
5200 0xfffe000000000000ULL,
5201 0ULL,
5202 0ULL,
5203 0ULL
5206 0x00000000601c0000ULL,
5207 0x300e000000000000ULL,
5208 -1ULL,
5209 -1ULL,
5210 -1ULL
5212 #endif
5214 { "v1shrs", TILEGX_OPC_V1SHRS, 0x3, 3, TREG_ZERO, 1,
5215 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5216 #ifndef DISASM_ONLY
5218 0xc00000007ffc0000ULL,
5219 0xfffe000000000000ULL,
5220 0ULL,
5221 0ULL,
5222 0ULL
5225 0x0000000051bc0000ULL,
5226 0x288a000000000000ULL,
5227 -1ULL,
5228 -1ULL,
5229 -1ULL
5231 #endif
5233 { "v1shrsi", TILEGX_OPC_V1SHRSI, 0x3, 3, TREG_ZERO, 1,
5234 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
5235 #ifndef DISASM_ONLY
5237 0xc00000007ffc0000ULL,
5238 0xfffe000000000000ULL,
5239 0ULL,
5240 0ULL,
5241 0ULL
5244 0x0000000060200000ULL,
5245 0x3010000000000000ULL,
5246 -1ULL,
5247 -1ULL,
5248 -1ULL
5250 #endif
5252 { "v1shru", TILEGX_OPC_V1SHRU, 0x3, 3, TREG_ZERO, 1,
5253 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5254 #ifndef DISASM_ONLY
5256 0xc00000007ffc0000ULL,
5257 0xfffe000000000000ULL,
5258 0ULL,
5259 0ULL,
5260 0ULL
5263 0x0000000051c00000ULL,
5264 0x288c000000000000ULL,
5265 -1ULL,
5266 -1ULL,
5267 -1ULL
5269 #endif
5271 { "v1shrui", TILEGX_OPC_V1SHRUI, 0x3, 3, TREG_ZERO, 1,
5272 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
5273 #ifndef DISASM_ONLY
5275 0xc00000007ffc0000ULL,
5276 0xfffe000000000000ULL,
5277 0ULL,
5278 0ULL,
5279 0ULL
5282 0x0000000060240000ULL,
5283 0x3012000000000000ULL,
5284 -1ULL,
5285 -1ULL,
5286 -1ULL
5288 #endif
5290 { "v1sub", TILEGX_OPC_V1SUB, 0x3, 3, TREG_ZERO, 1,
5291 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5292 #ifndef DISASM_ONLY
5294 0xc00000007ffc0000ULL,
5295 0xfffe000000000000ULL,
5296 0ULL,
5297 0ULL,
5298 0ULL
5301 0x0000000051c80000ULL,
5302 0x2890000000000000ULL,
5303 -1ULL,
5304 -1ULL,
5305 -1ULL
5307 #endif
5309 { "v1subuc", TILEGX_OPC_V1SUBUC, 0x3, 3, TREG_ZERO, 1,
5310 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5311 #ifndef DISASM_ONLY
5313 0xc00000007ffc0000ULL,
5314 0xfffe000000000000ULL,
5315 0ULL,
5316 0ULL,
5317 0ULL
5320 0x0000000051c40000ULL,
5321 0x288e000000000000ULL,
5322 -1ULL,
5323 -1ULL,
5324 -1ULL
5326 #endif
5328 { "v2add", TILEGX_OPC_V2ADD, 0x3, 3, TREG_ZERO, 1,
5329 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5330 #ifndef DISASM_ONLY
5332 0xc00000007ffc0000ULL,
5333 0xfffe000000000000ULL,
5334 0ULL,
5335 0ULL,
5336 0ULL
5339 0x0000000051d00000ULL,
5340 0x2894000000000000ULL,
5341 -1ULL,
5342 -1ULL,
5343 -1ULL
5345 #endif
5347 { "v2addi", TILEGX_OPC_V2ADDI, 0x3, 3, TREG_ZERO, 1,
5348 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5349 #ifndef DISASM_ONLY
5351 0xc00000007ff00000ULL,
5352 0xfff8000000000000ULL,
5353 0ULL,
5354 0ULL,
5355 0ULL
5358 0x0000000040e00000ULL,
5359 0x1938000000000000ULL,
5360 -1ULL,
5361 -1ULL,
5362 -1ULL
5364 #endif
5366 { "v2addsc", TILEGX_OPC_V2ADDSC, 0x3, 3, TREG_ZERO, 1,
5367 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5368 #ifndef DISASM_ONLY
5370 0xc00000007ffc0000ULL,
5371 0xfffe000000000000ULL,
5372 0ULL,
5373 0ULL,
5374 0ULL
5377 0x0000000051cc0000ULL,
5378 0x2892000000000000ULL,
5379 -1ULL,
5380 -1ULL,
5381 -1ULL
5383 #endif
5385 { "v2adiffs", TILEGX_OPC_V2ADIFFS, 0x1, 3, TREG_ZERO, 1,
5386 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5387 #ifndef DISASM_ONLY
5389 0xc00000007ffc0000ULL,
5390 0ULL,
5391 0ULL,
5392 0ULL,
5393 0ULL
5396 0x0000000051d40000ULL,
5397 -1ULL,
5398 -1ULL,
5399 -1ULL,
5400 -1ULL
5402 #endif
5404 { "v2avgs", TILEGX_OPC_V2AVGS, 0x1, 3, TREG_ZERO, 1,
5405 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5406 #ifndef DISASM_ONLY
5408 0xc00000007ffc0000ULL,
5409 0ULL,
5410 0ULL,
5411 0ULL,
5412 0ULL
5415 0x0000000051d80000ULL,
5416 -1ULL,
5417 -1ULL,
5418 -1ULL,
5419 -1ULL
5421 #endif
5423 { "v2cmpeq", TILEGX_OPC_V2CMPEQ, 0x3, 3, TREG_ZERO, 1,
5424 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5425 #ifndef DISASM_ONLY
5427 0xc00000007ffc0000ULL,
5428 0xfffe000000000000ULL,
5429 0ULL,
5430 0ULL,
5431 0ULL
5434 0x0000000051dc0000ULL,
5435 0x2896000000000000ULL,
5436 -1ULL,
5437 -1ULL,
5438 -1ULL
5440 #endif
5442 { "v2cmpeqi", TILEGX_OPC_V2CMPEQI, 0x3, 3, TREG_ZERO, 1,
5443 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5444 #ifndef DISASM_ONLY
5446 0xc00000007ff00000ULL,
5447 0xfff8000000000000ULL,
5448 0ULL,
5449 0ULL,
5450 0ULL
5453 0x0000000040f00000ULL,
5454 0x1940000000000000ULL,
5455 -1ULL,
5456 -1ULL,
5457 -1ULL
5459 #endif
5461 { "v2cmples", TILEGX_OPC_V2CMPLES, 0x3, 3, TREG_ZERO, 1,
5462 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5463 #ifndef DISASM_ONLY
5465 0xc00000007ffc0000ULL,
5466 0xfffe000000000000ULL,
5467 0ULL,
5468 0ULL,
5469 0ULL
5472 0x0000000051e00000ULL,
5473 0x2898000000000000ULL,
5474 -1ULL,
5475 -1ULL,
5476 -1ULL
5478 #endif
5480 { "v2cmpleu", TILEGX_OPC_V2CMPLEU, 0x3, 3, TREG_ZERO, 1,
5481 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5482 #ifndef DISASM_ONLY
5484 0xc00000007ffc0000ULL,
5485 0xfffe000000000000ULL,
5486 0ULL,
5487 0ULL,
5488 0ULL
5491 0x0000000051e40000ULL,
5492 0x289a000000000000ULL,
5493 -1ULL,
5494 -1ULL,
5495 -1ULL
5497 #endif
5499 { "v2cmplts", TILEGX_OPC_V2CMPLTS, 0x3, 3, TREG_ZERO, 1,
5500 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5501 #ifndef DISASM_ONLY
5503 0xc00000007ffc0000ULL,
5504 0xfffe000000000000ULL,
5505 0ULL,
5506 0ULL,
5507 0ULL
5510 0x0000000051e80000ULL,
5511 0x289c000000000000ULL,
5512 -1ULL,
5513 -1ULL,
5514 -1ULL
5516 #endif
5518 { "v2cmpltsi", TILEGX_OPC_V2CMPLTSI, 0x3, 3, TREG_ZERO, 1,
5519 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5520 #ifndef DISASM_ONLY
5522 0xc00000007ff00000ULL,
5523 0xfff8000000000000ULL,
5524 0ULL,
5525 0ULL,
5526 0ULL
5529 0x0000000041000000ULL,
5530 0x1948000000000000ULL,
5531 -1ULL,
5532 -1ULL,
5533 -1ULL
5535 #endif
5537 { "v2cmpltu", TILEGX_OPC_V2CMPLTU, 0x3, 3, TREG_ZERO, 1,
5538 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5539 #ifndef DISASM_ONLY
5541 0xc00000007ffc0000ULL,
5542 0xfffe000000000000ULL,
5543 0ULL,
5544 0ULL,
5545 0ULL
5548 0x0000000051ec0000ULL,
5549 0x289e000000000000ULL,
5550 -1ULL,
5551 -1ULL,
5552 -1ULL
5554 #endif
5556 { "v2cmpltui", TILEGX_OPC_V2CMPLTUI, 0x3, 3, TREG_ZERO, 1,
5557 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5558 #ifndef DISASM_ONLY
5560 0xc00000007ff00000ULL,
5561 0xfff8000000000000ULL,
5562 0ULL,
5563 0ULL,
5564 0ULL
5567 0x0000000041100000ULL,
5568 0x1950000000000000ULL,
5569 -1ULL,
5570 -1ULL,
5571 -1ULL
5573 #endif
5575 { "v2cmpne", TILEGX_OPC_V2CMPNE, 0x3, 3, TREG_ZERO, 1,
5576 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5577 #ifndef DISASM_ONLY
5579 0xc00000007ffc0000ULL,
5580 0xfffe000000000000ULL,
5581 0ULL,
5582 0ULL,
5583 0ULL
5586 0x0000000051f00000ULL,
5587 0x28a0000000000000ULL,
5588 -1ULL,
5589 -1ULL,
5590 -1ULL
5592 #endif
5594 { "v2dotp", TILEGX_OPC_V2DOTP, 0x1, 3, TREG_ZERO, 1,
5595 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5596 #ifndef DISASM_ONLY
5598 0xc00000007ffc0000ULL,
5599 0ULL,
5600 0ULL,
5601 0ULL,
5602 0ULL
5605 0x0000000051f80000ULL,
5606 -1ULL,
5607 -1ULL,
5608 -1ULL,
5609 -1ULL
5611 #endif
5613 { "v2dotpa", TILEGX_OPC_V2DOTPA, 0x1, 3, TREG_ZERO, 1,
5614 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5615 #ifndef DISASM_ONLY
5617 0xc00000007ffc0000ULL,
5618 0ULL,
5619 0ULL,
5620 0ULL,
5621 0ULL
5624 0x0000000051f40000ULL,
5625 -1ULL,
5626 -1ULL,
5627 -1ULL,
5628 -1ULL
5630 #endif
5632 { "v2int_h", TILEGX_OPC_V2INT_H, 0x3, 3, TREG_ZERO, 1,
5633 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5634 #ifndef DISASM_ONLY
5636 0xc00000007ffc0000ULL,
5637 0xfffe000000000000ULL,
5638 0ULL,
5639 0ULL,
5640 0ULL
5643 0x0000000051fc0000ULL,
5644 0x28a2000000000000ULL,
5645 -1ULL,
5646 -1ULL,
5647 -1ULL
5649 #endif
5651 { "v2int_l", TILEGX_OPC_V2INT_L, 0x3, 3, TREG_ZERO, 1,
5652 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5653 #ifndef DISASM_ONLY
5655 0xc00000007ffc0000ULL,
5656 0xfffe000000000000ULL,
5657 0ULL,
5658 0ULL,
5659 0ULL
5662 0x0000000052000000ULL,
5663 0x28a4000000000000ULL,
5664 -1ULL,
5665 -1ULL,
5666 -1ULL
5668 #endif
5670 { "v2maxs", TILEGX_OPC_V2MAXS, 0x3, 3, TREG_ZERO, 1,
5671 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5672 #ifndef DISASM_ONLY
5674 0xc00000007ffc0000ULL,
5675 0xfffe000000000000ULL,
5676 0ULL,
5677 0ULL,
5678 0ULL
5681 0x0000000052040000ULL,
5682 0x28a6000000000000ULL,
5683 -1ULL,
5684 -1ULL,
5685 -1ULL
5687 #endif
5689 { "v2maxsi", TILEGX_OPC_V2MAXSI, 0x3, 3, TREG_ZERO, 1,
5690 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5691 #ifndef DISASM_ONLY
5693 0xc00000007ff00000ULL,
5694 0xfff8000000000000ULL,
5695 0ULL,
5696 0ULL,
5697 0ULL
5700 0x0000000041200000ULL,
5701 0x1958000000000000ULL,
5702 -1ULL,
5703 -1ULL,
5704 -1ULL
5706 #endif
5708 { "v2mins", TILEGX_OPC_V2MINS, 0x3, 3, TREG_ZERO, 1,
5709 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5710 #ifndef DISASM_ONLY
5712 0xc00000007ffc0000ULL,
5713 0xfffe000000000000ULL,
5714 0ULL,
5715 0ULL,
5716 0ULL
5719 0x0000000052080000ULL,
5720 0x28a8000000000000ULL,
5721 -1ULL,
5722 -1ULL,
5723 -1ULL
5725 #endif
5727 { "v2minsi", TILEGX_OPC_V2MINSI, 0x3, 3, TREG_ZERO, 1,
5728 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
5729 #ifndef DISASM_ONLY
5731 0xc00000007ff00000ULL,
5732 0xfff8000000000000ULL,
5733 0ULL,
5734 0ULL,
5735 0ULL
5738 0x0000000041300000ULL,
5739 0x1960000000000000ULL,
5740 -1ULL,
5741 -1ULL,
5742 -1ULL
5744 #endif
5746 { "v2mnz", TILEGX_OPC_V2MNZ, 0x3, 3, TREG_ZERO, 1,
5747 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5748 #ifndef DISASM_ONLY
5750 0xc00000007ffc0000ULL,
5751 0xfffe000000000000ULL,
5752 0ULL,
5753 0ULL,
5754 0ULL
5757 0x00000000520c0000ULL,
5758 0x28aa000000000000ULL,
5759 -1ULL,
5760 -1ULL,
5761 -1ULL
5763 #endif
5765 { "v2mulfsc", TILEGX_OPC_V2MULFSC, 0x1, 3, TREG_ZERO, 1,
5766 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5767 #ifndef DISASM_ONLY
5769 0xc00000007ffc0000ULL,
5770 0ULL,
5771 0ULL,
5772 0ULL,
5773 0ULL
5776 0x0000000052100000ULL,
5777 -1ULL,
5778 -1ULL,
5779 -1ULL,
5780 -1ULL
5782 #endif
5784 { "v2muls", TILEGX_OPC_V2MULS, 0x1, 3, TREG_ZERO, 1,
5785 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5786 #ifndef DISASM_ONLY
5788 0xc00000007ffc0000ULL,
5789 0ULL,
5790 0ULL,
5791 0ULL,
5792 0ULL
5795 0x0000000052140000ULL,
5796 -1ULL,
5797 -1ULL,
5798 -1ULL,
5799 -1ULL
5801 #endif
5803 { "v2mults", TILEGX_OPC_V2MULTS, 0x1, 3, TREG_ZERO, 1,
5804 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5805 #ifndef DISASM_ONLY
5807 0xc00000007ffc0000ULL,
5808 0ULL,
5809 0ULL,
5810 0ULL,
5811 0ULL
5814 0x0000000052180000ULL,
5815 -1ULL,
5816 -1ULL,
5817 -1ULL,
5818 -1ULL
5820 #endif
5822 { "v2mz", TILEGX_OPC_V2MZ, 0x3, 3, TREG_ZERO, 1,
5823 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5824 #ifndef DISASM_ONLY
5826 0xc00000007ffc0000ULL,
5827 0xfffe000000000000ULL,
5828 0ULL,
5829 0ULL,
5830 0ULL
5833 0x00000000521c0000ULL,
5834 0x28ac000000000000ULL,
5835 -1ULL,
5836 -1ULL,
5837 -1ULL
5839 #endif
5841 { "v2packh", TILEGX_OPC_V2PACKH, 0x3, 3, TREG_ZERO, 1,
5842 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5843 #ifndef DISASM_ONLY
5845 0xc00000007ffc0000ULL,
5846 0xfffe000000000000ULL,
5847 0ULL,
5848 0ULL,
5849 0ULL
5852 0x0000000052200000ULL,
5853 0x28ae000000000000ULL,
5854 -1ULL,
5855 -1ULL,
5856 -1ULL
5858 #endif
5860 { "v2packl", TILEGX_OPC_V2PACKL, 0x3, 3, TREG_ZERO, 1,
5861 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5862 #ifndef DISASM_ONLY
5864 0xc00000007ffc0000ULL,
5865 0xfffe000000000000ULL,
5866 0ULL,
5867 0ULL,
5868 0ULL
5871 0x0000000052240000ULL,
5872 0x28b0000000000000ULL,
5873 -1ULL,
5874 -1ULL,
5875 -1ULL
5877 #endif
5879 { "v2packuc", TILEGX_OPC_V2PACKUC, 0x3, 3, TREG_ZERO, 1,
5880 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5881 #ifndef DISASM_ONLY
5883 0xc00000007ffc0000ULL,
5884 0xfffe000000000000ULL,
5885 0ULL,
5886 0ULL,
5887 0ULL
5890 0x0000000052280000ULL,
5891 0x28b2000000000000ULL,
5892 -1ULL,
5893 -1ULL,
5894 -1ULL
5896 #endif
5898 { "v2sadas", TILEGX_OPC_V2SADAS, 0x1, 3, TREG_ZERO, 1,
5899 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5900 #ifndef DISASM_ONLY
5902 0xc00000007ffc0000ULL,
5903 0ULL,
5904 0ULL,
5905 0ULL,
5906 0ULL
5909 0x00000000522c0000ULL,
5910 -1ULL,
5911 -1ULL,
5912 -1ULL,
5913 -1ULL
5915 #endif
5917 { "v2sadau", TILEGX_OPC_V2SADAU, 0x1, 3, TREG_ZERO, 1,
5918 { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5919 #ifndef DISASM_ONLY
5921 0xc00000007ffc0000ULL,
5922 0ULL,
5923 0ULL,
5924 0ULL,
5925 0ULL
5928 0x0000000052300000ULL,
5929 -1ULL,
5930 -1ULL,
5931 -1ULL,
5932 -1ULL
5934 #endif
5936 { "v2sads", TILEGX_OPC_V2SADS, 0x1, 3, TREG_ZERO, 1,
5937 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5938 #ifndef DISASM_ONLY
5940 0xc00000007ffc0000ULL,
5941 0ULL,
5942 0ULL,
5943 0ULL,
5944 0ULL
5947 0x0000000052340000ULL,
5948 -1ULL,
5949 -1ULL,
5950 -1ULL,
5951 -1ULL
5953 #endif
5955 { "v2sadu", TILEGX_OPC_V2SADU, 0x1, 3, TREG_ZERO, 1,
5956 { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5957 #ifndef DISASM_ONLY
5959 0xc00000007ffc0000ULL,
5960 0ULL,
5961 0ULL,
5962 0ULL,
5963 0ULL
5966 0x0000000052380000ULL,
5967 -1ULL,
5968 -1ULL,
5969 -1ULL,
5970 -1ULL
5972 #endif
5974 { "v2shl", TILEGX_OPC_V2SHL, 0x3, 3, TREG_ZERO, 1,
5975 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
5976 #ifndef DISASM_ONLY
5978 0xc00000007ffc0000ULL,
5979 0xfffe000000000000ULL,
5980 0ULL,
5981 0ULL,
5982 0ULL
5985 0x0000000052400000ULL,
5986 0x28b6000000000000ULL,
5987 -1ULL,
5988 -1ULL,
5989 -1ULL
5991 #endif
5993 { "v2shli", TILEGX_OPC_V2SHLI, 0x3, 3, TREG_ZERO, 1,
5994 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
5995 #ifndef DISASM_ONLY
5997 0xc00000007ffc0000ULL,
5998 0xfffe000000000000ULL,
5999 0ULL,
6000 0ULL,
6001 0ULL
6004 0x0000000060280000ULL,
6005 0x3014000000000000ULL,
6006 -1ULL,
6007 -1ULL,
6008 -1ULL
6010 #endif
6012 { "v2shlsc", TILEGX_OPC_V2SHLSC, 0x3, 3, TREG_ZERO, 1,
6013 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6014 #ifndef DISASM_ONLY
6016 0xc00000007ffc0000ULL,
6017 0xfffe000000000000ULL,
6018 0ULL,
6019 0ULL,
6020 0ULL
6023 0x00000000523c0000ULL,
6024 0x28b4000000000000ULL,
6025 -1ULL,
6026 -1ULL,
6027 -1ULL
6029 #endif
6031 { "v2shrs", TILEGX_OPC_V2SHRS, 0x3, 3, TREG_ZERO, 1,
6032 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6033 #ifndef DISASM_ONLY
6035 0xc00000007ffc0000ULL,
6036 0xfffe000000000000ULL,
6037 0ULL,
6038 0ULL,
6039 0ULL
6042 0x0000000052440000ULL,
6043 0x28b8000000000000ULL,
6044 -1ULL,
6045 -1ULL,
6046 -1ULL
6048 #endif
6050 { "v2shrsi", TILEGX_OPC_V2SHRSI, 0x3, 3, TREG_ZERO, 1,
6051 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
6052 #ifndef DISASM_ONLY
6054 0xc00000007ffc0000ULL,
6055 0xfffe000000000000ULL,
6056 0ULL,
6057 0ULL,
6058 0ULL
6061 0x00000000602c0000ULL,
6062 0x3016000000000000ULL,
6063 -1ULL,
6064 -1ULL,
6065 -1ULL
6067 #endif
6069 { "v2shru", TILEGX_OPC_V2SHRU, 0x3, 3, TREG_ZERO, 1,
6070 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6071 #ifndef DISASM_ONLY
6073 0xc00000007ffc0000ULL,
6074 0xfffe000000000000ULL,
6075 0ULL,
6076 0ULL,
6077 0ULL
6080 0x0000000052480000ULL,
6081 0x28ba000000000000ULL,
6082 -1ULL,
6083 -1ULL,
6084 -1ULL
6086 #endif
6088 { "v2shrui", TILEGX_OPC_V2SHRUI, 0x3, 3, TREG_ZERO, 1,
6089 { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
6090 #ifndef DISASM_ONLY
6092 0xc00000007ffc0000ULL,
6093 0xfffe000000000000ULL,
6094 0ULL,
6095 0ULL,
6096 0ULL
6099 0x0000000060300000ULL,
6100 0x3018000000000000ULL,
6101 -1ULL,
6102 -1ULL,
6103 -1ULL
6105 #endif
6107 { "v2sub", TILEGX_OPC_V2SUB, 0x3, 3, TREG_ZERO, 1,
6108 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6109 #ifndef DISASM_ONLY
6111 0xc00000007ffc0000ULL,
6112 0xfffe000000000000ULL,
6113 0ULL,
6114 0ULL,
6115 0ULL
6118 0x0000000052500000ULL,
6119 0x28be000000000000ULL,
6120 -1ULL,
6121 -1ULL,
6122 -1ULL
6124 #endif
6126 { "v2subsc", TILEGX_OPC_V2SUBSC, 0x3, 3, TREG_ZERO, 1,
6127 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6128 #ifndef DISASM_ONLY
6130 0xc00000007ffc0000ULL,
6131 0xfffe000000000000ULL,
6132 0ULL,
6133 0ULL,
6134 0ULL
6137 0x00000000524c0000ULL,
6138 0x28bc000000000000ULL,
6139 -1ULL,
6140 -1ULL,
6141 -1ULL
6143 #endif
6145 { "v4add", TILEGX_OPC_V4ADD, 0x3, 3, TREG_ZERO, 1,
6146 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6147 #ifndef DISASM_ONLY
6149 0xc00000007ffc0000ULL,
6150 0xfffe000000000000ULL,
6151 0ULL,
6152 0ULL,
6153 0ULL
6156 0x0000000052580000ULL,
6157 0x28c2000000000000ULL,
6158 -1ULL,
6159 -1ULL,
6160 -1ULL
6162 #endif
6164 { "v4addsc", TILEGX_OPC_V4ADDSC, 0x3, 3, TREG_ZERO, 1,
6165 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6166 #ifndef DISASM_ONLY
6168 0xc00000007ffc0000ULL,
6169 0xfffe000000000000ULL,
6170 0ULL,
6171 0ULL,
6172 0ULL
6175 0x0000000052540000ULL,
6176 0x28c0000000000000ULL,
6177 -1ULL,
6178 -1ULL,
6179 -1ULL
6181 #endif
6183 { "v4int_h", TILEGX_OPC_V4INT_H, 0x3, 3, TREG_ZERO, 1,
6184 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6185 #ifndef DISASM_ONLY
6187 0xc00000007ffc0000ULL,
6188 0xfffe000000000000ULL,
6189 0ULL,
6190 0ULL,
6191 0ULL
6194 0x00000000525c0000ULL,
6195 0x28c4000000000000ULL,
6196 -1ULL,
6197 -1ULL,
6198 -1ULL
6200 #endif
6202 { "v4int_l", TILEGX_OPC_V4INT_L, 0x3, 3, TREG_ZERO, 1,
6203 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6204 #ifndef DISASM_ONLY
6206 0xc00000007ffc0000ULL,
6207 0xfffe000000000000ULL,
6208 0ULL,
6209 0ULL,
6210 0ULL
6213 0x0000000052600000ULL,
6214 0x28c6000000000000ULL,
6215 -1ULL,
6216 -1ULL,
6217 -1ULL
6219 #endif
6221 { "v4packsc", TILEGX_OPC_V4PACKSC, 0x3, 3, TREG_ZERO, 1,
6222 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6223 #ifndef DISASM_ONLY
6225 0xc00000007ffc0000ULL,
6226 0xfffe000000000000ULL,
6227 0ULL,
6228 0ULL,
6229 0ULL
6232 0x0000000052640000ULL,
6233 0x28c8000000000000ULL,
6234 -1ULL,
6235 -1ULL,
6236 -1ULL
6238 #endif
6240 { "v4shl", TILEGX_OPC_V4SHL, 0x3, 3, TREG_ZERO, 1,
6241 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6242 #ifndef DISASM_ONLY
6244 0xc00000007ffc0000ULL,
6245 0xfffe000000000000ULL,
6246 0ULL,
6247 0ULL,
6248 0ULL
6251 0x00000000526c0000ULL,
6252 0x28cc000000000000ULL,
6253 -1ULL,
6254 -1ULL,
6255 -1ULL
6257 #endif
6259 { "v4shlsc", TILEGX_OPC_V4SHLSC, 0x3, 3, TREG_ZERO, 1,
6260 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6261 #ifndef DISASM_ONLY
6263 0xc00000007ffc0000ULL,
6264 0xfffe000000000000ULL,
6265 0ULL,
6266 0ULL,
6267 0ULL
6270 0x0000000052680000ULL,
6271 0x28ca000000000000ULL,
6272 -1ULL,
6273 -1ULL,
6274 -1ULL
6276 #endif
6278 { "v4shrs", TILEGX_OPC_V4SHRS, 0x3, 3, TREG_ZERO, 1,
6279 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6280 #ifndef DISASM_ONLY
6282 0xc00000007ffc0000ULL,
6283 0xfffe000000000000ULL,
6284 0ULL,
6285 0ULL,
6286 0ULL
6289 0x0000000052700000ULL,
6290 0x28ce000000000000ULL,
6291 -1ULL,
6292 -1ULL,
6293 -1ULL
6295 #endif
6297 { "v4shru", TILEGX_OPC_V4SHRU, 0x3, 3, TREG_ZERO, 1,
6298 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6299 #ifndef DISASM_ONLY
6301 0xc00000007ffc0000ULL,
6302 0xfffe000000000000ULL,
6303 0ULL,
6304 0ULL,
6305 0ULL
6308 0x0000000052740000ULL,
6309 0x28d0000000000000ULL,
6310 -1ULL,
6311 -1ULL,
6312 -1ULL
6314 #endif
6316 { "v4sub", TILEGX_OPC_V4SUB, 0x3, 3, TREG_ZERO, 1,
6317 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6318 #ifndef DISASM_ONLY
6320 0xc00000007ffc0000ULL,
6321 0xfffe000000000000ULL,
6322 0ULL,
6323 0ULL,
6324 0ULL
6327 0x00000000527c0000ULL,
6328 0x28d4000000000000ULL,
6329 -1ULL,
6330 -1ULL,
6331 -1ULL
6333 #endif
6335 { "v4subsc", TILEGX_OPC_V4SUBSC, 0x3, 3, TREG_ZERO, 1,
6336 { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
6337 #ifndef DISASM_ONLY
6339 0xc00000007ffc0000ULL,
6340 0xfffe000000000000ULL,
6341 0ULL,
6342 0ULL,
6343 0ULL
6346 0x0000000052780000ULL,
6347 0x28d2000000000000ULL,
6348 -1ULL,
6349 -1ULL,
6350 -1ULL
6352 #endif
6354 { "wh64", TILEGX_OPC_WH64, 0x2, 1, TREG_ZERO, 1,
6355 { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
6356 #ifndef DISASM_ONLY
6358 0ULL,
6359 0xfffff80000000000ULL,
6360 0ULL,
6361 0ULL,
6362 0ULL
6365 -1ULL,
6366 0x286b300000000000ULL,
6367 -1ULL,
6368 -1ULL,
6369 -1ULL
6371 #endif
6373 { "xor", TILEGX_OPC_XOR, 0xf, 3, TREG_ZERO, 1,
6374 { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
6375 #ifndef DISASM_ONLY
6377 0xc00000007ffc0000ULL,
6378 0xfffe000000000000ULL,
6379 0x00000000780c0000ULL,
6380 0x3c06000000000000ULL,
6381 0ULL
6384 0x0000000052800000ULL,
6385 0x28d6000000000000ULL,
6386 0x00000000500c0000ULL,
6387 0x2c06000000000000ULL,
6388 -1ULL
6390 #endif
6392 { "xori", TILEGX_OPC_XORI, 0x3, 3, TREG_ZERO, 1,
6393 { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
6394 #ifndef DISASM_ONLY
6396 0xc00000007ff00000ULL,
6397 0xfff8000000000000ULL,
6398 0ULL,
6399 0ULL,
6400 0ULL
6403 0x0000000041400000ULL,
6404 0x1968000000000000ULL,
6405 -1ULL,
6406 -1ULL,
6407 -1ULL
6409 #endif
6411 { NULL, TILEGX_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } },
6412 #ifndef DISASM_ONLY
6413 { 0, }, { 0, }
6414 #endif
6417 #define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6))
6418 #define CHILD(array_index) (TILEGX_OPC_NONE + (array_index))
6420 static const unsigned short decode_X0_fsm[936] =
6422 BITFIELD(22, 9) /* index 0 */,
6423 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6424 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6425 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6426 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6427 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6428 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6429 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6430 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6431 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6432 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6433 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6434 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6435 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6436 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6437 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6438 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6439 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6440 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6441 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6442 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6443 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6444 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6445 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6446 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6447 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6448 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6449 CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI,
6450 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6451 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6452 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6453 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6454 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6455 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6456 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6457 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6458 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6459 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6460 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6461 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6462 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6463 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6464 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6465 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE,
6466 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6467 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6468 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6469 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BFEXTS,
6470 TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTU,
6471 TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFINS,
6472 TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_MM,
6473 TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_NONE,
6474 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6475 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6476 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6477 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6478 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6479 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6480 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6481 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(528), CHILD(578),
6482 CHILD(583), CHILD(588), CHILD(593), CHILD(598), TILEGX_OPC_NONE,
6483 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6484 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6485 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6486 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6487 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6488 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6489 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6490 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6491 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6492 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6493 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6494 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6495 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6496 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6497 TILEGX_OPC_NONE, CHILD(603), CHILD(620), CHILD(637), CHILD(654), CHILD(671),
6498 CHILD(703), CHILD(797), CHILD(814), CHILD(831), CHILD(848), CHILD(865),
6499 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6500 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6501 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6502 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6503 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6504 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6505 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6506 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6507 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6508 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6509 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6510 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6511 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6512 TILEGX_OPC_NONE, CHILD(889), TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6513 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6514 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6515 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6516 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6517 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6518 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6519 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6520 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6521 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6522 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6523 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6524 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6525 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6526 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6527 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6528 TILEGX_OPC_NONE, CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6529 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6530 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6531 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6532 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6533 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6534 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6535 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6536 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6537 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6538 CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6539 BITFIELD(6, 2) /* index 513 */,
6540 TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518),
6541 BITFIELD(8, 2) /* index 518 */,
6542 TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523),
6543 BITFIELD(10, 2) /* index 523 */,
6544 TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI,
6545 BITFIELD(20, 2) /* index 528 */,
6546 TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548),
6547 BITFIELD(6, 2) /* index 533 */,
6548 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538),
6549 BITFIELD(8, 2) /* index 538 */,
6550 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543),
6551 BITFIELD(10, 2) /* index 543 */,
6552 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
6553 BITFIELD(0, 2) /* index 548 */,
6554 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553),
6555 BITFIELD(2, 2) /* index 553 */,
6556 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558),
6557 BITFIELD(4, 2) /* index 558 */,
6558 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563),
6559 BITFIELD(6, 2) /* index 563 */,
6560 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568),
6561 BITFIELD(8, 2) /* index 568 */,
6562 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573),
6563 BITFIELD(10, 2) /* index 573 */,
6564 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
6565 BITFIELD(20, 2) /* index 578 */,
6566 TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, TILEGX_OPC_ORI,
6567 BITFIELD(20, 2) /* index 583 */,
6568 TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, TILEGX_OPC_V1CMPLTSI,
6569 TILEGX_OPC_V1CMPLTUI,
6570 BITFIELD(20, 2) /* index 588 */,
6571 TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, TILEGX_OPC_V2ADDI,
6572 TILEGX_OPC_V2CMPEQI,
6573 BITFIELD(20, 2) /* index 593 */,
6574 TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, TILEGX_OPC_V2MAXSI,
6575 TILEGX_OPC_V2MINSI,
6576 BITFIELD(20, 2) /* index 598 */,
6577 TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6578 BITFIELD(18, 4) /* index 603 */,
6579 TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD,
6580 TILEGX_OPC_AND, TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_CMPEQ,
6581 TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
6582 TILEGX_OPC_CMPNE, TILEGX_OPC_CMULAF, TILEGX_OPC_CMULA, TILEGX_OPC_CMULFR,
6583 BITFIELD(18, 4) /* index 620 */,
6584 TILEGX_OPC_CMULF, TILEGX_OPC_CMULHR, TILEGX_OPC_CMULH, TILEGX_OPC_CMUL,
6585 TILEGX_OPC_CRC32_32, TILEGX_OPC_CRC32_8, TILEGX_OPC_DBLALIGN2,
6586 TILEGX_OPC_DBLALIGN4, TILEGX_OPC_DBLALIGN6, TILEGX_OPC_DBLALIGN,
6587 TILEGX_OPC_FDOUBLE_ADDSUB, TILEGX_OPC_FDOUBLE_ADD_FLAGS,
6588 TILEGX_OPC_FDOUBLE_MUL_FLAGS, TILEGX_OPC_FDOUBLE_PACK1,
6589 TILEGX_OPC_FDOUBLE_PACK2, TILEGX_OPC_FDOUBLE_SUB_FLAGS,
6590 BITFIELD(18, 4) /* index 637 */,
6591 TILEGX_OPC_FDOUBLE_UNPACK_MAX, TILEGX_OPC_FDOUBLE_UNPACK_MIN,
6592 TILEGX_OPC_FSINGLE_ADD1, TILEGX_OPC_FSINGLE_ADDSUB2,
6593 TILEGX_OPC_FSINGLE_MUL1, TILEGX_OPC_FSINGLE_MUL2, TILEGX_OPC_FSINGLE_PACK2,
6594 TILEGX_OPC_FSINGLE_SUB1, TILEGX_OPC_MNZ, TILEGX_OPC_MULAX,
6595 TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HS_HU, TILEGX_OPC_MULA_HS_LS,
6596 TILEGX_OPC_MULA_HS_LU, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_HU_LS,
6597 BITFIELD(18, 4) /* index 654 */,
6598 TILEGX_OPC_MULA_HU_LU, TILEGX_OPC_MULA_LS_LS, TILEGX_OPC_MULA_LS_LU,
6599 TILEGX_OPC_MULA_LU_LU, TILEGX_OPC_MULX, TILEGX_OPC_MUL_HS_HS,
6600 TILEGX_OPC_MUL_HS_HU, TILEGX_OPC_MUL_HS_LS, TILEGX_OPC_MUL_HS_LU,
6601 TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_HU_LS, TILEGX_OPC_MUL_HU_LU,
6602 TILEGX_OPC_MUL_LS_LS, TILEGX_OPC_MUL_LS_LU, TILEGX_OPC_MUL_LU_LU,
6603 TILEGX_OPC_MZ,
6604 BITFIELD(18, 4) /* index 671 */,
6605 TILEGX_OPC_NOR, CHILD(688), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX,
6606 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD,
6607 TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL,
6608 TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_SHUFFLEBYTES,
6609 TILEGX_OPC_SUBXSC,
6610 BITFIELD(12, 2) /* index 688 */,
6611 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(693),
6612 BITFIELD(14, 2) /* index 693 */,
6613 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(698),
6614 BITFIELD(16, 2) /* index 698 */,
6615 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
6616 BITFIELD(18, 4) /* index 703 */,
6617 TILEGX_OPC_SUBX, TILEGX_OPC_SUB, CHILD(720), TILEGX_OPC_V1ADDUC,
6618 TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADIFFU, TILEGX_OPC_V1AVGU,
6619 TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU,
6620 TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE,
6621 TILEGX_OPC_V1DDOTPUSA, TILEGX_OPC_V1DDOTPUS, TILEGX_OPC_V1DOTPA,
6622 BITFIELD(12, 4) /* index 720 */,
6623 TILEGX_OPC_NONE, CHILD(737), CHILD(742), CHILD(747), CHILD(752), CHILD(757),
6624 CHILD(762), CHILD(767), CHILD(772), CHILD(777), CHILD(782), CHILD(787),
6625 CHILD(792), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6626 BITFIELD(16, 2) /* index 737 */,
6627 TILEGX_OPC_CLZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6628 BITFIELD(16, 2) /* index 742 */,
6629 TILEGX_OPC_CTZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6630 BITFIELD(16, 2) /* index 747 */,
6631 TILEGX_OPC_FNOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6632 BITFIELD(16, 2) /* index 752 */,
6633 TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6634 BITFIELD(16, 2) /* index 757 */,
6635 TILEGX_OPC_NOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6636 BITFIELD(16, 2) /* index 762 */,
6637 TILEGX_OPC_PCNT, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6638 BITFIELD(16, 2) /* index 767 */,
6639 TILEGX_OPC_REVBITS, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6640 BITFIELD(16, 2) /* index 772 */,
6641 TILEGX_OPC_REVBYTES, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6642 BITFIELD(16, 2) /* index 777 */,
6643 TILEGX_OPC_TBLIDXB0, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6644 BITFIELD(16, 2) /* index 782 */,
6645 TILEGX_OPC_TBLIDXB1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6646 BITFIELD(16, 2) /* index 787 */,
6647 TILEGX_OPC_TBLIDXB2, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6648 BITFIELD(16, 2) /* index 792 */,
6649 TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6650 BITFIELD(18, 4) /* index 797 */,
6651 TILEGX_OPC_V1DOTPUSA, TILEGX_OPC_V1DOTPUS, TILEGX_OPC_V1DOTP,
6652 TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1MAXU,
6653 TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MULTU, TILEGX_OPC_V1MULUS,
6654 TILEGX_OPC_V1MULU, TILEGX_OPC_V1MZ, TILEGX_OPC_V1SADAU, TILEGX_OPC_V1SADU,
6655 TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS,
6656 BITFIELD(18, 4) /* index 814 */,
6657 TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC,
6658 TILEGX_OPC_V2ADD, TILEGX_OPC_V2ADIFFS, TILEGX_OPC_V2AVGS,
6659 TILEGX_OPC_V2CMPEQ, TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU,
6660 TILEGX_OPC_V2CMPLTS, TILEGX_OPC_V2CMPLTU, TILEGX_OPC_V2CMPNE,
6661 TILEGX_OPC_V2DOTPA, TILEGX_OPC_V2DOTP, TILEGX_OPC_V2INT_H,
6662 BITFIELD(18, 4) /* index 831 */,
6663 TILEGX_OPC_V2INT_L, TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ,
6664 TILEGX_OPC_V2MULFSC, TILEGX_OPC_V2MULS, TILEGX_OPC_V2MULTS, TILEGX_OPC_V2MZ,
6665 TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC,
6666 TILEGX_OPC_V2SADAS, TILEGX_OPC_V2SADAU, TILEGX_OPC_V2SADS,
6667 TILEGX_OPC_V2SADU, TILEGX_OPC_V2SHLSC,
6668 BITFIELD(18, 4) /* index 848 */,
6669 TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, TILEGX_OPC_V2SUBSC,
6670 TILEGX_OPC_V2SUB, TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H,
6671 TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC,
6672 TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC,
6673 TILEGX_OPC_V4SUB,
6674 BITFIELD(18, 3) /* index 865 */,
6675 CHILD(874), CHILD(877), CHILD(880), CHILD(883), CHILD(886), TILEGX_OPC_NONE,
6676 TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6677 BITFIELD(21, 1) /* index 874 */,
6678 TILEGX_OPC_XOR, TILEGX_OPC_NONE,
6679 BITFIELD(21, 1) /* index 877 */,
6680 TILEGX_OPC_V1DDOTPUA, TILEGX_OPC_NONE,
6681 BITFIELD(21, 1) /* index 880 */,
6682 TILEGX_OPC_V1DDOTPU, TILEGX_OPC_NONE,
6683 BITFIELD(21, 1) /* index 883 */,
6684 TILEGX_OPC_V1DOTPUA, TILEGX_OPC_NONE,
6685 BITFIELD(21, 1) /* index 886 */,
6686 TILEGX_OPC_V1DOTPU, TILEGX_OPC_NONE,
6687 BITFIELD(18, 4) /* index 889 */,
6688 TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI,
6689 TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI,
6690 TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI,
6691 TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6692 TILEGX_OPC_NONE,
6693 BITFIELD(0, 2) /* index 906 */,
6694 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6695 CHILD(911),
6696 BITFIELD(2, 2) /* index 911 */,
6697 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6698 CHILD(916),
6699 BITFIELD(4, 2) /* index 916 */,
6700 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6701 CHILD(921),
6702 BITFIELD(6, 2) /* index 921 */,
6703 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6704 CHILD(926),
6705 BITFIELD(8, 2) /* index 926 */,
6706 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6707 CHILD(931),
6708 BITFIELD(10, 2) /* index 931 */,
6709 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6710 TILEGX_OPC_INFOL,
6713 static const unsigned short decode_X1_fsm[1266] =
6715 BITFIELD(53, 9) /* index 0 */,
6716 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6717 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6718 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6719 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6720 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6721 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6722 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6723 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6724 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6725 CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6726 CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI,
6727 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6728 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6729 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6730 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6731 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6732 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6733 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6734 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6735 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6736 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6737 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6738 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6739 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6740 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6741 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6742 TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE,
6743 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6744 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6745 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6746 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6747 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6748 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6749 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6750 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BEQZT,
6751 TILEGX_OPC_BEQZT, TILEGX_OPC_BEQZ, TILEGX_OPC_BEQZ, TILEGX_OPC_BGEZT,
6752 TILEGX_OPC_BGEZT, TILEGX_OPC_BGEZ, TILEGX_OPC_BGEZ, TILEGX_OPC_BGTZT,
6753 TILEGX_OPC_BGTZT, TILEGX_OPC_BGTZ, TILEGX_OPC_BGTZ, TILEGX_OPC_BLBCT,
6754 TILEGX_OPC_BLBCT, TILEGX_OPC_BLBC, TILEGX_OPC_BLBC, TILEGX_OPC_BLBST,
6755 TILEGX_OPC_BLBST, TILEGX_OPC_BLBS, TILEGX_OPC_BLBS, TILEGX_OPC_BLEZT,
6756 TILEGX_OPC_BLEZT, TILEGX_OPC_BLEZ, TILEGX_OPC_BLEZ, TILEGX_OPC_BLTZT,
6757 TILEGX_OPC_BLTZT, TILEGX_OPC_BLTZ, TILEGX_OPC_BLTZ, TILEGX_OPC_BNEZT,
6758 TILEGX_OPC_BNEZT, TILEGX_OPC_BNEZ, TILEGX_OPC_BNEZ, CHILD(528), CHILD(578),
6759 CHILD(598), CHILD(703), CHILD(723), CHILD(728), CHILD(753), CHILD(758),
6760 CHILD(763), CHILD(768), CHILD(773), CHILD(778), TILEGX_OPC_NONE,
6761 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6762 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6763 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6764 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6765 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6766 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6767 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6768 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6769 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6770 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6771 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6772 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6773 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_JAL,
6774 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6775 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6776 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6777 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6778 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6779 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6780 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6781 TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_J, TILEGX_OPC_J,
6782 TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6783 TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6784 TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6785 TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6786 TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6787 TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6788 CHILD(783), CHILD(800), CHILD(832), CHILD(849), CHILD(1168), CHILD(1185),
6789 CHILD(1202), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6790 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6791 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6792 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6793 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6794 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6795 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6796 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6797 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6798 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6799 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6800 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6801 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6802 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6803 TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1219), TILEGX_OPC_NONE,
6804 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6805 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6806 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6807 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6808 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6809 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6810 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6811 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6812 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6813 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6814 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6815 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6816 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6817 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6818 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6819 TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1236), CHILD(1236), CHILD(1236),
6820 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6821 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6822 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6823 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6824 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6825 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6826 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6827 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6828 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6829 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6830 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6831 CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
6832 CHILD(1236),
6833 BITFIELD(37, 2) /* index 513 */,
6834 TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518),
6835 BITFIELD(39, 2) /* index 518 */,
6836 TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523),
6837 BITFIELD(41, 2) /* index 523 */,
6838 TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI,
6839 BITFIELD(51, 2) /* index 528 */,
6840 TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548),
6841 BITFIELD(37, 2) /* index 533 */,
6842 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538),
6843 BITFIELD(39, 2) /* index 538 */,
6844 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543),
6845 BITFIELD(41, 2) /* index 543 */,
6846 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
6847 BITFIELD(31, 2) /* index 548 */,
6848 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553),
6849 BITFIELD(33, 2) /* index 553 */,
6850 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558),
6851 BITFIELD(35, 2) /* index 558 */,
6852 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563),
6853 BITFIELD(37, 2) /* index 563 */,
6854 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568),
6855 BITFIELD(39, 2) /* index 568 */,
6856 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573),
6857 BITFIELD(41, 2) /* index 573 */,
6858 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
6859 BITFIELD(51, 2) /* index 578 */,
6860 TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, CHILD(583),
6861 BITFIELD(31, 2) /* index 583 */,
6862 TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(588),
6863 BITFIELD(33, 2) /* index 588 */,
6864 TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(593),
6865 BITFIELD(35, 2) /* index 593 */,
6866 TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD,
6867 TILEGX_OPC_PREFETCH_ADD_L1_FAULT,
6868 BITFIELD(51, 2) /* index 598 */,
6869 CHILD(603), CHILD(618), CHILD(633), CHILD(648),
6870 BITFIELD(31, 2) /* index 603 */,
6871 TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(608),
6872 BITFIELD(33, 2) /* index 608 */,
6873 TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(613),
6874 BITFIELD(35, 2) /* index 613 */,
6875 TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD,
6876 TILEGX_OPC_PREFETCH_ADD_L1,
6877 BITFIELD(31, 2) /* index 618 */,
6878 TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(623),
6879 BITFIELD(33, 2) /* index 623 */,
6880 TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(628),
6881 BITFIELD(35, 2) /* index 628 */,
6882 TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD,
6883 TILEGX_OPC_PREFETCH_ADD_L2_FAULT,
6884 BITFIELD(31, 2) /* index 633 */,
6885 TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(638),
6886 BITFIELD(33, 2) /* index 638 */,
6887 TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(643),
6888 BITFIELD(35, 2) /* index 643 */,
6889 TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD,
6890 TILEGX_OPC_PREFETCH_ADD_L2,
6891 BITFIELD(31, 2) /* index 648 */,
6892 CHILD(653), CHILD(653), CHILD(653), CHILD(673),
6893 BITFIELD(43, 2) /* index 653 */,
6894 CHILD(658), TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
6895 BITFIELD(45, 2) /* index 658 */,
6896 CHILD(663), TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
6897 BITFIELD(47, 2) /* index 663 */,
6898 CHILD(668), TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
6899 BITFIELD(49, 2) /* index 668 */,
6900 TILEGX_OPC_LD4S_TLS, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
6901 TILEGX_OPC_LD4S_ADD,
6902 BITFIELD(33, 2) /* index 673 */,
6903 CHILD(653), CHILD(653), CHILD(653), CHILD(678),
6904 BITFIELD(35, 2) /* index 678 */,
6905 CHILD(653), CHILD(653), CHILD(653), CHILD(683),
6906 BITFIELD(43, 2) /* index 683 */,
6907 CHILD(688), TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6908 TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6909 BITFIELD(45, 2) /* index 688 */,
6910 CHILD(693), TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6911 TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6912 BITFIELD(47, 2) /* index 693 */,
6913 CHILD(698), TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6914 TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6915 BITFIELD(49, 2) /* index 698 */,
6916 TILEGX_OPC_LD4S_TLS, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6917 TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6918 BITFIELD(51, 2) /* index 703 */,
6919 CHILD(708), TILEGX_OPC_LDNT1S_ADD, TILEGX_OPC_LDNT1U_ADD,
6920 TILEGX_OPC_LDNT2S_ADD,
6921 BITFIELD(31, 2) /* index 708 */,
6922 TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(713),
6923 BITFIELD(33, 2) /* index 713 */,
6924 TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(718),
6925 BITFIELD(35, 2) /* index 718 */,
6926 TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD,
6927 TILEGX_OPC_PREFETCH_ADD_L3,
6928 BITFIELD(51, 2) /* index 723 */,
6929 TILEGX_OPC_LDNT2U_ADD, TILEGX_OPC_LDNT4S_ADD, TILEGX_OPC_LDNT4U_ADD,
6930 TILEGX_OPC_LDNT_ADD,
6931 BITFIELD(51, 2) /* index 728 */,
6932 CHILD(733), TILEGX_OPC_LDNA_ADD, TILEGX_OPC_MFSPR, TILEGX_OPC_MTSPR,
6933 BITFIELD(43, 2) /* index 733 */,
6934 CHILD(738), TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
6935 BITFIELD(45, 2) /* index 738 */,
6936 CHILD(743), TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
6937 BITFIELD(47, 2) /* index 743 */,
6938 CHILD(748), TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
6939 BITFIELD(49, 2) /* index 748 */,
6940 TILEGX_OPC_LD_TLS, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
6941 BITFIELD(51, 2) /* index 753 */,
6942 TILEGX_OPC_ORI, TILEGX_OPC_ST1_ADD, TILEGX_OPC_ST2_ADD, TILEGX_OPC_ST4_ADD,
6943 BITFIELD(51, 2) /* index 758 */,
6944 TILEGX_OPC_STNT1_ADD, TILEGX_OPC_STNT2_ADD, TILEGX_OPC_STNT4_ADD,
6945 TILEGX_OPC_STNT_ADD,
6946 BITFIELD(51, 2) /* index 763 */,
6947 TILEGX_OPC_ST_ADD, TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI,
6948 TILEGX_OPC_V1CMPLTSI,
6949 BITFIELD(51, 2) /* index 768 */,
6950 TILEGX_OPC_V1CMPLTUI, TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI,
6951 TILEGX_OPC_V2ADDI,
6952 BITFIELD(51, 2) /* index 773 */,
6953 TILEGX_OPC_V2CMPEQI, TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI,
6954 TILEGX_OPC_V2MAXSI,
6955 BITFIELD(51, 2) /* index 778 */,
6956 TILEGX_OPC_V2MINSI, TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6957 BITFIELD(49, 4) /* index 783 */,
6958 TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD,
6959 TILEGX_OPC_AND, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPEXCH4, TILEGX_OPC_CMPEXCH,
6960 TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
6961 TILEGX_OPC_CMPNE, TILEGX_OPC_DBLALIGN2, TILEGX_OPC_DBLALIGN4,
6962 TILEGX_OPC_DBLALIGN6,
6963 BITFIELD(49, 4) /* index 800 */,
6964 TILEGX_OPC_EXCH4, TILEGX_OPC_EXCH, TILEGX_OPC_FETCHADD4,
6965 TILEGX_OPC_FETCHADDGEZ4, TILEGX_OPC_FETCHADDGEZ, TILEGX_OPC_FETCHADD,
6966 TILEGX_OPC_FETCHAND4, TILEGX_OPC_FETCHAND, TILEGX_OPC_FETCHOR4,
6967 TILEGX_OPC_FETCHOR, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, TILEGX_OPC_NOR,
6968 CHILD(817), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX,
6969 BITFIELD(43, 2) /* index 817 */,
6970 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(822),
6971 BITFIELD(45, 2) /* index 822 */,
6972 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(827),
6973 BITFIELD(47, 2) /* index 827 */,
6974 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
6975 BITFIELD(49, 4) /* index 832 */,
6976 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD,
6977 TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL,
6978 TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_ST1,
6979 TILEGX_OPC_ST2, TILEGX_OPC_ST4, TILEGX_OPC_STNT1, TILEGX_OPC_STNT2,
6980 TILEGX_OPC_STNT4,
6981 BITFIELD(46, 7) /* index 849 */,
6982 TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT,
6983 TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT,
6984 TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST,
6985 TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_SUBXSC,
6986 TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC,
6987 TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBX,
6988 TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX,
6989 TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
6990 TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB,
6991 TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, CHILD(978), CHILD(987),
6992 CHILD(1066), CHILD(1150), CHILD(1159), TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6993 TILEGX_OPC_NONE, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC,
6994 TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC,
6995 TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD,
6996 TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD,
6997 TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
6998 TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
6999 TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
7000 TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES,
7001 TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES,
7002 TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU,
7003 TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU,
7004 TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU,
7005 TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
7006 TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
7007 TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
7008 TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU,
7009 TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU,
7010 TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE,
7011 TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE,
7012 TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE,
7013 TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
7014 TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
7015 TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
7016 TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
7017 TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
7018 TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
7019 BITFIELD(43, 3) /* index 978 */,
7020 TILEGX_OPC_NONE, TILEGX_OPC_DRAIN, TILEGX_OPC_DTLBPR, TILEGX_OPC_FINV,
7021 TILEGX_OPC_FLUSHWB, TILEGX_OPC_FLUSH, TILEGX_OPC_FNOP, TILEGX_OPC_ICOH,
7022 BITFIELD(43, 3) /* index 987 */,
7023 CHILD(996), TILEGX_OPC_INV, TILEGX_OPC_IRET, TILEGX_OPC_JALRP,
7024 TILEGX_OPC_JALR, TILEGX_OPC_JRP, TILEGX_OPC_JR, CHILD(1051),
7025 BITFIELD(31, 2) /* index 996 */,
7026 CHILD(1001), CHILD(1026), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7027 BITFIELD(33, 2) /* index 1001 */,
7028 TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(1006),
7029 BITFIELD(35, 2) /* index 1006 */,
7030 TILEGX_OPC_ILL, CHILD(1011), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7031 BITFIELD(37, 2) /* index 1011 */,
7032 TILEGX_OPC_ILL, CHILD(1016), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7033 BITFIELD(39, 2) /* index 1016 */,
7034 TILEGX_OPC_ILL, CHILD(1021), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7035 BITFIELD(41, 2) /* index 1021 */,
7036 TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_BPT, TILEGX_OPC_ILL,
7037 BITFIELD(33, 2) /* index 1026 */,
7038 TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(1031),
7039 BITFIELD(35, 2) /* index 1031 */,
7040 TILEGX_OPC_ILL, CHILD(1036), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7041 BITFIELD(37, 2) /* index 1036 */,
7042 TILEGX_OPC_ILL, CHILD(1041), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7043 BITFIELD(39, 2) /* index 1041 */,
7044 TILEGX_OPC_ILL, CHILD(1046), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
7045 BITFIELD(41, 2) /* index 1046 */,
7046 TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_RAISE, TILEGX_OPC_ILL,
7047 BITFIELD(31, 2) /* index 1051 */,
7048 TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1056),
7049 BITFIELD(33, 2) /* index 1056 */,
7050 TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1061),
7051 BITFIELD(35, 2) /* index 1061 */,
7052 TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S,
7053 TILEGX_OPC_PREFETCH_L1_FAULT,
7054 BITFIELD(43, 3) /* index 1066 */,
7055 CHILD(1075), CHILD(1090), CHILD(1105), CHILD(1120), CHILD(1135),
7056 TILEGX_OPC_LDNA, TILEGX_OPC_LDNT1S, TILEGX_OPC_LDNT1U,
7057 BITFIELD(31, 2) /* index 1075 */,
7058 TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1080),
7059 BITFIELD(33, 2) /* index 1080 */,
7060 TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1085),
7061 BITFIELD(35, 2) /* index 1085 */,
7062 TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH,
7063 BITFIELD(31, 2) /* index 1090 */,
7064 TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1095),
7065 BITFIELD(33, 2) /* index 1095 */,
7066 TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1100),
7067 BITFIELD(35, 2) /* index 1100 */,
7068 TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S,
7069 TILEGX_OPC_PREFETCH_L2_FAULT,
7070 BITFIELD(31, 2) /* index 1105 */,
7071 TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1110),
7072 BITFIELD(33, 2) /* index 1110 */,
7073 TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1115),
7074 BITFIELD(35, 2) /* index 1115 */,
7075 TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2,
7076 BITFIELD(31, 2) /* index 1120 */,
7077 TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1125),
7078 BITFIELD(33, 2) /* index 1125 */,
7079 TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1130),
7080 BITFIELD(35, 2) /* index 1130 */,
7081 TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S,
7082 TILEGX_OPC_PREFETCH_L3_FAULT,
7083 BITFIELD(31, 2) /* index 1135 */,
7084 TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1140),
7085 BITFIELD(33, 2) /* index 1140 */,
7086 TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1145),
7087 BITFIELD(35, 2) /* index 1145 */,
7088 TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3,
7089 BITFIELD(43, 3) /* index 1150 */,
7090 TILEGX_OPC_LDNT2S, TILEGX_OPC_LDNT2U, TILEGX_OPC_LDNT4S, TILEGX_OPC_LDNT4U,
7091 TILEGX_OPC_LDNT, TILEGX_OPC_LD, TILEGX_OPC_LNK, TILEGX_OPC_MF,
7092 BITFIELD(43, 3) /* index 1159 */,
7093 TILEGX_OPC_NAP, TILEGX_OPC_NOP, TILEGX_OPC_SWINT0, TILEGX_OPC_SWINT1,
7094 TILEGX_OPC_SWINT2, TILEGX_OPC_SWINT3, TILEGX_OPC_WH64, TILEGX_OPC_NONE,
7095 BITFIELD(49, 4) /* index 1168 */,
7096 TILEGX_OPC_V1MAXU, TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MZ,
7097 TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC,
7098 TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, TILEGX_OPC_V2ADD, TILEGX_OPC_V2CMPEQ,
7099 TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, TILEGX_OPC_V2CMPLTS,
7100 TILEGX_OPC_V2CMPLTU,
7101 BITFIELD(49, 4) /* index 1185 */,
7102 TILEGX_OPC_V2CMPNE, TILEGX_OPC_V2INT_H, TILEGX_OPC_V2INT_L,
7103 TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, TILEGX_OPC_V2MZ,
7104 TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC,
7105 TILEGX_OPC_V2SHLSC, TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU,
7106 TILEGX_OPC_V2SUBSC, TILEGX_OPC_V2SUB,
7107 BITFIELD(49, 4) /* index 1202 */,
7108 TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H,
7109 TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC,
7110 TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC,
7111 TILEGX_OPC_V4SUB, TILEGX_OPC_XOR, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7112 TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7113 BITFIELD(49, 4) /* index 1219 */,
7114 TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI,
7115 TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI,
7116 TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI,
7117 TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7118 TILEGX_OPC_NONE,
7119 BITFIELD(31, 2) /* index 1236 */,
7120 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7121 CHILD(1241),
7122 BITFIELD(33, 2) /* index 1241 */,
7123 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7124 CHILD(1246),
7125 BITFIELD(35, 2) /* index 1246 */,
7126 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7127 CHILD(1251),
7128 BITFIELD(37, 2) /* index 1251 */,
7129 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7130 CHILD(1256),
7131 BITFIELD(39, 2) /* index 1256 */,
7132 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7133 CHILD(1261),
7134 BITFIELD(41, 2) /* index 1261 */,
7135 TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7136 TILEGX_OPC_INFOL,
7139 static const unsigned short decode_Y0_fsm[178] =
7141 BITFIELD(27, 4) /* index 0 */,
7142 CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI,
7143 TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(118), CHILD(123),
7144 CHILD(128), CHILD(133), CHILD(153), CHILD(158), CHILD(163), CHILD(168),
7145 CHILD(173),
7146 BITFIELD(6, 2) /* index 17 */,
7147 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22),
7148 BITFIELD(8, 2) /* index 22 */,
7149 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27),
7150 BITFIELD(10, 2) /* index 27 */,
7151 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
7152 BITFIELD(0, 2) /* index 32 */,
7153 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37),
7154 BITFIELD(2, 2) /* index 37 */,
7155 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42),
7156 BITFIELD(4, 2) /* index 42 */,
7157 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47),
7158 BITFIELD(6, 2) /* index 47 */,
7159 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52),
7160 BITFIELD(8, 2) /* index 52 */,
7161 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57),
7162 BITFIELD(10, 2) /* index 57 */,
7163 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
7164 BITFIELD(18, 2) /* index 62 */,
7165 TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
7166 BITFIELD(15, 5) /* index 67 */,
7167 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
7168 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
7169 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD,
7170 TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
7171 TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
7172 TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD,
7173 TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD,
7174 TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(100),
7175 CHILD(109), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7176 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7177 BITFIELD(12, 3) /* index 100 */,
7178 TILEGX_OPC_NONE, TILEGX_OPC_CLZ, TILEGX_OPC_CTZ, TILEGX_OPC_FNOP,
7179 TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NOP, TILEGX_OPC_PCNT,
7180 TILEGX_OPC_REVBITS,
7181 BITFIELD(12, 3) /* index 109 */,
7182 TILEGX_OPC_REVBYTES, TILEGX_OPC_TBLIDXB0, TILEGX_OPC_TBLIDXB1,
7183 TILEGX_OPC_TBLIDXB2, TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7184 TILEGX_OPC_NONE,
7185 BITFIELD(18, 2) /* index 118 */,
7186 TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
7187 BITFIELD(18, 2) /* index 123 */,
7188 TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, TILEGX_OPC_MULAX, TILEGX_OPC_MULX,
7189 BITFIELD(18, 2) /* index 128 */,
7190 TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_MNZ, TILEGX_OPC_MZ,
7191 BITFIELD(18, 2) /* index 133 */,
7192 TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(138), TILEGX_OPC_XOR,
7193 BITFIELD(12, 2) /* index 138 */,
7194 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(143),
7195 BITFIELD(14, 2) /* index 143 */,
7196 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(148),
7197 BITFIELD(16, 2) /* index 148 */,
7198 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
7199 BITFIELD(18, 2) /* index 153 */,
7200 TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU,
7201 BITFIELD(18, 2) /* index 158 */,
7202 TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX,
7203 TILEGX_OPC_SHL3ADDX,
7204 BITFIELD(18, 2) /* index 163 */,
7205 TILEGX_OPC_MUL_HS_HS, TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_LS_LS,
7206 TILEGX_OPC_MUL_LU_LU,
7207 BITFIELD(18, 2) /* index 168 */,
7208 TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_LS_LS,
7209 TILEGX_OPC_MULA_LU_LU,
7210 BITFIELD(18, 2) /* index 173 */,
7211 TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI,
7214 static const unsigned short decode_Y1_fsm[167] =
7216 BITFIELD(58, 4) /* index 0 */,
7217 TILEGX_OPC_NONE, CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI,
7218 TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(117), CHILD(122),
7219 CHILD(127), CHILD(132), CHILD(152), CHILD(157), CHILD(162), TILEGX_OPC_NONE,
7220 BITFIELD(37, 2) /* index 17 */,
7221 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22),
7222 BITFIELD(39, 2) /* index 22 */,
7223 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27),
7224 BITFIELD(41, 2) /* index 27 */,
7225 TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
7226 BITFIELD(31, 2) /* index 32 */,
7227 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37),
7228 BITFIELD(33, 2) /* index 37 */,
7229 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42),
7230 BITFIELD(35, 2) /* index 42 */,
7231 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47),
7232 BITFIELD(37, 2) /* index 47 */,
7233 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52),
7234 BITFIELD(39, 2) /* index 52 */,
7235 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57),
7236 BITFIELD(41, 2) /* index 57 */,
7237 TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
7238 BITFIELD(49, 2) /* index 62 */,
7239 TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
7240 BITFIELD(47, 4) /* index 67 */,
7241 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
7242 TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
7243 TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD,
7244 TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(84),
7245 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7246 BITFIELD(43, 3) /* index 84 */,
7247 CHILD(93), CHILD(96), CHILD(99), CHILD(102), CHILD(105), CHILD(108),
7248 CHILD(111), CHILD(114),
7249 BITFIELD(46, 1) /* index 93 */,
7250 TILEGX_OPC_NONE, TILEGX_OPC_FNOP,
7251 BITFIELD(46, 1) /* index 96 */,
7252 TILEGX_OPC_NONE, TILEGX_OPC_ILL,
7253 BITFIELD(46, 1) /* index 99 */,
7254 TILEGX_OPC_NONE, TILEGX_OPC_JALRP,
7255 BITFIELD(46, 1) /* index 102 */,
7256 TILEGX_OPC_NONE, TILEGX_OPC_JALR,
7257 BITFIELD(46, 1) /* index 105 */,
7258 TILEGX_OPC_NONE, TILEGX_OPC_JRP,
7259 BITFIELD(46, 1) /* index 108 */,
7260 TILEGX_OPC_NONE, TILEGX_OPC_JR,
7261 BITFIELD(46, 1) /* index 111 */,
7262 TILEGX_OPC_NONE, TILEGX_OPC_LNK,
7263 BITFIELD(46, 1) /* index 114 */,
7264 TILEGX_OPC_NONE, TILEGX_OPC_NOP,
7265 BITFIELD(49, 2) /* index 117 */,
7266 TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
7267 BITFIELD(49, 2) /* index 122 */,
7268 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE,
7269 BITFIELD(49, 2) /* index 127 */,
7270 TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_MNZ, TILEGX_OPC_MZ,
7271 BITFIELD(49, 2) /* index 132 */,
7272 TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(137), TILEGX_OPC_XOR,
7273 BITFIELD(43, 2) /* index 137 */,
7274 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(142),
7275 BITFIELD(45, 2) /* index 142 */,
7276 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(147),
7277 BITFIELD(47, 2) /* index 147 */,
7278 TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
7279 BITFIELD(49, 2) /* index 152 */,
7280 TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU,
7281 BITFIELD(49, 2) /* index 157 */,
7282 TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX,
7283 TILEGX_OPC_SHL3ADDX,
7284 BITFIELD(49, 2) /* index 162 */,
7285 TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI,
7288 static const unsigned short decode_Y2_fsm[118] =
7290 BITFIELD(62, 2) /* index 0 */,
7291 TILEGX_OPC_NONE, CHILD(5), CHILD(66), CHILD(109),
7292 BITFIELD(55, 3) /* index 5 */,
7293 CHILD(14), CHILD(14), CHILD(14), CHILD(17), CHILD(40), CHILD(40), CHILD(40),
7294 CHILD(43),
7295 BITFIELD(26, 1) /* index 14 */,
7296 TILEGX_OPC_LD1S, TILEGX_OPC_LD1U,
7297 BITFIELD(26, 1) /* index 17 */,
7298 CHILD(20), CHILD(30),
7299 BITFIELD(51, 2) /* index 20 */,
7300 TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(25),
7301 BITFIELD(53, 2) /* index 25 */,
7302 TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S,
7303 TILEGX_OPC_PREFETCH_L1_FAULT,
7304 BITFIELD(51, 2) /* index 30 */,
7305 TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(35),
7306 BITFIELD(53, 2) /* index 35 */,
7307 TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH,
7308 BITFIELD(26, 1) /* index 40 */,
7309 TILEGX_OPC_LD2S, TILEGX_OPC_LD2U,
7310 BITFIELD(26, 1) /* index 43 */,
7311 CHILD(46), CHILD(56),
7312 BITFIELD(51, 2) /* index 46 */,
7313 TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(51),
7314 BITFIELD(53, 2) /* index 51 */,
7315 TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S,
7316 TILEGX_OPC_PREFETCH_L2_FAULT,
7317 BITFIELD(51, 2) /* index 56 */,
7318 TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(61),
7319 BITFIELD(53, 2) /* index 61 */,
7320 TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2,
7321 BITFIELD(56, 2) /* index 66 */,
7322 CHILD(71), CHILD(74), CHILD(90), CHILD(93),
7323 BITFIELD(26, 1) /* index 71 */,
7324 TILEGX_OPC_NONE, TILEGX_OPC_LD4S,
7325 BITFIELD(26, 1) /* index 74 */,
7326 TILEGX_OPC_NONE, CHILD(77),
7327 BITFIELD(51, 2) /* index 77 */,
7328 TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(82),
7329 BITFIELD(53, 2) /* index 82 */,
7330 TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(87),
7331 BITFIELD(55, 1) /* index 87 */,
7332 TILEGX_OPC_LD4S, TILEGX_OPC_PREFETCH_L3_FAULT,
7333 BITFIELD(26, 1) /* index 90 */,
7334 TILEGX_OPC_LD4U, TILEGX_OPC_LD,
7335 BITFIELD(26, 1) /* index 93 */,
7336 CHILD(96), TILEGX_OPC_LD,
7337 BITFIELD(51, 2) /* index 96 */,
7338 TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(101),
7339 BITFIELD(53, 2) /* index 101 */,
7340 TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(106),
7341 BITFIELD(55, 1) /* index 106 */,
7342 TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3,
7343 BITFIELD(26, 1) /* index 109 */,
7344 CHILD(112), CHILD(115),
7345 BITFIELD(57, 1) /* index 112 */,
7346 TILEGX_OPC_ST1, TILEGX_OPC_ST4,
7347 BITFIELD(57, 1) /* index 115 */,
7348 TILEGX_OPC_ST2, TILEGX_OPC_ST,
7351 #undef BITFIELD
7352 #undef CHILD
7353 const unsigned short * const
7354 tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS] =
7356 decode_X0_fsm,
7357 decode_X1_fsm,
7358 decode_Y0_fsm,
7359 decode_Y1_fsm,
7360 decode_Y2_fsm
7362 const struct tilegx_operand tilegx_operands[35] =
7365 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X0),
7366 8, 1, 0, 0, 0, 0,
7367 create_Imm8_X0, get_Imm8_X0
7370 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X1),
7371 8, 1, 0, 0, 0, 0,
7372 create_Imm8_X1, get_Imm8_X1
7375 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y0),
7376 8, 1, 0, 0, 0, 0,
7377 create_Imm8_Y0, get_Imm8_Y0
7380 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y1),
7381 8, 1, 0, 0, 0, 0,
7382 create_Imm8_Y1, get_Imm8_Y1
7385 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X0_HW0_LAST),
7386 16, 1, 0, 0, 0, 0,
7387 create_Imm16_X0, get_Imm16_X0
7390 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X1_HW0_LAST),
7391 16, 1, 0, 0, 0, 0,
7392 create_Imm16_X1, get_Imm16_X1
7395 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7396 6, 0, 0, 1, 0, 0,
7397 create_Dest_X1, get_Dest_X1
7400 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7401 6, 0, 1, 0, 0, 0,
7402 create_SrcA_X1, get_SrcA_X1
7405 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7406 6, 0, 0, 1, 0, 0,
7407 create_Dest_X0, get_Dest_X0
7410 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7411 6, 0, 1, 0, 0, 0,
7412 create_SrcA_X0, get_SrcA_X0
7415 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7416 6, 0, 0, 1, 0, 0,
7417 create_Dest_Y0, get_Dest_Y0
7420 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7421 6, 0, 1, 0, 0, 0,
7422 create_SrcA_Y0, get_SrcA_Y0
7425 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7426 6, 0, 0, 1, 0, 0,
7427 create_Dest_Y1, get_Dest_Y1
7430 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7431 6, 0, 1, 0, 0, 0,
7432 create_SrcA_Y1, get_SrcA_Y1
7435 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7436 6, 0, 1, 0, 0, 0,
7437 create_SrcA_Y2, get_SrcA_Y2
7440 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7441 6, 0, 1, 1, 0, 0,
7442 create_SrcA_X1, get_SrcA_X1
7445 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7446 6, 0, 1, 0, 0, 0,
7447 create_SrcB_X0, get_SrcB_X0
7450 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7451 6, 0, 1, 0, 0, 0,
7452 create_SrcB_X1, get_SrcB_X1
7455 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7456 6, 0, 1, 0, 0, 0,
7457 create_SrcB_Y0, get_SrcB_Y0
7460 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7461 6, 0, 1, 0, 0, 0,
7462 create_SrcB_Y1, get_SrcB_Y1
7465 TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_BROFF_X1),
7466 17, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
7467 create_BrOff_X1, get_BrOff_X1
7470 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMSTART_X0),
7471 6, 0, 0, 0, 0, 0,
7472 create_BFStart_X0, get_BFStart_X0
7475 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMEND_X0),
7476 6, 0, 0, 0, 0, 0,
7477 create_BFEnd_X0, get_BFEnd_X0
7480 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7481 6, 0, 1, 1, 0, 0,
7482 create_Dest_X0, get_Dest_X0
7485 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7486 6, 0, 1, 1, 0, 0,
7487 create_Dest_Y0, get_Dest_Y0
7490 TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_JUMPOFF_X1),
7491 27, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
7492 create_JumpOff_X1, get_JumpOff_X1
7495 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7496 6, 0, 0, 1, 0, 0,
7497 create_SrcBDest_Y2, get_SrcBDest_Y2
7500 TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MF_IMM14_X1),
7501 14, 0, 0, 0, 0, 0,
7502 create_MF_Imm14_X1, get_MF_Imm14_X1
7505 TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MT_IMM14_X1),
7506 14, 0, 0, 0, 0, 0,
7507 create_MT_Imm14_X1, get_MT_Imm14_X1
7510 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X0),
7511 6, 0, 0, 0, 0, 0,
7512 create_ShAmt_X0, get_ShAmt_X0
7515 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X1),
7516 6, 0, 0, 0, 0, 0,
7517 create_ShAmt_X1, get_ShAmt_X1
7520 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y0),
7521 6, 0, 0, 0, 0, 0,
7522 create_ShAmt_Y0, get_ShAmt_Y0
7525 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y1),
7526 6, 0, 0, 0, 0, 0,
7527 create_ShAmt_Y1, get_ShAmt_Y1
7530 TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7531 6, 0, 1, 0, 0, 0,
7532 create_SrcBDest_Y2, get_SrcBDest_Y2
7535 TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_DEST_IMM8_X1),
7536 8, 1, 0, 0, 0, 0,
7537 create_Dest_Imm8_X1, get_Dest_Imm8_X1
7541 #ifndef DISASM_ONLY
7542 const struct tilegx_spr tilegx_sprs[] = {
7543 { 0, "MPL_MEM_ERROR_SET_0" },
7544 { 1, "MPL_MEM_ERROR_SET_1" },
7545 { 2, "MPL_MEM_ERROR_SET_2" },
7546 { 3, "MPL_MEM_ERROR_SET_3" },
7547 { 4, "MPL_MEM_ERROR" },
7548 { 5, "MEM_ERROR_CBOX_ADDR" },
7549 { 6, "MEM_ERROR_CBOX_STATUS" },
7550 { 7, "MEM_ERROR_ENABLE" },
7551 { 8, "MEM_ERROR_MBOX_ADDR" },
7552 { 9, "MEM_ERROR_MBOX_STATUS" },
7553 { 10, "SBOX_ERROR" },
7554 { 11, "XDN_DEMUX_ERROR" },
7555 { 256, "MPL_SINGLE_STEP_3_SET_0" },
7556 { 257, "MPL_SINGLE_STEP_3_SET_1" },
7557 { 258, "MPL_SINGLE_STEP_3_SET_2" },
7558 { 259, "MPL_SINGLE_STEP_3_SET_3" },
7559 { 260, "MPL_SINGLE_STEP_3" },
7560 { 261, "SINGLE_STEP_CONTROL_3" },
7561 { 512, "MPL_SINGLE_STEP_2_SET_0" },
7562 { 513, "MPL_SINGLE_STEP_2_SET_1" },
7563 { 514, "MPL_SINGLE_STEP_2_SET_2" },
7564 { 515, "MPL_SINGLE_STEP_2_SET_3" },
7565 { 516, "MPL_SINGLE_STEP_2" },
7566 { 517, "SINGLE_STEP_CONTROL_2" },
7567 { 768, "MPL_SINGLE_STEP_1_SET_0" },
7568 { 769, "MPL_SINGLE_STEP_1_SET_1" },
7569 { 770, "MPL_SINGLE_STEP_1_SET_2" },
7570 { 771, "MPL_SINGLE_STEP_1_SET_3" },
7571 { 772, "MPL_SINGLE_STEP_1" },
7572 { 773, "SINGLE_STEP_CONTROL_1" },
7573 { 1024, "MPL_SINGLE_STEP_0_SET_0" },
7574 { 1025, "MPL_SINGLE_STEP_0_SET_1" },
7575 { 1026, "MPL_SINGLE_STEP_0_SET_2" },
7576 { 1027, "MPL_SINGLE_STEP_0_SET_3" },
7577 { 1028, "MPL_SINGLE_STEP_0" },
7578 { 1029, "SINGLE_STEP_CONTROL_0" },
7579 { 1280, "MPL_IDN_COMPLETE_SET_0" },
7580 { 1281, "MPL_IDN_COMPLETE_SET_1" },
7581 { 1282, "MPL_IDN_COMPLETE_SET_2" },
7582 { 1283, "MPL_IDN_COMPLETE_SET_3" },
7583 { 1284, "MPL_IDN_COMPLETE" },
7584 { 1285, "IDN_COMPLETE_PENDING" },
7585 { 1536, "MPL_UDN_COMPLETE_SET_0" },
7586 { 1537, "MPL_UDN_COMPLETE_SET_1" },
7587 { 1538, "MPL_UDN_COMPLETE_SET_2" },
7588 { 1539, "MPL_UDN_COMPLETE_SET_3" },
7589 { 1540, "MPL_UDN_COMPLETE" },
7590 { 1541, "UDN_COMPLETE_PENDING" },
7591 { 1792, "MPL_ITLB_MISS_SET_0" },
7592 { 1793, "MPL_ITLB_MISS_SET_1" },
7593 { 1794, "MPL_ITLB_MISS_SET_2" },
7594 { 1795, "MPL_ITLB_MISS_SET_3" },
7595 { 1796, "MPL_ITLB_MISS" },
7596 { 1797, "ITLB_TSB_BASE_ADDR_0" },
7597 { 1798, "ITLB_TSB_BASE_ADDR_1" },
7598 { 1920, "ITLB_CURRENT_ATTR" },
7599 { 1921, "ITLB_CURRENT_PA" },
7600 { 1922, "ITLB_CURRENT_VA" },
7601 { 1923, "ITLB_INDEX" },
7602 { 1924, "ITLB_MATCH_0" },
7603 { 1925, "ITLB_PERF" },
7604 { 1926, "ITLB_PR" },
7605 { 1927, "ITLB_TSB_ADDR_0" },
7606 { 1928, "ITLB_TSB_ADDR_1" },
7607 { 1929, "ITLB_TSB_FILL_CURRENT_ATTR" },
7608 { 1930, "ITLB_TSB_FILL_MATCH" },
7609 { 1931, "NUMBER_ITLB" },
7610 { 1932, "REPLACEMENT_ITLB" },
7611 { 1933, "WIRED_ITLB" },
7612 { 2048, "MPL_ILL_SET_0" },
7613 { 2049, "MPL_ILL_SET_1" },
7614 { 2050, "MPL_ILL_SET_2" },
7615 { 2051, "MPL_ILL_SET_3" },
7616 { 2052, "MPL_ILL" },
7617 { 2304, "MPL_GPV_SET_0" },
7618 { 2305, "MPL_GPV_SET_1" },
7619 { 2306, "MPL_GPV_SET_2" },
7620 { 2307, "MPL_GPV_SET_3" },
7621 { 2308, "MPL_GPV" },
7622 { 2309, "GPV_REASON" },
7623 { 2560, "MPL_IDN_ACCESS_SET_0" },
7624 { 2561, "MPL_IDN_ACCESS_SET_1" },
7625 { 2562, "MPL_IDN_ACCESS_SET_2" },
7626 { 2563, "MPL_IDN_ACCESS_SET_3" },
7627 { 2564, "MPL_IDN_ACCESS" },
7628 { 2565, "IDN_DEMUX_COUNT_0" },
7629 { 2566, "IDN_DEMUX_COUNT_1" },
7630 { 2567, "IDN_FLUSH_EGRESS" },
7631 { 2568, "IDN_PENDING" },
7632 { 2569, "IDN_ROUTE_ORDER" },
7633 { 2570, "IDN_SP_FIFO_CNT" },
7634 { 2688, "IDN_DATA_AVAIL" },
7635 { 2816, "MPL_UDN_ACCESS_SET_0" },
7636 { 2817, "MPL_UDN_ACCESS_SET_1" },
7637 { 2818, "MPL_UDN_ACCESS_SET_2" },
7638 { 2819, "MPL_UDN_ACCESS_SET_3" },
7639 { 2820, "MPL_UDN_ACCESS" },
7640 { 2821, "UDN_DEMUX_COUNT_0" },
7641 { 2822, "UDN_DEMUX_COUNT_1" },
7642 { 2823, "UDN_DEMUX_COUNT_2" },
7643 { 2824, "UDN_DEMUX_COUNT_3" },
7644 { 2825, "UDN_FLUSH_EGRESS" },
7645 { 2826, "UDN_PENDING" },
7646 { 2827, "UDN_ROUTE_ORDER" },
7647 { 2828, "UDN_SP_FIFO_CNT" },
7648 { 2944, "UDN_DATA_AVAIL" },
7649 { 3072, "MPL_SWINT_3_SET_0" },
7650 { 3073, "MPL_SWINT_3_SET_1" },
7651 { 3074, "MPL_SWINT_3_SET_2" },
7652 { 3075, "MPL_SWINT_3_SET_3" },
7653 { 3076, "MPL_SWINT_3" },
7654 { 3328, "MPL_SWINT_2_SET_0" },
7655 { 3329, "MPL_SWINT_2_SET_1" },
7656 { 3330, "MPL_SWINT_2_SET_2" },
7657 { 3331, "MPL_SWINT_2_SET_3" },
7658 { 3332, "MPL_SWINT_2" },
7659 { 3584, "MPL_SWINT_1_SET_0" },
7660 { 3585, "MPL_SWINT_1_SET_1" },
7661 { 3586, "MPL_SWINT_1_SET_2" },
7662 { 3587, "MPL_SWINT_1_SET_3" },
7663 { 3588, "MPL_SWINT_1" },
7664 { 3840, "MPL_SWINT_0_SET_0" },
7665 { 3841, "MPL_SWINT_0_SET_1" },
7666 { 3842, "MPL_SWINT_0_SET_2" },
7667 { 3843, "MPL_SWINT_0_SET_3" },
7668 { 3844, "MPL_SWINT_0" },
7669 { 4096, "MPL_ILL_TRANS_SET_0" },
7670 { 4097, "MPL_ILL_TRANS_SET_1" },
7671 { 4098, "MPL_ILL_TRANS_SET_2" },
7672 { 4099, "MPL_ILL_TRANS_SET_3" },
7673 { 4100, "MPL_ILL_TRANS" },
7674 { 4101, "ILL_TRANS_REASON" },
7675 { 4102, "ILL_VA_PC" },
7676 { 4352, "MPL_UNALIGN_DATA_SET_0" },
7677 { 4353, "MPL_UNALIGN_DATA_SET_1" },
7678 { 4354, "MPL_UNALIGN_DATA_SET_2" },
7679 { 4355, "MPL_UNALIGN_DATA_SET_3" },
7680 { 4356, "MPL_UNALIGN_DATA" },
7681 { 4608, "MPL_DTLB_MISS_SET_0" },
7682 { 4609, "MPL_DTLB_MISS_SET_1" },
7683 { 4610, "MPL_DTLB_MISS_SET_2" },
7684 { 4611, "MPL_DTLB_MISS_SET_3" },
7685 { 4612, "MPL_DTLB_MISS" },
7686 { 4613, "DTLB_TSB_BASE_ADDR_0" },
7687 { 4614, "DTLB_TSB_BASE_ADDR_1" },
7688 { 4736, "AAR" },
7689 { 4737, "CACHE_PINNED_WAYS" },
7690 { 4738, "DTLB_BAD_ADDR" },
7691 { 4739, "DTLB_BAD_ADDR_REASON" },
7692 { 4740, "DTLB_CURRENT_ATTR" },
7693 { 4741, "DTLB_CURRENT_PA" },
7694 { 4742, "DTLB_CURRENT_VA" },
7695 { 4743, "DTLB_INDEX" },
7696 { 4744, "DTLB_MATCH_0" },
7697 { 4745, "DTLB_PERF" },
7698 { 4746, "DTLB_TSB_ADDR_0" },
7699 { 4747, "DTLB_TSB_ADDR_1" },
7700 { 4748, "DTLB_TSB_FILL_CURRENT_ATTR" },
7701 { 4749, "DTLB_TSB_FILL_MATCH" },
7702 { 4750, "NUMBER_DTLB" },
7703 { 4751, "REPLACEMENT_DTLB" },
7704 { 4752, "WIRED_DTLB" },
7705 { 4864, "MPL_DTLB_ACCESS_SET_0" },
7706 { 4865, "MPL_DTLB_ACCESS_SET_1" },
7707 { 4866, "MPL_DTLB_ACCESS_SET_2" },
7708 { 4867, "MPL_DTLB_ACCESS_SET_3" },
7709 { 4868, "MPL_DTLB_ACCESS" },
7710 { 5120, "MPL_IDN_FIREWALL_SET_0" },
7711 { 5121, "MPL_IDN_FIREWALL_SET_1" },
7712 { 5122, "MPL_IDN_FIREWALL_SET_2" },
7713 { 5123, "MPL_IDN_FIREWALL_SET_3" },
7714 { 5124, "MPL_IDN_FIREWALL" },
7715 { 5125, "IDN_DIRECTION_PROTECT" },
7716 { 5376, "MPL_UDN_FIREWALL_SET_0" },
7717 { 5377, "MPL_UDN_FIREWALL_SET_1" },
7718 { 5378, "MPL_UDN_FIREWALL_SET_2" },
7719 { 5379, "MPL_UDN_FIREWALL_SET_3" },
7720 { 5380, "MPL_UDN_FIREWALL" },
7721 { 5381, "UDN_DIRECTION_PROTECT" },
7722 { 5632, "MPL_TILE_TIMER_SET_0" },
7723 { 5633, "MPL_TILE_TIMER_SET_1" },
7724 { 5634, "MPL_TILE_TIMER_SET_2" },
7725 { 5635, "MPL_TILE_TIMER_SET_3" },
7726 { 5636, "MPL_TILE_TIMER" },
7727 { 5637, "TILE_TIMER_CONTROL" },
7728 { 5888, "MPL_AUX_TILE_TIMER_SET_0" },
7729 { 5889, "MPL_AUX_TILE_TIMER_SET_1" },
7730 { 5890, "MPL_AUX_TILE_TIMER_SET_2" },
7731 { 5891, "MPL_AUX_TILE_TIMER_SET_3" },
7732 { 5892, "MPL_AUX_TILE_TIMER" },
7733 { 5893, "AUX_TILE_TIMER_CONTROL" },
7734 { 6144, "MPL_IDN_TIMER_SET_0" },
7735 { 6145, "MPL_IDN_TIMER_SET_1" },
7736 { 6146, "MPL_IDN_TIMER_SET_2" },
7737 { 6147, "MPL_IDN_TIMER_SET_3" },
7738 { 6148, "MPL_IDN_TIMER" },
7739 { 6149, "IDN_DEADLOCK_COUNT" },
7740 { 6150, "IDN_DEADLOCK_TIMEOUT" },
7741 { 6400, "MPL_UDN_TIMER_SET_0" },
7742 { 6401, "MPL_UDN_TIMER_SET_1" },
7743 { 6402, "MPL_UDN_TIMER_SET_2" },
7744 { 6403, "MPL_UDN_TIMER_SET_3" },
7745 { 6404, "MPL_UDN_TIMER" },
7746 { 6405, "UDN_DEADLOCK_COUNT" },
7747 { 6406, "UDN_DEADLOCK_TIMEOUT" },
7748 { 6656, "MPL_IDN_AVAIL_SET_0" },
7749 { 6657, "MPL_IDN_AVAIL_SET_1" },
7750 { 6658, "MPL_IDN_AVAIL_SET_2" },
7751 { 6659, "MPL_IDN_AVAIL_SET_3" },
7752 { 6660, "MPL_IDN_AVAIL" },
7753 { 6661, "IDN_AVAIL_EN" },
7754 { 6912, "MPL_UDN_AVAIL_SET_0" },
7755 { 6913, "MPL_UDN_AVAIL_SET_1" },
7756 { 6914, "MPL_UDN_AVAIL_SET_2" },
7757 { 6915, "MPL_UDN_AVAIL_SET_3" },
7758 { 6916, "MPL_UDN_AVAIL" },
7759 { 6917, "UDN_AVAIL_EN" },
7760 { 7168, "MPL_IPI_3_SET_0" },
7761 { 7169, "MPL_IPI_3_SET_1" },
7762 { 7170, "MPL_IPI_3_SET_2" },
7763 { 7171, "MPL_IPI_3_SET_3" },
7764 { 7172, "MPL_IPI_3" },
7765 { 7173, "IPI_EVENT_3" },
7766 { 7174, "IPI_EVENT_RESET_3" },
7767 { 7175, "IPI_EVENT_SET_3" },
7768 { 7176, "IPI_MASK_3" },
7769 { 7177, "IPI_MASK_RESET_3" },
7770 { 7178, "IPI_MASK_SET_3" },
7771 { 7424, "MPL_IPI_2_SET_0" },
7772 { 7425, "MPL_IPI_2_SET_1" },
7773 { 7426, "MPL_IPI_2_SET_2" },
7774 { 7427, "MPL_IPI_2_SET_3" },
7775 { 7428, "MPL_IPI_2" },
7776 { 7429, "IPI_EVENT_2" },
7777 { 7430, "IPI_EVENT_RESET_2" },
7778 { 7431, "IPI_EVENT_SET_2" },
7779 { 7432, "IPI_MASK_2" },
7780 { 7433, "IPI_MASK_RESET_2" },
7781 { 7434, "IPI_MASK_SET_2" },
7782 { 7680, "MPL_IPI_1_SET_0" },
7783 { 7681, "MPL_IPI_1_SET_1" },
7784 { 7682, "MPL_IPI_1_SET_2" },
7785 { 7683, "MPL_IPI_1_SET_3" },
7786 { 7684, "MPL_IPI_1" },
7787 { 7685, "IPI_EVENT_1" },
7788 { 7686, "IPI_EVENT_RESET_1" },
7789 { 7687, "IPI_EVENT_SET_1" },
7790 { 7688, "IPI_MASK_1" },
7791 { 7689, "IPI_MASK_RESET_1" },
7792 { 7690, "IPI_MASK_SET_1" },
7793 { 7936, "MPL_IPI_0_SET_0" },
7794 { 7937, "MPL_IPI_0_SET_1" },
7795 { 7938, "MPL_IPI_0_SET_2" },
7796 { 7939, "MPL_IPI_0_SET_3" },
7797 { 7940, "MPL_IPI_0" },
7798 { 7941, "IPI_EVENT_0" },
7799 { 7942, "IPI_EVENT_RESET_0" },
7800 { 7943, "IPI_EVENT_SET_0" },
7801 { 7944, "IPI_MASK_0" },
7802 { 7945, "IPI_MASK_RESET_0" },
7803 { 7946, "IPI_MASK_SET_0" },
7804 { 8192, "MPL_PERF_COUNT_SET_0" },
7805 { 8193, "MPL_PERF_COUNT_SET_1" },
7806 { 8194, "MPL_PERF_COUNT_SET_2" },
7807 { 8195, "MPL_PERF_COUNT_SET_3" },
7808 { 8196, "MPL_PERF_COUNT" },
7809 { 8197, "PERF_COUNT_0" },
7810 { 8198, "PERF_COUNT_1" },
7811 { 8199, "PERF_COUNT_CTL" },
7812 { 8200, "PERF_COUNT_DN_CTL" },
7813 { 8201, "PERF_COUNT_STS" },
7814 { 8202, "WATCH_MASK" },
7815 { 8203, "WATCH_VAL" },
7816 { 8448, "MPL_AUX_PERF_COUNT_SET_0" },
7817 { 8449, "MPL_AUX_PERF_COUNT_SET_1" },
7818 { 8450, "MPL_AUX_PERF_COUNT_SET_2" },
7819 { 8451, "MPL_AUX_PERF_COUNT_SET_3" },
7820 { 8452, "MPL_AUX_PERF_COUNT" },
7821 { 8453, "AUX_PERF_COUNT_0" },
7822 { 8454, "AUX_PERF_COUNT_1" },
7823 { 8455, "AUX_PERF_COUNT_CTL" },
7824 { 8456, "AUX_PERF_COUNT_STS" },
7825 { 8704, "MPL_INTCTRL_3_SET_0" },
7826 { 8705, "MPL_INTCTRL_3_SET_1" },
7827 { 8706, "MPL_INTCTRL_3_SET_2" },
7828 { 8707, "MPL_INTCTRL_3_SET_3" },
7829 { 8708, "MPL_INTCTRL_3" },
7830 { 8709, "INTCTRL_3_STATUS" },
7831 { 8710, "INTERRUPT_MASK_3" },
7832 { 8711, "INTERRUPT_MASK_RESET_3" },
7833 { 8712, "INTERRUPT_MASK_SET_3" },
7834 { 8713, "INTERRUPT_VECTOR_BASE_3" },
7835 { 8714, "SINGLE_STEP_EN_0_3" },
7836 { 8715, "SINGLE_STEP_EN_1_3" },
7837 { 8716, "SINGLE_STEP_EN_2_3" },
7838 { 8717, "SINGLE_STEP_EN_3_3" },
7839 { 8832, "EX_CONTEXT_3_0" },
7840 { 8833, "EX_CONTEXT_3_1" },
7841 { 8834, "SYSTEM_SAVE_3_0" },
7842 { 8835, "SYSTEM_SAVE_3_1" },
7843 { 8836, "SYSTEM_SAVE_3_2" },
7844 { 8837, "SYSTEM_SAVE_3_3" },
7845 { 8960, "MPL_INTCTRL_2_SET_0" },
7846 { 8961, "MPL_INTCTRL_2_SET_1" },
7847 { 8962, "MPL_INTCTRL_2_SET_2" },
7848 { 8963, "MPL_INTCTRL_2_SET_3" },
7849 { 8964, "MPL_INTCTRL_2" },
7850 { 8965, "INTCTRL_2_STATUS" },
7851 { 8966, "INTERRUPT_MASK_2" },
7852 { 8967, "INTERRUPT_MASK_RESET_2" },
7853 { 8968, "INTERRUPT_MASK_SET_2" },
7854 { 8969, "INTERRUPT_VECTOR_BASE_2" },
7855 { 8970, "SINGLE_STEP_EN_0_2" },
7856 { 8971, "SINGLE_STEP_EN_1_2" },
7857 { 8972, "SINGLE_STEP_EN_2_2" },
7858 { 8973, "SINGLE_STEP_EN_3_2" },
7859 { 9088, "EX_CONTEXT_2_0" },
7860 { 9089, "EX_CONTEXT_2_1" },
7861 { 9090, "SYSTEM_SAVE_2_0" },
7862 { 9091, "SYSTEM_SAVE_2_1" },
7863 { 9092, "SYSTEM_SAVE_2_2" },
7864 { 9093, "SYSTEM_SAVE_2_3" },
7865 { 9216, "MPL_INTCTRL_1_SET_0" },
7866 { 9217, "MPL_INTCTRL_1_SET_1" },
7867 { 9218, "MPL_INTCTRL_1_SET_2" },
7868 { 9219, "MPL_INTCTRL_1_SET_3" },
7869 { 9220, "MPL_INTCTRL_1" },
7870 { 9221, "INTCTRL_1_STATUS" },
7871 { 9222, "INTERRUPT_MASK_1" },
7872 { 9223, "INTERRUPT_MASK_RESET_1" },
7873 { 9224, "INTERRUPT_MASK_SET_1" },
7874 { 9225, "INTERRUPT_VECTOR_BASE_1" },
7875 { 9226, "SINGLE_STEP_EN_0_1" },
7876 { 9227, "SINGLE_STEP_EN_1_1" },
7877 { 9228, "SINGLE_STEP_EN_2_1" },
7878 { 9229, "SINGLE_STEP_EN_3_1" },
7879 { 9344, "EX_CONTEXT_1_0" },
7880 { 9345, "EX_CONTEXT_1_1" },
7881 { 9346, "SYSTEM_SAVE_1_0" },
7882 { 9347, "SYSTEM_SAVE_1_1" },
7883 { 9348, "SYSTEM_SAVE_1_2" },
7884 { 9349, "SYSTEM_SAVE_1_3" },
7885 { 9472, "MPL_INTCTRL_0_SET_0" },
7886 { 9473, "MPL_INTCTRL_0_SET_1" },
7887 { 9474, "MPL_INTCTRL_0_SET_2" },
7888 { 9475, "MPL_INTCTRL_0_SET_3" },
7889 { 9476, "MPL_INTCTRL_0" },
7890 { 9477, "INTCTRL_0_STATUS" },
7891 { 9478, "INTERRUPT_MASK_0" },
7892 { 9479, "INTERRUPT_MASK_RESET_0" },
7893 { 9480, "INTERRUPT_MASK_SET_0" },
7894 { 9481, "INTERRUPT_VECTOR_BASE_0" },
7895 { 9482, "SINGLE_STEP_EN_0_0" },
7896 { 9483, "SINGLE_STEP_EN_1_0" },
7897 { 9484, "SINGLE_STEP_EN_2_0" },
7898 { 9485, "SINGLE_STEP_EN_3_0" },
7899 { 9600, "EX_CONTEXT_0_0" },
7900 { 9601, "EX_CONTEXT_0_1" },
7901 { 9602, "SYSTEM_SAVE_0_0" },
7902 { 9603, "SYSTEM_SAVE_0_1" },
7903 { 9604, "SYSTEM_SAVE_0_2" },
7904 { 9605, "SYSTEM_SAVE_0_3" },
7905 { 9728, "MPL_BOOT_ACCESS_SET_0" },
7906 { 9729, "MPL_BOOT_ACCESS_SET_1" },
7907 { 9730, "MPL_BOOT_ACCESS_SET_2" },
7908 { 9731, "MPL_BOOT_ACCESS_SET_3" },
7909 { 9732, "MPL_BOOT_ACCESS" },
7910 { 9733, "BIG_ENDIAN_CONFIG" },
7911 { 9734, "CACHE_INVALIDATION_COMPRESSION_MODE" },
7912 { 9735, "CACHE_INVALIDATION_MASK_0" },
7913 { 9736, "CACHE_INVALIDATION_MASK_1" },
7914 { 9737, "CACHE_INVALIDATION_MASK_2" },
7915 { 9738, "CBOX_CACHEASRAM_CONFIG" },
7916 { 9739, "CBOX_CACHE_CONFIG" },
7917 { 9740, "CBOX_HOME_MAP_ADDR" },
7918 { 9741, "CBOX_HOME_MAP_DATA" },
7919 { 9742, "CBOX_MMAP_0" },
7920 { 9743, "CBOX_MMAP_1" },
7921 { 9744, "CBOX_MMAP_2" },
7922 { 9745, "CBOX_MMAP_3" },
7923 { 9746, "CBOX_MSR" },
7924 { 9747, "DIAG_BCST_CTL" },
7925 { 9748, "DIAG_BCST_MASK" },
7926 { 9749, "DIAG_BCST_TRIGGER" },
7927 { 9750, "DIAG_MUX_CTL" },
7928 { 9751, "DIAG_TRACE_CTL" },
7929 { 9752, "DIAG_TRACE_DATA" },
7930 { 9753, "DIAG_TRACE_STS" },
7931 { 9754, "IDN_DEMUX_BUF_THRESH" },
7932 { 9755, "L1_I_PIN_WAY_0" },
7933 { 9756, "MEM_ROUTE_ORDER" },
7934 { 9757, "MEM_STRIPE_CONFIG" },
7935 { 9758, "PERF_COUNT_PLS" },
7936 { 9759, "PSEUDO_RANDOM_NUMBER_MODIFY" },
7937 { 9760, "QUIESCE_CTL" },
7938 { 9761, "RSHIM_COORD" },
7939 { 9762, "SBOX_CONFIG" },
7940 { 9763, "UDN_DEMUX_BUF_THRESH" },
7941 { 9764, "XDN_CORE_STARVATION_COUNT" },
7942 { 9765, "XDN_ROUND_ROBIN_ARB_CTL" },
7943 { 9856, "CYCLE_MODIFY" },
7944 { 9857, "I_AAR" },
7945 { 9984, "MPL_WORLD_ACCESS_SET_0" },
7946 { 9985, "MPL_WORLD_ACCESS_SET_1" },
7947 { 9986, "MPL_WORLD_ACCESS_SET_2" },
7948 { 9987, "MPL_WORLD_ACCESS_SET_3" },
7949 { 9988, "MPL_WORLD_ACCESS" },
7950 { 9989, "DONE" },
7951 { 9990, "DSTREAM_PF" },
7952 { 9991, "FAIL" },
7953 { 9992, "INTERRUPT_CRITICAL_SECTION" },
7954 { 9993, "PASS" },
7955 { 9994, "PSEUDO_RANDOM_NUMBER" },
7956 { 9995, "TILE_COORD" },
7957 { 9996, "TILE_RTF_HWM" },
7958 { 10112, "CMPEXCH_VALUE" },
7959 { 10113, "CYCLE" },
7960 { 10114, "EVENT_BEGIN" },
7961 { 10115, "EVENT_END" },
7962 { 10116, "PROC_STATUS" },
7963 { 10117, "SIM_CONTROL" },
7964 { 10118, "SIM_SOCKET" },
7965 { 10119, "STATUS_SATURATE" },
7966 { 10240, "MPL_I_ASID_SET_0" },
7967 { 10241, "MPL_I_ASID_SET_1" },
7968 { 10242, "MPL_I_ASID_SET_2" },
7969 { 10243, "MPL_I_ASID_SET_3" },
7970 { 10244, "MPL_I_ASID" },
7971 { 10245, "I_ASID" },
7972 { 10496, "MPL_D_ASID_SET_0" },
7973 { 10497, "MPL_D_ASID_SET_1" },
7974 { 10498, "MPL_D_ASID_SET_2" },
7975 { 10499, "MPL_D_ASID_SET_3" },
7976 { 10500, "MPL_D_ASID" },
7977 { 10501, "D_ASID" },
7978 { 10752, "MPL_DOUBLE_FAULT_SET_0" },
7979 { 10753, "MPL_DOUBLE_FAULT_SET_1" },
7980 { 10754, "MPL_DOUBLE_FAULT_SET_2" },
7981 { 10755, "MPL_DOUBLE_FAULT_SET_3" },
7982 { 10756, "MPL_DOUBLE_FAULT" },
7983 { 10757, "LAST_INTERRUPT_REASON" },
7986 const int tilegx_num_sprs = 441;
7988 #endif /* DISASM_ONLY */
7990 #ifndef DISASM_ONLY
7992 #include <stdlib.h>
7994 static int
7995 tilegx_spr_compare (const void *a_ptr, const void *b_ptr)
7997 const struct tilegx_spr *a = (const struct tilegx_spr *) a_ptr;
7998 const struct tilegx_spr *b = (const struct tilegx_spr *) b_ptr;
7999 return (a->number - b->number);
8002 const char *
8003 get_tilegx_spr_name (int num)
8005 void *result;
8006 struct tilegx_spr key;
8008 key.number = num;
8009 result = bsearch ((const void *) &key, (const void *) tilegx_sprs,
8010 tilegx_num_sprs, sizeof (struct tilegx_spr),
8011 tilegx_spr_compare);
8013 if (result == NULL)
8014 return NULL;
8017 struct tilegx_spr *result_ptr = (struct tilegx_spr *) result;
8019 return result_ptr->name;
8023 /* Canonical name of each register. */
8024 const char * const tilegx_register_names[] =
8026 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
8027 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
8028 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
8029 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
8030 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
8031 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
8032 "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr",
8033 "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero"
8036 #endif /* not DISASM_ONLY */
8039 /* Given a set of bundle bits and the lookup FSM for a specific pipe,
8040 returns which instruction the bundle contains in that pipe. */
8042 static const struct tilegx_opcode *
8043 find_opcode (tilegx_bundle_bits bits, const unsigned short *table)
8045 int i = 0;
8047 while (1)
8049 unsigned short bitspec = table[i];
8050 unsigned int bitfield =
8051 ((unsigned int)(bits >> (bitspec & 63))) & (bitspec >> 6);
8053 unsigned short next = table[i + 1 + bitfield];
8054 if (next <= TILEGX_OPC_NONE)
8055 return & tilegx_opcodes[next];
8057 i = next - TILEGX_OPC_NONE;
8062 parse_insn_tilegx (tilegx_bundle_bits bits,
8063 unsigned long long pc,
8064 struct tilegx_decoded_instruction
8065 decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE])
8067 int num_instructions = 0;
8068 int pipe;
8069 int min_pipe, max_pipe;
8071 if ((bits & TILEGX_BUNDLE_MODE_MASK) == 0)
8073 min_pipe = TILEGX_PIPELINE_X0;
8074 max_pipe = TILEGX_PIPELINE_X1;
8076 else
8078 min_pipe = TILEGX_PIPELINE_Y0;
8079 max_pipe = TILEGX_PIPELINE_Y2;
8082 /* For each pipe, find an instruction that fits. */
8083 for (pipe = min_pipe; pipe <= max_pipe; pipe++)
8085 const struct tilegx_opcode *opc;
8086 struct tilegx_decoded_instruction *d;
8087 int i;
8089 d = &decoded[num_instructions++];
8090 opc = find_opcode (bits, tilegx_bundle_decoder_fsms[pipe]);
8091 d->opcode = opc;
8093 /* Decode each operand, sign extending, etc. as appropriate. */
8094 for (i = 0; i < opc->num_operands; i++)
8096 const struct tilegx_operand *op =
8097 &tilegx_operands[opc->operands[pipe][i]];
8098 int raw_opval = op->extract (bits);
8099 long long opval;
8101 if (op->is_signed)
8103 /* Sign-extend the operand. */
8104 int shift = (int)((sizeof(int) * 8) - op->num_bits);
8105 raw_opval = (raw_opval << shift) >> shift;
8108 /* Adjust PC-relative scaled branch offsets. */
8109 if (op->type == TILEGX_OP_TYPE_ADDRESS)
8110 opval = (raw_opval * TILEGX_BUNDLE_SIZE_IN_BYTES) + pc;
8111 else
8112 opval = raw_opval;
8114 /* Record the final value. */
8115 d->operands[i] = op;
8116 d->operand_values[i] = opval;
8120 return num_instructions;