1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
28 /* Structure to hold information about predefined registers. */
35 struct dwarf2_line_info debug_line
;
37 /* Generic assembler global variables which must be defined by all targets. */
39 /* Characters which always start a comment. */
40 const char comment_chars
[] = "#";
42 /* Characters which start a comment at the beginning of a line. */
43 const char line_comment_chars
[] = ";#";
45 /* Characters which may be used to separate multiple commands on a
47 const char line_separator_chars
[] = ";";
49 /* Characters which are used to indicate an exponent in a floating
51 const char EXP_CHARS
[] = "eE";
53 /* Characters which mean that a number is a floating point constant,
55 const char FLT_CHARS
[] = "dD";
58 const relax_typeS md_relax_table
[] = {
61 {0x7fff, -0x8000, 5, 2},
62 {0x7fffffff, -0x80000000, 7, 0},
64 /* bCC relaxing (uncommon cases) */
66 {0x7fff, -0x8000, 6, 5},
67 {0x7fffffff, -0x80000000, 8, 0},
70 {0x7fff, -0x8000, 5, 7},
71 {0x7fffffff, -0x80000000, 7, 0},
74 {0x7fff, -0x8000, 4, 9},
75 {0x7fffffff, -0x80000000, 6, 0},
79 {0x7fff, -0x8000, 3, 12},
80 {0x7fffffff, -0x80000000, 5, 0},
85 static void mn10300_insert_operand
PARAMS ((unsigned long *, unsigned long *,
86 const struct mn10300_operand
*,
87 offsetT
, char *, unsigned,
89 static unsigned long check_operand
PARAMS ((unsigned long,
90 const struct mn10300_operand
*,
92 static int reg_name_search
PARAMS ((const struct reg_name
*, int, const char *));
93 static boolean data_register_name
PARAMS ((expressionS
*expressionP
));
94 static boolean address_register_name
PARAMS ((expressionS
*expressionP
));
95 static boolean other_register_name
PARAMS ((expressionS
*expressionP
));
96 static void set_arch_mach
PARAMS ((int));
98 static int current_machine
;
101 #define MAX_INSN_FIXUPS (5)
106 bfd_reloc_code_real_type reloc
;
108 struct mn10300_fixup fixups
[MAX_INSN_FIXUPS
];
111 /* We must store the value of each register operand so that we can
112 verify that certain registers do not match. */
113 int mn10300_reg_operands
[MN10300_MAX_OPERANDS
];
115 const char *md_shortopts
= "";
116 struct option md_longopts
[] = {
117 {NULL
, no_argument
, NULL
, 0}
119 size_t md_longopts_size
= sizeof(md_longopts
);
121 /* The target specific pseudo-ops which we support. */
122 const pseudo_typeS md_pseudo_table
[] =
124 { "file", dwarf2_directive_file
},
125 { "loc", dwarf2_directive_loc
},
126 { "am30", set_arch_mach
, AM30
},
127 { "am33", set_arch_mach
, AM33
},
128 { "mn10300", set_arch_mach
, MN103
},
132 #define HAVE_AM33 (current_machine == AM33)
133 #define HAVE_AM30 (current_machine == AM30)
135 /* Opcode hash table. */
136 static struct hash_control
*mn10300_hash
;
138 /* This table is sorted. Suitable for searching by a binary search. */
139 static const struct reg_name data_registers
[] =
146 #define DATA_REG_NAME_CNT (sizeof(data_registers) / sizeof(struct reg_name))
148 static const struct reg_name address_registers
[] =
155 #define ADDRESS_REG_NAME_CNT (sizeof(address_registers) / sizeof(struct reg_name))
157 static const struct reg_name r_registers
[] =
200 #define R_REG_NAME_CNT (sizeof(r_registers) / sizeof(struct reg_name))
202 static const struct reg_name xr_registers
[] =
226 #define XR_REG_NAME_CNT (sizeof(xr_registers) / sizeof(struct reg_name))
229 static const struct reg_name other_registers
[] =
235 #define OTHER_REG_NAME_CNT (sizeof(other_registers) / sizeof(struct reg_name))
237 /* reg_name_search does a binary search of the given register table
238 to see if "name" is a valid regiter name. Returns the register
239 number from the array on success, or -1 on failure. */
242 reg_name_search (regs
, regcount
, name
)
243 const struct reg_name
*regs
;
247 int middle
, low
, high
;
255 middle
= (low
+ high
) / 2;
256 cmp
= strcasecmp (name
, regs
[middle
].name
);
262 return regs
[middle
].value
;
269 /* Summary of register_name().
271 * in: Input_line_pointer points to 1st char of operand.
273 * out: A expressionS.
274 * The operand may have been a register: in this case, X_op == O_register,
275 * X_add_number is set to the register number, and truth is returned.
276 * Input_line_pointer->(next non-blank) char after operand, or is in
277 * its original state.
280 r_register_name (expressionP
)
281 expressionS
*expressionP
;
288 /* Find the spelling of the operand */
289 start
= name
= input_line_pointer
;
291 c
= get_symbol_end ();
292 reg_number
= reg_name_search (r_registers
, R_REG_NAME_CNT
, name
);
294 /* look to see if it's in the register table */
297 expressionP
->X_op
= O_register
;
298 expressionP
->X_add_number
= reg_number
;
300 /* make the rest nice */
301 expressionP
->X_add_symbol
= NULL
;
302 expressionP
->X_op_symbol
= NULL
;
303 *input_line_pointer
= c
; /* put back the delimiting char */
308 /* reset the line as if we had not done anything */
309 *input_line_pointer
= c
; /* put back the delimiting char */
310 input_line_pointer
= start
; /* reset input_line pointer */
315 /* Summary of register_name().
317 * in: Input_line_pointer points to 1st char of operand.
319 * out: A expressionS.
320 * The operand may have been a register: in this case, X_op == O_register,
321 * X_add_number is set to the register number, and truth is returned.
322 * Input_line_pointer->(next non-blank) char after operand, or is in
323 * its original state.
326 xr_register_name (expressionP
)
327 expressionS
*expressionP
;
334 /* Find the spelling of the operand */
335 start
= name
= input_line_pointer
;
337 c
= get_symbol_end ();
338 reg_number
= reg_name_search (xr_registers
, XR_REG_NAME_CNT
, name
);
340 /* look to see if it's in the register table */
343 expressionP
->X_op
= O_register
;
344 expressionP
->X_add_number
= reg_number
;
346 /* make the rest nice */
347 expressionP
->X_add_symbol
= NULL
;
348 expressionP
->X_op_symbol
= NULL
;
349 *input_line_pointer
= c
; /* put back the delimiting char */
354 /* reset the line as if we had not done anything */
355 *input_line_pointer
= c
; /* put back the delimiting char */
356 input_line_pointer
= start
; /* reset input_line pointer */
361 /* Summary of register_name().
363 * in: Input_line_pointer points to 1st char of operand.
365 * out: A expressionS.
366 * The operand may have been a register: in this case, X_op == O_register,
367 * X_add_number is set to the register number, and truth is returned.
368 * Input_line_pointer->(next non-blank) char after operand, or is in
369 * its original state.
372 data_register_name (expressionP
)
373 expressionS
*expressionP
;
380 /* Find the spelling of the operand */
381 start
= name
= input_line_pointer
;
383 c
= get_symbol_end ();
384 reg_number
= reg_name_search (data_registers
, DATA_REG_NAME_CNT
, name
);
386 /* look to see if it's in the register table */
389 expressionP
->X_op
= O_register
;
390 expressionP
->X_add_number
= reg_number
;
392 /* make the rest nice */
393 expressionP
->X_add_symbol
= NULL
;
394 expressionP
->X_op_symbol
= NULL
;
395 *input_line_pointer
= c
; /* put back the delimiting char */
400 /* reset the line as if we had not done anything */
401 *input_line_pointer
= c
; /* put back the delimiting char */
402 input_line_pointer
= start
; /* reset input_line pointer */
407 /* Summary of register_name().
409 * in: Input_line_pointer points to 1st char of operand.
411 * out: A expressionS.
412 * The operand may have been a register: in this case, X_op == O_register,
413 * X_add_number is set to the register number, and truth is returned.
414 * Input_line_pointer->(next non-blank) char after operand, or is in
415 * its original state.
418 address_register_name (expressionP
)
419 expressionS
*expressionP
;
426 /* Find the spelling of the operand */
427 start
= name
= input_line_pointer
;
429 c
= get_symbol_end ();
430 reg_number
= reg_name_search (address_registers
, ADDRESS_REG_NAME_CNT
, name
);
432 /* look to see if it's in the register table */
435 expressionP
->X_op
= O_register
;
436 expressionP
->X_add_number
= reg_number
;
438 /* make the rest nice */
439 expressionP
->X_add_symbol
= NULL
;
440 expressionP
->X_op_symbol
= NULL
;
441 *input_line_pointer
= c
; /* put back the delimiting char */
446 /* reset the line as if we had not done anything */
447 *input_line_pointer
= c
; /* put back the delimiting char */
448 input_line_pointer
= start
; /* reset input_line pointer */
453 /* Summary of register_name().
455 * in: Input_line_pointer points to 1st char of operand.
457 * out: A expressionS.
458 * The operand may have been a register: in this case, X_op == O_register,
459 * X_add_number is set to the register number, and truth is returned.
460 * Input_line_pointer->(next non-blank) char after operand, or is in
461 * its original state.
464 other_register_name (expressionP
)
465 expressionS
*expressionP
;
472 /* Find the spelling of the operand */
473 start
= name
= input_line_pointer
;
475 c
= get_symbol_end ();
476 reg_number
= reg_name_search (other_registers
, OTHER_REG_NAME_CNT
, name
);
478 /* look to see if it's in the register table */
481 expressionP
->X_op
= O_register
;
482 expressionP
->X_add_number
= reg_number
;
484 /* make the rest nice */
485 expressionP
->X_add_symbol
= NULL
;
486 expressionP
->X_op_symbol
= NULL
;
487 *input_line_pointer
= c
; /* put back the delimiting char */
492 /* reset the line as if we had not done anything */
493 *input_line_pointer
= c
; /* put back the delimiting char */
494 input_line_pointer
= start
; /* reset input_line pointer */
500 md_show_usage (stream
)
503 fprintf(stream
, _("MN10300 options:\n\
508 md_parse_option (c
, arg
)
516 md_undefined_symbol (name
)
523 md_atof (type
, litp
, sizep
)
529 LITTLENUM_TYPE words
[4];
545 return "bad call to md_atof";
548 t
= atof_ieee (input_line_pointer
, type
, words
);
550 input_line_pointer
= t
;
554 for (i
= prec
- 1; i
>= 0; i
--)
556 md_number_to_chars (litp
, (valueT
) words
[i
], 2);
565 md_convert_frag (abfd
, sec
, fragP
)
570 static unsigned long label_count
= 0;
573 subseg_change (sec
, 0);
574 if (fragP
->fr_subtype
== 0)
576 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
577 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
581 else if (fragP
->fr_subtype
== 1)
583 /* Reverse the condition of the first branch. */
584 int offset
= fragP
->fr_fix
;
585 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
622 fragP
->fr_literal
[offset
] = opcode
;
624 /* Create a fixup for the reversed conditional branch. */
625 sprintf (buf
, ".%s_%d", FAKE_LABEL_NAME
, label_count
++);
626 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
627 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
628 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
630 /* Now create the unconditional branch + fixup to the
632 fragP
->fr_literal
[offset
+ 2] = 0xcc;
633 fix_new (fragP
, fragP
->fr_fix
+ 3, 2, fragP
->fr_symbol
,
634 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
638 else if (fragP
->fr_subtype
== 2)
640 /* Reverse the condition of the first branch. */
641 int offset
= fragP
->fr_fix
;
642 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
679 fragP
->fr_literal
[offset
] = opcode
;
681 /* Create a fixup for the reversed conditional branch. */
682 sprintf (buf
, ".%s_%d", FAKE_LABEL_NAME
, label_count
++);
683 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
684 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
685 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
687 /* Now create the unconditional branch + fixup to the
689 fragP
->fr_literal
[offset
+ 2] = 0xdc;
690 fix_new (fragP
, fragP
->fr_fix
+ 3, 4, fragP
->fr_symbol
,
691 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
695 else if (fragP
->fr_subtype
== 3)
697 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
698 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
702 else if (fragP
->fr_subtype
== 4)
704 /* Reverse the condition of the first branch. */
705 int offset
= fragP
->fr_fix
;
706 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
725 fragP
->fr_literal
[offset
+ 1] = opcode
;
727 /* Create a fixup for the reversed conditional branch. */
728 sprintf (buf
, ".%s_%d", FAKE_LABEL_NAME
, label_count
++);
729 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
730 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
731 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
733 /* Now create the unconditional branch + fixup to the
735 fragP
->fr_literal
[offset
+ 3] = 0xcc;
736 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
737 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
741 else if (fragP
->fr_subtype
== 5)
743 /* Reverse the condition of the first branch. */
744 int offset
= fragP
->fr_fix
;
745 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
761 fragP
->fr_literal
[offset
+ 1] = opcode
;
763 /* Create a fixup for the reversed conditional branch. */
764 sprintf (buf
, ".%s_%d", FAKE_LABEL_NAME
, label_count
++);
765 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
766 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
767 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
769 /* Now create the unconditional branch + fixup to the
771 fragP
->fr_literal
[offset
+ 3] = 0xdc;
772 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
773 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
777 else if (fragP
->fr_subtype
== 6)
779 int offset
= fragP
->fr_fix
;
780 fragP
->fr_literal
[offset
] = 0xcd;
781 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
782 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
786 else if (fragP
->fr_subtype
== 7)
788 int offset
= fragP
->fr_fix
;
789 fragP
->fr_literal
[offset
] = 0xdd;
790 fragP
->fr_literal
[offset
+ 5] = fragP
->fr_literal
[offset
+ 3];
791 fragP
->fr_literal
[offset
+ 6] = fragP
->fr_literal
[offset
+ 4];
793 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
794 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
798 else if (fragP
->fr_subtype
== 8)
800 int offset
= fragP
->fr_fix
;
801 fragP
->fr_literal
[offset
] = 0xfa;
802 fragP
->fr_literal
[offset
+ 1] = 0xff;
803 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
804 fragP
->fr_offset
+ 2, 1, BFD_RELOC_16_PCREL
);
808 else if (fragP
->fr_subtype
== 9)
810 int offset
= fragP
->fr_fix
;
811 fragP
->fr_literal
[offset
] = 0xfc;
812 fragP
->fr_literal
[offset
+ 1] = 0xff;
814 fix_new (fragP
, fragP
->fr_fix
+ 2, 4, fragP
->fr_symbol
,
815 fragP
->fr_offset
+ 2, 1, BFD_RELOC_32_PCREL
);
819 else if (fragP
->fr_subtype
== 10)
821 fragP
->fr_literal
[fragP
->fr_fix
] = 0xca;
822 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
823 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
827 else if (fragP
->fr_subtype
== 11)
829 int offset
= fragP
->fr_fix
;
830 fragP
->fr_literal
[offset
] = 0xcc;
832 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
833 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
837 else if (fragP
->fr_subtype
== 12)
839 int offset
= fragP
->fr_fix
;
840 fragP
->fr_literal
[offset
] = 0xdc;
842 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
843 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
852 md_section_align (seg
, addr
)
856 int align
= bfd_get_section_alignment (stdoutput
, seg
);
857 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
863 char *prev_name
= "";
864 register const struct mn10300_opcode
*op
;
866 mn10300_hash
= hash_new();
868 /* Insert unique names into hash table. The MN10300 instruction set
869 has many identical opcode names that have different opcodes based
870 on the operands. This hash table then provides a quick index to
871 the first opcode with a particular name in the opcode table. */
873 op
= mn10300_opcodes
;
876 if (strcmp (prev_name
, op
->name
))
878 prev_name
= (char *) op
->name
;
879 hash_insert (mn10300_hash
, op
->name
, (char *) op
);
884 /* This is both a simplification (we don't have to write md_apply_fix)
885 and support for future optimizations (branch shortening and similar
886 stuff in the linker). */
889 /* Set the default machine type. */
890 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, MN103
))
891 as_warn (_("could not set architecture and machine"));
893 current_machine
= MN103
;
901 struct mn10300_opcode
*opcode
;
902 struct mn10300_opcode
*next_opcode
;
903 const unsigned char *opindex_ptr
;
904 int next_opindex
, relaxable
;
905 unsigned long insn
, extension
, size
= 0, real_size
;
910 /* Get the opcode. */
911 for (s
= str
; *s
!= '\0' && ! isspace (*s
); s
++)
916 /* find the first opcode with the proper name */
917 opcode
= (struct mn10300_opcode
*)hash_find (mn10300_hash
, str
);
920 as_bad (_("Unrecognized opcode: `%s'"), str
);
925 while (isspace (*str
))
928 input_line_pointer
= str
;
938 errmsg
= _("Invalid opcode/operands");
940 /* Reset the array of register operands. */
941 memset (mn10300_reg_operands
, -1, sizeof (mn10300_reg_operands
));
947 insn
= opcode
->opcode
;
950 /* If the instruction is not available on the current machine
951 then it can not possibly match. */
953 && !(opcode
->machine
== AM33
&& HAVE_AM33
)
954 && !(opcode
->machine
== AM30
&& HAVE_AM30
))
957 for (op_idx
= 1, opindex_ptr
= opcode
->operands
;
959 opindex_ptr
++, op_idx
++)
961 const struct mn10300_operand
*operand
;
964 if (next_opindex
== 0)
966 operand
= &mn10300_operands
[*opindex_ptr
];
970 operand
= &mn10300_operands
[next_opindex
];
974 while (*str
== ' ' || *str
== ',')
977 if (operand
->flags
& MN10300_OPERAND_RELAX
)
980 /* Gather the operand. */
981 hold
= input_line_pointer
;
982 input_line_pointer
= str
;
984 if (operand
->flags
& MN10300_OPERAND_PAREN
)
986 if (*input_line_pointer
!= ')' && *input_line_pointer
!= '(')
988 input_line_pointer
= hold
;
992 input_line_pointer
++;
995 /* See if we can match the operands. */
996 else if (operand
->flags
& MN10300_OPERAND_DREG
)
998 if (!data_register_name (&ex
))
1000 input_line_pointer
= hold
;
1005 else if (operand
->flags
& MN10300_OPERAND_AREG
)
1007 if (!address_register_name (&ex
))
1009 input_line_pointer
= hold
;
1014 else if (operand
->flags
& MN10300_OPERAND_SP
)
1016 char *start
= input_line_pointer
;
1017 char c
= get_symbol_end ();
1019 if (strcasecmp (start
, "sp") != 0)
1021 *input_line_pointer
= c
;
1022 input_line_pointer
= hold
;
1026 *input_line_pointer
= c
;
1029 else if (operand
->flags
& MN10300_OPERAND_RREG
)
1031 if (!r_register_name (&ex
))
1033 input_line_pointer
= hold
;
1038 else if (operand
->flags
& MN10300_OPERAND_XRREG
)
1040 if (!xr_register_name (&ex
))
1042 input_line_pointer
= hold
;
1047 else if (operand
->flags
& MN10300_OPERAND_USP
)
1049 char *start
= input_line_pointer
;
1050 char c
= get_symbol_end ();
1052 if (strcasecmp (start
, "usp") != 0)
1054 *input_line_pointer
= c
;
1055 input_line_pointer
= hold
;
1059 *input_line_pointer
= c
;
1062 else if (operand
->flags
& MN10300_OPERAND_SSP
)
1064 char *start
= input_line_pointer
;
1065 char c
= get_symbol_end ();
1067 if (strcasecmp (start
, "ssp") != 0)
1069 *input_line_pointer
= c
;
1070 input_line_pointer
= hold
;
1074 *input_line_pointer
= c
;
1077 else if (operand
->flags
& MN10300_OPERAND_MSP
)
1079 char *start
= input_line_pointer
;
1080 char c
= get_symbol_end ();
1082 if (strcasecmp (start
, "msp") != 0)
1084 *input_line_pointer
= c
;
1085 input_line_pointer
= hold
;
1089 *input_line_pointer
= c
;
1092 else if (operand
->flags
& MN10300_OPERAND_PC
)
1094 char *start
= input_line_pointer
;
1095 char c
= get_symbol_end ();
1097 if (strcasecmp (start
, "pc") != 0)
1099 *input_line_pointer
= c
;
1100 input_line_pointer
= hold
;
1104 *input_line_pointer
= c
;
1107 else if (operand
->flags
& MN10300_OPERAND_EPSW
)
1109 char *start
= input_line_pointer
;
1110 char c
= get_symbol_end ();
1112 if (strcasecmp (start
, "epsw") != 0)
1114 *input_line_pointer
= c
;
1115 input_line_pointer
= hold
;
1119 *input_line_pointer
= c
;
1122 else if (operand
->flags
& MN10300_OPERAND_PLUS
)
1124 if (*input_line_pointer
!= '+')
1126 input_line_pointer
= hold
;
1130 input_line_pointer
++;
1133 else if (operand
->flags
& MN10300_OPERAND_PSW
)
1135 char *start
= input_line_pointer
;
1136 char c
= get_symbol_end ();
1138 if (strcasecmp (start
, "psw") != 0)
1140 *input_line_pointer
= c
;
1141 input_line_pointer
= hold
;
1145 *input_line_pointer
= c
;
1148 else if (operand
->flags
& MN10300_OPERAND_MDR
)
1150 char *start
= input_line_pointer
;
1151 char c
= get_symbol_end ();
1153 if (strcasecmp (start
, "mdr") != 0)
1155 *input_line_pointer
= c
;
1156 input_line_pointer
= hold
;
1160 *input_line_pointer
= c
;
1163 else if (operand
->flags
& MN10300_OPERAND_REG_LIST
)
1165 unsigned int value
= 0;
1166 if (*input_line_pointer
!= '[')
1168 input_line_pointer
= hold
;
1174 input_line_pointer
++;
1176 /* We used to reject a null register list here; however,
1177 we accept it now so the compiler can emit "call" instructions
1178 for all calls to named functions.
1180 The linker can then fill in the appropriate bits for the
1181 register list and stack size or change the instruction
1182 into a "calls" if using "call" is not profitable. */
1183 while (*input_line_pointer
!= ']')
1188 if (*input_line_pointer
== ',')
1189 input_line_pointer
++;
1191 start
= input_line_pointer
;
1192 c
= get_symbol_end ();
1194 if (strcasecmp (start
, "d2") == 0)
1197 *input_line_pointer
= c
;
1199 else if (strcasecmp (start
, "d3") == 0)
1202 *input_line_pointer
= c
;
1204 else if (strcasecmp (start
, "a2") == 0)
1207 *input_line_pointer
= c
;
1209 else if (strcasecmp (start
, "a3") == 0)
1212 *input_line_pointer
= c
;
1214 else if (strcasecmp (start
, "other") == 0)
1217 *input_line_pointer
= c
;
1220 && strcasecmp (start
, "exreg0") == 0)
1223 *input_line_pointer
= c
;
1226 && strcasecmp (start
, "exreg1") == 0)
1229 *input_line_pointer
= c
;
1232 && strcasecmp (start
, "exother") == 0)
1235 *input_line_pointer
= c
;
1238 && strcasecmp (start
, "all") == 0)
1241 *input_line_pointer
= c
;
1245 input_line_pointer
= hold
;
1250 input_line_pointer
++;
1251 mn10300_insert_operand (&insn
, &extension
, operand
,
1252 value
, (char *) NULL
, 0, 0);
1256 else if (data_register_name (&ex
))
1258 input_line_pointer
= hold
;
1262 else if (address_register_name (&ex
))
1264 input_line_pointer
= hold
;
1268 else if (other_register_name (&ex
))
1270 input_line_pointer
= hold
;
1274 else if (HAVE_AM33
&& r_register_name (&ex
))
1276 input_line_pointer
= hold
;
1280 else if (HAVE_AM33
&& xr_register_name (&ex
))
1282 input_line_pointer
= hold
;
1286 else if (*str
== ')' || *str
== '(')
1288 input_line_pointer
= hold
;
1300 errmsg
= _("illegal operand");
1303 errmsg
= _("missing operand");
1309 mask
= MN10300_OPERAND_DREG
| MN10300_OPERAND_AREG
;
1311 mask
|= MN10300_OPERAND_RREG
| MN10300_OPERAND_XRREG
;
1312 if ((operand
->flags
& mask
) == 0)
1314 input_line_pointer
= hold
;
1319 if (opcode
->format
== FMT_D1
|| opcode
->format
== FMT_S1
)
1321 else if (opcode
->format
== FMT_D2
1322 || opcode
->format
== FMT_D4
1323 || opcode
->format
== FMT_S2
1324 || opcode
->format
== FMT_S4
1325 || opcode
->format
== FMT_S6
1326 || opcode
->format
== FMT_D5
)
1328 else if (opcode
->format
== FMT_D7
)
1330 else if (opcode
->format
== FMT_D8
|| opcode
->format
== FMT_D9
)
1335 mn10300_insert_operand (&insn
, &extension
, operand
,
1336 ex
.X_add_number
, (char *) NULL
,
1340 /* And note the register number in the register array. */
1341 mn10300_reg_operands
[op_idx
- 1] = ex
.X_add_number
;
1346 /* If this operand can be promoted, and it doesn't
1347 fit into the allocated bitfield for this insn,
1348 then promote it (ie this opcode does not match). */
1350 & (MN10300_OPERAND_PROMOTE
| MN10300_OPERAND_RELAX
)
1351 && ! check_operand (insn
, operand
, ex
.X_add_number
))
1353 input_line_pointer
= hold
;
1358 mn10300_insert_operand (&insn
, &extension
, operand
,
1359 ex
.X_add_number
, (char *) NULL
,
1364 /* If this operand can be promoted, then this opcode didn't
1365 match since we can't know if it needed promotion! */
1366 if (operand
->flags
& MN10300_OPERAND_PROMOTE
)
1368 input_line_pointer
= hold
;
1373 /* We need to generate a fixup for this expression. */
1374 if (fc
>= MAX_INSN_FIXUPS
)
1375 as_fatal (_("too many fixups"));
1376 fixups
[fc
].exp
= ex
;
1377 fixups
[fc
].opindex
= *opindex_ptr
;
1378 fixups
[fc
].reloc
= BFD_RELOC_UNUSED
;
1384 str
= input_line_pointer
;
1385 input_line_pointer
= hold
;
1387 while (*str
== ' ' || *str
== ',')
1392 /* Make sure we used all the operands! */
1396 /* If this instruction has registers that must not match, verify
1397 that they do indeed not match. */
1398 if (opcode
->no_match_operands
)
1402 /* Look at each operand to see if it's marked. */
1403 for (i
= 0; i
< MN10300_MAX_OPERANDS
; i
++)
1405 if ((1 << i
) & opcode
->no_match_operands
)
1409 /* operand I is marked. Check that it does not match any
1410 operands > I which are marked. */
1411 for (j
= i
+ 1; j
< MN10300_MAX_OPERANDS
; j
++)
1413 if (((1 << j
) & opcode
->no_match_operands
)
1414 && mn10300_reg_operands
[i
] == mn10300_reg_operands
[j
])
1416 errmsg
= _("Invalid register specification.");
1428 next_opcode
= opcode
+ 1;
1429 if (!strcmp(next_opcode
->name
, opcode
->name
))
1431 opcode
= next_opcode
;
1435 as_bad ("%s", errmsg
);
1441 while (isspace (*str
))
1445 as_bad (_("junk at end of line: `%s'"), str
);
1447 input_line_pointer
= str
;
1449 /* Determine the size of the instruction. */
1450 if (opcode
->format
== FMT_S0
)
1453 if (opcode
->format
== FMT_S1
|| opcode
->format
== FMT_D0
)
1456 if (opcode
->format
== FMT_S2
|| opcode
->format
== FMT_D1
)
1459 if (opcode
->format
== FMT_D6
)
1462 if (opcode
->format
== FMT_D7
|| opcode
->format
== FMT_D10
)
1465 if (opcode
->format
== FMT_D8
)
1468 if (opcode
->format
== FMT_D9
)
1471 if (opcode
->format
== FMT_S4
)
1474 if (opcode
->format
== FMT_S6
|| opcode
->format
== FMT_D5
)
1477 if (opcode
->format
== FMT_D2
)
1480 if (opcode
->format
== FMT_D4
)
1485 if (relaxable
&& fc
> 0)
1492 /* Handle bra specially. Basically treat it like jmp so
1493 that we automatically handle 8, 16 and 32 bit offsets
1494 correctly as well as jumps to an undefined address.
1496 It is also important to not treat it like other bCC
1497 instructions since the long forms of bra is different
1498 from other bCC instructions. */
1499 if (opcode
->opcode
== 0xca00)
1511 else if (size
== 3 && opcode
->opcode
== 0xcc0000)
1513 /* bCC (uncommon cases) */
1517 f
= frag_var (rs_machine_dependent
, 8, 8 - size
, type
,
1518 fixups
[0].exp
.X_add_symbol
,
1519 fixups
[0].exp
.X_add_number
,
1520 (char *)fixups
[0].opindex
);
1522 /* This is pretty hokey. We basically just care about the
1523 opcode, so we have to write out the first word big endian.
1525 The exception is "call", which has two operands that we
1528 The first operand (the register list) happens to be in the
1529 first instruction word, and will be in the right place if
1530 we output the first word in big endian mode.
1532 The second operand (stack size) is in the extension word,
1533 and we want it to appear as the first character in the extension
1534 word (as it appears in memory). Luckily, writing the extension
1535 word in big endian format will do what we want. */
1536 number_to_chars_bigendian (f
, insn
, size
> 4 ? 4 : size
);
1539 number_to_chars_bigendian (f
+ 4, extension
, 4);
1540 number_to_chars_bigendian (f
+ 8, 0, size
- 8);
1543 number_to_chars_bigendian (f
+ 4, extension
, size
- 4);
1547 /* Allocate space for the instruction. */
1548 f
= frag_more (size
);
1550 /* Fill in bytes for the instruction. Note that opcode fields
1551 are written big-endian, 16 & 32bit immediates are written
1552 little endian. Egad. */
1553 if (opcode
->format
== FMT_S0
1554 || opcode
->format
== FMT_S1
1555 || opcode
->format
== FMT_D0
1556 || opcode
->format
== FMT_D6
1557 || opcode
->format
== FMT_D7
1558 || opcode
->format
== FMT_D10
1559 || opcode
->format
== FMT_D1
)
1561 number_to_chars_bigendian (f
, insn
, size
);
1563 else if (opcode
->format
== FMT_S2
1564 && opcode
->opcode
!= 0xdf0000
1565 && opcode
->opcode
!= 0xde0000)
1567 /* A format S2 instruction that is _not_ "ret" and "retf". */
1568 number_to_chars_bigendian (f
, (insn
>> 16) & 0xff, 1);
1569 number_to_chars_littleendian (f
+ 1, insn
& 0xffff, 2);
1571 else if (opcode
->format
== FMT_S2
)
1573 /* This must be a ret or retf, which is written entirely in
1574 big-endian format. */
1575 number_to_chars_bigendian (f
, insn
, 3);
1577 else if (opcode
->format
== FMT_S4
1578 && opcode
->opcode
!= 0xdc000000)
1580 /* This must be a format S4 "call" instruction. What a pain. */
1581 unsigned long temp
= (insn
>> 8) & 0xffff;
1582 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1583 number_to_chars_littleendian (f
+ 1, temp
, 2);
1584 number_to_chars_bigendian (f
+ 3, insn
& 0xff, 1);
1585 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
1587 else if (opcode
->format
== FMT_S4
)
1589 /* This must be a format S4 "jmp" instruction. */
1590 unsigned long temp
= ((insn
& 0xffffff) << 8) | (extension
& 0xff);
1591 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1592 number_to_chars_littleendian (f
+ 1, temp
, 4);
1594 else if (opcode
->format
== FMT_S6
)
1596 unsigned long temp
= ((insn
& 0xffffff) << 8)
1597 | ((extension
>> 16) & 0xff);
1598 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1599 number_to_chars_littleendian (f
+ 1, temp
, 4);
1600 number_to_chars_bigendian (f
+ 5, (extension
>> 8) & 0xff, 1);
1601 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
1603 else if (opcode
->format
== FMT_D2
1604 && opcode
->opcode
!= 0xfaf80000
1605 && opcode
->opcode
!= 0xfaf00000
1606 && opcode
->opcode
!= 0xfaf40000)
1608 /* A format D2 instruction where the 16bit immediate is
1609 really a single 16bit value, not two 8bit values. */
1610 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
1611 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
1613 else if (opcode
->format
== FMT_D2
)
1615 /* A format D2 instruction where the 16bit immediate
1616 is really two 8bit immediates. */
1617 number_to_chars_bigendian (f
, insn
, 4);
1619 else if (opcode
->format
== FMT_D4
)
1621 unsigned long temp
= ((insn
& 0xffff) << 16) | (extension
& 0xffff);
1622 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
1623 number_to_chars_littleendian (f
+ 2, temp
, 4);
1625 else if (opcode
->format
== FMT_D5
)
1627 unsigned long temp
= ((insn
& 0xffff) << 16)
1628 | ((extension
>> 8) & 0xffff);
1629 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
1630 number_to_chars_littleendian (f
+ 2, temp
, 4);
1631 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
1633 else if (opcode
->format
== FMT_D8
)
1635 unsigned long temp
= ((insn
& 0xff) << 16) | (extension
& 0xffff);
1636 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
1637 number_to_chars_bigendian (f
+ 3, (temp
& 0xff), 1);
1638 number_to_chars_littleendian (f
+ 4, temp
>> 8, 2);
1640 else if (opcode
->format
== FMT_D9
)
1642 unsigned long temp
= ((insn
& 0xff) << 24) | (extension
& 0xffffff);
1643 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
1644 number_to_chars_littleendian (f
+ 3, temp
, 4);
1647 /* Create any fixups. */
1648 for (i
= 0; i
< fc
; i
++)
1650 const struct mn10300_operand
*operand
;
1652 operand
= &mn10300_operands
[fixups
[i
].opindex
];
1653 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
)
1655 reloc_howto_type
*reloc_howto
;
1660 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
1665 size
= bfd_get_reloc_size (reloc_howto
);
1667 if (size
< 1 || size
> 4)
1671 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
1672 size
, &fixups
[i
].exp
,
1673 reloc_howto
->pc_relative
,
1678 int reloc
, pcrel
, reloc_size
, offset
;
1681 reloc
= BFD_RELOC_NONE
;
1682 /* How big is the reloc? Remember SPLIT relocs are
1683 implicitly 32bits. */
1684 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
1686 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
1689 reloc_size
= operand
->bits
;
1691 /* Is the reloc pc-relative? */
1692 pcrel
= (operand
->flags
& MN10300_OPERAND_PCREL
) != 0;
1694 /* Gross. This disgusting hack is to make sure we
1695 get the right offset for the 16/32 bit reloc in
1696 "call" instructions. Basically they're a pain
1697 because the reloc isn't at the end of the instruction. */
1698 if ((size
== 5 || size
== 7)
1699 && (((insn
>> 24) & 0xff) == 0xcd
1700 || ((insn
>> 24) & 0xff) == 0xdd))
1703 /* Similarly for certain bit instructions which don't
1704 hav their 32bit reloc at the tail of the instruction. */
1706 && (((insn
>> 16) & 0xffff) == 0xfe00
1707 || ((insn
>> 16) & 0xffff) == 0xfe01
1708 || ((insn
>> 16) & 0xffff) == 0xfe02))
1711 offset
= size
- reloc_size
/ 8;
1713 /* Choose a proper BFD relocation type. */
1716 if (reloc_size
== 32)
1717 reloc
= BFD_RELOC_32_PCREL
;
1718 else if (reloc_size
== 16)
1719 reloc
= BFD_RELOC_16_PCREL
;
1720 else if (reloc_size
== 8)
1721 reloc
= BFD_RELOC_8_PCREL
;
1727 if (reloc_size
== 32)
1728 reloc
= BFD_RELOC_32
;
1729 else if (reloc_size
== 16)
1730 reloc
= BFD_RELOC_16
;
1731 else if (reloc_size
== 8)
1732 reloc
= BFD_RELOC_8
;
1737 /* Convert the size of the reloc into what fix_new_exp wants. */
1738 reloc_size
= reloc_size
/ 8;
1739 if (reloc_size
== 8)
1741 else if (reloc_size
== 16)
1743 else if (reloc_size
== 32)
1746 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
1747 reloc_size
, &fixups
[i
].exp
, pcrel
,
1748 ((bfd_reloc_code_real_type
) reloc
));
1751 fixP
->fx_offset
+= offset
;
1756 if (debug_type
== DEBUG_DWARF2
)
1760 /* First update the notion of the current source line. */
1761 dwarf2_where (&debug_line
);
1763 /* We want the offset of the start of this instruction within the
1764 the current frag. */
1765 addr
= frag_now
->fr_address
+ frag_now_fix () - real_size
;
1767 /* And record the information. */
1768 dwarf2_gen_line_info (addr
, &debug_line
);
1773 /* if while processing a fixup, a reloc really needs to be created */
1774 /* then it is done here */
1777 tc_gen_reloc (seg
, fixp
)
1782 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1784 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1785 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1787 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1788 _("reloc %d not supported by object file format"),
1789 (int)fixp
->fx_r_type
);
1792 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1794 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
1797 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
1798 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
1800 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1801 "Difference of symbols in different sections is not supported");
1805 reloc
->sym_ptr_ptr
= &bfd_abs_symbol
;
1806 reloc
->addend
= (S_GET_VALUE (fixp
->fx_addsy
)
1807 - S_GET_VALUE (fixp
->fx_subsy
) + fixp
->fx_offset
);
1811 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof( asymbol
*));
1812 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1813 reloc
->addend
= fixp
->fx_offset
;
1819 md_estimate_size_before_relax (fragp
, seg
)
1823 if (fragp
->fr_subtype
== 0)
1825 if (fragp
->fr_subtype
== 3)
1827 if (fragp
->fr_subtype
== 6)
1829 if (!S_IS_DEFINED (fragp
->fr_symbol
)
1830 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
))
1832 fragp
->fr_subtype
= 7;
1838 if (fragp
->fr_subtype
== 8)
1840 if (!S_IS_DEFINED (fragp
->fr_symbol
)
1841 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
))
1843 fragp
->fr_subtype
= 9;
1849 if (fragp
->fr_subtype
== 10)
1851 if (!S_IS_DEFINED (fragp
->fr_symbol
)
1852 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
))
1854 fragp
->fr_subtype
= 12;
1863 md_pcrel_from (fixp
)
1866 return fixp
->fx_frag
->fr_address
;
1868 if (fixp
->fx_addsy
!= (symbolS
*) NULL
&& ! S_IS_DEFINED (fixp
->fx_addsy
))
1870 /* The symbol is undefined. Let the linker figure it out. */
1873 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1878 md_apply_fix3 (fixp
, valuep
, seg
)
1883 /* We shouldn't ever get here because linkrelax is nonzero. */
1889 /* Insert an operand value into an instruction. */
1892 mn10300_insert_operand (insnp
, extensionp
, operand
, val
, file
, line
, shift
)
1893 unsigned long *insnp
;
1894 unsigned long *extensionp
;
1895 const struct mn10300_operand
*operand
;
1901 /* No need to check 32bit operands for a bit. Note that
1902 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1903 if (operand
->bits
!= 32
1904 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1910 bits
= operand
->bits
;
1911 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1914 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1916 max
= (1 << (bits
- 1)) - 1;
1917 min
= - (1 << (bits
- 1));
1921 max
= (1 << bits
) - 1;
1928 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1931 _("operand out of range (%s not between %ld and %ld)");
1934 sprint_value (buf
, test
);
1935 if (file
== (char *) NULL
)
1936 as_warn (err
, buf
, min
, max
);
1938 as_warn_where (file
, line
, err
, buf
, min
, max
);
1942 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
1944 *insnp
|= (val
>> (32 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1945 *extensionp
|= ((val
& ((1 << (32 - operand
->bits
)) - 1))
1948 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
1950 *insnp
|= (val
>> (24 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1951 *extensionp
|= ((val
& ((1 << (24 - operand
->bits
)) - 1))
1954 else if ((operand
->flags
& MN10300_OPERAND_EXTENDED
) == 0)
1956 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1957 << (operand
->shift
+ shift
));
1959 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1960 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1961 << (operand
->shift
+ shift
+ operand
->bits
));
1965 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1966 << (operand
->shift
+ shift
));
1968 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1969 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1970 << (operand
->shift
+ shift
+ operand
->bits
));
1974 static unsigned long
1975 check_operand (insn
, operand
, val
)
1977 const struct mn10300_operand
*operand
;
1980 /* No need to check 32bit operands for a bit. Note that
1981 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1982 if (operand
->bits
!= 32
1983 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1989 bits
= operand
->bits
;
1990 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1993 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1995 max
= (1 << (bits
- 1)) - 1;
1996 min
= - (1 << (bits
- 1));
2000 max
= (1 << bits
) - 1;
2007 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
2016 set_arch_mach (mach
)
2019 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, mach
))
2020 as_warn (_("could not set architecture and machine"));
2022 current_machine
= mach
;
2028 if (debug_type
== DEBUG_DWARF2
)