| blob | 725b2d5662893619a08d5f4f8f6d21c4ae7044ee |
1 ; Renesas M32C CPU description. -*- Scheme -*-
2 ;
3 ; Copyright 2005, 2006 Free Software Foundation, Inc.
4 ;
5 ; Contributed by Red Hat Inc; developed under contract from Renesas.
6 ;
7 ; This file is part of the GNU Binutils.
8 ;
9 ; This program is free software; you can redistribute it and/or modify
10 ; it under the terms of the GNU General Public License as published by
11 ; the Free Software Foundation; either version 2 of the License, or
12 ; (at your option) any later version.
13 ;
14 ; This program is distributed in the hope that it will be useful,
15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ; GNU General Public License for more details.
18 ;
19 ; You should have received a copy of the GNU General Public License
20 ; along with this program; if not, write to the Free Software
21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23 (include "simplify.inc")
25 (define-arch
26 (name m32c)
27 (comment "Renesas M32C")
28 (default-alignment forced)
29 (insn-lsb0? #f)
30 (machs m16c m32c)
31 (isas m16c m32c)
32 )
34 (define-isa
35 (name m16c)
37 (default-insn-bitsize 32)
39 ; Number of bytes of insn we can initially fetch.
40 (base-insn-bitsize 32)
42 ; Used in computing bit numbers.
43 (default-insn-word-bitsize 32)
45 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
47 ; fetches 1 insn at a time.
48 (liw-insns 1)
50 ; executes 1 insn at a time.
51 (parallel-insns 1)
52 )
54 (define-isa
55 (name m32c)
57 (default-insn-bitsize 32)
59 ; Number of bytes of insn we can initially fetch.
60 (base-insn-bitsize 32)
62 ; Used in computing bit numbers.
63 (default-insn-word-bitsize 32)
65 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
67 ; fetches 1 insn at a time.
68 (liw-insns 1)
70 ; executes 1 insn at a time.
71 (parallel-insns 1)
72 )
74 (define-cpu
75 ; cpu names must be distinct from the architecture name and machine names.
76 ; The "b" suffix stands for "base" and is the convention.
77 ; The "f" suffix stands for "family" and is the convention.
78 (name m16cbf)
79 (comment "Renesas M16C base family")
80 (insn-endian big)
81 (data-endian little)
82 (word-bitsize 16)
83 )
85 (define-cpu
86 ; cpu names must be distinct from the architecture name and machine names.
87 ; The "b" suffix stands for "base" and is the convention.
88 ; The "f" suffix stands for "family" and is the convention.
89 (name m32cbf)
90 (comment "Renesas M32C base family")
91 (insn-endian big)
92 (data-endian little)
93 (word-bitsize 16)
94 )
96 (define-mach
97 (name m16c)
98 (comment "Generic M16C cpu")
99 (cpu m32cbf)
100 )
102 (define-mach
103 (name m32c)
104 (comment "Generic M32C cpu")
105 (cpu m32cbf)
106 )
108 ; Model descriptions.
110 (define-model
111 (name m16c)
112 (comment "m16c") (attrs)
113 (mach m16c)
115 ; `state' is a list of variables for recording model state
116 ; (state)
117 (unit u-exec "Execution Unit" ()
118 1 1 ; issue done
119 () ; state
120 () ; inputs
121 () ; outputs
122 () ; profile action (default)
123 )
124 )
126 (define-model
127 (name m32c)
128 (comment "m32c") (attrs)
129 (mach m32c)
131 ; `state' is a list of variables for recording model state
132 ; (state)
133 (unit u-exec "Execution Unit" ()
134 1 1 ; issue done
135 () ; state
136 () ; inputs
137 () ; outputs
138 () ; profile action (default)
139 )
140 )
142 (define-attr
143 (type enum)
144 (name RL_TYPE)
145 (values NONE JUMP 1ADDR 2ADDR)
146 (default NONE)
147 )
149 ; Macros to simplify MACH attribute specification.
151 (define-pmacro all-isas () (ISA m16c,m32c))
152 (define-pmacro m16c-isa () (ISA m16c))
153 (define-pmacro m32c-isa () (ISA m32c))
155 (define-pmacro MACH16 (MACH m16c))
156 (define-pmacro MACH32 (MACH m32c))
158 (define-pmacro (machine size)
159 (MACH (.sym m size c)) (ISA (.sym m size c)))
161 (define-pmacro RL_JUMP (RL_TYPE JUMP))
162 (define-pmacro RL_1ADDR (RL_TYPE 1ADDR))
163 (define-pmacro RL_2ADDR (RL_TYPE 2ADDR))
165 \f
166 ;=============================================================
167 ; Fields
168 ;-------------------------------------------------------------
169 ; Main opcodes
170 ;
171 (dnf f-0-1 "opcode" (all-isas) 0 1)
172 (dnf f-0-2 "opcode" (all-isas) 0 2)
173 (dnf f-0-3 "opcode" (all-isas) 0 3)
174 (dnf f-0-4 "opcode" (all-isas) 0 4)
175 (dnf f-1-3 "opcode" (all-isas) 1 3)
176 (dnf f-2-2 "opcode" (all-isas) 2 2)
177 (dnf f-3-4 "opcode" (all-isas) 3 4)
178 (dnf f-3-1 "opcode" (all-isas) 3 1)
179 (dnf f-4-1 "opcode" (all-isas) 4 1)
180 (dnf f-4-3 "opcode" (all-isas) 4 3)
181 (dnf f-4-4 "opcode" (all-isas) 4 4)
182 (dnf f-4-6 "opcode" (all-isas) 4 6)
183 (dnf f-5-1 "opcode" (all-isas) 5 1)
184 (dnf f-5-3 "opcode" (all-isas) 5 3)
185 (dnf f-6-2 "opcode" (all-isas) 6 2)
186 (dnf f-7-1 "opcode" (all-isas) 7 1)
187 (dnf f-8-1 "opcode" (all-isas) 8 1)
188 (dnf f-8-2 "opcode" (all-isas) 8 2)
189 (dnf f-8-3 "opcode" (all-isas) 8 3)
190 (dnf f-8-4 "opcode" (all-isas) 8 4)
191 (dnf f-8-8 "opcode" (all-isas) 8 8)
192 (dnf f-9-3 "opcode" (all-isas) 9 3)
193 (dnf f-9-1 "opcode" (all-isas) 9 1)
194 (dnf f-10-1 "opcode" (all-isas) 10 1)
195 (dnf f-10-2 "opcode" (all-isas) 10 2)
196 (dnf f-10-3 "opcode" (all-isas) 10 3)
197 (dnf f-11-1 "opcode" (all-isas) 11 1)
198 (dnf f-12-1 "opcode" (all-isas) 12 1)
199 (dnf f-12-2 "opcode" (all-isas) 12 2)
200 (dnf f-12-3 "opcode" (all-isas) 12 3)
201 (dnf f-12-4 "opcode" (all-isas) 12 4)
202 (dnf f-12-6 "opcode" (all-isas) 12 6)
203 (dnf f-13-3 "opcode" (all-isas) 13 3)
204 (dnf f-14-1 "opcode" (all-isas) 14 1)
205 (dnf f-14-2 "opcode" (all-isas) 14 2)
206 (dnf f-15-1 "opcode" (all-isas) 15 1)
207 (dnf f-16-1 "opcode" (all-isas) 16 1)
208 (dnf f-16-2 "opcode" (all-isas) 16 2)
209 (dnf f-16-4 "opcode" (all-isas) 16 4)
210 (dnf f-16-8 "opcode" (all-isas) 16 8)
211 (dnf f-18-1 "opcode" (all-isas) 18 1)
212 (dnf f-18-2 "opcode" (all-isas) 18 2)
213 (dnf f-18-3 "opcode" (all-isas) 18 3)
214 (dnf f-20-1 "opcode" (all-isas) 20 1)
215 (dnf f-20-3 "opcode" (all-isas) 20 3)
216 (dnf f-20-2 "opcode" (all-isas) 20 2)
217 (dnf f-20-4 "opcode" (all-isas) 20 4)
218 (dnf f-21-3 "opcode" (all-isas) 21 3)
219 (dnf f-24-2 "opcode" (all-isas) 24 2)
220 (dnf f-24-8 "opcode" (all-isas) 24 8)
221 (dnf f-32-16 "opcode" (all-isas) 32 16)
223 ;-------------------------------------------------------------
224 ; Registers
225 ;-------------------------------------------------------------
227 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2)
228 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1)
230 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1)
231 (dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1)
233 ; QI mode gr encoding for m32c is different than for m16c. The hardware
234 ; is indexed using the m16c encoding, so perform the transformation here.
235 ; register m16c m32c
236 ; ----------------------
237 ; r0l 00'b 10'b
238 ; r0h 01'b 00'b
239 ; r1l 10'b 11'b
240 ; r1h 11'b 01'b
241 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
242 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
243 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
244 )
245 ; QI mode gr encoding for m32c is different than for m16c. The hardware
246 ; is indexed using the m16c encoding, so perform the transformation here.
247 ; register m16c m32c
248 ; ----------------------
249 ; r0l 00'b 10'b
250 ; r0h 01'b 00'b
251 ; r1l 10'b 11'b
252 ; r1h 11'b 01'b
253 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
254 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
255 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
256 )
257 ; HI mode gr encoding for m32c is different than for m16c. The hardware
258 ; is indexed using the m16c encoding, so perform the transformation here.
259 ; register m16c m32c
260 ; ----------------------
261 ; r0 00'b 10'b
262 ; r1 01'b 11'b
263 ; r2 10'b 00'b
264 ; r3 11'b 01'b
265 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
266 ((value pc) (mod USI (add value 2) 4)) ; insert
267 ((value pc) (mod USI (add value 2) 4)) ; extract
268 )
270 ; HI mode gr encoding for m32c is different than for m16c. The hardware
271 ; is indexed using the m16c encoding, so perform the transformation here.
272 ; register m16c m32c
273 ; ----------------------
274 ; r0 00'b 10'b
275 ; r1 01'b 11'b
276 ; r2 10'b 00'b
277 ; r3 11'b 01'b
278 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
279 ((value pc) (mod USI (add value 2) 4)) ; insert
280 ((value pc) (mod USI (add value 2) 4)) ; extract
281 )
283 ; SI mode gr encoding for m32c is as follows:
284 ; register encoding index
285 ; -------------------------
286 ; r2r0 10'b 0
287 ; r3r1 11'b 1
288 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
289 ((value pc) (add USI value 2)) ; insert
290 ((value pc) (sub USI value 2)) ; extract
291 )
292 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
293 ((value pc) (add USI value 2)) ; insert
294 ((value pc) (sub USI value 2)) ; extract
295 )
297 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1)
299 (dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2)
300 (dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1)
301 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1)
303 (dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1)
304 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1)
306 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1)
307 (dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1)
309 ; QI mode gr encoding for m32c is different than for m16c. The hardware
310 ; is indexed using the m16c encoding, so perform the transformation here.
311 ; register m16c m32c
312 ; ----------------------
313 ; r0l 00'b 10'b
314 ; r0h 01'b 00'b
315 ; r1l 10'b 11'b
316 ; r1h 11'b 01'b
317 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
318 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
319 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
320 )
321 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
322 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
323 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
324 )
325 ; HI mode gr encoding for m32c is different than for m16c. The hardware
326 ; is indexed using the m16c encoding, so perform the transformation here.
327 ; register m16c m32c
328 ; ----------------------
329 ; r0 00'b 10'b
330 ; r1 01'b 11'b
331 ; r2 10'b 00'b
332 ; r3 11'b 01'b
333 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
334 ((value pc) (mod USI (add value 2) 4)) ; insert
335 ((value pc) (mod USI (add value 2) 4)) ; extract
336 )
337 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
338 ((value pc) (mod USI (add value 2) 4)) ; insert
339 ((value pc) (mod USI (add value 2) 4)) ; extract
340 )
341 ; SI mode gr encoding for m32c is as follows:
342 ; register encoding index
343 ; -------------------------
344 ; r2r0 10'b 0
345 ; r3r1 11'b 1
346 (df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT
347 ((value pc) (add USI value 2)) ; insert
348 ((value pc) (sub USI value 2)) ; extract
349 )
350 (df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT
351 ((value pc) (add USI value 2)) ; insert
352 ((value pc) (sub USI value 2)) ; extract
353 )
355 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1)
357 ;-------------------------------------------------------------
358 ; Immediates embedded in the base insn
359 ;-------------------------------------------------------------
361 (df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f)
362 (df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f)
363 (df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f)
364 (df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f)
366 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
367 ((value pc) (sub USI value 1)) ; insert
368 ((value pc) (add USI value 1)) ; extract
369 )
371 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT
372 (f-2-2 f-7-1)
373 (sequence () ; insert
374 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1))
375 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3))
376 )
377 (sequence () ; extract
378 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1)
379 (ifield f-7-1))
380 1))
381 )
382 )
384 ;-------------------------------------------------------------
385 ; Immediates and displacements beyond the base insn
386 ;-------------------------------------------------------------
388 (df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f)
389 (df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f)
390 (df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f)
391 (df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f)
392 (df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f)
393 (df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f)
394 (df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f)
395 (df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f)
396 (df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f)
397 (df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f)
398 (df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f)
399 (df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f)
400 (df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f)
401 (df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f)
402 (df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f)
403 (df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f)
404 (df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f)
405 (df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f)
407 ; Insn opcode endianness is big, but the immediate fields are stored
408 ; in little endian. Handle this here at the field level for all immediate
409 ; fields longer that 1 byte.
410 ;
411 ; CGEN can't handle a field which spans a 32 bit word boundary, so
412 ; handle those as multi ifields.
413 ;
414 ; Take care in expressions using 'srl' or 'sll' as part of some larger
415 ; expression meant to yield sign-extended values. CGEN translates
416 ; uses of those operators into C expressions whose type is 'unsigned
417 ; int', which tends to make the whole expression 'unsigned int'.
418 ; Expressions like (set (ifield foo) X), however, just take X and
419 ; store it in some member of 'struct cgen_fields', all of whose
420 ; members are 'long'. On machines where 'long' is larger than
421 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long
422 ; just produces a very large positive value. insert_normal will
423 ; range-check the field's value and produce odd error messages like
424 ; this:
425 ;
426 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]'
427 ;
428 ; Annoyingly, the code will work fine on machines where 'long' and
429 ; 'unsigned int' are the same size: the assignment will produce a
430 ; negative number.
431 ;
432 ; Just tell yourself over and over: overflow detection is expensive,
433 ; and you're glad C doesn't do it, because it never happens in real
434 ; life.
436 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
437 ((value pc) (or UHI
438 (and (srl value 8) #x00ff)
439 (and (sll value 8) #xff00))) ; insert
440 ((value pc) (or UHI
441 (and UHI (srl UHI value 8) #x00ff)
442 (and UHI (sll UHI value 8) #xff00))) ; extract
443 )
445 (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT
446 ((value pc) (ext INT
447 (trunc HI
448 (or (and (srl value 8) #x00ff)
449 (and (sll value 8) #xff00))))) ; insert
450 ((value pc) (ext INT
451 (trunc HI
452 (or (and (srl value 8) #x00ff)
453 (and (sll value 8) #xff00))))) ; extract
454 )
456 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
457 ((value pc) (or UHI
458 (and (srl value 8) #x00ff)
459 (and (sll value 8) #xff00))) ; insert
460 ((value pc) (or UHI
461 (and UHI (srl UHI value 8) #x00ff)
462 (and UHI (sll UHI value 8) #xff00))) ; extract
463 )
465 (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT
466 ((value pc) (ext INT
467 (trunc HI
468 (or (and (srl value 8) #x00ff)
469 (and (sll value 8) #xff00))))) ; insert
470 ((value pc) (ext INT
471 (trunc HI
472 (or (and (srl value 8) #x00ff)
473 (and (sll value 8) #xff00))))) ; extract
474 )
476 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
477 (f-dsp-24-u8 f-dsp-32-u8)
478 (sequence () ; insert
479 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff))
480 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff))
481 )
482 (sequence () ; extract
483 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8)
484 (ifield f-dsp-24-u8)))
485 )
486 )
488 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT
489 (f-dsp-24-u8 f-dsp-32-u8)
490 (sequence () ; insert
491 (set (ifield f-dsp-24-u8)
492 (and (ifield f-dsp-24-s16) #xff))
493 (set (ifield f-dsp-32-u8)
494 (and (srl (ifield f-dsp-24-s16) 8) #xff))
495 )
496 (sequence () ; extract
497 (set (ifield f-dsp-24-s16)
498 (ext INT
499 (trunc HI (or (sll (ifield f-dsp-32-u8) 8)
500 (ifield f-dsp-24-u8)))))
501 )
502 )
504 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
505 ((value pc) (or UHI
506 (and (srl value 8) #x00ff)
507 (and (sll value 8) #xff00))) ; insert
508 ((value pc) (or UHI
509 (and UHI (srl UHI value 8) #x00ff)
510 (and UHI (sll UHI value 8) #xff00))) ; extract
511 )
513 (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT
514 ((value pc) (ext INT
515 (trunc HI
516 (or (and (srl value 8) #x00ff)
517 (and (sll value 8) #xff00))))) ; insert
518 ((value pc) (ext INT
519 (trunc HI
520 (or (and (srl value 8) #x00ff)
521 (and (sll value 8) #xff00))))) ; extract
522 )
524 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
525 ((value pc) (or UHI
526 (and (srl value 8) #x00ff)
527 (and (sll value 8) #xff00))) ; insert
528 ((value pc) (or UHI
529 (and UHI (srl UHI value 8) #x00ff)
530 (and UHI (sll UHI value 8) #xff00))) ; extract
531 )
533 (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT
534 ((value pc) (ext INT
535 (trunc HI
536 (or (and (srl value 8) #x00ff)
537 (and (sll value 8) #xff00))))) ; insert
538 ((value pc) (ext INT
539 (trunc HI
540 (or (and (srl value 8) #x00ff)
541 (and (sll value 8) #xff00))))) ; extract
542 )
544 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
545 ((value pc) (or UHI
546 (and (srl value 8) #x00ff)
547 (and (sll value 8) #xff00))) ; insert
548 ((value pc) (or UHI
549 (and UHI (srl UHI value 8) #x00ff)
550 (and UHI (sll UHI value 8) #xff00))) ; extract
551 )
553 (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT
554 ((value pc) (ext INT
555 (trunc HI
556 (or (and (srl value 8) #x00ff)
557 (and (sll value 8) #xff00))))) ; insert
558 ((value pc) (ext INT
559 (trunc HI
560 (or (and (srl value 8) #x00ff)
561 (and (sll value 8) #xff00))))) ; extract
562 )
564 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
565 ((value pc) (or UHI
566 (and (srl value 8) #x00ff)
567 (and (sll value 8) #xff00))) ; insert
568 ((value pc) (or UHI
569 (and UHI (srl UHI value 8) #x00ff)
570 (and UHI (sll UHI value 8) #xff00))) ; extract
571 )
572 (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
573 ((value pc) (or SI
574 (or (srl value 16) (and value #xff00))
575 (sll (ext INT (trunc QI (and value #xff))) 16)))
576 ((value pc) (or SI
577 (or (srl value 16) (and value #xff00))
578 (sll (ext INT (trunc QI (and value #xff))) 16)))
579 )
581 (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
582 ((value pc) (or SI
583 (or (srl value 16) (and value #xff00))
584 (sll (and value #xff) 16)))
585 ((value pc) (or SI
586 (or (srl value 16) (and value #xff00))
587 (sll (and value #xff) 16)))
588 )
590 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
591 (f-dsp-16-u16 f-dsp-32-u8)
592 (sequence () ; insert
593 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff))
594 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff))
595 )
596 (sequence () ; extract
597 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16)
598 (ifield f-dsp-16-u16)))
599 )
600 )
602 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT
603 (f-dsp-24-u8 f-dsp-32-u16)
604 (sequence () ; insert
605 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff))
606 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff))
607 )
608 (sequence () ; extract
609 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8)
610 (ifield f-dsp-24-u8)))
611 )
612 )
614 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT
615 ((value pc) (or USI
616 (or USI
617 (and (srl value 16) #x0000ff)
618 (and value #x00ff00))
619 (and (sll value 16) #xff0000))) ; insert
620 ((value pc) (or USI
621 (or USI
622 (and USI (srl UHI value 16) #x0000ff)
623 (and USI value #x00ff00))
624 (and USI (sll UHI value 16) #xff0000))) ; extract
625 )
627 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
628 ((value pc) (or USI
629 (or USI
630 (and (srl value 16) #x0000ff)
631 (and value #x00ff00))
632 (and (sll value 16) #xff0000))) ; insert
633 ((value pc) (or USI
634 (or USI
635 (and USI (srl UHI value 16) #x0000ff)
636 (and USI value #x00ff00))
637 (and USI (sll UHI value 16) #xff0000))) ; extract
638 )
640 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
641 (f-dsp-40-u24 f-dsp-64-u8)
642 (sequence () ; insert
643 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff))
644 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff))
645 )
646 (sequence () ; extract
647 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff)
648 (and (sll (ifield f-dsp-64-u8) 24) #xff000000)))
649 )
650 )
652 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT
653 (f-dsp-48-u16 f-dsp-64-u8)
654 (sequence () ; insert
655 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff))
656 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff))
657 )
658 (sequence () ; extract
659 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff)
660 (and (sll (ifield f-dsp-64-u8) 16) #xff0000)))
661 )
662 )
664 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT
665 (f-dsp-16-u16 f-dsp-32-u16)
666 (sequence () ; insert
667 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff))
668 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff))
669 )
670 (sequence () ; extract
671 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff)
672 (and (sll (ifield f-dsp-32-u16) 16) #xffff0000)))
673 )
674 )
676 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT
677 (f-dsp-24-u8 f-dsp-32-u24)
678 (sequence () ; insert
679 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff))
680 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff))
681 )
682 (sequence () ; extract
683 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff)
684 (and (sll (ifield f-dsp-32-u24) 8) #xffffff00)))
685 )
686 )
688 (df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT
689 ((value pc)
691 ;; insert
692 (ext INT
693 (or SI
694 (or SI
695 (and (srl value 24) #x000000ff)
696 (and (srl value 8) #x0000ff00))
697 (or SI
698 (and (sll value 8) #x00ff0000)
699 (and (sll value 24) #xff000000)))))
701 ;; extract
702 ((value pc)
703 (ext INT
704 (or SI
705 (or SI
706 (and (srl value 24) #x000000ff)
707 (and (srl value 8) #x0000ff00))
708 (or SI
709 (and (sll value 8) #x00ff0000)
710 (and (sll value 24) #xff000000)))))
711 )
713 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
714 (f-dsp-48-u16 f-dsp-64-u16)
715 (sequence () ; insert
716 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff))
717 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff))
718 )
719 (sequence () ; extract
720 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
721 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
722 )
723 )
725 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT
726 (f-dsp-48-u16 f-dsp-64-u16)
727 (sequence () ; insert
728 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff))
729 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff))
730 )
731 (sequence () ; extract
732 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
733 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
734 )
735 )
737 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT
738 (f-dsp-56-u8 f-dsp-64-u8)
739 (sequence () ; insert
740 (set (ifield f-dsp-56-u8)
741 (and (ifield f-dsp-56-s16) #xff))
742 (set (ifield f-dsp-64-u8)
743 (and (srl (ifield f-dsp-56-s16) 8) #xff))
744 )
745 (sequence () ; extract
746 (set (ifield f-dsp-56-s16)
747 (ext INT
748 (trunc HI (or (sll (ifield f-dsp-64-u8) 8)
749 (ifield f-dsp-56-u8)))))
750 )
751 )
753 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
754 ((value pc) (ext INT
755 (trunc HI
756 (or (and (srl value 8) #x00ff)
757 (and (sll value 8) #xff00))))) ; insert
758 ((value pc) (ext INT
759 (trunc HI
760 (or (and (srl value 8) #x00ff)
761 (and (sll value 8) #xff00))))) ; extract
762 )
764 ;-------------------------------------------------------------
765 ; Bit indices
766 ;-------------------------------------------------------------
768 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3)
769 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3)
770 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3)
772 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT
773 (f-bitno16-S f-dsp-8-u8)
774 (sequence () ; insert
775 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7))
776 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff))
777 )
778 (sequence () ; extract
779 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3)
780 (ifield f-bitno16-S)))
781 )
782 )
784 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT
785 (f-bitno32-unprefixed f-dsp-16-u8)
786 (sequence () ; insert
787 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7))
788 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff))
789 )
790 (sequence () ; extract
791 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3)
792 (ifield f-bitno32-unprefixed)))
793 )
794 )
795 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT
796 (f-bitno32-unprefixed f-dsp-16-s8)
797 (sequence () ; insert
798 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7))
799 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
800 )
801 (sequence () ; extract
802 (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
803 (ifield f-bitno32-unprefixed)))
804 )
805 )
806 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT
807 (f-bitno32-unprefixed f-dsp-16-u16)
808 (sequence () ; insert
809 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7))
810 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff))
811 )
812 (sequence () ; extract
813 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
814 (ifield f-bitno32-unprefixed)))
815 )
816 )
817 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT
818 (f-bitno32-unprefixed f-dsp-16-s16)
819 (sequence () ; insert
820 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7))
821 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
822 )
823 (sequence () ; extract
824 (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
825 (ifield f-bitno32-unprefixed)))
826 )
827 )
828 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
829 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT
830 (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8)
831 (sequence () ; insert
832 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7))
833 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff))
834 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff))
835 )
836 (sequence () ; extract
837 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
838 (or (sll (ifield f-dsp-32-u8) 19)
839 (ifield f-bitno32-unprefixed))))
840 )
841 )
842 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT
843 (f-bitno32-prefixed f-dsp-24-u8)
844 (sequence () ; insert
845 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7))
846 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff))
847 )
848 (sequence () ; extract
849 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
850 (ifield f-bitno32-prefixed)))
851 )
852 )
853 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT
854 (f-bitno32-prefixed f-dsp-24-s8)
855 (sequence () ; insert
856 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7))
857 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
858 )
859 (sequence () ; extract
860 (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
861 (ifield f-bitno32-prefixed)))
862 )
863 )
864 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
865 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT
866 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8)
867 (sequence () ; insert
868 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7))
869 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff))
870 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff))
871 )
872 (sequence () ; extract
873 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
874 (or (sll (ifield f-dsp-32-u8) 11)
875 (ifield f-bitno32-prefixed))))
876 )
877 )
878 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
879 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT
880 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8)
881 (sequence () ; insert
882 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7))
883 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff))
884 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11))
885 )
886 (sequence () ; extract
887 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
888 (or (sll (ifield f-dsp-32-s8) 11)
889 (ifield f-bitno32-prefixed))))
890 )
891 )
892 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
893 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT
894 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16)
895 (sequence () ; insert
896 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7))
897 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff))
898 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff))
899 )
900 (sequence () ; extract
901 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
902 (or (sll (ifield f-dsp-32-u16) 11)
903 (ifield f-bitno32-prefixed))))
904 )
905 )
907 ;-------------------------------------------------------------
908 ; Labels
909 ;-------------------------------------------------------------
911 (df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
912 ((value pc) (sub SI value (add SI pc 2))) ; insert
913 ((value pc) (add SI value (add SI pc 2))) ; extract
914 )
915 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
916 (f-2-2 f-7-1)
917 (sequence ((SI val)) ; insert
918 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
919 (set (ifield f-7-1) (and val #x1))
920 (set (ifield f-2-2) (srl val 1))
921 )
922 (sequence () ; extract
923 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
924 (ifield f-7-1))
925 2)))
926 )
927 )
928 (df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT
929 ((value pc) (sub SI value (add SI pc 1))) ; insert
930 ((value pc) (add SI value (add SI pc 1))) ; extract
931 )
932 (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
933 ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
934 (srl (and (sub value (add pc 1)) #xffff) 8)))
935 ((value pc) (add SI (or (srl (and value #xffff) 8)
936 (sra (sll (and value #xff) 24) 16)) (add pc 1)))
937 )
938 (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
939 ((value pc) (or SI
940 (or (srl value 16) (and value #xff00))
941 (sll (and value #xff) 16)))
942 ((value pc) (or SI
943 (or (srl value 16) (and value #xff00))
944 (sll (and value #xff) 16)))
945 )
946 (df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT
947 ((value pc) (sub SI value (add SI pc 2))) ; insert
948 ((value pc) (add SI value (add SI pc 2))) ; extract
949 )
950 (df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT
951 ((value pc) (sub SI value (add SI pc 2))) ; insert
952 ((value pc) (add SI value (add SI pc 2))) ; extract
953 )
954 (df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT
955 ((value pc) (sub SI value (add SI pc 2))) ; insert
956 ((value pc) (add SI value (add SI pc 2))) ; extract
957 )
958 (df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT
959 ((value pc) (sub SI value (add SI pc 2))) ; insert
960 ((value pc) (add SI value (add SI pc 2))) ; extract
961 )
963 ;-------------------------------------------------------------
964 ; Condition codes
965 ;-------------------------------------------------------------
967 (dnf f-cond16 "condition code" (all-isas) 12 4)
968 (dnf f-cond16j-5 "condition code" (all-isas) 5 3)
970 (dnmf f-cond32 "condition code" (all-isas) UINT
971 (f-9-1 f-13-3)
972 (sequence () ; insert
973 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1))
974 (set (ifield f-13-3) (and (ifield f-cond32) #x7))
975 )
976 (sequence () ; extract
977 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3)
978 (ifield f-13-3)))
979 )
980 )
982 (dnmf f-cond32j "condition code" (all-isas) UINT
983 (f-1-3 f-7-1)
984 (sequence () ; insert
985 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7))
986 (set (ifield f-7-1) (and (ifield f-cond32j) #x1))
987 )
988 (sequence () ; extract
989 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1)
990 (ifield f-7-1)))
991 )
992 )
993 \f
994 ;=============================================================
995 ; Hardware
996 ;
997 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ())
999 ;-------------------------------------------------------------
1000 ; General registers
1001 ; The actual registers are 16 bits
1002 ;-------------------------------------------------------------
1004 (define-hardware
1005 (name h-gr)
1006 (comment "general 16 bit registers")
1007 (attrs all-isas CACHE-ADDR)
1008 (type register HI (4))
1009 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))))
1011 ; Define different views of the grs as VIRTUAL with getter/setter specs
1012 ;
1013 (define-hardware
1014 (name h-gr-QI)
1015 (comment "general 8 bit registers")
1016 (attrs all-isas VIRTUAL)
1017 (type register QI (4))
1018 (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3)))
1019 (get (index) (and (if SI (mod index 2)
1020 (srl (reg h-gr (div index 2)) 8)
1021 (reg h-gr (div index 2)))
1022 #xff))
1023 (set (index newval) (set (reg h-gr (div index 2))
1024 (if SI (mod index 2)
1025 (or (and (reg h-gr (div index 2)) #xff)
1026 (sll (and newval #xff) 8))
1027 (or (and (reg h-gr (div index 2)) #xff00)
1028 (and newval #xff))))))
1030 (define-hardware
1031 (name h-gr-HI)
1032 (comment "general 16 bit registers")
1033 (attrs all-isas VIRTUAL)
1034 (type register HI (4))
1035 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))
1036 (get (index) (reg h-gr index))
1037 (set (index newval) (set (reg h-gr index) newval)))
1039 (define-hardware
1040 (name h-gr-SI)
1041 (comment "general 32 bit registers")
1042 (attrs all-isas VIRTUAL)
1043 (type register SI (2))
1044 (indices keyword "" (("r2r0" 0) ("r3r1" 1)))
1045 (get (index) (or SI
1046 (and (reg h-gr index) #xffff)
1047 (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
1048 (set (index newval) (sequence ()
1049 (set (reg h-gr index) (and newval #xffff))
1050 (set (reg h-gr (add index 2)) (srl newval 16)))))
1052 (define-hardware
1053 (name h-gr-ext-QI)
1054 (comment "general 16 bit registers")
1055 (attrs all-isas VIRTUAL)
1056 (type register HI (2))
1057 (indices keyword "" (("r0l" 0) ("r1l" 1)))
1058 (get (index) (reg h-gr-QI (mul index 2)))
1059 (set (index newval) (set (reg h-gr (mul index 2)) newval)))
1061 (define-hardware
1062 (name h-gr-ext-HI)
1063 (comment "general 16 bit registers")
1064 (attrs all-isas VIRTUAL)
1065 (type register SI (2))
1066 (indices keyword "" (("r0" 0) ("r1" 1)))
1067 (get (index) (reg h-gr (mul index 2)))
1068 (set (index newval) (set (reg h-gr-SI index) newval)))
1070 (define-hardware
1071 (name h-r0l)
1072 (comment "r0l register")
1073 (attrs all-isas VIRTUAL)
1074 (type register QI)
1075 (indices keyword "" (("r0l" 0)))
1076 (get () (reg h-gr-QI 0))
1077 (set (newval) (set (reg h-gr-QI 0) newval)))
1079 (define-hardware
1080 (name h-r0h)
1081 (comment "r0h register")
1082 (attrs all-isas VIRTUAL)
1083 (type register QI)
1084 (indices keyword "" (("r0h" 0)))
1085 (get () (reg h-gr-QI 1))
1086 (set (newval) (set (reg h-gr-QI 1) newval)))
1088 (define-hardware
1089 (name h-r1l)
1090 (comment "r1l register")
1091 (attrs all-isas VIRTUAL)
1092 (type register QI)
1093 (indices keyword "" (("r1l" 0)))
1094 (get () (reg h-gr-QI 2))
1095 (set (newval) (set (reg h-gr-QI 2) newval)))
1097 (define-hardware
1098 (name h-r1h)
1099 (comment "r1h register")
1100 (attrs all-isas VIRTUAL)
1101 (type register QI)
1102 (indices keyword "" (("r1h" 0)))
1103 (get () (reg h-gr-QI 3))
1104 (set (newval) (set (reg h-gr-QI 3) newval)))
1106 (define-hardware
1107 (name h-r0)
1108 (comment "r0 register")
1109 (attrs all-isas VIRTUAL)
1110 (type register HI)
1111 (indices keyword "" (("r0" 0)))
1112 (get () (reg h-gr 0))
1113 (set (newval) (set (reg h-gr 0) newval)))
1115 (define-hardware
1116 (name h-r1)
1117 (comment "r1 register")
1118 (attrs all-isas VIRTUAL)
1119 (type register HI)
1120 (indices keyword "" (("r1" 0)))
1121 (get () (reg h-gr 1))
1122 (set (newval) (set (reg h-gr 1) newval)))
1124 (define-hardware
1125 (name h-r2)
1126 (comment "r2 register")
1127 (attrs all-isas VIRTUAL)
1128 (type register HI)
1129 (indices keyword "" (("r2" 0)))
1130 (get () (reg h-gr 2))
1131 (set (newval) (set (reg h-gr 2) newval)))
1133 (define-hardware
1134 (name h-r3)
1135 (comment "r3 register")
1136 (attrs all-isas VIRTUAL)
1137 (type register HI)
1138 (indices keyword "" (("r3" 0)))
1139 (get () (reg h-gr 3))
1140 (set (newval) (set (reg h-gr 3) newval)))
1142 (define-hardware
1143 (name h-r0l-r0h)
1144 (comment "r0l or r0h")
1145 (attrs all-isas VIRTUAL)
1146 (type register QI (2))
1147 (indices keyword "" (("r0l" 0) ("r0h" 1)))
1148 (get (index) (reg h-gr-QI index))
1149 (set (index newval) (set (reg h-gr-QI index) newval)))
1151 (define-hardware
1152 (name h-r2r0)
1153 (comment "r2r0 register")
1154 (attrs all-isas VIRTUAL)
1155 (type register SI)
1156 (indices keyword "" (("r2r0" 0)))
1157 (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0)))
1158 (set (newval)
1159 (sequence ()
1160 (set (reg h-gr 0) newval)
1161 (set (reg h-gr 2) (sra newval 16)))))
1163 (define-hardware
1164 (name h-r3r1)
1165 (comment "r3r1 register")
1166 (attrs all-isas VIRTUAL)
1167 (type register SI)
1168 (indices keyword "" (("r3r1" 0)))
1169 (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1)))
1170 (set (newval)
1171 (sequence ()
1172 (set (reg h-gr 1) newval)
1173 (set (reg h-gr 3) (sra newval 16)))))
1175 (define-hardware
1176 (name h-r1r2r0)
1177 (comment "r1r2r0 register")
1178 (attrs all-isas VIRTUAL)
1179 (type register DI)
1180 (indices keyword "" (("r1r2r0" 0)))
1181 (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0))))
1182 (set (newval)
1183 (sequence ()
1184 (set (reg h-gr 0) newval)
1185 (set (reg h-gr 2) (sra newval 16))
1186 (set (reg h-gr 1) (sra newval 32)))))
1188 ;-------------------------------------------------------------
1189 ; Address registers
1190 ;-------------------------------------------------------------
1192 (define-hardware
1193 (name h-ar)
1194 (comment "address registers")
1195 (attrs all-isas)
1196 (type register USI (2))
1197 (indices keyword "" (("a0" 0) ("a1" 1)))
1198 (get (index) (c-call USI "h_ar_get_handler" index))
1199 (set (index newval) (c-call VOID "h_ar_set_handler" index newval)))
1201 ; Define different views of the ars as VIRTUAL with getter/setter specs
1202 (define-hardware
1203 (name h-ar-QI)
1204 (comment "8 bit view of address register")
1205 (attrs all-isas VIRTUAL)
1206 (type register QI (2))
1207 (indices keyword "" (("a0" 0) ("a1" 1)))
1208 (get (index) (reg h-ar index))
1209 (set (index newval) (set (reg h-ar index) newval)))
1211 (define-hardware
1212 (name h-ar-HI)
1213 (comment "16 bit view of address register")
1214 (attrs all-isas VIRTUAL)
1215 (type register HI (2))
1216 (indices keyword "" (("a0" 0) ("a1" 1)))
1217 (get (index) (reg h-ar index))
1218 (set (index newval) (set (reg h-ar index) newval)))
1220 (define-hardware
1221 (name h-ar-SI)
1222 (comment "32 bit view of address register")
1223 (attrs all-isas VIRTUAL)
1224 (type register SI)
1225 (indices keyword "" (("a1a0" 0)))
1226 (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0))))
1227 (set (newval) (sequence ()
1228 (set (reg h-ar 0) (and newval #xffff))
1229 (set (reg h-ar 1) (and (srl newval 16) #xffff)))))
1231 (define-hardware
1232 (name h-a0)
1233 (comment "16 bit view of address register")
1234 (attrs all-isas VIRTUAL)
1235 (type register HI)
1236 (indices keyword "" (("a0" 0)))
1237 (get () (reg h-ar 0))
1238 (set (newval) (set (reg h-ar 0) newval)))
1240 (define-hardware
1241 (name h-a1)
1242 (comment "16 bit view of address register")
1243 (attrs all-isas VIRTUAL)
1244 (type register HI)
1245 (indices keyword "" (("a1" 1)))
1246 (get () (reg h-ar 1))
1247 (set (newval) (set (reg h-ar 1) newval)))
1249 ; SB Register
1250 (define-hardware
1251 (name h-sb)
1252 (comment "SB register")
1253 (attrs all-isas)
1254 (type register USI)
1255 (get () (c-call USI "h_sb_get_handler"))
1256 (set (newval) (c-call VOID "h_sb_set_handler" newval))
1257 )
1259 ; FB Register
1260 (define-hardware
1261 (name h-fb)
1262 (comment "FB register")
1263 (attrs all-isas)
1264 (type register USI)
1265 (get () (c-call USI "h_fb_get_handler"))
1266 (set (newval) (c-call VOID "h_fb_set_handler" newval))
1267 )
1269 ; SP Register
1270 (define-hardware
1271 (name h-sp)
1272 (comment "SP register")
1273 (attrs all-isas)
1274 (type register USI)
1275 (get () (c-call USI "h_sp_get_handler"))
1276 (set (newval) (c-call VOID "h_sp_set_handler" newval))
1277 )
1279 ;-------------------------------------------------------------
1280 ; condition-code bits
1281 ;-------------------------------------------------------------
1283 (define-hardware
1284 (name h-sbit)
1285 (comment "sign bit")
1286 (attrs all-isas)
1287 (type register BI)
1288 )
1290 (define-hardware
1291 (name h-zbit)
1292 (comment "zero bit")
1293 (attrs all-isas)
1294 (type register BI)
1295 )
1297 (define-hardware
1298 (name h-obit)
1299 (comment "overflow bit")
1300 (attrs all-isas)
1301 (type register BI)
1302 )
1304 (define-hardware
1305 (name h-cbit)
1306 (comment "carry bit")
1307 (attrs all-isas)
1308 (type register BI)
1309 )
1311 (define-hardware
1312 (name h-ubit)
1313 (comment "stack pointer select bit")
1314 (attrs all-isas)
1315 (type register BI)
1316 )
1318 (define-hardware
1319 (name h-ibit)
1320 (comment "interrupt enable bit")
1321 (attrs all-isas)
1322 (type register BI)
1323 )
1325 (define-hardware
1326 (name h-bbit)
1327 (comment "register bank select bit")
1328 (attrs all-isas)
1329 (type register BI)
1330 )
1332 (define-hardware
1333 (name h-dbit)
1334 (comment "debug bit")
1335 (attrs all-isas)
1336 (type register BI)
1337 )
1339 (define-hardware
1340 (name h-dct0)
1341 (comment "dma transfer count 000")
1342 (attrs all-isas)
1343 (type register UHI)
1344 )
1345 (define-hardware
1346 (name h-dct1)
1347 (comment "dma transfer count 001")
1348 (attrs all-isas)
1349 (type register UHI)
1350 )
1351 (define-hardware
1352 (name h-svf)
1353 (comment "save flag 011")
1354 (attrs all-isas)
1355 (type register UHI)
1356 )
1357 (define-hardware
1358 (name h-drc0)
1359 (comment "dma transfer count reload 100")
1360 (attrs all-isas)
1361 (type register UHI)
1362 )
1363 (define-hardware
1364 (name h-drc1)
1365 (comment "dma transfer count reload 101")
1366 (attrs all-isas)
1367 (type register UHI)
1368 )
1369 (define-hardware
1370 (name h-dmd0)
1371 (comment "dma mode 110")
1372 (attrs all-isas)
1373 (type register UQI)
1374 )
1375 (define-hardware
1376 (name h-dmd1)
1377 (comment "dma mode 111")
1378 (attrs all-isas)
1379 (type register UQI)
1380 )
1381 (define-hardware
1382 (name h-intb)
1383 (comment "interrupt table 000")
1384 (attrs all-isas)
1385 (type register USI)
1386 )
1387 (define-hardware
1388 (name h-svp)
1389 (comment "save pc 100")
1390 (attrs all-isas)
1391 (type register UHI)
1392 )
1393 (define-hardware
1394 (name h-vct)
1395 (comment "vector 101")
1396 (attrs all-isas)
1397 (type register USI)
1398 )
1399 (define-hardware
1400 (name h-isp)
1401 (comment "interrupt stack ptr 111")
1402 (attrs all-isas)
1403 (type register USI)
1404 )
1405 (define-hardware
1406 (name h-dma0)
1407 (comment "dma mem addr 010")
1408 (attrs all-isas)
1409 (type register USI)
1410 )
1411 (define-hardware
1412 (name h-dma1)
1413 (comment "dma mem addr 011")
1414 (attrs all-isas)
1415 (type register USI)
1416 )
1417 (define-hardware
1418 (name h-dra0)
1419 (comment "dma mem addr reload 100")
1420 (attrs all-isas)
1421 (type register USI)
1422 )
1423 (define-hardware
1424 (name h-dra1)
1425 (comment "dma mem addr reload 101")
1426 (attrs all-isas)
1427 (type register USI)
1428 )
1429 (define-hardware
1430 (name h-dsa0)
1431 (comment "dma sfr addr 110")
1432 (attrs all-isas)
1433 (type register USI)
1434 )
1435 (define-hardware
1436 (name h-dsa1)
1437 (comment "dma sfr addr 111")
1438 (attrs all-isas)
1439 (type register USI)
1440 )
1442 ;-------------------------------------------------------------
1443 ; Condition code operand hardware
1444 ;-------------------------------------------------------------
1446 (define-hardware
1447 (name h-cond16)
1448 (comment "condition code hardware for m16c")
1449 (attrs m16c-isa MACH16)
1450 (type immediate UQI)
1451 (values keyword ""
1452 (("geu" #x00) ("c" #x00)
1453 ("gtu" #x01)
1454 ("eq" #x02) ("z" #x02)
1455 ("n" #x03)
1456 ("le" #x04)
1457 ("o" #x05)
1458 ("ge" #x06)
1459 ("ltu" #xf8) ("nc" #xf8)
1460 ("leu" #xf9)
1461 ("ne" #xfa) ("nz" #xfa)
1462 ("pz" #xfb)
1463 ("gt" #xfc)
1464 ("no" #xfd)
1465 ("lt" #xfe)
1466 )
1467 )
1468 )
1469 (define-hardware
1470 (name h-cond16c)
1471 (comment "condition code hardware for m16c")
1472 (attrs m16c-isa MACH16)
1473 (type immediate UQI)
1474 (values keyword ""
1475 (("geu" #x00) ("c" #x00)
1476 ("gtu" #x01)
1477 ("eq" #x02) ("z" #x02)
1478 ("n" #x03)
1479 ("ltu" #x04) ("nc" #x04)
1480 ("leu" #x05)
1481 ("ne" #x06) ("nz" #x06)
1482 ("pz" #x07)
1483 ("le" #x08)
1484 ("o" #x09)
1485 ("ge" #x0a)
1486 ("gt" #x0c)
1487 ("no" #x0d)
1488 ("lt" #x0e)
1489 )
1490 )
1491 )
1492 (define-hardware
1493 (name h-cond16j)
1494 (comment "condition code hardware for m16c")
1495 (attrs m16c-isa MACH16)
1496 (type immediate UQI)
1497 (values keyword ""
1498 (("le" #x08)
1499 ("o" #x09)
1500 ("ge" #x0a)
1501 ("gt" #x0c)
1502 ("no" #x0d)
1503 ("lt" #x0e)
1504 )
1505 )
1506 )
1507 (define-hardware
1508 (name h-cond16j-5)
1509 (comment "condition code hardware for m16c")
1510 (attrs m16c-isa MACH16)
1511 (type immediate UQI)
1512 (values keyword ""
1513 (("geu" #x00) ("c" #x00)
1514 ("gtu" #x01)
1515 ("eq" #x02) ("z" #x02)
1516 ("n" #x03)
1517 ("ltu" #x04) ("nc" #x04)
1518 ("leu" #x05)
1519 ("ne" #x06) ("nz" #x06)
1520 ("pz" #x07)
1521 )
1522 )
1523 )
1525 (define-hardware
1526 (name h-cond32)
1527 (comment "condition code hardware for m32c")
1528 (attrs m32c-isa MACH32)
1529 (type immediate UQI)
1530 (values keyword ""
1531 (("ltu" #x00) ("nc" #x00)
1532 ("leu" #x01)
1533 ("ne" #x02) ("nz" #x02)
1534 ("pz" #x03)
1535 ("no" #x04)
1536 ("gt" #x05)
1537 ("ge" #x06)
1538 ("geu" #x08) ("c" #x08)
1539 ("gtu" #x09)
1540 ("eq" #x0a) ("z" #x0a)
1541 ("n" #x0b)
1542 ("o" #x0c)
1543 ("le" #x0d)
1544 ("lt" #x0e)
1545 )
1546 )
1547 )
1549 (define-hardware
1550 (name h-cr1-32)
1551 (comment "control registers")
1552 (attrs m32c-isa MACH32)
1553 (type immediate UQI)
1554 (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4)
1555 ("drc1" 5) ("dmd0" 6) ("dmd1" 7))))
1556 (define-hardware
1557 (name h-cr2-32)
1558 (comment "control registers")
1559 (attrs m32c-isa MACH32)
1560 (type immediate UQI)
1561 (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4)
1562 ("vct" 5) ("isp" 7))))
1564 (define-hardware
1565 (name h-cr3-32)
1566 (comment "control registers")
1567 (attrs m32c-isa MACH32)
1568 (type immediate UQI)
1569 (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4)
1570 ("dra1" 5) ("dsa0" 6) ("dsa1" 7))))
1571 (define-hardware
1572 (name h-cr-16)
1573 (comment "control registers")
1574 (attrs m16c-isa MACH16)
1575 (type immediate UQI)
1576 (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4)
1577 ("sp" 5) ("sb" 6) ("fb" 7))))
1579 (define-hardware
1580 (name h-flags)
1581 (comment "flag hardware for m32c")
1582 (attrs all-isas)
1583 (type immediate UQI)
1584 (values keyword ""
1585 (("c" #x0)
1586 ("d" #x1)
1587 ("z" #x2)
1588 ("s" #x3)
1589 ("b" #x4)
1590 ("o" #x5)
1591 ("i" #x6)
1592 ("u" #x7)
1593 )
1594 )
1595 )
1597 ;-------------------------------------------------------------
1598 ; Misc helper hardware
1599 ;-------------------------------------------------------------
1601 (define-hardware
1602 (name h-shimm)
1603 (comment "shift immediate")
1604 (attrs all-isas)
1605 (type immediate (INT 4))
1606 (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6)
1607 ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4)
1608 ("-6" -3) ("-7" -2) ("-8" -1)
1609 )))
1610 (define-hardware
1611 (name h-bit-index)
1612 (comment "bit index for the next insn")
1613 (attrs m32c-isa MACH32)
1614 (type register UHI)
1615 )
1616 (define-hardware
1617 (name h-src-index)
1618 (comment "source index for the next insn")
1619 (attrs m32c-isa MACH32)
1620 (type register UHI)
1621 )
1622 (define-hardware
1623 (name h-dst-index)
1624 (comment "destination index for the next insn")
1625 (attrs m32c-isa MACH32)
1626 (type register UHI)
1627 )
1628 (define-hardware
1629 (name h-src-indirect)
1630 (comment "indirect src for the next insn")
1631 (attrs all-isas)
1632 (type register UHI)
1633 )
1634 (define-hardware
1635 (name h-dst-indirect)
1636 (comment "indirect dst for the next insn")
1637 (attrs all-isas)
1638 (type register UHI)
1639 )
1640 (define-hardware
1641 (name h-none)
1642 (comment "for storing unused values")
1643 (attrs m32c-isa MACH32)
1644 (type register SI)
1645 )
1646 \f
1647 ;=============================================================
1648 ; Operands
1649 ;-------------------------------------------------------------
1650 ; Source Registers
1651 ;-------------------------------------------------------------
1653 (dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn)
1654 (dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn)
1656 (dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI)
1657 (dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI)
1658 (dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI)
1660 (dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI)
1661 (dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI)
1662 (dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI)
1664 (dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an)
1665 (dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an)
1666 (dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an)
1668 (dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1669 (dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed)
1670 (dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed)
1671 (dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1673 (dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1674 (dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed)
1675 (dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed)
1676 (dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1678 ; Destination Registers
1679 ;
1680 (dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn)
1681 (dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1682 (dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn)
1683 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext)
1685 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil)
1686 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil)
1688 (dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1689 (dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI)
1690 (dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI)
1691 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed)
1692 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed)
1694 (dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1695 (dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI)
1696 (dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI)
1698 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s)
1700 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s)
1702 (dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1704 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1705 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1707 (dnop R0 "r0" (all-isas) h-r0 f-nil)
1708 (dnop R1 "r1" (all-isas) h-r1 f-nil)
1709 (dnop R2 "r2" (all-isas) h-r2 f-nil)
1710 (dnop R3 "r3" (all-isas) h-r3 f-nil)
1711 (dnop R0l "r0l" (all-isas) h-r0l f-nil)
1712 (dnop R0h "r0h" (all-isas) h-r0h f-nil)
1713 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil)
1714 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil)
1715 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil)
1717 (dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an)
1718 (dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an)
1719 (dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an)
1720 (dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an)
1721 (dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s)
1723 (dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1724 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed)
1725 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed)
1726 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1728 (dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1730 (dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1731 (dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed)
1732 (dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed)
1733 (dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1735 (dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an)
1737 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1738 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1740 (dnop A0 "a0" (all-isas) h-a0 f-nil)
1741 (dnop A1 "a1" (all-isas) h-a1 f-nil)
1743 (dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil)
1744 (dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil)
1745 (dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil)
1747 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa)
1748 h-sint DFLT f-5-1
1749 ((parse "r0l_r0h") (print "r0l_r0h")) () ()
1750 )
1752 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint
1753 DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ())
1754 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint
1755 DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ())
1757 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1)
1758 (dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1)
1760 ;-------------------------------------------------------------
1761 ; Offsets and absolutes
1762 ;-------------------------------------------------------------
1764 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas)
1765 h-uint DFLT f-dsp-8-u6
1766 ((parse "unsigned6")) () ()
1767 )
1768 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas)
1769 h-uint DFLT f-dsp-8-u8
1770 ((parse "unsigned8")) () ()
1771 )
1772 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas)
1773 h-uint DFLT f-dsp-8-u16
1774 ((parse "unsigned16")) () ()
1775 )
1776 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas)
1777 h-sint DFLT f-dsp-8-s8
1778 ((parse "signed8")) () ()
1779 )
1780 (define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas)
1781 h-sint DFLT f-dsp-8-s24
1782 ((parse "signed24")) () ()
1783 )
1784 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
1785 h-uint DFLT f-dsp-8-u24
1786 ((parse "unsigned24")) () ()
1787 )
1788 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
1789 h-uint DFLT f-dsp-10-u6
1790 ((parse "unsigned6")) () ()
1791 )
1792 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas)
1793 h-uint DFLT f-dsp-16-u8
1794 ((parse "unsigned8")) () ()
1795 )
1796 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas)
1797 h-uint DFLT f-dsp-16-u16
1798 ((parse "unsigned16")) () ()
1799 )
1800 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas)
1801 h-uint DFLT f-dsp-16-u24
1802 ((parse "unsigned20")) () ()
1803 )
1804 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas)
1805 h-uint DFLT f-dsp-16-u24
1806 ((parse "unsigned24")) () ()
1807 )
1808 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas)
1809 h-sint DFLT f-dsp-16-s8
1810 ((parse "signed8")) () ()
1811 )
1812 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas)
1813 h-sint DFLT f-dsp-16-s16
1814 ((parse "signed16")) () ()
1815 )
1816 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas)
1817 h-uint DFLT f-dsp-24-u8
1818 ((parse "unsigned8")) () ()
1819 )
1820 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas)
1821 h-uint DFLT f-dsp-24-u16
1822 ((parse "unsigned16")) () ()
1823 )
1824 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas)
1825 h-uint DFLT f-dsp-24-u24
1826 ((parse "unsigned20")) () ()
1827 )
1828 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas)
1829 h-uint DFLT f-dsp-24-u24
1830 ((parse "unsigned24")) () ()
1831 )
1832 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas)
1833 h-sint DFLT f-dsp-24-s8
1834 ((parse "signed8")) () ()
1835 )
1836 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas)
1837 h-sint DFLT f-dsp-24-s16
1838 ((parse "signed16")) () ()
1839 )
1840 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas)
1841 h-uint DFLT f-dsp-32-u8
1842 ((parse "unsigned8")) () ()
1843 )
1844 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas)
1845 h-uint DFLT f-dsp-32-u16
1846 ((parse "unsigned16")) () ()
1847 )
1848 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas)
1849 h-uint DFLT f-dsp-32-u24
1850 ((parse "unsigned24")) () ()
1851 )
1852 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas)
1853 h-uint DFLT f-dsp-32-u24
1854 ((parse "unsigned20")) () ()
1855 )
1856 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas)
1857 h-sint DFLT f-dsp-32-s8
1858 ((parse "signed8")) () ()
1859 )
1860 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas)
1861 h-sint DFLT f-dsp-32-s16
1862 ((parse "signed16")) () ()
1863 )
1864 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas)
1865 h-uint DFLT f-dsp-40-u8
1866 ((parse "unsigned8")) () ()
1867 )
1868 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
1869 h-sint DFLT f-dsp-40-s8
1870 ((parse "signed8")) () ()
1871 )
1872 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
1873 h-uint DFLT f-dsp-40-u16
1874 ((parse "unsigned16")) () ()
1875 )
1876 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
1877 h-sint DFLT f-dsp-40-s16
1878 ((parse "signed16")) () ()
1879 )
1880 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1881 h-uint DFLT f-dsp-40-u24
1882 ((parse "unsigned24")) () ()
1883 )
1884 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas)
1885 h-uint DFLT f-dsp-48-u8
1886 ((parse "unsigned8")) () ()
1887 )
1888 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
1889 h-sint DFLT f-dsp-48-s8
1890 ((parse "signed8")) () ()
1891 )
1892 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
1893 h-uint DFLT f-dsp-48-u16
1894 ((parse "unsigned16")) () ()
1895 )
1896 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
1897 h-sint DFLT f-dsp-48-s16
1898 ((parse "signed16")) () ()
1899 )
1900 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
1901 h-uint DFLT f-dsp-48-u24
1902 ((parse "unsigned24")) () ()
1903 )
1905 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas)
1906 h-sint DFLT f-imm-8-s4
1907 ((parse "signed4")) () ()
1908 )
1909 (define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas)
1910 h-sint DFLT f-imm-8-s4
1911 ((parse "signed4n")) () ()
1912 )
1913 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas)
1914 h-shimm DFLT f-imm-8-s4
1915 () () ()
1916 )
1917 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas)
1918 h-sint DFLT f-dsp-8-s8
1919 ((parse "signed8")) () ()
1920 )
1921 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas)
1922 h-sint DFLT f-dsp-8-s16
1923 ((parse "signed16")) () ()
1924 )
1925 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas)
1926 h-sint DFLT f-imm-12-s4
1927 ((parse "signed4")) () ()
1928 )
1929 (define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas)
1930 h-sint DFLT f-imm-12-s4
1931 ((parse "signed4n") (print "signed4n")) () ()
1932 )
1933 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1934 h-shimm DFLT f-imm-12-s4
1935 () () ()
1936 )
1937 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
1938 h-sint DFLT f-imm-13-u3
1939 ((parse "signed4")) () ()
1940 )
1941 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
1942 h-sint DFLT f-imm-20-s4
1943 ((parse "signed4")) () ()
1944 )
1945 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1946 h-shimm DFLT f-imm-20-s4
1947 () () ()
1948 )
1949 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas)
1950 h-sint DFLT f-dsp-16-s8
1951 ((parse "signed8")) () ()
1952 )
1953 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas)
1954 h-sint DFLT f-dsp-16-s16
1955 ((parse "signed16")) () ()
1956 )
1957 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas)
1958 h-sint DFLT f-dsp-16-s32
1959 ((parse "signed32")) () ()
1960 )
1961 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas)
1962 h-sint DFLT f-dsp-24-s8
1963 ((parse "signed8")) () ()
1964 )
1965 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas)
1966 h-sint DFLT f-dsp-24-s16
1967 ((parse "signed16")) () ()
1968 )
1969 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas)
1970 h-sint DFLT f-dsp-24-s32
1971 ((parse "signed32")) () ()
1972 )
1973 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas)
1974 h-sint DFLT f-dsp-32-s8
1975 ((parse "signed8")) () ()
1976 )
1977 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas)
1978 h-sint DFLT f-dsp-32-s32
1979 ((parse "signed32")) () ()
1980 )
1981 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas)
1982 h-sint DFLT f-dsp-32-s16
1983 ((parse "signed16")) () ()
1984 )
1985 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas)
1986 h-sint DFLT f-dsp-40-s8
1987 ((parse "signed8")) () ()
1988 )
1989 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas)
1990 h-sint DFLT f-dsp-40-s16
1991 ((parse "signed16")) () ()
1992 )
1993 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas)
1994 h-sint DFLT f-dsp-40-s32
1995 ((parse "signed32")) () ()
1996 )
1997 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas)
1998 h-sint DFLT f-dsp-48-s8
1999 ((parse "signed8")) () ()
2000 )
2001 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas)
2002 h-sint DFLT f-dsp-48-s16
2003 ((parse "signed16")) () ()
2004 )
2005 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas)
2006 h-sint DFLT f-dsp-48-s32
2007 ((parse "signed32")) () ()
2008 )
2009 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas)
2010 h-sint DFLT f-dsp-56-s8
2011 ((parse "signed8")) () ()
2012 )
2013 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas)
2014 h-sint DFLT f-dsp-56-s16
2015 ((parse "signed16")) () ()
2016 )
2017 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas)
2018 h-sint DFLT f-dsp-64-s16
2019 ((parse "signed16")) () ()
2020 )
2021 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa)
2022 h-sint DFLT f-imm1-S
2023 ((parse "imm1_S")) () ()
2024 )
2025 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa)
2026 h-sint DFLT f-imm3-S
2027 ((parse "imm3_S")) () ()
2028 )
2030 ;-------------------------------------------------------------
2031 ; Bit numbers
2032 ;-------------------------------------------------------------
2034 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa)
2035 h-uint DFLT f-dsp-16-u8
2036 ((parse "Bitno16R")) () ()
2037 )
2038 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed)
2039 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed)
2041 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa)
2042 h-uint DFLT f-dsp-16-u8
2043 ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
2044 )
2045 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
2046 h-sint DFLT f-dsp-16-s8
2047 ((parse "signed_bitbase8") (print "signed_bitbase")) () ()
2048 )
2049 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
2050 h-uint DFLT f-dsp-16-u16
2051 ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
2052 )
2053 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
2054 h-uint DFLT f-bitbase16-u11-S
2055 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2056 )
2058 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa)
2059 h-uint DFLT f-bitbase32-16-u11-unprefixed
2060 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2061 )
2062 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa)
2063 h-sint DFLT f-bitbase32-16-s11-unprefixed
2064 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2065 )
2066 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa)
2067 h-uint DFLT f-bitbase32-16-u19-unprefixed
2068 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2069 )
2070 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa)
2071 h-sint DFLT f-bitbase32-16-s19-unprefixed
2072 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2073 )
2074 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa)
2075 h-uint DFLT f-bitbase32-16-u27-unprefixed
2076 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2077 )
2078 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa)
2079 h-uint DFLT f-bitbase32-24-u11-prefixed
2080 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2081 )
2082 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa)
2083 h-sint DFLT f-bitbase32-24-s11-prefixed
2084 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2085 )
2086 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa)
2087 h-uint DFLT f-bitbase32-24-u19-prefixed
2088 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2089 )
2090 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa)
2091 h-sint DFLT f-bitbase32-24-s19-prefixed
2092 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2093 )
2094 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa)
2095 h-uint DFLT f-bitbase32-24-u27-prefixed
2096 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2097 )
2098 ;-------------------------------------------------------------
2099 ; Labels
2100 ;-------------------------------------------------------------
2102 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
2103 h-iaddr DFLT f-lab-5-3
2104 ((parse "lab_5_3")) () () )
2106 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
2107 h-iaddr DFLT f-lab32-jmp-s
2108 ((parse "lab_5_3")) () () )
2110 (dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
2111 (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
2112 (dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24)
2113 (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
2114 (dnop Lab-24-8 "8 bit label" (all-isas) h-iaddr f-lab-24-8)
2115 (dnop Lab-32-8 "8 bit label" (all-isas) h-iaddr f-lab-32-8)
2116 (dnop Lab-40-8 "8 bit label" (all-isas) h-iaddr f-lab-40-8)
2118 ;-------------------------------------------------------------
2119 ; Condition code bits
2120 ;-------------------------------------------------------------
2122 (dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil)
2123 (dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil)
2124 (dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil)
2125 (dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil)
2126 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil)
2127 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil)
2128 (dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil)
2129 (dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil)
2131 ;-------------------------------------------------------------
2132 ; Condition operands
2133 ;-------------------------------------------------------------
2135 (define-pmacro (cond-operand mach offset)
2136 (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8))
2137 )
2139 (cond-operand 16 16)
2140 (cond-operand 16 24)
2141 (cond-operand 16 32)
2142 (cond-operand 32 16)
2143 (cond-operand 32 24)
2144 (cond-operand 32 32)
2145 (cond-operand 32 40)
2147 (dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16)
2148 (dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16)
2149 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5)
2150 (dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32)
2151 (dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j)
2152 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16)
2153 (dnop flags16 "flags" (m16c-isa) h-flags f-9-3)
2154 (dnop flags32 "flags" (m32c-isa) h-flags f-13-3)
2155 (dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3)
2156 (dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3)
2157 (dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3)
2158 (dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3)
2159 (dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3)
2160 (dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3)
2162 ;-------------------------------------------------------------
2163 ; Suffixes
2164 ;-------------------------------------------------------------
2166 (define-full-operand Z "Suffix for zero format insns" (all-isas)
2167 h-sint DFLT f-nil
2168 ((parse "Z") (print "Z")) () ()
2169 )
2170 (define-full-operand S "Suffix for short format insns" (all-isas)
2171 h-sint DFLT f-nil
2172 ((parse "S") (print "S")) () ()
2173 )
2174 (define-full-operand Q "Suffix for quick format insns" (all-isas)
2175 h-sint DFLT f-nil
2176 ((parse "Q") (print "Q")) () ()
2177 )
2178 (define-full-operand G "Suffix for general format insns" (all-isas)
2179 h-sint DFLT f-nil
2180 ((parse "G") (print "G")) () ()
2181 )
2182 (define-full-operand X "Empty suffix" (all-isas)
2183 h-sint DFLT f-nil
2184 ((parse "X") (print "X")) () ()
2185 )
2186 (define-full-operand size "any size specifier" (all-isas)
2187 h-sint DFLT f-nil
2188 ((parse "size") (print "size")) () ()
2189 )
2190 ;-------------------------------------------------------------
2191 ; Misc
2192 ;-------------------------------------------------------------
2194 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil)
2195 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil)
2196 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil)
2197 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil)
2198 \f
2199 ;=============================================================
2200 ; Derived Operands
2202 ; Memory reference macros that clip addresses appropriately. Refer to
2203 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c
2204 ; or m32c.
2205 (define-pmacro (mem16 mode address)
2206 (mem mode (and #xffff address)))
2208 (define-pmacro (mem32 mode address)
2209 (mem mode (and #xffffff address)))
2211 ; Like mem16 and mem32, but takes MACH as a parameter. MACH must be
2212 ; either 16 or 32.
2213 (define-pmacro (mem-mach mach mode address)
2214 ((.sym mem mach) mode address))
2216 ;-------------------------------------------------------------
2217 ; Source
2218 ;-------------------------------------------------------------
2219 ; Rn direct
2220 ;-------------------------------------------------------------
2222 (define-pmacro (src16-Rn-direct-operand xmode)
2223 (begin
2224 (define-derived-operand
2225 (name (.sym src16-Rn-direct- xmode))
2226 (comment (.str "m16c Rn direct source " xmode))
2227 (attrs (machine 16))
2228 (mode xmode)
2229 (args ((.sym Src16Rn xmode)))
2230 (syntax (.str "$Src16Rn" xmode))
2231 (base-ifield f-8-4)
2232 (encoding (+ (f-8-2 0) (.sym Src16Rn xmode)))
2233 (ifield-assertion (eq f-8-2 0))
2234 (getter (trunc xmode (.sym Src16Rn xmode)))
2235 (setter (set (.sym Src16Rn xmode) newval))
2236 )
2237 )
2238 )
2239 (src16-Rn-direct-operand QI)
2240 (src16-Rn-direct-operand HI)
2242 (define-pmacro (src32-Rn-direct-operand group base xmode)
2243 (begin
2244 (define-derived-operand
2245 (name (.sym src32-Rn-direct- group - xmode))
2246 (comment (.str "m32c Rn direct source " xmode))
2247 (attrs (machine 32))
2248 (mode xmode)
2249 (args ((.sym Src32Rn group xmode)))
2250 (syntax (.str "$Src32Rn" group xmode))
2251 (base-ifield (.sym f- base -11))
2252 (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode)))
2253 (ifield-assertion (eq (.sym f- base -3) 4))
2254 (getter (trunc xmode (.sym Src32Rn group xmode)))
2255 (setter (set (.sym Src32Rn group xmode) newval))
2256 )
2257 )
2258 )
2260 (src32-Rn-direct-operand Unprefixed 1 QI)
2261 (src32-Rn-direct-operand Prefixed 9 QI)
2262 (src32-Rn-direct-operand Unprefixed 1 HI)
2263 (src32-Rn-direct-operand Prefixed 9 HI)
2264 (src32-Rn-direct-operand Unprefixed 1 SI)
2265 (src32-Rn-direct-operand Prefixed 9 SI)
2267 ;-------------------------------------------------------------
2268 ; An direct
2269 ;-------------------------------------------------------------
2271 (define-pmacro (src16-An-direct-operand xmode)
2272 (begin
2273 (define-derived-operand
2274 (name (.sym src16-An-direct- xmode))
2275 (comment (.str "m16c An direct destination " xmode))
2276 (attrs (machine 16))
2277 (mode xmode)
2278 (args ((.sym Src16An xmode)))
2279 (syntax (.str "$Src16An" xmode))
2280 (base-ifield f-8-4)
2281 (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode)))
2282 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0)))
2283 (getter (trunc xmode (.sym Src16An xmode)))
2284 (setter (set (.sym Src16An xmode) newval))
2285 )
2286 )
2287 )
2288 (src16-An-direct-operand QI)
2289 (src16-An-direct-operand HI)
2291 (define-pmacro (src32-An-direct-operand group base1 base2 xmode)
2292 (begin
2293 (define-derived-operand
2294 (name (.sym src32-An-direct- group - xmode))
2295 (comment (.str "m32c An direct destination " xmode))
2296 (attrs (machine 32))
2297 (mode xmode)
2298 (args ((.sym Src32An group xmode)))
2299 (syntax (.str "$Src32An" group xmode))
2300 (base-ifield (.sym f- base1 -11))
2301 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode)))
2302 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2303 (getter (trunc xmode (.sym Src32An group xmode)))
2304 (setter (set (.sym Src32An group xmode) newval))
2305 )
2306 )
2307 )
2309 (src32-An-direct-operand Unprefixed 1 10 QI)
2310 (src32-An-direct-operand Unprefixed 1 10 HI)
2311 (src32-An-direct-operand Unprefixed 1 10 SI)
2312 (src32-An-direct-operand Prefixed 9 18 QI)
2313 (src32-An-direct-operand Prefixed 9 18 HI)
2314 (src32-An-direct-operand Prefixed 9 18 SI)
2316 ;-------------------------------------------------------------
2317 ; An indirect
2318 ;-------------------------------------------------------------
2320 (define-pmacro (src16-An-indirect-operand xmode)
2321 (begin
2322 (define-derived-operand
2323 (name (.sym src16-An-indirect- xmode))
2324 (comment (.str "m16c An indirect destination " xmode))
2325 (attrs (machine 16))
2326 (mode xmode)
2327 (args (Src16An))
2328 (syntax "[$Src16An]")
2329 (base-ifield f-8-4)
2330 (encoding (+ (f-8-2 1) (f-10-1 1) Src16An))
2331 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1)))
2332 (getter (mem16 xmode Src16An))
2333 (setter (set (mem16 xmode Src16An) newval))
2334 )
2335 )
2336 )
2337 (src16-An-indirect-operand QI)
2338 (src16-An-indirect-operand HI)
2340 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode)
2341 (begin
2342 (define-derived-operand
2343 (name (.sym src32-An-indirect- group - xmode))
2344 (comment (.str "m32c An indirect destination " xmode))
2345 (attrs (machine 32))
2346 (mode xmode)
2347 (args ((.sym Src32An group)))
2348 (syntax (.str "[$Src32An" group "]"))
2349 (base-ifield (.sym f- base1 -11))
2350 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group)))
2351 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
2352 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group)
2353 (const 0)))
2354 (setter (c-call DFLT (.str "operand_setter_" xmode) newval
2355 (.sym Src32An group) (const 0)))
2356 ; (getter (mem32 xmode (.sym Src32An group)))
2357 ; (setter (set (mem32 xmode (.sym Src32An group)) newval))
2358 )
2359 )
2360 )
2362 (src32-An-indirect-operand Unprefixed 1 10 QI)
2363 (src32-An-indirect-operand Unprefixed 1 10 HI)
2364 (src32-An-indirect-operand Unprefixed 1 10 SI)
2365 (src32-An-indirect-operand Prefixed 9 18 QI)
2366 (src32-An-indirect-operand Prefixed 9 18 HI)
2367 (src32-An-indirect-operand Prefixed 9 18 SI)
2369 ;-------------------------------------------------------------
2370 ; dsp:d[r] relative
2371 ;-------------------------------------------------------------
2373 (define-pmacro (src16-relative-operand xmode)
2374 (begin
2375 (define-derived-operand
2376 (name (.sym src16-16-8-SB-relative- xmode))
2377 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
2378 (attrs (machine 16))
2379 (mode xmode)
2380 (args (Dsp-16-u8))
2381 (syntax "${Dsp-16-u8}[sb]")
2382 (base-ifield f-8-4)
2383 (encoding (+ (f-8-4 #xA) Dsp-16-u8))
2384 (ifield-assertion (eq f-8-4 #xA))
2385 (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb))))
2386 (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval))
2387 )
2388 (define-derived-operand
2389 (name (.sym src16-16-16-SB-relative- xmode))
2390 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
2391 (attrs (machine 16))
2392 (mode xmode)
2393 (args (Dsp-16-u16))
2394 (syntax "${Dsp-16-u16}[sb]")
2395 (base-ifield f-8-4)
2396 (encoding (+ (f-8-4 #xE) Dsp-16-u16))
2397 (ifield-assertion (eq f-8-4 #xE))
2398 (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb))))
2399 (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval))
2400 )
2401 (define-derived-operand
2402 (name (.sym src16-16-8-FB-relative- xmode))
2403 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
2404 (attrs (machine 16))
2405 (mode xmode)
2406 (args (Dsp-16-s8))
2407 (syntax "${Dsp-16-s8}[fb]")
2408 (base-ifield f-8-4)
2409 (encoding (+ (f-8-4 #xB) Dsp-16-s8))
2410 (ifield-assertion (eq f-8-4 #xB))
2411 (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb))))
2412 (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval))
2413 )
2414 (define-derived-operand
2415 (name (.sym src16-16-8-An-relative- xmode))
2416 (comment (.str "m16c dsp:8[An] relative destination " xmode))
2417 (attrs (machine 16))
2418 (mode xmode)
2419 (args (Src16An Dsp-16-u8))
2420 (syntax "${Dsp-16-u8}[$Src16An]")
2421 (base-ifield f-8-4)
2422 (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An))
2423 (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0)))
2424 (getter (mem16 xmode (add Dsp-16-u8 Src16An)))
2425 (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval))
2426 )
2427 (define-derived-operand
2428 (name (.sym src16-16-16-An-relative- xmode))
2429 (comment (.str "m16c dsp:16[An] relative destination " xmode))
2430 (attrs (machine 16))
2431 (mode xmode)
2432 (args (Src16An Dsp-16-u16))
2433 (syntax "${Dsp-16-u16}[$Src16An]")
2434 (base-ifield f-8-4)
2435 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An))
2436 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2437 (getter (mem16 xmode (add Dsp-16-u16 Src16An)))
2438 (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval))
2439 )
2440 )
2441 )
2443 (src16-relative-operand QI)
2444 (src16-relative-operand HI)
2446 (define-pmacro (src32-relative-operand offset group base1 base2 xmode)
2447 (begin
2448 (define-derived-operand
2449 (name (.sym src32- offset -8-SB-relative- group - xmode))
2450 (comment (.str "m32c dsp:8[sb] relative destination " xmode))
2451 (attrs (machine 32))
2452 (mode xmode)
2453 (args ((.sym Dsp- offset -u8)))
2454 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
2455 (base-ifield (.sym f- base1 -11))
2456 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
2457 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
2458 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8)))
2459 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8)))
2460 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
2461 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
2462 )
2463 (define-derived-operand
2464 (name (.sym src32- offset -16-SB-relative- group - xmode))
2465 (comment (.str "m32c dsp:16[sb] relative destination " xmode))
2466 (attrs (machine 32))
2467 (mode xmode)
2468 (args ((.sym Dsp- offset -u16)))
2469 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
2470 (base-ifield (.sym f- base1 -11))
2471 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
2472 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
2473 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16)))
2474 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16)))
2475 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
2476 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
2477 )
2478 (define-derived-operand
2479 (name (.sym src32- offset -8-FB-relative- group - xmode))
2480 (comment (.str "m32c dsp:8[fb] relative destination " xmode))
2481 (attrs (machine 32))
2482 (mode xmode)
2483 (args ((.sym Dsp- offset -s8)))
2484 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
2485 (base-ifield (.sym f- base1 -11))
2486 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
2487 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
2488 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8)))
2489 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8)))
2490 ; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
2491 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
2492 )
2493 (define-derived-operand
2494 (name (.sym src32- offset -16-FB-relative- group - xmode))
2495 (comment (.str "m32c dsp:16[fb] relative destination " xmode))
2496 (attrs (machine 32))
2497 (mode xmode)
2498 (args ((.sym Dsp- offset -s16)))
2499 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
2500 (base-ifield (.sym f- base1 -11))
2501 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
2502 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
2503 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16)))
2504 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16)))
2505 ; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))))
2506 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
2507 )
2508 (define-derived-operand
2509 (name (.sym src32- offset -8-An-relative- group - xmode))
2510 (comment (.str "m32c dsp:8[An] relative destination " xmode))
2511 (attrs (machine 32))
2512 (mode xmode)
2513 (args ((.sym Src32An group) (.sym Dsp- offset -u8)))
2514 (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]"))
2515 (base-ifield (.sym f- base1 -11))
2516 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group)))
2517 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
2518 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8)))
2519 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8)))
2520 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))))
2521 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval))
2522 )
2523 (define-derived-operand
2524 (name (.sym src32- offset -16-An-relative- group - xmode))
2525 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2526 (attrs (machine 32))
2527 (mode xmode)
2528 (args ((.sym Src32An group) (.sym Dsp- offset -u16)))
2529 (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]"))
2530 (base-ifield (.sym f- base1 -11))
2531 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group)))
2532 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
2533 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16)))
2534 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16)))
2535 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))))
2536 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval))
2537 )
2538 (define-derived-operand
2539 (name (.sym src32- offset -24-An-relative- group - xmode))
2540 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2541 (attrs (machine 32))
2542 (mode xmode)
2543 (args ((.sym Src32An group) (.sym Dsp- offset -u24)))
2544 (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]"))
2545 (base-ifield (.sym f- base1 -11))
2546 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group)))
2547 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
2548 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) ))
2549 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24)))
2550 ; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))))
2551 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval))
2552 )
2553 )
2554 )
2556 (src32-relative-operand 16 Unprefixed 1 10 QI)
2557 (src32-relative-operand 16 Unprefixed 1 10 HI)
2558 (src32-relative-operand 16 Unprefixed 1 10 SI)
2559 (src32-relative-operand 24 Prefixed 9 18 QI)
2560 (src32-relative-operand 24 Prefixed 9 18 HI)
2561 (src32-relative-operand 24 Prefixed 9 18 SI)
2563 ;-------------------------------------------------------------
2564 ; Absolute address
2565 ;-------------------------------------------------------------
2567 (define-pmacro (src16-absolute xmode)
2568 (begin
2569 (define-derived-operand
2570 (name (.sym src16-16-16-absolute- xmode))
2571 (comment (.str "m16c absolute address " xmode))
2572 (attrs (machine 16))
2573 (mode xmode)
2574 (args (Dsp-16-u16))
2575 (syntax (.str "${Dsp-16-u16}"))
2576 (base-ifield f-8-4)
2577 (encoding (+ (f-8-4 #xF) Dsp-16-u16))
2578 (ifield-assertion (eq f-8-4 #xF))
2579 (getter (mem16 xmode Dsp-16-u16))
2580 (setter (set (mem16 xmode Dsp-16-u16) newval))
2581 )
2582 )
2583 )
2585 (src16-absolute QI)
2586 (src16-absolute HI)
2588 (define-pmacro (src32-absolute offset group base1 base2 xmode)
2589 (begin
2590 (define-derived-operand
2591 (name (.sym src32- offset -16-absolute- group - xmode))
2592 (comment (.str "m32c absolute address " xmode))
2593 (attrs (machine 32))
2594 (mode xmode)
2595 (args ((.sym Dsp- offset -u16)))
2596 (syntax (.str "${Dsp-" offset "-u16}"))
2597 (base-ifield (.sym f- base1 -11))
2598 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2599 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2600 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16)))
2601 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16)))
2602 ; (getter (mem32 xmode (.sym Dsp- offset -u16)))
2603 ; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval))
2604 )
2605 (define-derived-operand
2606 (name (.sym src32- offset -24-absolute- group - xmode))
2607 (comment (.str "m32c absolute address " xmode))
2608 (attrs (machine 32))
2609 (mode xmode)
2610 (args ((.sym Dsp- offset -u24)))
2611 (syntax (.str "${Dsp-" offset "-u24}"))
2612 (base-ifield (.sym f- base1 -11))
2613 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2614 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2615 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24)))
2616 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24)))
2617 ; (getter (mem32 xmode (.sym Dsp- offset -u24)))
2618 ; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval))
2619 )
2620 )
2621 )
2623 (src32-absolute 16 Unprefixed 1 10 QI)
2624 (src32-absolute 16 Unprefixed 1 10 HI)
2625 (src32-absolute 16 Unprefixed 1 10 SI)
2626 (src32-absolute 24 Prefixed 9 18 QI)
2627 (src32-absolute 24 Prefixed 9 18 HI)
2628 (src32-absolute 24 Prefixed 9 18 SI)
2630 ;-------------------------------------------------------------
2631 ; An indirect indirect
2632 ;
2633 ; Double indirect addressing uses the lower 3 bytes of the value stored
2634 ; at the address referenced by 'op' as the effective address.
2635 ;-------------------------------------------------------------
2637 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff))
2639 ; (define-pmacro (src-An-indirect-indirect-operand xmode)
2640 ; (define-derived-operand
2641 ; (name (.sym src32-An-indirect-indirect- xmode))
2642 ; (comment (.str "m32c An indirect indirect destination " xmode))
2643 ; (attrs (machine 32))
2644 ; (mode xmode)
2645 ; (args (Src32AnPrefixed))
2646 ; (syntax (.str "[[$Src32AnPrefixed]]"))
2647 ; (base-ifield f-9-11)
2648 ; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed))
2649 ; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0)))
2650 ; (getter (mem32 xmode (indirect-addr Src32AnPrefixed)))
2651 ; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval))
2652 ; )
2653 ; )
2655 ; (src-An-indirect-indirect-operand QI)
2656 ; (src-An-indirect-indirect-operand HI)
2657 ; (src-An-indirect-indirect-operand SI)
2659 ;-------------------------------------------------------------
2660 ; Relative indirect
2661 ;-------------------------------------------------------------
2663 (define-pmacro (src-relative-indirect-operand xmode)
2664 (begin
2665 ; (define-derived-operand
2666 ; (name (.sym src32-24-8-SB-relative-indirect- xmode))
2667 ; (comment (.str "m32c dsp:8[sb] relative source " xmode))
2668 ; (attrs (machine 32))
2669 ; (mode xmode)
2670 ; (args (Dsp-24-u8))
2671 ; (syntax "[${Dsp-24-u8}[sb]]")
2672 ; (base-ifield f-9-11)
2673 ; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8))
2674 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2)))
2675 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))))
2676 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval))
2677 ; )
2678 ; (define-derived-operand
2679 ; (name (.sym src32-24-16-SB-relative-indirect- xmode))
2680 ; (comment (.str "m32c dsp:16[sb] relative source " xmode))
2681 ; (attrs (machine 32))
2682 ; (mode xmode)
2683 ; (args (Dsp-24-u16))
2684 ; (syntax "[${Dsp-24-u16}[sb]]")
2685 ; (base-ifield f-9-11)
2686 ; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16))
2687 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2)))
2688 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))))
2689 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval))
2690 ; )
2691 ; (define-derived-operand
2692 ; (name (.sym src32-24-8-FB-relative-indirect- xmode))
2693 ; (comment (.str "m32c dsp:8[fb] relative source " xmode))
2694 ; (attrs (machine 32))
2695 ; (mode xmode)
2696 ; (args (Dsp-24-s8))
2697 ; (syntax "[${Dsp-24-s8}[fb]]")
2698 ; (base-ifield f-9-11)
2699 ; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8))
2700 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3)))
2701 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))))
2702 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval))
2703 ; )
2704 ; (define-derived-operand
2705 ; (name (.sym src32-24-16-FB-relative-indirect- xmode))
2706 ; (comment (.str "m32c dsp:16[fb] relative source " xmode))
2707 ; (attrs (machine 32))
2708 ; (mode xmode)
2709 ; (args (Dsp-24-s16))
2710 ; (syntax "[${Dsp-24-s16}[fb]]")
2711 ; (base-ifield f-9-11)
2712 ; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16))
2713 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3)))
2714 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))))
2715 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval))
2716 ; )
2717 ; (define-derived-operand
2718 ; (name (.sym src32-24-8-An-relative-indirect- xmode))
2719 ; (comment (.str "m32c dsp:8[An] relative indirect source " xmode))
2720 ; (attrs (machine 32))
2721 ; (mode xmode)
2722 ; (args (Src32AnPrefixed Dsp-24-u8))
2723 ; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]")
2724 ; (base-ifield f-9-11)
2725 ; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed))
2726 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0)))
2727 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))))
2728 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval))
2729 ; )
2730 ; (define-derived-operand
2731 ; (name (.sym src32-24-16-An-relative-indirect- xmode))
2732 ; (comment (.str "m32c dsp:16[An] relative source " xmode))
2733 ; (attrs (machine 32))
2734 ; (mode xmode)
2735 ; (args (Src32AnPrefixed Dsp-24-u16))
2736 ; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]")
2737 ; (base-ifield f-9-11)
2738 ; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed))
2739 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0)))
2740 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))))
2741 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval))
2742 ; )
2743 ; (define-derived-operand
2744 ; (name (.sym src32-24-24-An-relative-indirect- xmode))
2745 ; (comment (.str "m32c dsp:24[An] relative source " xmode))
2746 ; (attrs (machine 32))
2747 ; (mode xmode)
2748 ; (args (Src32AnPrefixed Dsp-24-u24))
2749 ; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]")
2750 ; (base-ifield f-9-11)
2751 ; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed))
2752 ; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0)))
2753 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))))
2754 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval))
2755 ; )
2756 )
2757 )
2759 ; (src-relative-indirect-operand QI)
2760 ; (src-relative-indirect-operand HI)
2761 ; (src-relative-indirect-operand SI)
2763 ;-------------------------------------------------------------
2764 ; Absolute Indirect address
2765 ;-------------------------------------------------------------
2767 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode)
2768 (begin
2769 ; (define-derived-operand
2770 ; (name (.sym src32- offset -16-absolute-indirect-derived- xmode))
2771 ; (comment (.str "m32c absolute indirect address " xmode))
2772 ; (attrs (machine 32))
2773 ; (mode xmode)
2774 ; (args ((.sym Dsp- offset -u16)))
2775 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
2776 ; (base-ifield (.sym f- base1 -11))
2777 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2778 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2779 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
2780 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
2781 ; )
2782 ; (define-derived-operand
2783 ; (name (.sym src32- offset -24-absolute-indirect-derived- xmode))
2784 ; (comment (.str "m32c absolute indirect address " xmode))
2785 ; (attrs (machine 32))
2786 ; (mode xmode)
2787 ; (args ((.sym Dsp- offset -u24)))
2788 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
2789 ; (base-ifield (.sym f- base1 -11))
2790 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2791 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2792 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
2793 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
2794 ; )
2795 )
2796 )
2798 (src32-absolute-indirect 24 9 18 QI)
2799 (src32-absolute-indirect 24 9 18 HI)
2800 (src32-absolute-indirect 24 9 18 SI)
2802 ;-------------------------------------------------------------
2803 ; Register relative source operands for short format insns
2804 ;-------------------------------------------------------------
2806 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3)
2807 (begin
2808 (define-derived-operand
2809 (name (.sym src mach -2-S-8-SB-relative- xmode))
2810 (comment (.str "m" mach "c SB relative address"))
2811 (attrs (machine mach))
2812 (mode xmode)
2813 (args (Dsp-8-u8))
2814 (syntax "${Dsp-8-u8}[sb]")
2815 (base-ifield (.sym f- base -2))
2816 (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8))
2817 (ifield-assertion (eq (.sym f- base -2) opc1))
2818 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
2819 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
2820 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))))
2821 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval))
2822 )
2823 (define-derived-operand
2824 (name (.sym src mach -2-S-8-FB-relative- xmode))
2825 (comment (.str "m" mach "c FB relative address"))
2826 (attrs (machine mach))
2827 (mode xmode)
2828 (args (Dsp-8-s8))
2829 (syntax "${Dsp-8-s8}[fb]")
2830 (base-ifield (.sym f- base -2))
2831 (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8))
2832 (ifield-assertion (eq (.sym f- base -2) opc2))
2833 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
2834 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
2835 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))))
2836 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval))
2837 )
2838 (define-derived-operand
2839 (name (.sym src mach -2-S-16-absolute- xmode))
2840 (comment (.str "m" mach "c absolute address"))
2841 (attrs (machine mach))
2842 (mode xmode)
2843 (args (Dsp-8-u16))
2844 (syntax "${Dsp-8-u16}")
2845 (base-ifield (.sym f- base -2))
2846 (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16))
2847 (ifield-assertion (eq (.sym f- base -2) opc3))
2848 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
2849 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
2850 ; (getter (mem-mach mach xmode Dsp-8-u16))
2851 ; (setter (set (mem-mach mach xmode Dsp-8-u16) newval))
2852 )
2853 )
2854 )
2856 (src-2-S-operands 16 QI 6 1 2 3)
2857 (src-2-S-operands 32 QI 2 2 3 1)
2858 (src-2-S-operands 32 HI 2 2 3 1)
2860 ;=============================================================
2861 ; Derived Operands
2862 ;-------------------------------------------------------------
2863 ; Destination
2864 ;-------------------------------------------------------------
2865 ; Rn direct
2866 ;-------------------------------------------------------------
2868 (define-pmacro (dst16-Rn-direct-operand xmode)
2869 (begin
2870 (define-derived-operand
2871 (name (.sym dst16-Rn-direct- xmode))
2872 (comment (.str "m16c Rn direct destination " xmode))
2873 (attrs (machine 16))
2874 (mode xmode)
2875 (args ((.sym Dst16Rn xmode)))
2876 (syntax (.str "$Dst16Rn" xmode))
2877 (base-ifield f-12-4)
2878 (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode)))
2879 (ifield-assertion (eq f-12-2 0))
2880 (getter (trunc xmode (.sym Dst16Rn xmode)))
2881 (setter (set (.sym Dst16Rn xmode) newval))
2882 )
2883 )
2884 )
2886 (dst16-Rn-direct-operand QI)
2887 (dst16-Rn-direct-operand HI)
2888 (dst16-Rn-direct-operand SI)
2890 (define-derived-operand
2891 (name dst16-Rn-direct-Ext-QI)
2892 (comment "m16c Rn direct destination QI")
2893 (attrs (machine 16))
2894 (mode HI)
2895 (args (Dst16RnExtQI))
2896 (syntax "$Dst16RnExtQI")
2897 (base-ifield f-12-4)
2898 (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0)))
2899 (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0)))
2900 (getter (trunc QI (.sym Dst16RnExtQI)))
2901 (setter (set Dst16RnExtQI newval))
2902 )
2904 (define-pmacro (dst32-Rn-direct-operand group base xmode)
2905 (begin
2906 (define-derived-operand
2907 (name (.sym dst32-Rn-direct- group - xmode))
2908 (comment (.str "m32c Rn direct destination " xmode))
2909 (attrs (machine 32))
2910 (mode xmode)
2911 (args ((.sym Dst32Rn group xmode)))
2912 (syntax (.str "$Dst32Rn" group xmode))
2913 (base-ifield (.sym f- base -6))
2914 (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode)))
2915 (ifield-assertion (eq (.sym f- base -3) 4))
2916 (getter (trunc xmode (.sym Dst32Rn group xmode)))
2917 (setter (set (.sym Dst32Rn group xmode) newval))
2918 )
2919 )
2920 )
2922 (dst32-Rn-direct-operand Unprefixed 4 QI)
2923 (dst32-Rn-direct-operand Prefixed 12 QI)
2924 (dst32-Rn-direct-operand Unprefixed 4 HI)
2925 (dst32-Rn-direct-operand Prefixed 12 HI)
2926 (dst32-Rn-direct-operand Unprefixed 4 SI)
2927 (dst32-Rn-direct-operand Prefixed 12 SI)
2929 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode)
2930 (begin
2931 (define-derived-operand
2932 (name (.sym dst32-Rn-direct- group - smode))
2933 (comment (.str "m32c Rn direct destination " smode))
2934 (attrs (machine 32))
2935 (mode dmode)
2936 (args ((.sym Dst32Rn group smode)))
2937 (syntax (.str "$Dst32Rn" group smode))
2938 (base-ifield (.sym f- base1 -6))
2939 (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode)))
2940 (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1)))
2941 (getter (trunc smode (.sym Dst32Rn group smode)))
2942 (setter (set (.sym Dst32Rn group smode) newval))
2943 )
2944 )
2945 )
2947 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI)
2948 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI)
2950 (define-derived-operand
2951 (name dst32-R3-direct-Unprefixed-HI)
2952 (comment "m32c R3 direct HI")
2953 (attrs (machine 32))
2954 (mode HI)
2955 (args (R3))
2956 (syntax "$R3")
2957 (base-ifield f-4-6)
2958 (encoding (+ (f-4-3 4) (f-8-2 #x1)))
2959 (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1)))
2960 (getter (trunc HI R3))
2961 (setter (set R3 newval))
2962 )
2963 ;-------------------------------------------------------------
2964 ; An direct
2965 ;-------------------------------------------------------------
2967 (define-pmacro (dst16-An-direct-operand xmode)
2968 (begin
2969 (define-derived-operand
2970 (name (.sym dst16-An-direct- xmode))
2971 (comment (.str "m16c An direct destination " xmode))
2972 (attrs (machine 16))
2973 (mode xmode)
2974 (args ((.sym Dst16An xmode)))
2975 (syntax (.str "$Dst16An" xmode))
2976 (base-ifield f-12-4)
2977 (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode)))
2978 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
2979 (getter (trunc xmode (.sym Dst16An xmode)))
2980 (setter (set (.sym Dst16An xmode) newval))
2981 )
2982 )
2983 )
2985 (dst16-An-direct-operand QI)
2986 (dst16-An-direct-operand HI)
2987 (dst16-An-direct-operand SI)
2989 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode)
2990 (begin
2991 (define-derived-operand
2992 (name (.sym dst32-An-direct- group - xmode))
2993 (comment (.str "m32c An direct destination " xmode))
2994 (attrs (machine 32))
2995 (mode xmode)
2996 (args ((.sym Dst32An group xmode)))
2997 (syntax (.str "$Dst32An" group xmode))
2998 (base-ifield (.sym f- base1 -6))
2999 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode)))
3000 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3001 (getter (trunc xmode (.sym Dst32An group xmode)))
3002 (setter (set (.sym Dst32An group xmode) newval))
3003 )
3004 )
3005 )
3007 (dst32-An-direct-operand Unprefixed 4 8 QI)
3008 (dst32-An-direct-operand Prefixed 12 16 QI)
3009 (dst32-An-direct-operand Unprefixed 4 8 HI)
3010 (dst32-An-direct-operand Prefixed 12 16 HI)
3011 (dst32-An-direct-operand Unprefixed 4 8 SI)
3012 (dst32-An-direct-operand Prefixed 12 16 SI)
3014 ;-------------------------------------------------------------
3015 ; An indirect
3016 ;-------------------------------------------------------------
3018 (define-pmacro (dst16-An-indirect-operand xmode)
3019 (begin
3020 (define-derived-operand
3021 (name (.sym dst16-An-indirect- xmode))
3022 (comment (.str "m16c An indirect destination " xmode))
3023 (attrs (machine 16))
3024 (mode xmode)
3025 (args (Dst16An))
3026 (syntax "[$Dst16An]")
3027 (base-ifield f-12-4)
3028 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3029 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3030 (getter (mem16 xmode Dst16An))
3031 (setter (set (mem16 xmode Dst16An) newval))
3032 )
3033 )
3034 )
3036 (dst16-An-indirect-operand QI)
3037 (dst16-An-indirect-operand HI)
3038 (dst16-An-indirect-operand SI)
3040 (define-derived-operand
3041 (name dst16-An-indirect-Ext-QI)
3042 (comment "m16c An indirect destination QI")
3043 (attrs (machine 16))
3044 (mode HI)
3045 (args (Dst16An))
3046 (syntax "[$Dst16An]")
3047 (base-ifield f-12-4)
3048 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3049 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3050 (getter (mem16 QI Dst16An))
3051 (setter (set (mem16 HI Dst16An) newval))
3052 )
3054 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode)
3055 (begin
3056 (define-derived-operand
3057 (name (.sym dst32-An-indirect- group - smode))
3058 (comment (.str "m32c An indirect destination " smode))
3059 (attrs (machine 32))
3060 (mode dmode)
3061 (args ((.sym Dst32An group)))
3062 (syntax (.str "[$Dst32An" group "]"))
3063 (base-ifield (.sym f- base1 -6))
3064 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group)))
3065 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3066 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group)
3067 (const 0)))
3068 (setter (c-call DFLT (.str "operand_setter_" dmode) newval
3069 (.sym Dst32An group) (const 0)))
3070 ; (getter (mem32 smode (.sym Dst32An group)))
3071 ; (setter (set (mem32 dmode (.sym Dst32An group)) newval))
3072 )
3073 )
3074 )
3076 (dst32-An-indirect-operand Unprefixed 4 8 QI QI)
3077 (dst32-An-indirect-operand Prefixed 12 16 QI QI)
3078 (dst32-An-indirect-operand Unprefixed 4 8 HI HI)
3079 (dst32-An-indirect-operand Prefixed 12 16 HI HI)
3080 (dst32-An-indirect-operand Unprefixed 4 8 SI SI)
3081 (dst32-An-indirect-operand Prefixed 12 16 SI SI)
3082 (dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI)
3083 (dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI)
3085 ;-------------------------------------------------------------
3086 ; dsp:d[r] relative
3087 ;-------------------------------------------------------------
3089 (define-pmacro (dst16-relative-operand offset xmode)
3090 (begin
3091 (define-derived-operand
3092 (name (.sym dst16- offset -8-SB-relative- xmode))
3093 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
3094 (attrs (machine 16))
3095 (mode xmode)
3096 (args ((.sym Dsp- offset -u8)))
3097 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3098 (base-ifield f-12-4)
3099 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3100 (ifield-assertion (eq f-12-4 #xA))
3101 (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
3102 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3103 )
3104 (define-derived-operand
3105 (name (.sym dst16- offset -16-SB-relative- xmode))
3106 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
3107 (attrs (machine 16))
3108 (mode xmode)
3109 (args ((.sym Dsp- offset -u16)))
3110 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3111 (base-ifield f-12-4)
3112 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3113 (ifield-assertion (eq f-12-4 #xE))
3114 (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
3115 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3116 )
3117 (define-derived-operand
3118 (name (.sym dst16- offset -8-FB-relative- xmode))
3119 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
3120 (attrs (machine 16))
3121 (mode xmode)
3122 (args ((.sym Dsp- offset -s8)))
3123 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3124 (base-ifield f-12-4)
3125 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3126 (ifield-assertion (eq f-12-4 #xB))
3127 (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
3128 (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3129 )
3130 (define-derived-operand
3131 (name (.sym dst16- offset -8-An-relative- xmode))
3132 (comment (.str "m16c dsp:8[An] relative destination " xmode))
3133 (attrs (machine 16))
3134 (mode xmode)
3135 (args (Dst16An (.sym Dsp- offset -u8)))
3136 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3137 (base-ifield f-12-4)
3138 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3139 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3140 (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)))
3141 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3142 )
3143 (define-derived-operand
3144 (name (.sym dst16- offset -16-An-relative- xmode))
3145 (comment (.str "m16c dsp:16[An] relative destination " xmode))
3146 (attrs (machine 16))
3147 (mode xmode)
3148 (args (Dst16An (.sym Dsp- offset -u16)))
3149 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3150 (base-ifield f-12-4)
3151 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3152 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3153 (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)))
3154 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3155 )
3156 )
3157 )
3159 (dst16-relative-operand 16 QI)
3160 (dst16-relative-operand 24 QI)
3161 (dst16-relative-operand 32 QI)
3162 (dst16-relative-operand 40 QI)
3163 (dst16-relative-operand 48 QI)
3164 (dst16-relative-operand 16 HI)
3165 (dst16-relative-operand 24 HI)
3166 (dst16-relative-operand 32 HI)
3167 (dst16-relative-operand 40 HI)
3168 (dst16-relative-operand 48 HI)
3169 (dst16-relative-operand 16 SI)
3170 (dst16-relative-operand 24 SI)
3171 (dst16-relative-operand 32 SI)
3172 (dst16-relative-operand 40 SI)
3173 (dst16-relative-operand 48 SI)
3175 (define-pmacro (dst16-relative-Ext-operand offset smode dmode)
3176 (begin
3177 (define-derived-operand
3178 (name (.sym dst16- offset -8-SB-relative-Ext- smode))
3179 (comment (.str "m16c dsp:8[sb] relative destination " smode))
3180 (attrs (machine 16))
3181 (mode dmode)
3182 (args ((.sym Dsp- offset -u8)))
3183 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3184 (base-ifield f-12-4)
3185 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3186 (ifield-assertion (eq f-12-4 #xA))
3187 (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3188 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3189 )
3190 (define-derived-operand
3191 (name (.sym dst16- offset -16-SB-relative-Ext- smode))
3192 (comment (.str "m16c dsp:16[sb] relative destination " smode))
3193 (attrs (machine 16))
3194 (mode dmode)
3195 (args ((.sym Dsp- offset -u16)))
3196 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3197 (base-ifield f-12-4)
3198 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3199 (ifield-assertion (eq f-12-4 #xE))
3200 (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3201 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3202 )
3203 (define-derived-operand
3204 (name (.sym dst16- offset -8-FB-relative-Ext- smode))
3205 (comment (.str "m16c dsp:8[fb] relative destination " smode))
3206 (attrs (machine 16))
3207 (mode dmode)
3208 (args ((.sym Dsp- offset -s8)))
3209 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3210 (base-ifield f-12-4)
3211 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3212 (ifield-assertion (eq f-12-4 #xB))
3213 (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3214 (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3215 )
3216 (define-derived-operand
3217 (name (.sym dst16- offset -8-An-relative-Ext- smode))
3218 (comment (.str "m16c dsp:8[An] relative destination " smode))
3219 (attrs (machine 16))
3220 (mode dmode)
3221 (args (Dst16An (.sym Dsp- offset -u8)))
3222 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3223 (base-ifield f-12-4)
3224 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3225 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3226 (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An)))
3227 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3228 )
3229 (define-derived-operand
3230 (name (.sym dst16- offset -16-An-relative-Ext- smode))
3231 (comment (.str "m16c dsp:16[An] relative destination " smode))
3232 (attrs (machine 16))
3233 (mode dmode)
3234 (args (Dst16An (.sym Dsp- offset -u16)))
3235 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3236 (base-ifield f-12-4)
3237 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3238 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3239 (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An)))
3240 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3241 )
3242 )
3243 )
3245 (dst16-relative-Ext-operand 16 QI HI)
3247 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode)
3248 (begin
3249 (define-derived-operand
3250 (name (.sym dst32- offset -8-SB-relative- group - smode))
3251 (comment (.str "m32c dsp:8[sb] relative destination " smode))
3252 (attrs (machine 32))
3253 (mode dmode)
3254 (args ((.sym Dsp- offset -u8)))
3255 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3256 (base-ifield (.sym f- base1 -6))
3257 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
3258 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3259 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8)))
3260 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8)))
3261 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3262 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3263 )
3264 (define-derived-operand
3265 (name (.sym dst32- offset -16-SB-relative- group - smode))
3266 (comment (.str "m32c dsp:16[sb] relative destination " smode))
3267 (attrs (machine 32))
3268 (mode dmode)
3269 (args ((.sym Dsp- offset -u16)))
3270 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3271 (base-ifield (.sym f- base1 -6))
3272 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
3273 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3274 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16)))
3275 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16)))
3276 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3277 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3278 )
3279 (define-derived-operand
3280 (name (.sym dst32- offset -8-FB-relative- group - smode))
3281 (comment (.str "m32c dsp:8[fb] relative destination " smode))
3282 (attrs (machine 32))
3283 (mode dmode)
3284 (args ((.sym Dsp- offset -s8)))
3285 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3286 (base-ifield (.sym f- base1 -6))
3287 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
3288 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3289 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8)))
3290 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8)))
3291 ; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3292 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3293 )
3294 (define-derived-operand
3295 (name (.sym dst32- offset -16-FB-relative- group - smode))
3296 (comment (.str "m32c dsp:16[fb] relative destination " smode))
3297 (attrs (machine 32))
3298 (mode dmode)
3299 (args ((.sym Dsp- offset -s16)))
3300 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
3301 (base-ifield (.sym f- base1 -6))
3302 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
3303 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3304 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16)))
3305 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16)))
3306 ; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb))))
3307 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
3308 )
3309 (define-derived-operand
3310 (name (.sym dst32- offset -8-An-relative- group - smode))
3311 (comment (.str "m32c dsp:8[An] relative destination " smode))
3312 (attrs (machine 32))
3313 (mode dmode)
3314 (args ((.sym Dst32An group) (.sym Dsp- offset -u8)))
3315 (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]"))
3316 (base-ifield (.sym f- base1 -6))
3317 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group)))
3318 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3319 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8)))
3320 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8)))
3321 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group))))
3322 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval))
3323 )
3324 (define-derived-operand
3325 (name (.sym dst32- offset -16-An-relative- group - smode))
3326 (comment (.str "m32c dsp:16[An] relative destination " smode))
3327 (attrs (machine 32))
3328 (mode dmode)
3329 (args ((.sym Dst32An group) (.sym Dsp- offset -u16)))
3330 (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]"))
3331 (base-ifield (.sym f- base1 -6))
3332 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group)))
3333 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3334 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16)))
3335 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16)))
3336 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group))))
3337 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval))
3338 )
3339 (define-derived-operand
3340 (name (.sym dst32- offset -24-An-relative- group - smode))
3341 (comment (.str "m32c dsp:16[An] relative destination " smode))
3342 (attrs (machine 32))
3343 (mode dmode)
3344 (args ((.sym Dst32An group) (.sym Dsp- offset -u24)))
3345 (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]"))
3346 (base-ifield (.sym f- base1 -6))
3347 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group)))
3348 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3349 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24)))
3350 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24)))
3351 ; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group))))
3352 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval))
3353 )
3354 )
3355 )
3357 (dst32-relative-operand 16 Unprefixed 4 8 QI QI)
3358 (dst32-relative-operand 24 Unprefixed 4 8 QI QI)
3359 (dst32-relative-operand 32 Unprefixed 4 8 QI QI)
3360 (dst32-relative-operand 40 Unprefixed 4 8 QI QI)
3361 (dst32-relative-operand 16 Unprefixed 4 8 HI HI)
3362 (dst32-relative-operand 24 Unprefixed 4 8 HI HI)
3363 (dst32-relative-operand 32 Unprefixed 4 8 HI HI)
3364 (dst32-relative-operand 40 Unprefixed 4 8 HI HI)
3365 (dst32-relative-operand 16 Unprefixed 4 8 SI SI)
3366 (dst32-relative-operand 24 Unprefixed 4 8 SI SI)
3367 (dst32-relative-operand 32 Unprefixed 4 8 SI SI)
3368 (dst32-relative-operand 40 Unprefixed 4 8 SI SI)
3370 (dst32-relative-operand 24 Prefixed 12 16 QI QI)
3371 (dst32-relative-operand 32 Prefixed 12 16 QI QI)
3372 (dst32-relative-operand 40 Prefixed 12 16 QI QI)
3373 (dst32-relative-operand 48 Prefixed 12 16 QI QI)
3374 (dst32-relative-operand 24 Prefixed 12 16 HI HI)
3375 (dst32-relative-operand 32 Prefixed 12 16 HI HI)
3376 (dst32-relative-operand 40 Prefixed 12 16 HI HI)
3377 (dst32-relative-operand 48 Prefixed 12 16 HI HI)
3378 (dst32-relative-operand 24 Prefixed 12 16 SI SI)
3379 (dst32-relative-operand 32 Prefixed 12 16 SI SI)
3380 (dst32-relative-operand 40 Prefixed 12 16 SI SI)
3381 (dst32-relative-operand 48 Prefixed 12 16 SI SI)
3383 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI)
3384 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI)
3386 ;-------------------------------------------------------------
3387 ; Absolute address
3388 ;-------------------------------------------------------------
3390 (define-pmacro (dst16-absolute offset xmode)
3391 (begin
3392 (define-derived-operand
3393 (name (.sym dst16- offset -16-absolute- xmode))
3394 (comment (.str "m16c absolute address " xmode))
3395 (attrs (machine 16))
3396 (mode xmode)
3397 (args ((.sym Dsp- offset -u16)))
3398 (syntax (.str "${Dsp-" offset "-u16}"))
3399 (base-ifield f-12-4)
3400 (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16)))
3401 (ifield-assertion (eq f-12-4 #xF))
3402 (getter (mem16 xmode (.sym Dsp- offset -u16)))
3403 (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval))
3404 )
3405 )
3406 )
3408 (dst16-absolute 16 QI)
3409 (dst16-absolute 24 QI)
3410 (dst16-absolute 32 QI)
3411 (dst16-absolute 40 QI)
3412 (dst16-absolute 48 QI)
3413 (dst16-absolute 16 HI)
3414 (dst16-absolute 24 HI)
3415 (dst16-absolute 32 HI)
3416 (dst16-absolute 40 HI)
3417 (dst16-absolute 48 HI)
3418 (dst16-absolute 16 SI)
3419 (dst16-absolute 24 SI)
3420 (dst16-absolute 32 SI)
3421 (dst16-absolute 40 SI)
3422 (dst16-absolute 48 SI)
3424 (define-derived-operand
3425 (name dst16-16-16-absolute-Ext-QI)
3426 (comment "m16c absolute address QI")
3427 (attrs (machine 16))
3428 (mode HI)
3429 (args (Dsp-16-u16))
3430 (syntax "${Dsp-16-u16}")
3431 (base-ifield f-12-4)
3432 (encoding (+ (f-12-4 #xF) Dsp-16-u16))
3433 (ifield-assertion (eq f-12-4 #xF))
3434 (getter (mem16 QI Dsp-16-u16))
3435 (setter (set (mem16 HI Dsp-16-u16) newval))
3436 )
3438 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode)
3439 (begin
3440 (define-derived-operand
3441 (name (.sym dst32- offset -16-absolute- group - smode))
3442 (comment (.str "m32c absolute address " smode))
3443 (attrs (machine 32))
3444 (mode dmode)
3445 (args ((.sym Dsp- offset -u16)))
3446 (syntax (.str "${Dsp-" offset "-u16}"))
3447 (base-ifield (.sym f- base1 -6))
3448 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
3449 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
3450 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16)))
3451 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16)))
3452 ; (getter (mem32 smode (.sym Dsp- offset -u16)))
3453 ; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval))
3454 )
3455 (define-derived-operand
3456 (name (.sym dst32- offset -24-absolute- group - smode))
3457 (comment (.str "m32c absolute address " smode))
3458 (attrs (machine 32))
3459 (mode dmode)
3460 (args ((.sym Dsp- offset -u24)))
3461 (syntax (.str "${Dsp-" offset "-u24}"))
3462 (base-ifield (.sym f- base1 -6))
3463 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
3464 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
3465 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24)))
3466 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24)))
3467 ; (getter (mem32 smode (.sym Dsp- offset -u24)))
3468 ; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval))
3469 )
3470 )
3471 )
3473 (dst32-absolute 16 Unprefixed 4 8 QI QI)
3474 (dst32-absolute 24 Unprefixed 4 8 QI QI)
3475 (dst32-absolute 32 Unprefixed 4 8 QI QI)
3476 (dst32-absolute 40 Unprefixed 4 8 QI QI)
3477 (dst32-absolute 16 Unprefixed 4 8 HI HI)
3478 (dst32-absolute 24 Unprefixed 4 8 HI HI)
3479 (dst32-absolute 32 Unprefixed 4 8 HI HI)
3480 (dst32-absolute 40 Unprefixed 4 8 HI HI)
3481 (dst32-absolute 16 Unprefixed 4 8 SI SI)
3482 (dst32-absolute 24 Unprefixed 4 8 SI SI)
3483 (dst32-absolute 32 Unprefixed 4 8 SI SI)
3484 (dst32-absolute 40 Unprefixed 4 8 SI SI)
3486 (dst32-absolute 24 Prefixed 12 16 QI QI)
3487 (dst32-absolute 32 Prefixed 12 16 QI QI)
3488 (dst32-absolute 40 Prefixed 12 16 QI QI)
3489 (dst32-absolute 48 Prefixed 12 16 QI QI)
3490 (dst32-absolute 24 Prefixed 12 16 HI HI)
3491 (dst32-absolute 32 Prefixed 12 16 HI HI)
3492 (dst32-absolute 40 Prefixed 12 16 HI HI)
3493 (dst32-absolute 48 Prefixed 12 16 HI HI)
3494 (dst32-absolute 24 Prefixed 12 16 SI SI)
3495 (dst32-absolute 32 Prefixed 12 16 SI SI)
3496 (dst32-absolute 40 Prefixed 12 16 SI SI)
3497 (dst32-absolute 48 Prefixed 12 16 SI SI)
3499 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI)
3500 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI)
3502 ;-------------------------------------------------------------
3503 ; An indirect indirect
3504 ;-------------------------------------------------------------
3506 ;(define-pmacro (dst-An-indirect-indirect-operand xmode)
3507 ; (define-derived-operand
3508 ; (name (.sym dst32-An-indirect-indirect- xmode))
3509 ; (comment (.str "m32c An indirect indirect destination " xmode))
3510 ; (attrs (machine 32))
3511 ; (mode xmode)
3512 ; (args (Dst32AnPrefixed))
3513 ; (syntax (.str "[[$Dst32AnPrefixed]]"))
3514 ; (base-ifield f-12-6)
3515 ; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed))
3516 ; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0)))
3517 ; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed)))
3518 ; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval))
3519 ; )
3520 ;)
3522 ; (dst-An-indirect-indirect-operand QI)
3523 ; (dst-An-indirect-indirect-operand HI)
3524 ; (dst-An-indirect-indirect-operand SI)
3526 ;-------------------------------------------------------------
3527 ; Relative indirect
3528 ;-------------------------------------------------------------
3530 (define-pmacro (dst-relative-indirect-operand offset xmode)
3531 (begin
3532 ; (define-derived-operand
3533 ; (name (.sym dst32- offset -8-SB-relative-indirect- xmode))
3534 ; (comment (.str "m32c dsp:8[sb] relative destination " xmode))
3535 ; (attrs (machine 32))
3536 ; (mode xmode)
3537 ; (args ((.sym Dsp- offset -u8)))
3538 ; (syntax (.str "[${Dsp-" offset "-u8}[sb]]"))
3539 ; (base-ifield f-12-6)
3540 ; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8)))
3541 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2)))
3542 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))))
3543 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval))
3544 ; )
3545 ; (define-derived-operand
3546 ; (name (.sym dst32- offset -16-SB-relative-indirect- xmode))
3547 ; (comment (.str "m32c dsp:16[sb] relative destination " xmode))
3548 ; (attrs (machine 32))
3549 ; (mode xmode)
3550 ; (args ((.sym Dsp- offset -u16)))
3551 ; (syntax (.str "[${Dsp-" offset "-u16}[sb]]"))
3552 ; (base-ifield f-12-6)
3553 ; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16)))
3554 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2)))
3555 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))))
3556 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval))
3557 ; )
3558 ; (define-derived-operand
3559 ; (name (.sym dst32- offset -8-FB-relative-indirect- xmode))
3560 ; (comment (.str "m32c dsp:8[fb] relative destination " xmode))
3561 ; (attrs (machine 32))
3562 ; (mode xmode)
3563 ; (args ((.sym Dsp- offset -s8)))
3564 ; (syntax (.str "[${Dsp-" offset "-s8}[fb]]"))
3565 ; (base-ifield f-12-6)
3566 ; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8)))
3567 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3)))
3568 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))))
3569 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval))
3570 ; )
3571 ; (define-derived-operand
3572 ; (name (.sym dst32- offset -16-FB-relative-indirect- xmode))
3573 ; (comment (.str "m32c dsp:16[fb] relative destination " xmode))
3574 ; (attrs (machine 32))
3575 ; (mode xmode)
3576 ; (args ((.sym Dsp- offset -s16)))
3577 ; (syntax (.str "[${Dsp-" offset "-s16}[fb]]"))
3578 ; (base-ifield f-12-6)
3579 ; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16)))
3580 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3)))
3581 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))))
3582 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval))
3583 ; )
3584 ; (define-derived-operand
3585 ; (name (.sym dst32- offset -8-An-relative-indirect- xmode))
3586 ; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode))
3587 ; (attrs (machine 32))
3588 ; (mode xmode)
3589 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u8)))
3590 ; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]"))
3591 ; (base-ifield f-12-6)
3592 ; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed))
3593 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0)))
3594 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))))
3595 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval))
3596 ; )
3597 ; (define-derived-operand
3598 ; (name (.sym dst32- offset -16-An-relative-indirect- xmode))
3599 ; (comment (.str "m32c dsp:16[An] relative destination " xmode))
3600 ; (attrs (machine 32))
3601 ; (mode xmode)
3602 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u16)))
3603 ; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]"))
3604 ; (base-ifield f-12-6)
3605 ; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed))
3606 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0)))
3607 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))))
3608 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval))
3609 ; )
3610 ; (define-derived-operand
3611 ; (name (.sym dst32- offset -24-An-relative-indirect- xmode))
3612 ; (comment (.str "m32c dsp:24[An] relative destination " xmode))
3613 ; (attrs (machine 32))
3614 ; (mode xmode)
3615 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u24)))
3616 ; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]"))
3617 ; (base-ifield f-12-6)
3618 ; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed))
3619 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0)))
3620 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))))
3621 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval))
3622 ; )
3623 )
3624 )
3626 ; (dst-relative-indirect-operand 24 QI)
3627 ; (dst-relative-indirect-operand 32 QI)
3628 ; (dst-relative-indirect-operand 40 QI)
3629 ; (dst-relative-indirect-operand 48 QI)
3630 ; (dst-relative-indirect-operand 24 HI)
3631 ; (dst-relative-indirect-operand 32 HI)
3632 ; (dst-relative-indirect-operand 40 HI)
3633 ; (dst-relative-indirect-operand 48 HI)
3634 ; (dst-relative-indirect-operand 24 SI)
3635 ; (dst-relative-indirect-operand 32 SI)
3636 ; (dst-relative-indirect-operand 40 SI)
3637 ; (dst-relative-indirect-operand 48 SI)
3639 ;-------------------------------------------------------------
3640 ; Absolute indirect
3641 ;-------------------------------------------------------------
3643 (define-pmacro (dst-absolute-indirect offset xmode)
3644 (begin
3645 ; (define-derived-operand
3646 ; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode))
3647 ; (comment (.str "m32c absolute indirect address " xmode))
3648 ; (attrs (machine 32))
3649 ; (mode xmode)
3650 ; (args ((.sym Dsp- offset -u16)))
3651 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
3652 ; (base-ifield f-12-6)
3653 ; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16)))
3654 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3)))
3655 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
3656 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
3657 ; )
3658 ; (define-derived-operand
3659 ; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode))
3660 ; (comment (.str "m32c absolute indirect address " xmode))
3661 ; (attrs (machine 32))
3662 ; (mode xmode)
3663 ; (args ((.sym Dsp- offset -u24)))
3664 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
3665 ; (base-ifield f-12-6)
3666 ; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24)))
3667 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2)))
3668 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
3669 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
3670 ; )
3671 )
3672 )
3674 (dst-absolute-indirect 24 QI)
3675 (dst-absolute-indirect 32 QI)
3676 (dst-absolute-indirect 40 QI)
3677 (dst-absolute-indirect 48 QI)
3678 (dst-absolute-indirect 24 HI)
3679 (dst-absolute-indirect 32 HI)
3680 (dst-absolute-indirect 40 HI)
3681 (dst-absolute-indirect 48 HI)
3682 (dst-absolute-indirect 24 SI)
3683 (dst-absolute-indirect 32 SI)
3684 (dst-absolute-indirect 40 SI)
3685 (dst-absolute-indirect 48 SI)
3687 ;-------------------------------------------------------------
3688 ; Bit operands
3689 ;-------------------------------------------------------------
3690 (define-pmacro (get-register-bit reg bitno)
3691 (and (srl reg bitno) 1)
3692 )
3694 (define-pmacro (set-register-bit reg bitno value)
3695 (set reg (or (and reg (inv (sll 1 bitno)))
3696 (sll (and QI value 1) bitno)))
3697 )
3699 (define-pmacro (get-memory-bit mach base bitno)
3700 (and (srl (mem-mach mach QI (add base (div bitno 8)))
3701 (mod bitno 8))
3702 1)
3703 )
3705 (define-pmacro (set-memory-bit mach base bitno value)
3706 (sequence ((USI addr))
3707 (set addr (add base (div bitno 8)))
3708 (set (mem-mach mach QI addr)
3709 (or (and (mem-mach mach QI addr)
3710 (inv (sll 1 (mod bitno 8))))
3711 (sll (and QI value 1) (mod bitno 8)))))
3712 )
3714 ;-------------------------------------------------------------
3715 ; Rn direct
3716 ;-------------------------------------------------------------
3718 (define-derived-operand
3719 (name bit16-Rn-direct)
3720 (comment "m16c Rn direct bit")
3721 (attrs (machine 16))
3722 (mode BI)
3723 (args (Bitno16R Bit16Rn))
3724 (syntax "$Bitno16R,$Bit16Rn")
3725 (base-ifield f-12-4)
3726 (encoding (+ (f-12-2 0) Bit16Rn Bitno16R))
3727 (ifield-assertion (eq f-12-2 0))
3728 (getter (get-register-bit Bit16Rn Bitno16R))
3729 (setter (set-register-bit Bit16Rn Bitno16R newval))
3730 )
3732 (define-pmacro (bit32-Rn-direct-operand group base)
3733 (begin
3734 (define-derived-operand
3735 (name (.sym bit32-Rn-direct- group))
3736 (comment "m32c Rn direct bit")
3737 (attrs (machine 32))
3738 (mode BI)
3739 (args ((.sym Bitno32 group) (.sym Bit32Rn group)))
3740 (syntax (.str "$Bitno32" group ",$Bit32Rn" group))
3741 (base-ifield (.sym f- base -6))
3742 (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group)))
3743 (ifield-assertion (eq (.sym f- base -3) 4))
3744 (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group)))
3745 (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval))
3746 )
3747 )
3748 )
3750 (bit32-Rn-direct-operand Unprefixed 4)
3751 (bit32-Rn-direct-operand Prefixed 12)
3753 ;-------------------------------------------------------------
3754 ; An direct
3755 ;-------------------------------------------------------------
3757 (define-derived-operand
3758 (name bit16-An-direct)
3759 (comment "m16c An direct bit")
3760 (attrs (machine 16))
3761 (mode BI)
3762 (args (Bitno16R Bit16An))
3763 (syntax "$Bitno16R,$Bit16An")
3764 (base-ifield f-12-4)
3765 (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R))
3766 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3767 (getter (get-register-bit Bit16An Bitno16R))
3768 (setter (set-register-bit Bit16An Bitno16R newval))
3769 )
3771 (define-pmacro (bit32-An-direct-operand group base1 base2)
3772 (begin
3773 (define-derived-operand
3774 (name (.sym bit32-An-direct- group))
3775 (comment "m32c An direct bit")
3776 (attrs (machine 32))
3777 (mode BI)
3778 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3779 (syntax (.str "$Bitno32" group ",$Bit32An" group))
3780 (base-ifield (.sym f- base1 -6))
3781 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group)))
3782 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3783 (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group)))
3784 (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval))
3785 )
3786 )
3787 )
3789 (bit32-An-direct-operand Unprefixed 4 8)
3790 (bit32-An-direct-operand Prefixed 12 16)
3792 ;-------------------------------------------------------------
3793 ; An indirect
3794 ;-------------------------------------------------------------
3796 (define-derived-operand
3797 (name bit16-An-indirect)
3798 (comment "m16c An indirect bit")
3799 (attrs (machine 16))
3800 (mode BI)
3801 (args (Bit16An))
3802 (syntax "[$Bit16An]")
3803 (base-ifield f-12-4)
3804 (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An))
3805 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3806 (getter (get-memory-bit 16 0 Bit16An))
3807 (setter (set-memory-bit 16 0 Bit16An newval))
3808 )
3810 (define-pmacro (bit32-An-indirect-operand group base1 base2)
3811 (begin
3812 (define-derived-operand
3813 (name (.sym bit32-An-indirect- group))
3814 (comment "m32c An indirect destination ")
3815 (attrs (machine 32))
3816 (mode BI)
3817 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3818 (syntax (.str "$Bitno32" group ",[$Bit32An" group "]"))
3819 (base-ifield (.sym f- base1 -6))
3820 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group)))
3821 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3822 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group)))
3823 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval))
3824 )
3825 )
3826 )
3828 (bit32-An-indirect-operand Unprefixed 4 8)
3829 (bit32-An-indirect-operand Prefixed 12 16)
3831 ;-------------------------------------------------------------
3832 ; dsp:d[r] relative
3833 ;-------------------------------------------------------------
3835 (define-pmacro (bit16-relative-operand offset)
3836 (begin
3837 (define-derived-operand
3838 (name (.sym bit16- offset -8-SB-relative))
3839 (comment (.str "m16c dsp:8[sb] relative bit " xmode))
3840 (attrs (machine 16))
3841 (mode BI)
3842 (args ((.sym BitBase16- offset -u8)))
3843 (syntax (.str "${BitBase16-" offset "-u8}[sb]"))
3844 (base-ifield f-12-4)
3845 (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8)))
3846 (ifield-assertion (eq f-12-4 #xA))
3847 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8)))
3848 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval))
3849 )
3850 (define-derived-operand
3851 (name (.sym bit16- offset -16-SB-relative))
3852 (comment (.str "m16c dsp:16[sb] relative bit " xmode))
3853 (attrs (machine 16))
3854 (mode BI)
3855 (args ((.sym BitBase16- offset -u16)))
3856 (syntax (.str "${BitBase16-" offset "-u16}[sb]"))
3857 (base-ifield f-12-4)
3858 (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16)))
3859 (ifield-assertion (eq f-12-4 #xE))
3860 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16)))
3861 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval))
3862 )
3863 (define-derived-operand
3864 (name (.sym bit16- offset -8-FB-relative))
3865 (comment (.str "m16c dsp:8[fb] relative bit " xmode))
3866 (attrs (machine 16))
3867 (mode BI)
3868 (args ((.sym BitBase16- offset -s8)))
3869 (syntax (.str "${BitBase16-" offset "-s8}[fb]"))
3870 (base-ifield f-12-4)
3871 (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8)))
3872 (ifield-assertion (eq f-12-4 #xB))
3873 (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8)))
3874 (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval))
3875 )
3876 (define-derived-operand
3877 (name (.sym bit16- offset -8-An-relative))
3878 (comment (.str "m16c dsp:8[An] relative bit " xmode))
3879 (attrs (machine 16))
3880 (mode BI)
3881 (args (Bit16An (.sym Dsp- offset -u8)))
3882 (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]"))
3883 (base-ifield f-12-4)
3884 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An))
3885 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3886 (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An))
3887 (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval))
3888 )
3889 (define-derived-operand
3890 (name (.sym bit16- offset -16-An-relative))
3891 (comment (.str "m16c dsp:16[An] relative bit " xmode))
3892 (attrs (machine 16))
3893 (mode BI)
3894 (args (Bit16An (.sym Dsp- offset -u16)))
3895 (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]"))
3896 (base-ifield f-12-4)
3897 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An))
3898 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3899 (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An))
3900 (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval))
3901 )
3902 )
3903 )
3905 (bit16-relative-operand 16)
3907 (define-pmacro (bit32-relative-operand offset group base1 base2)
3908 (begin
3909 (define-derived-operand
3910 (name (.sym bit32- offset -11-SB-relative- group))
3911 (comment "m32c bit,base:11[sb] relative bit")
3912 (attrs (machine 32))
3913 (mode BI)
3914 (args ((.sym BitBase32- offset -u11- group)))
3915 (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]"))
3916 (base-ifield (.sym f- base1 -12))
3917 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group)))
3918 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3919 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group)))
3920 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval))
3921 )
3922 (define-derived-operand
3923 (name (.sym bit32- offset -19-SB-relative- group))
3924 (comment "m32c bit,base:19[sb] relative bit")
3925 (attrs (machine 32))
3926 (mode BI)
3927 (args ((.sym BitBase32- offset -u19- group)))
3928 (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]"))
3929 (base-ifield (.sym f- base1 -12))
3930 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group)))
3931 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3932 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group)))
3933 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval))
3934 )
3935 (define-derived-operand
3936 (name (.sym bit32- offset -11-FB-relative- group))
3937 (comment "m32c bit,base:11[fb] relative bit")
3938 (attrs (machine 32))
3939 (mode BI)
3940 (args ((.sym BitBase32- offset -s11- group)))
3941 (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]"))
3942 (base-ifield (.sym f- base1 -12))
3943 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group)))
3944 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3945 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group)))
3946 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval))
3947 )
3948 (define-derived-operand
3949 (name (.sym bit32- offset -19-FB-relative- group))
3950 (comment "m32c bit,base:19[fb] relative bit")
3951 (attrs (machine 32))
3952 (mode BI)
3953 (args ((.sym BitBase32- offset -s19- group)))
3954 (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]"))
3955 (base-ifield (.sym f- base1 -12))
3956 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group)))
3957 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3958 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group)))
3959 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval))
3960 )
3961 (define-derived-operand
3962 (name (.sym bit32- offset -11-An-relative- group))
3963 (comment "m32c bit,base:11[An] relative bit")
3964 (attrs (machine 32))
3965 (mode BI)
3966 (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
3967 (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]"))
3968 (base-ifield (.sym f- base1 -12))
3969 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
3970 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3971 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group)))
3972 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval))
3973 )
3974 (define-derived-operand
3975 (name (.sym bit32- offset -19-An-relative- group))
3976 (comment "m32c bit,base:19[An] relative bit")
3977 (attrs (machine 32))
3978 (mode BI)
3979 (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
3980 (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]"))
3981 (base-ifield (.sym f- base1 -12))
3982 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
3983 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3984 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group)))
3985 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval))
3986 )
3987 (define-derived-operand
3988 (name (.sym bit32- offset -27-An-relative- group))
3989 (comment "m32c bit,base:27[An] relative bit")
3990 (attrs (machine 32))
3991 (mode BI)
3992 (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
3993 (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]"))
3994 (base-ifield (.sym f- base1 -12))
3995 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
3996 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3997 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group)))
3998 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval))
3999 )
4000 )
4001 )
4003 (bit32-relative-operand 16 Unprefixed 4 8)
4004 (bit32-relative-operand 24 Prefixed 12 16)
4006 (define-derived-operand
4007 (name bit16-11-SB-relative-S)
4008 (comment "m16c bit,base:11[sb] relative bit")
4009 (attrs (machine 16))
4010 (mode BI)
4011 (args (BitBase16-8-u11-S))
4012 (syntax "${BitBase16-8-u11-S}[sb]")
4013 (base-ifield (.sym f-5-3))
4014 (encoding (+ BitBase16-8-u11-S))
4015 ; (ifield-assertion (#t))
4016 (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S))
4017 (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval))
4018 )
4020 (define-derived-operand
4021 (name Rn16-push-S-derived)
4022 (comment "m16c r0[lh] for push,pop short version")
4023 (attrs (machine 16))
4024 (mode QI)
4025 (args (Rn16-push-S))
4026 (syntax "${Rn16-push-S}")
4027 (base-ifield (.sym f-4-1))
4028 (encoding (+ Rn16-push-S))
4029 ; (ifield-assertion (#t))
4030 (getter (trunc QI Rn16-push-S))
4031 (setter (set Rn16-push-S newval))
4032 )
4034 (define-derived-operand
4035 (name An16-push-S-derived)
4036 (comment "m16c r0[lh] for push,pop short version")
4037 (attrs (machine 16))
4038 (mode HI)
4039 (args (An16-push-S))
4040 (syntax "${An16-push-S}")
4041 (base-ifield (.sym f-4-1))
4042 (encoding (+ An16-push-S))
4043 ; (ifield-assertion (#t))
4044 (getter (trunc QI An16-push-S))
4045 (setter (set An16-push-S newval))
4046 )
4048 ;-------------------------------------------------------------
4049 ; Absolute address
4050 ;-------------------------------------------------------------
4052 (define-pmacro (bit16-absolute offset)
4053 (begin
4054 (define-derived-operand
4055 (name (.sym bit16- offset -16-absolute))
4056 (comment "m16c absolute address")
4057 (attrs (machine 16))
4058 (mode BI)
4059 (args ((.sym BitBase16- offset -u16)))
4060 (syntax (.str "${BitBase16-" offset "-u16}"))
4061 (base-ifield f-12-4)
4062 (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16)))
4063 (ifield-assertion (eq f-12-4 #xF))
4064 (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16)))
4065 (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval))
4066 )
4067 )
4068 )
4070 (bit16-absolute 16)
4072 (define-pmacro (bit32-absolute offset group base1 base2)
4073 (begin
4074 (define-derived-operand
4075 (name (.sym bit32- offset -19-absolute- group))
4076 (comment "m32c absolute address bit")
4077 (attrs (machine 32))
4078 (mode BI)
4079 (args ((.sym BitBase32- offset -u19- group)))
4080 (syntax (.str "${BitBase32-" offset "-u19-" group "}"))
4081 (base-ifield (.sym f- base1 -12))
4082 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group)))
4083 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
4084 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group)))
4085 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval))
4086 )
4087 (define-derived-operand
4088 (name (.sym bit32- offset -27-absolute- group))
4089 (comment "m32c absolute address bit")
4090 (attrs (machine 32))
4091 (mode BI)
4092 (args ((.sym BitBase32- offset -u27- group)))
4093 (syntax (.str "${BitBase32-" offset "-u27-" group "}"))
4094 (base-ifield (.sym f- base1 -12))
4095 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group)))
4096 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
4097 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group)))
4098 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval))
4099 )
4100 )
4101 )
4103 (bit32-absolute 16 Unprefixed 4 8)
4104 (bit32-absolute 24 Prefixed 12 16)
4106 ;-------------------------------------------------------------
4107 ; Destination operands for short fomat insns
4108 ;-------------------------------------------------------------
4110 (define-derived-operand
4111 (name dst16-3-S-R0l-direct-QI)
4112 (comment "m16c R0l direct QI")
4113 (attrs (machine 16))
4114 (mode QI)
4115 (args (R0l))
4116 (syntax "r0l")
4117 (base-ifield f-5-3)
4118 (encoding (+ (f-5-3 4)))
4119 (ifield-assertion (eq f-5-3 4))
4120 (getter (trunc QI R0l))
4121 (setter (set R0l newval))
4122 )
4123 (define-derived-operand
4124 (name dst16-3-S-R0h-direct-QI)
4125 (comment "m16c R0h direct QI")
4126 (attrs (machine 16))
4127 (mode QI)
4128 (args (R0h))
4129 (syntax "r0h")
4130 (base-ifield f-5-3)
4131 (encoding (+ (f-5-3 3)))
4132 (ifield-assertion (eq f-5-3 3))
4133 (getter (trunc QI R0h))
4134 (setter (set R0h newval))
4135 )
4136 (define-derived-operand
4137 (name dst16-3-S-8-8-SB-relative-QI)
4138 (comment "m16c SB relative QI")
4139 (attrs (machine 16))
4140 (mode QI)
4141 (args (Dsp-8-u8))
4142 (syntax "${Dsp-8-u8}[sb]")
4143 (base-ifield f-5-3)
4144 (encoding (+ (f-5-3 5) Dsp-8-u8))
4145 (ifield-assertion (eq f-5-3 5))
4146 (getter (mem16 QI (add Dsp-8-u8 (reg h-sb))))
4147 (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval))
4148 )
4149 (define-derived-operand
4150 (name dst16-3-S-8-8-FB-relative-QI)
4151 (comment "m16c FB relative QI")
4152 (attrs (machine 16))
4153 (mode QI)
4154 (args (Dsp-8-s8))
4155 (syntax "${Dsp-8-s8}[fb]")
4156 (base-ifield f-5-3)
4157 (encoding (+ (f-5-3 6) Dsp-8-s8))
4158 (ifield-assertion (eq f-5-3 6))
4159 (getter (mem16 QI (add Dsp-8-s8 (reg h-fb))))
4160 (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval))
4161 )
4162 (define-derived-operand
4163 (name dst16-3-S-8-16-absolute-QI)
4164 (comment "m16c absolute address QI")
4165 (attrs (machine 16))
4166 (mode QI)
4167 (args (Dsp-8-u16))
4168 (syntax "${Dsp-8-u16}")
4169 (base-ifield f-5-3)
4170 (encoding (+ (f-5-3 7) Dsp-8-u16))
4171 (ifield-assertion (eq f-5-3 7))
4172 (getter (mem16 QI Dsp-8-u16))
4173 (setter (set (mem16 QI Dsp-8-u16) newval))
4174 )
4175 (define-derived-operand
4176 (name dst16-3-S-16-8-SB-relative-QI)
4177 (comment "m16c SB relative QI")
4178 (attrs (machine 16))
4179 (mode QI)
4180 (args (Dsp-16-u8))
4181 (syntax "${Dsp-16-u8}[sb]")
4182 (base-ifield f-5-3)
4183 (encoding (+ (f-5-3 5) Dsp-16-u8))
4184 (ifield-assertion (eq f-5-3 5))
4185 (getter (mem16 QI (add Dsp-16-u8 (reg h-sb))))
4186 (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval))
4187 )
4188 (define-derived-operand
4189 (name dst16-3-S-16-8-FB-relative-QI)
4190 (comment "m16c FB relative QI")
4191 (attrs (machine 16))
4192 (mode QI)
4193 (args (Dsp-16-s8))
4194 (syntax "${Dsp-16-s8}[fb]")
4195 (base-ifield f-5-3)
4196 (encoding (+ (f-5-3 6) Dsp-16-s8))
4197 (ifield-assertion (eq f-5-3 6))
4198 (getter (mem16 QI (add Dsp-16-s8 (reg h-fb))))
4199 (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval))
4200 )
4201 (define-derived-operand
4202 (name dst16-3-S-16-16-absolute-QI)
4203 (comment "m16c absolute address QI")
4204 (attrs (machine 16))
4205 (mode QI)
4206 (args (Dsp-16-u16))
4207 (syntax "${Dsp-16-u16}")
4208 (base-ifield f-5-3)
4209 (encoding (+ (f-5-3 7) Dsp-16-u16))
4210 (ifield-assertion (eq f-5-3 7))
4211 (getter (mem16 QI Dsp-16-u16))
4212 (setter (set (mem16 QI Dsp-16-u16) newval))
4213 )
4214 (define-derived-operand
4215 (name srcdst16-r0l-r0h-S-derived)
4216 (comment "m16c r0l/r0h operand for short format insns")
4217 (attrs (machine 16))
4218 (mode SI)
4219 (args (SrcDst16-r0l-r0h-S-normal))
4220 (syntax "${SrcDst16-r0l-r0h-S-normal}")
4221 (base-ifield f-6-3)
4222 (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal))
4223 (ifield-assertion (eq f-6-2 0))
4224 (getter (trunc SI SrcDst16-r0l-r0h-S-normal))
4225 (setter ()) ; no setter
4226 )
4227 (define-derived-operand
4228 (name dst32-2-S-R0l-direct-QI)
4229 (comment "m32c R0l direct QI")
4230 (attrs (machine 32))
4231 (mode QI)
4232 (args (R0l))
4233 (syntax "r0l")
4234 (base-ifield f-2-2)
4235 (encoding (+ (f-2-2 0)))
4236 (ifield-assertion (eq f-2-2 0))
4237 (getter (trunc QI R0l))
4238 (setter (set R0l newval))
4239 )
4240 (define-derived-operand
4241 (name dst32-2-S-R0-direct-HI)
4242 (comment "m32c R0 direct HI")
4243 (attrs (machine 32))
4244 (mode HI)
4245 (args (R0))
4246 (syntax "r0")
4247 (base-ifield f-2-2)
4248 (encoding (+ (f-2-2 0)))
4249 (ifield-assertion (eq f-2-2 0))
4250 (getter (trunc HI R0))
4251 (setter (set R0 newval))
4252 )
4253 (define-derived-operand
4254 (name dst32-1-S-A0-direct-HI)
4255 (comment "m32c A0 direct HI")
4256 (attrs (machine 32))
4257 (mode HI)
4258 (args (A0))
4259 (syntax "a0")
4260 (base-ifield f-7-1)
4261 (encoding (+ (f-7-1 0)))
4262 (ifield-assertion (eq f-7-1 0))
4263 (getter (trunc HI A0))
4264 (setter (set A0 newval))
4265 )
4266 (define-derived-operand
4267 (name dst32-1-S-A1-direct-HI)
4268 (comment "m32c A1 direct HI")
4269 (attrs (machine 32))
4270 (mode HI)
4271 (args (A1))
4272 (syntax "a1")
4273 (base-ifield f-7-1)
4274 (encoding (+ (f-7-1 1)))
4275 (ifield-assertion (eq f-7-1 1))
4276 (getter (trunc HI A1))
4277 (setter (set A1 newval))
4278 )
4279 (define-pmacro (dst32-2-S-operands xmode)
4280 (begin
4281 (define-derived-operand
4282 (name (.sym dst32-2-S-8-SB-relative- xmode))
4283 (comment "m32c SB relative for short binary insns")
4284 (attrs (machine 32))
4285 (mode xmode)
4286 (args (Dsp-8-u8))
4287 (syntax "${Dsp-8-u8}[sb]")
4288 (base-ifield f-2-2)
4289 (encoding (+ (f-2-2 2) Dsp-8-u8))
4290 (ifield-assertion (eq f-2-2 2))
4291 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
4292 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
4293 ; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb))))
4294 ; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval))
4295 )
4296 (define-derived-operand
4297 (name (.sym dst32-2-S-8-FB-relative- xmode))
4298 (comment "m32c FB relative for short binary insns")
4299 (attrs (machine 32))
4300 (mode xmode)
4301 (args (Dsp-8-s8))
4302 (syntax "${Dsp-8-s8}[fb]")
4303 (base-ifield f-2-2)
4304 (encoding (+ (f-2-2 3) Dsp-8-s8))
4305 (ifield-assertion (eq f-2-2 3))
4306 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
4307 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
4308 ; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb))))
4309 ; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval))
4310 )
4311 (define-derived-operand
4312 (name (.sym dst32-2-S-16-absolute- xmode))
4313 (comment "m32c absolute address for short binary insns")
4314 (attrs (machine 32))
4315 (mode xmode)
4316 (args (Dsp-8-u16))
4317 (syntax "${Dsp-8-u16}")
4318 (base-ifield f-2-2)
4319 (encoding (+ (f-2-2 1) Dsp-8-u16))
4320 (ifield-assertion (eq f-2-2 1))
4321 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
4322 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
4323 ; (getter (mem32 xmode Dsp-8-u16))
4324 ; (setter (set (mem32 xmode Dsp-8-u16) newval))
4325 )
4326 ; (define-derived-operand
4327 ; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode))
4328 ; (comment "m32c SB relative for short binary insns")
4329 ; (attrs (machine 32))
4330 ; (mode xmode)
4331 ; (args (Dsp-16-u8))
4332 ; (syntax "[${Dsp-16-u8}[sb]]")
4333 ; (base-ifield f-10-2)
4334 ; (encoding (+ (f-10-2 2) Dsp-16-u8))
4335 ; (ifield-assertion (eq f-10-2 2))
4336 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))))
4337 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval))
4338 ; )
4339 ; (define-derived-operand
4340 ; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode))
4341 ; (comment "m32c FB relative for short binary insns")
4342 ; (attrs (machine 32))
4343 ; (mode xmode)
4344 ; (args (Dsp-16-s8))
4345 ; (syntax "[${Dsp-16-s8}[fb]]")
4346 ; (base-ifield f-10-2)
4347 ; (encoding (+ (f-10-2 3) Dsp-16-s8))
4348 ; (ifield-assertion (eq f-10-2 3))
4349 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))))
4350 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval))
4351 ; )
4352 ; (define-derived-operand
4353 ; (name (.sym dst32-2-S-16-absolute-indirect- xmode))
4354 ; (comment "m32c absolute address for short binary insns")
4355 ; (attrs (machine 32))
4356 ; (mode xmode)
4357 ; (args (Dsp-16-u16))
4358 ; (syntax "[${Dsp-16-u16}]")
4359 ; (base-ifield f-10-2)
4360 ; (encoding (+ (f-10-2 1) Dsp-16-u16))
4361 ; (ifield-assertion (eq f-10-2 1))
4362 ; (getter (mem32 xmode (indirect-addr Dsp-16-u16)))
4363 ; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval))
4364 ; )
4365 )
4366 )
4368 (dst32-2-S-operands QI)
4369 (dst32-2-S-operands HI)
4370 (dst32-2-S-operands SI)
4372 ;=============================================================
4373 ; Anyof operands
4374 ;-------------------------------------------------------------
4375 ; Source operands with no additional fields
4376 ;-------------------------------------------------------------
4378 (define-pmacro (src16-basic-operand xmode)
4379 (begin
4380 (define-anyof-operand
4381 (name (.sym src16-basic- xmode))
4382 (comment (.str "m16c source operand of size " xmode " with no additional fields"))
4383 (attrs (machine 16))
4384 (mode xmode)
4385 (choices
4386 (.sym src16-Rn-direct- xmode)
4387 (.sym src16-An-direct- xmode)
4388 (.sym src16-An-indirect- xmode)
4389 )
4390 )
4391 )
4392 )
4393 (src16-basic-operand QI)
4394 (src16-basic-operand HI)
4396 (define-pmacro (src32-basic-operand xmode)
4397 (begin
4398 (define-anyof-operand
4399 (name (.sym src32-basic-Unprefixed- xmode))
4400 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4401 (attrs (machine 32))
4402 (mode xmode)
4403 (choices
4404 (.sym src32-Rn-direct-Unprefixed- xmode)
4405 (.sym src32-An-direct-Unprefixed- xmode)
4406 (.sym src32-An-indirect-Unprefixed- xmode)
4407 )
4408 )
4409 (define-anyof-operand
4410 (name (.sym src32-basic-Prefixed- xmode))
4411 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4412 (attrs (machine 32))
4413 (mode xmode)
4414 (choices
4415 (.sym src32-Rn-direct-Prefixed- xmode)
4416 (.sym src32-An-direct-Prefixed- xmode)
4417 (.sym src32-An-indirect-Prefixed- xmode)
4418 )
4419 )
4420 ; (define-anyof-operand
4421 ; (name (.sym src32-basic-indirect- xmode))
4422 ; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields"))
4423 ; (attrs (machine 32))
4424 ; (mode xmode)
4425 ; (choices
4426 ; (.sym src32-An-indirect-indirect- xmode)
4427 ; )
4428 ; )
4429 )
4430 )
4432 (src32-basic-operand QI)
4433 (src32-basic-operand HI)
4434 (src32-basic-operand SI)
4436 (define-anyof-operand
4437 (name src32-basic-ExtPrefixed-QI)
4438 (comment "m32c source operand of size QI with no additional fields")
4439 (attrs (machine 32))
4440 (mode QI)
4441 (choices
4442 src32-Rn-direct-Prefixed-QI
4443 src32-An-indirect-Prefixed-QI
4444 )
4445 )
4447 ;-------------------------------------------------------------
4448 ; Source operands with additional fields at offset 16 bits
4449 ;-------------------------------------------------------------
4451 (define-pmacro (src16-16-operand xmode)
4452 (begin
4453 (define-anyof-operand
4454 (name (.sym src16-16-8- xmode))
4455 (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4456 (attrs (machine 16))
4457 (mode xmode)
4458 (choices
4459 (.sym src16-16-8-An-relative- xmode)
4460 (.sym src16-16-8-SB-relative- xmode)
4461 (.sym src16-16-8-FB-relative- xmode)
4462 )
4463 )
4464 (define-anyof-operand
4465 (name (.sym src16-16-16- xmode))
4466 (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4467 (attrs (machine 16))
4468 (mode xmode)
4469 (choices
4470 (.sym src16-16-16-An-relative- xmode)
4471 (.sym src16-16-16-SB-relative- xmode)
4472 (.sym src16-16-16-absolute- xmode)
4473 )
4474 )
4475 )
4476 )
4477 (src16-16-operand QI)
4478 (src16-16-operand HI)
4480 (define-pmacro (src32-16-operand xmode)
4481 (begin
4482 (define-anyof-operand
4483 (name (.sym src32-16-8-Unprefixed- xmode))
4484 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4485 (attrs (machine 32))
4486 (mode xmode)
4487 (choices
4488 (.sym src32-16-8-An-relative-Unprefixed- xmode)
4489 (.sym src32-16-8-SB-relative-Unprefixed- xmode)
4490 (.sym src32-16-8-FB-relative-Unprefixed- xmode)
4491 )
4492 )
4493 (define-anyof-operand
4494 (name (.sym src32-16-16-Unprefixed- xmode))
4495 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4496 (attrs (machine 32))
4497 (mode xmode)
4498 (choices
4499 (.sym src32-16-16-An-relative-Unprefixed- xmode)
4500 (.sym src32-16-16-SB-relative-Unprefixed- xmode)
4501 (.sym src32-16-16-FB-relative-Unprefixed- xmode)
4502 (.sym src32-16-16-absolute-Unprefixed- xmode)
4503 )
4504 )
4505 (define-anyof-operand
4506 (name (.sym src32-16-24-Unprefixed- xmode))
4507 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4508 (attrs (machine 32))
4509 (mode xmode)
4510 (choices
4511 (.sym src32-16-24-An-relative-Unprefixed- xmode)
4512 (.sym src32-16-24-absolute-Unprefixed- xmode)
4513 )
4514 )
4515 )
4516 )
4518 (src32-16-operand QI)
4519 (src32-16-operand HI)
4520 (src32-16-operand SI)
4522 ;-------------------------------------------------------------
4523 ; Source operands with additional fields at offset 24 bits
4524 ;-------------------------------------------------------------
4526 (define-pmacro (src-24-operand group xmode)
4527 (begin
4528 (define-anyof-operand
4529 (name (.sym src32-24-8- group - xmode))
4530 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24"))
4531 (attrs (machine 32))
4532 (mode xmode)
4533 (choices
4534 (.sym src32-24-8-An-relative- group - xmode)
4535 (.sym src32-24-8-SB-relative- group - xmode)
4536 (.sym src32-24-8-FB-relative- group - xmode)
4537 )
4538 )
4539 (define-anyof-operand
4540 (name (.sym src32-24-16- group - xmode))
4541 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4542 (attrs (machine 32))
4543 (mode xmode)
4544 (choices
4545 (.sym src32-24-16-An-relative- group - xmode)
4546 (.sym src32-24-16-SB-relative- group - xmode)
4547 (.sym src32-24-16-FB-relative- group - xmode)
4548 (.sym src32-24-16-absolute- group - xmode)
4549 )
4550 )
4551 (define-anyof-operand
4552 (name (.sym src32-24-24- group - xmode))
4553 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4554 (attrs (machine 32))
4555 (mode xmode)
4556 (choices
4557 (.sym src32-24-24-An-relative- group - xmode)
4558 (.sym src32-24-24-absolute- group - xmode)
4559 )
4560 )
4561 )
4562 )
4564 (src-24-operand Prefixed QI)
4565 (src-24-operand Prefixed HI)
4566 (src-24-operand Prefixed SI)
4568 (define-pmacro (src-24-indirect-operand xmode)
4569 (begin
4570 ; (define-anyof-operand
4571 ; (name (.sym src32-24-8-indirect- xmode))
4572 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4573 ; (attrs (machine 32))
4574 ; (mode xmode)
4575 ; (choices
4576 ; (.sym src32-24-8-An-relative-indirect- xmode)
4577 ; (.sym src32-24-8-SB-relative-indirect- xmode)
4578 ; (.sym src32-24-8-FB-relative-indirect- xmode)
4579 ; )
4580 ; )
4581 ; (define-anyof-operand
4582 ; (name (.sym src32-24-16-indirect- xmode))
4583 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4584 ; (attrs (machine 32))
4585 ; (mode xmode)
4586 ; (choices
4587 ; (.sym src32-24-16-An-relative-indirect- xmode)
4588 ; (.sym src32-24-16-SB-relative-indirect- xmode)
4589 ; (.sym src32-24-16-FB-relative-indirect- xmode)
4590 ; )
4591 ; )
4592 ; (define-anyof-operand
4593 ; (name (.sym src32-24-24-indirect- xmode))
4594 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4595 ; (attrs (machine 32))
4596 ; (mode xmode)
4597 ; (choices
4598 ; (.sym src32-24-24-An-relative-indirect- xmode)
4599 ; )
4600 ; )
4601 ; (define-anyof-operand
4602 ; (name (.sym src32-24-16-absolute-indirect- xmode))
4603 ; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect"))
4604 ; (attrs (machine 32))
4605 ; (mode xmode)
4606 ; (choices
4607 ; (.sym src32-24-16-absolute-indirect-derived- xmode)
4608 ; )
4609 ; )
4610 ; (define-anyof-operand
4611 ; (name (.sym src32-24-24-absolute-indirect- xmode))
4612 ; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect"))
4613 ; (attrs (machine 32))
4614 ; (mode xmode)
4615 ; (choices
4616 ; (.sym src32-24-24-absolute-indirect-derived- xmode)
4617 ; )
4618 ; )
4619 )
4620 )
4622 ; (src-24-indirect-operand QI)
4623 ; (src-24-indirect-operand HI)
4624 ; (src-24-indirect-operand SI)
4626 ;-------------------------------------------------------------
4627 ; Destination operands with no additional fields
4628 ;-------------------------------------------------------------
4630 (define-pmacro (dst16-basic-operand xmode)
4631 (begin
4632 (define-anyof-operand
4633 (name (.sym dst16-basic- xmode))
4634 (comment (.str "m16c destination operand of size " xmode " with no additional fields"))
4635 (attrs (machine 16))
4636 (mode xmode)
4637 (choices
4638 (.sym dst16-Rn-direct- xmode)
4639 (.sym dst16-An-direct- xmode)
4640 (.sym dst16-An-indirect- xmode)
4641 )
4642 )
4643 )
4644 )
4646 (dst16-basic-operand QI)
4647 (dst16-basic-operand HI)
4648 (dst16-basic-operand SI)
4650 (define-pmacro (dst32-basic-operand xmode)
4651 (begin
4652 (define-anyof-operand
4653 (name (.sym dst32-basic-Unprefixed- xmode))
4654 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4655 (attrs (machine 32))
4656 (mode xmode)
4657 (choices
4658 (.sym dst32-Rn-direct-Unprefixed- xmode)
4659 (.sym dst32-An-direct-Unprefixed- xmode)
4660 (.sym dst32-An-indirect-Unprefixed- xmode)
4661 )
4662 )
4663 (define-anyof-operand
4664 (name (.sym dst32-basic-Prefixed- xmode))
4665 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4666 (attrs (machine 32))
4667 (mode xmode)
4668 (choices
4669 (.sym dst32-Rn-direct-Prefixed- xmode)
4670 (.sym dst32-An-direct-Prefixed- xmode)
4671 (.sym dst32-An-indirect-Prefixed- xmode)
4672 )
4673 )
4674 )
4675 )
4677 (dst32-basic-operand QI)
4678 (dst32-basic-operand HI)
4679 (dst32-basic-operand SI)
4681 ;-------------------------------------------------------------
4682 ; Destination operands with possible additional fields at offset 16 bits
4683 ;-------------------------------------------------------------
4685 (define-pmacro (dst16-16-operand xmode)
4686 (begin
4687 (define-anyof-operand
4688 (name (.sym dst16-16- xmode))
4689 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4690 (attrs (machine 16))
4691 (mode xmode)
4692 (choices
4693 (.sym dst16-Rn-direct- xmode)
4694 (.sym dst16-An-direct- xmode)
4695 (.sym dst16-An-indirect- xmode)
4696 (.sym dst16-16-8-An-relative- xmode)
4697 (.sym dst16-16-16-An-relative- xmode)
4698 (.sym dst16-16-8-SB-relative- xmode)
4699 (.sym dst16-16-16-SB-relative- xmode)
4700 (.sym dst16-16-8-FB-relative- xmode)
4701 (.sym dst16-16-16-absolute- xmode)
4702 )
4703 )
4704 (define-anyof-operand
4705 (name (.sym dst16-16-8- xmode))
4706 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4707 (attrs (machine 16))
4708 (mode xmode)
4709 (choices
4710 (.sym dst16-16-8-An-relative- xmode)
4711 (.sym dst16-16-8-SB-relative- xmode)
4712 (.sym dst16-16-8-FB-relative- xmode)
4713 )
4714 )
4715 (define-anyof-operand
4716 (name (.sym dst16-16-16- xmode))
4717 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4718 (attrs (machine 16))
4719 (mode xmode)
4720 (choices
4721 (.sym dst16-16-16-An-relative- xmode)
4722 (.sym dst16-16-16-SB-relative- xmode)
4723 (.sym dst16-16-16-absolute- xmode)
4724 )
4725 )
4726 )
4727 )
4729 (dst16-16-operand QI)
4730 (dst16-16-operand HI)
4731 (dst16-16-operand SI)
4733 (define-anyof-operand
4734 (name dst16-16-Ext-QI)
4735 (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16")
4736 (attrs (machine 16))
4737 (mode QI)
4738 (choices
4739 dst16-Rn-direct-Ext-QI
4740 dst16-An-indirect-Ext-QI
4741 dst16-16-8-An-relative-Ext-QI
4742 dst16-16-16-An-relative-Ext-QI
4743 dst16-16-8-SB-relative-Ext-QI
4744 dst16-16-16-SB-relative-Ext-QI
4745 dst16-16-8-FB-relative-Ext-QI
4746 dst16-16-16-absolute-Ext-QI
4747 )
4748 )
4750 (define-derived-operand
4751 (name dst16-An-indirect-Mova-HI)
4752 (comment "m16c addressof An indirect destination HI")
4753 (attrs (ISA m16c))
4754 (mode HI)
4755 (args (Dst16An))
4756 (syntax "[$Dst16An]")
4757 (base-ifield f-12-4)
4758 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
4759 (ifield-assertion
4760 (andif (eq f-12-2 1) (eq f-14-1 1)))
4761 (getter Dst16An)
4762 (setter (nop))
4763 )
4765 (define-derived-operand
4766 (name dst16-16-8-An-relative-Mova-HI)
4767 (comment
4768 "m16c addressof dsp:8[An] relative destination HI")
4769 (attrs (ISA m16c))
4770 (mode HI)
4771 (args (Dst16An Dsp-16-u8))
4772 (syntax "${Dsp-16-u8}[$Dst16An]")
4773 (base-ifield f-12-4)
4774 (encoding
4775 (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An))
4776 (ifield-assertion
4777 (andif (eq f-12-2 2) (eq f-14-1 0)))
4778 (getter (add Dsp-16-u8 Dst16An))
4779 (setter (nop))
4780 )
4781 (define-derived-operand
4782 (name dst16-16-16-An-relative-Mova-HI)
4783 (comment
4784 "m16c addressof dsp:16[An] relative destination HI")
4785 (attrs (ISA m16c))
4786 (mode HI)
4787 (args (Dst16An Dsp-16-u16))
4788 (syntax "${Dsp-16-u16}[$Dst16An]")
4789 (base-ifield f-12-4)
4790 (encoding
4791 (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An))
4792 (ifield-assertion
4793 (andif (eq f-12-2 3) (eq f-14-1 0)))
4794 (getter (add Dsp-16-u16 Dst16An))
4795 (setter (nop))
4796 )
4797 (define-derived-operand
4798 (name dst16-16-8-SB-relative-Mova-HI)
4799 (comment
4800 "m16c addressof dsp:8[sb] relative destination HI")
4801 (attrs (ISA m16c))
4802 (mode HI)
4803 (args (Dsp-16-u8))
4804 (syntax "${Dsp-16-u8}[sb]")
4805 (base-ifield f-12-4)
4806 (encoding (+ (f-12-4 10) Dsp-16-u8))
4807 (ifield-assertion (eq f-12-4 10))
4808 (getter (add Dsp-16-u8 (reg h-sb)))
4809 (setter (nop))
4810 )
4811 (define-derived-operand
4812 (name dst16-16-16-SB-relative-Mova-HI)
4813 (comment
4814 "m16c addressof dsp:16[sb] relative destination HI")
4815 (attrs (ISA m16c))
4816 (mode HI)
4817 (args (Dsp-16-u16))
4818 (syntax "${Dsp-16-u16}[sb]")
4819 (base-ifield f-12-4)
4820 (encoding (+ (f-12-4 14) Dsp-16-u16))
4821 (ifield-assertion (eq f-12-4 14))
4822 (getter (add Dsp-16-u16 (reg h-sb)))
4823 (setter (nop))
4824 )
4825 (define-derived-operand
4826 (name dst16-16-8-FB-relative-Mova-HI)
4827 (comment
4828 "m16c addressof dsp:8[fb] relative destination HI")
4829 (attrs (ISA m16c))
4830 (mode HI)
4831 (args (Dsp-16-s8))
4832 (syntax "${Dsp-16-s8}[fb]")
4833 (base-ifield f-12-4)
4834 (encoding (+ (f-12-4 11) Dsp-16-s8))
4835 (ifield-assertion (eq f-12-4 11))
4836 (getter (add Dsp-16-s8 (reg h-fb)))
4837 (setter (nop))
4838 )
4839 (define-derived-operand
4840 (name dst16-16-16-absolute-Mova-HI)
4841 (comment "m16c addressof absolute address HI")
4842 (attrs (ISA m16c))
4843 (mode HI)
4844 (args (Dsp-16-u16))
4845 (syntax "${Dsp-16-u16}")
4846 (base-ifield f-12-4)
4847 (encoding (+ (f-12-4 15) Dsp-16-u16))
4848 (ifield-assertion (eq f-12-4 15))
4849 (getter Dsp-16-u16)
4850 (setter (nop))
4851 )
4853 (define-anyof-operand
4854 (name dst16-16-Mova-HI)
4855 (comment "m16c addressof destination operand of size HI with additional fields at offset 16")
4856 (attrs (machine 16))
4857 (mode HI)
4858 (choices
4859 dst16-An-indirect-Mova-HI
4860 dst16-16-8-An-relative-Mova-HI
4861 dst16-16-16-An-relative-Mova-HI
4862 dst16-16-8-SB-relative-Mova-HI
4863 dst16-16-16-SB-relative-Mova-HI
4864 dst16-16-8-FB-relative-Mova-HI
4865 dst16-16-16-absolute-Mova-HI
4866 )
4867 )
4869 (define-derived-operand
4870 (name dst32-An-indirect-Unprefixed-Mova-SI)
4871 (comment "m32c addressof An indirect destination SI")
4872 (attrs (ISA m32c))
4873 (mode SI)
4874 (args (Dst32AnUnprefixed))
4875 (syntax "[$Dst32AnUnprefixed]")
4876 (base-ifield f-4-6)
4877 (encoding
4878 (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed))
4879 (ifield-assertion
4880 (andif (eq f-4-3 0) (eq f-8-1 0)))
4881 (getter Dst32AnUnprefixed)
4882 (setter (nop))
4883 )
4885 (define-derived-operand
4886 (name dst32-16-8-An-relative-Unprefixed-Mova-SI)
4887 (comment "m32c addressof dsp:8[An] relative destination SI")
4888 (attrs (ISA m32c))
4889 (mode SI)
4890 (args (Dst32AnUnprefixed Dsp-16-u8))
4891 (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]")
4892 (base-ifield f-4-6)
4893 (encoding
4894 (+ (f-4-3 1)
4895 (f-8-1 0)
4896 Dsp-16-u8
4897 Dst32AnUnprefixed))
4898 (ifield-assertion
4899 (andif (eq f-4-3 1) (eq f-8-1 0)))
4900 (getter (add Dsp-16-u8 Dst32AnUnprefixed))
4901 (setter (nop))
4902 )
4904 (define-derived-operand
4905 (name dst32-16-16-An-relative-Unprefixed-Mova-SI)
4906 (comment
4907 "m32c addressof dsp:16[An] relative destination SI")
4908 (attrs (ISA m32c))
4909 (mode SI)
4910 (args (Dst32AnUnprefixed Dsp-16-u16))
4911 (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]")
4912 (base-ifield f-4-6)
4913 (encoding
4914 (+ (f-4-3 2)
4915 (f-8-1 0)
4916 Dsp-16-u16
4917 Dst32AnUnprefixed))
4918 (ifield-assertion
4919 (andif (eq f-4-3 2) (eq f-8-1 0)))
4920 (getter (add Dsp-16-u16 Dst32AnUnprefixed))
4921 (setter (nop))
4922 )
4924 (define-derived-operand
4925 (name dst32-16-24-An-relative-Unprefixed-Mova-SI)
4926 (comment "addressof m32c dsp:16[An] relative destination SI")
4927 (attrs (ISA m32c))
4928 (mode SI)
4929 (args (Dst32AnUnprefixed Dsp-16-u24))
4930 (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]")
4931 (base-ifield f-4-6)
4932 (encoding
4933 (+ (f-4-3 3)
4934 (f-8-1 0)
4935 Dsp-16-u24
4936 Dst32AnUnprefixed))
4937 (ifield-assertion
4938 (andif (eq f-4-3 3) (eq f-8-1 0)))
4939 (getter (add Dsp-16-u24 Dst32AnUnprefixed))
4940 (setter (nop))
4941 )
4943 (define-derived-operand
4944 (name dst32-16-8-SB-relative-Unprefixed-Mova-SI)
4945 (comment "m32c addressof dsp:8[sb] relative destination SI")
4946 (attrs (ISA m32c))
4947 (mode SI)
4948 (args (Dsp-16-u8))
4949 (syntax "${Dsp-16-u8}[sb]")
4950 (base-ifield f-4-6)
4951 (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8))
4952 (ifield-assertion
4953 (andif (eq f-4-3 1) (eq f-8-2 2)))
4954 (getter (add Dsp-16-u8 (reg h-sb)))
4955 (setter (nop))
4956 )
4958 (define-derived-operand
4959 (name dst32-16-16-SB-relative-Unprefixed-Mova-SI)
4960 (comment "m32c addressof dsp:16[sb] relative destination SI")
4961 (attrs (ISA m32c))
4962 (mode SI)
4963 (args (Dsp-16-u16))
4964 (syntax "${Dsp-16-u16}[sb]")
4965 (base-ifield f-4-6)
4966 (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16))
4967 (ifield-assertion
4968 (andif (eq f-4-3 2) (eq f-8-2 2)))
4969 (getter (add Dsp-16-u16 (reg h-sb)))
4970 (setter (nop))
4971 )
4973 (define-derived-operand
4974 (name dst32-16-8-FB-relative-Unprefixed-Mova-SI)
4975 (comment "m32c addressof dsp:8[fb] relative destination SI")
4976 (attrs (ISA m32c))
4977 (mode SI)
4978 (args (Dsp-16-s8))
4979 (syntax "${Dsp-16-s8}[fb]")
4980 (base-ifield f-4-6)
4981 (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8))
4982 (ifield-assertion
4983 (andif (eq f-4-3 1) (eq f-8-2 3)))
4984 (getter (add Dsp-16-s8 (reg h-fb)))
4985 (setter (nop))
4986 )
4988 (define-derived-operand
4989 (name dst32-16-16-FB-relative-Unprefixed-Mova-SI)
4990 (comment "m32c addressof dsp:16[fb] relative destination SI")
4991 (attrs (ISA m32c))
4992 (mode SI)
4993 (args (Dsp-16-s16))
4994 (syntax "${Dsp-16-s16}[fb]")
4995 (base-ifield f-4-6)
4996 (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16))
4997 (ifield-assertion
4998 (andif (eq f-4-3 2) (eq f-8-2 3)))
4999 (getter (add Dsp-16-s16 (reg h-fb)))
5000 (setter (nop))
5001 )
5003 (define-derived-operand
5004 (name dst32-16-16-absolute-Unprefixed-Mova-SI)
5005 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5006 (mode SI)
5007 (args (Dsp-16-u16))
5008 (syntax "${Dsp-16-u16}")
5009 (base-ifield f-4-6)
5010 (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16))
5011 (ifield-assertion
5012 (andif (eq f-4-3 3) (eq f-8-2 3)))
5013 (getter Dsp-16-u16)
5014 (setter (nop))
5015 )
5017 (define-derived-operand
5018 (name dst32-16-24-absolute-Unprefixed-Mova-SI)
5019 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5020 (mode SI)
5021 (args (Dsp-16-u24))
5022 (syntax "${Dsp-16-u24}")
5023 (base-ifield f-4-6)
5024 (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24))
5025 (ifield-assertion
5026 (andif (eq f-4-3 3) (eq f-8-2 2)))
5027 (getter Dsp-16-u24)
5028 (setter (nop))
5029 )
5031 (define-anyof-operand
5032 (name dst32-16-Unprefixed-Mova-SI)
5033 (comment
5034 "m32c addressof destination operand of size SI with additional fields at offset 16")
5035 (attrs (ISA m32c))
5036 (mode SI)
5037 (choices
5038 dst32-An-indirect-Unprefixed-Mova-SI
5039 dst32-16-8-An-relative-Unprefixed-Mova-SI
5040 dst32-16-16-An-relative-Unprefixed-Mova-SI
5041 dst32-16-24-An-relative-Unprefixed-Mova-SI
5042 dst32-16-8-SB-relative-Unprefixed-Mova-SI
5043 dst32-16-16-SB-relative-Unprefixed-Mova-SI
5044 dst32-16-8-FB-relative-Unprefixed-Mova-SI
5045 dst32-16-16-FB-relative-Unprefixed-Mova-SI
5046 dst32-16-16-absolute-Unprefixed-Mova-SI
5047 dst32-16-24-absolute-Unprefixed-Mova-SI))
5049 (define-pmacro (dst32-16-operand xmode)
5050 (begin
5051 (define-anyof-operand
5052 (name (.sym dst32-16-Unprefixed- xmode))
5053 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5054 (attrs (machine 32))
5055 (mode xmode)
5056 (choices
5057 (.sym dst32-Rn-direct-Unprefixed- xmode)
5058 (.sym dst32-An-direct-Unprefixed- xmode)
5059 (.sym dst32-An-indirect-Unprefixed- xmode)
5060 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5061 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5062 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5063 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5064 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5065 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5066 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5067 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5068 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5069 )
5070 )
5071 (define-anyof-operand
5072 (name (.sym dst32-16-8-Unprefixed- xmode))
5073 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5074 (attrs (machine 32))
5075 (mode xmode)
5076 (choices
5077 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5078 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5079 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5080 )
5081 )
5082 (define-anyof-operand
5083 (name (.sym dst32-16-16-Unprefixed- xmode))
5084 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5085 (attrs (machine 32))
5086 (mode xmode)
5087 (choices
5088 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5089 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5090 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5091 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5092 )
5093 )
5094 (define-anyof-operand
5095 (name (.sym dst32-16-24-Unprefixed- xmode))
5096 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5097 (attrs (machine 32))
5098 (mode xmode)
5099 (choices
5100 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5101 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5102 )
5103 )
5104 )
5105 )
5107 (dst32-16-operand QI)
5108 (dst32-16-operand HI)
5109 (dst32-16-operand SI)
5111 (define-pmacro (dst32-16-Ext-operand smode dmode)
5112 (begin
5113 (define-anyof-operand
5114 (name (.sym dst32-16-ExtUnprefixed- smode))
5115 (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16"))
5116 (attrs (machine 32))
5117 (mode dmode)
5118 (choices
5119 (.sym dst32-Rn-direct-ExtUnprefixed- smode)
5120 (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version
5121 (.sym dst32-An-indirect-ExtUnprefixed- smode)
5122 (.sym dst32-16-8-An-relative-ExtUnprefixed- smode)
5123 (.sym dst32-16-16-An-relative-ExtUnprefixed- smode)
5124 (.sym dst32-16-24-An-relative-ExtUnprefixed- smode)
5125 (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode)
5126 (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode)
5127 (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode)
5128 (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode)
5129 (.sym dst32-16-16-absolute-ExtUnprefixed- smode)
5130 (.sym dst32-16-24-absolute-ExtUnprefixed- smode)
5131 )
5132 )
5133 )
5134 )
5136 (dst32-16-Ext-operand QI HI)
5137 (dst32-16-Ext-operand HI SI)
5139 (define-anyof-operand
5140 (name dst32-16-Unprefixed-Mulex-HI)
5141 (comment "m32c destination operand of size HI with additional fields at offset 16")
5142 (attrs (machine 32))
5143 (mode HI)
5144 (choices
5145 dst32-R3-direct-Unprefixed-HI
5146 dst32-An-direct-Unprefixed-HI
5147 dst32-An-indirect-Unprefixed-HI
5148 dst32-16-8-An-relative-Unprefixed-HI
5149 dst32-16-16-An-relative-Unprefixed-HI
5150 dst32-16-24-An-relative-Unprefixed-HI
5151 dst32-16-8-SB-relative-Unprefixed-HI
5152 dst32-16-16-SB-relative-Unprefixed-HI
5153 dst32-16-8-FB-relative-Unprefixed-HI
5154 dst32-16-16-FB-relative-Unprefixed-HI
5155 dst32-16-16-absolute-Unprefixed-HI
5156 dst32-16-24-absolute-Unprefixed-HI
5157 )
5158 )
5159 ;-------------------------------------------------------------
5160 ; Destination operands with possible additional fields at offset 24 bits
5161 ;-------------------------------------------------------------
5163 (define-pmacro (dst16-24-operand xmode)
5164 (begin
5165 (define-anyof-operand
5166 (name (.sym dst16-24- xmode))
5167 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24"))
5168 (attrs (machine 16))
5169 (mode xmode)
5170 (choices
5171 (.sym dst16-Rn-direct- xmode)
5172 (.sym dst16-An-direct- xmode)
5173 (.sym dst16-An-indirect- xmode)
5174 (.sym dst16-24-8-An-relative- xmode)
5175 (.sym dst16-24-16-An-relative- xmode)
5176 (.sym dst16-24-8-SB-relative- xmode)
5177 (.sym dst16-24-16-SB-relative- xmode)
5178 (.sym dst16-24-8-FB-relative- xmode)
5179 (.sym dst16-24-16-absolute- xmode)
5180 )
5181 )
5182 )
5183 )
5185 (dst16-24-operand QI)
5186 (dst16-24-operand HI)
5188 (define-pmacro (dst32-24-operand xmode)
5189 (begin
5190 (define-anyof-operand
5191 (name (.sym dst32-24-Unprefixed- xmode))
5192 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5193 (attrs (machine 32))
5194 (mode xmode)
5195 (choices
5196 (.sym dst32-Rn-direct-Unprefixed- xmode)
5197 (.sym dst32-An-direct-Unprefixed- xmode)
5198 (.sym dst32-An-indirect-Unprefixed- xmode)
5199 (.sym dst32-24-8-An-relative-Unprefixed- xmode)
5200 (.sym dst32-24-16-An-relative-Unprefixed- xmode)
5201 (.sym dst32-24-24-An-relative-Unprefixed- xmode)
5202 (.sym dst32-24-8-SB-relative-Unprefixed- xmode)
5203 (.sym dst32-24-16-SB-relative-Unprefixed- xmode)
5204 (.sym dst32-24-8-FB-relative-Unprefixed- xmode)
5205 (.sym dst32-24-16-FB-relative-Unprefixed- xmode)
5206 (.sym dst32-24-16-absolute-Unprefixed- xmode)
5207 (.sym dst32-24-24-absolute-Unprefixed- xmode)
5208 )
5209 )
5210 (define-anyof-operand
5211 (name (.sym dst32-24-Prefixed- xmode))
5212 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5213 (attrs (machine 32))
5214 (mode xmode)
5215 (choices
5216 (.sym dst32-Rn-direct-Prefixed- xmode)
5217 (.sym dst32-An-direct-Prefixed- xmode)
5218 (.sym dst32-An-indirect-Prefixed- xmode)
5219 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5220 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5221 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5222 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5223 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5224 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5225 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5226 (.sym dst32-24-16-absolute-Prefixed- xmode)
5227 (.sym dst32-24-24-absolute-Prefixed- xmode)
5228 )
5229 )
5230 (define-anyof-operand
5231 (name (.sym dst32-24-8-Prefixed- xmode))
5232 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5233 (attrs (machine 32))
5234 (mode xmode)
5235 (choices
5236 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5237 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5238 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5239 )
5240 )
5241 (define-anyof-operand
5242 (name (.sym dst32-24-16-Prefixed- xmode))
5243 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5244 (attrs (machine 32))
5245 (mode xmode)
5246 (choices
5247 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5248 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5249 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5250 (.sym dst32-24-16-absolute-Prefixed- xmode)
5251 )
5252 )
5253 (define-anyof-operand
5254 (name (.sym dst32-24-24-Prefixed- xmode))
5255 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5256 (attrs (machine 32))
5257 (mode xmode)
5258 (choices
5259 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5260 (.sym dst32-24-24-absolute-Prefixed- xmode)
5261 )
5262 )
5263 ; (define-anyof-operand
5264 ; (name (.sym dst32-24-indirect- xmode))
5265 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5266 ; (attrs (machine 32))
5267 ; (mode xmode)
5268 ; (choices
5269 ; (.sym dst32-An-indirect-indirect- xmode)
5270 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5271 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5272 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5273 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5274 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5275 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5276 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5277 ; )
5278 ; )
5279 ; (define-anyof-operand
5280 ; (name (.sym dst32-basic-indirect- xmode))
5281 ; (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
5282 ; (attrs (machine 32))
5283 ; (mode xmode)
5284 ; (choices
5285 ; (.sym dst32-An-indirect-indirect- xmode)
5286 ; )
5287 ; )
5288 ; (define-anyof-operand
5289 ; (name (.sym dst32-24-8-indirect- xmode))
5290 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5291 ; (attrs (machine 32))
5292 ; (mode xmode)
5293 ; (choices
5294 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5295 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5296 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5297 ; )
5298 ; )
5299 ; (define-anyof-operand
5300 ; (name (.sym dst32-24-16-indirect- xmode))
5301 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5302 ; (attrs (machine 32))
5303 ; (mode xmode)
5304 ; (choices
5305 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5306 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5307 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5308 ; )
5309 ; )
5310 ; (define-anyof-operand
5311 ; (name (.sym dst32-24-24-indirect- xmode))
5312 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5313 ; (attrs (machine 32))
5314 ; (mode xmode)
5315 ; (choices
5316 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5317 ; )
5318 ; )
5319 ; (define-anyof-operand
5320 ; (name (.sym dst32-24-absolute-indirect- xmode))
5321 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5322 ; (attrs (machine 32))
5323 ; (mode xmode)
5324 ; (choices
5325 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5326 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5327 ; )
5328 ; )
5329 ; (define-anyof-operand
5330 ; (name (.sym dst32-24-16-absolute-indirect- xmode))
5331 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5332 ; (attrs (machine 32))
5333 ; (mode xmode)
5334 ; (choices
5335 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5336 ; )
5337 ; )
5338 ; (define-anyof-operand
5339 ; (name (.sym dst32-24-24-absolute-indirect- xmode))
5340 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5341 ; (attrs (machine 32))
5342 ; (mode xmode)
5343 ; (choices
5344 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5345 ; )
5346 ; )
5347 )
5348 )
5350 (dst32-24-operand QI)
5351 (dst32-24-operand HI)
5352 (dst32-24-operand SI)
5354 ;-------------------------------------------------------------
5355 ; Destination operands with possible additional fields at offset 32 bits
5356 ;-------------------------------------------------------------
5358 (define-pmacro (dst16-32-operand xmode)
5359 (begin
5360 (define-anyof-operand
5361 (name (.sym dst16-32- xmode))
5362 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32"))
5363 (attrs (machine 16))
5364 (mode xmode)
5365 (choices
5366 (.sym dst16-Rn-direct- xmode)
5367 (.sym dst16-An-direct- xmode)
5368 (.sym dst16-An-indirect- xmode)
5369 (.sym dst16-32-8-An-relative- xmode)
5370 (.sym dst16-32-16-An-relative- xmode)
5371 (.sym dst16-32-8-SB-relative- xmode)
5372 (.sym dst16-32-16-SB-relative- xmode)
5373 (.sym dst16-32-8-FB-relative- xmode)
5374 (.sym dst16-32-16-absolute- xmode)
5375 )
5376 )
5377 )
5378 )
5379 (dst16-32-operand QI)
5380 (dst16-32-operand HI)
5382 ; This macro actually handles operands at offset 32, 40 and 48 bits
5383 (define-pmacro (dst32-32plus-operand offset xmode)
5384 (begin
5385 (define-anyof-operand
5386 (name (.sym dst32- offset -Unprefixed- xmode))
5387 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5388 (attrs (machine 32))
5389 (mode xmode)
5390 (choices
5391 (.sym dst32-Rn-direct-Unprefixed- xmode)
5392 (.sym dst32-An-direct-Unprefixed- xmode)
5393 (.sym dst32-An-indirect-Unprefixed- xmode)
5394 (.sym dst32- offset -8-An-relative-Unprefixed- xmode)
5395 (.sym dst32- offset -16-An-relative-Unprefixed- xmode)
5396 (.sym dst32- offset -24-An-relative-Unprefixed- xmode)
5397 (.sym dst32- offset -8-SB-relative-Unprefixed- xmode)
5398 (.sym dst32- offset -16-SB-relative-Unprefixed- xmode)
5399 (.sym dst32- offset -8-FB-relative-Unprefixed- xmode)
5400 (.sym dst32- offset -16-FB-relative-Unprefixed- xmode)
5401 (.sym dst32- offset -16-absolute-Unprefixed- xmode)
5402 (.sym dst32- offset -24-absolute-Unprefixed- xmode)
5403 )
5404 )
5405 (define-anyof-operand
5406 (name (.sym dst32- offset -Prefixed- xmode))
5407 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5408 (attrs (machine 32))
5409 (mode xmode)
5410 (choices
5411 (.sym dst32-Rn-direct-Prefixed- xmode)
5412 (.sym dst32-An-direct-Prefixed- xmode)
5413 (.sym dst32-An-indirect-Prefixed- xmode)
5414 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5415 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5416 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5417 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5418 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5419 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5420 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5421 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5422 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5423 )
5424 )
5425 ; (define-anyof-operand
5426 ; (name (.sym dst32- offset -indirect- xmode))
5427 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5428 ; (attrs (machine 32))
5429 ; (mode xmode)
5430 ; (choices
5431 ; (.sym dst32-An-indirect-indirect- xmode)
5432 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5433 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5434 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5435 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5436 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5437 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5438 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5439 ; )
5440 ; )
5441 ; (define-anyof-operand
5442 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5443 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5444 ; (attrs (machine 32))
5445 ; (mode xmode)
5446 ; (choices
5447 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5448 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5449 ; )
5450 ; )
5451 )
5452 )
5454 (dst32-32plus-operand 32 QI)
5455 (dst32-32plus-operand 32 HI)
5456 (dst32-32plus-operand 32 SI)
5457 (dst32-32plus-operand 40 QI)
5458 (dst32-32plus-operand 40 HI)
5459 (dst32-32plus-operand 40 SI)
5461 ;-------------------------------------------------------------
5462 ; Destination operands with possible additional fields at offset 48 bits
5463 ;-------------------------------------------------------------
5465 (define-pmacro (dst32-48-operand offset xmode)
5466 (begin
5467 (define-anyof-operand
5468 (name (.sym dst32- offset -Prefixed- xmode))
5469 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5470 (attrs (machine 32))
5471 (mode xmode)
5472 (choices
5473 (.sym dst32-Rn-direct-Prefixed- xmode)
5474 (.sym dst32-An-direct-Prefixed- xmode)
5475 (.sym dst32-An-indirect-Prefixed- xmode)
5476 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5477 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5478 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5479 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5480 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5481 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5482 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5483 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5484 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5485 )
5486 )
5487 ; (define-anyof-operand
5488 ; (name (.sym dst32- offset -indirect- xmode))
5489 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5490 ; (attrs (machine 32))
5491 ; (mode xmode)
5492 ; (choices
5493 ; (.sym dst32-An-indirect-indirect- xmode)
5494 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5495 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5496 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5497 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5498 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5499 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5500 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5501 ; )
5502 ; )
5503 ; (define-anyof-operand
5504 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5505 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5506 ; (attrs (machine 32))
5507 ; (mode xmode)
5508 ; (choices
5509 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5510 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5511 ; )
5512 ; )
5513 )
5514 )
5516 (dst32-48-operand 48 QI)
5517 (dst32-48-operand 48 HI)
5518 (dst32-48-operand 48 SI)
5520 ;-------------------------------------------------------------
5521 ; Bit operands for m16c
5522 ;-------------------------------------------------------------
5524 (define-pmacro (bit16-operand offset)
5525 (begin
5526 (define-anyof-operand
5527 (name (.sym bit16- offset))
5528 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5529 (attrs (machine 16))
5530 (mode BI)
5531 (choices
5532 bit16-Rn-direct
5533 bit16-An-direct
5534 bit16-An-indirect
5535 (.sym bit16- offset -8-An-relative)
5536 (.sym bit16- offset -16-An-relative)
5537 (.sym bit16- offset -8-SB-relative)
5538 (.sym bit16- offset -16-SB-relative)
5539 (.sym bit16- offset -8-FB-relative)
5540 (.sym bit16- offset -16-absolute)
5541 )
5542 )
5543 (define-anyof-operand
5544 (name (.sym bit16- offset -basic))
5545 (comment (.str "m16c bit operand with no additional fields"))
5546 (attrs (machine 16))
5547 (mode BI)
5548 (choices
5549 bit16-An-indirect
5550 )
5551 )
5552 (define-anyof-operand
5553 (name (.sym bit16- offset -8))
5554 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5555 (attrs (machine 16))
5556 (mode BI)
5557 (choices
5558 bit16-Rn-direct
5559 bit16-An-direct
5560 (.sym bit16- offset -8-An-relative)
5561 (.sym bit16- offset -8-SB-relative)
5562 (.sym bit16- offset -8-FB-relative)
5563 )
5564 )
5565 (define-anyof-operand
5566 (name (.sym bit16- offset -16))
5567 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5568 (attrs (machine 16))
5569 (mode BI)
5570 (choices
5571 (.sym bit16- offset -16-An-relative)
5572 (.sym bit16- offset -16-SB-relative)
5573 (.sym bit16- offset -16-absolute)
5574 )
5575 )
5576 )
5577 )
5579 (bit16-operand 16)
5581 ;-------------------------------------------------------------
5582 ; Bit operands for m32c
5583 ;-------------------------------------------------------------
5585 (define-pmacro (bit32-operand offset group)
5586 (begin
5587 (define-anyof-operand
5588 (name (.sym bit32- offset - group))
5589 (comment (.str "m32c bit operand with possible additional fields at offset 24"))
5590 (attrs (machine 32))
5591 (mode BI)
5592 (choices
5593 (.sym bit32-Rn-direct- group)
5594 (.sym bit32-An-direct- group)
5595 (.sym bit32-An-indirect- group)
5596 (.sym bit32- offset -11-An-relative- group)
5597 (.sym bit32- offset -19-An-relative- group)
5598 (.sym bit32- offset -27-An-relative- group)
5599 (.sym bit32- offset -11-SB-relative- group)
5600 (.sym bit32- offset -19-SB-relative- group)
5601 (.sym bit32- offset -11-FB-relative- group)
5602 (.sym bit32- offset -19-FB-relative- group)
5603 (.sym bit32- offset -19-absolute- group)
5604 (.sym bit32- offset -27-absolute- group)
5605 )
5606 )
5607 )
5608 )
5610 (bit32-operand 16 Unprefixed)
5611 (bit32-operand 24 Prefixed)
5613 (define-anyof-operand
5614 (name bit32-basic-Unprefixed)
5615 (comment "m32c bit operand with no additional fields")
5616 (attrs (machine 32))
5617 (mode BI)
5618 (choices
5619 bit32-Rn-direct-Unprefixed
5620 bit32-An-direct-Unprefixed
5621 bit32-An-indirect-Unprefixed
5622 )
5623 )
5625 (define-anyof-operand
5626 (name bit32-16-8-Unprefixed)
5627 (comment "m32c bit operand with 8 bit additional fields")
5628 (attrs (machine 32))
5629 (mode BI)
5630 (choices
5631 bit32-16-11-An-relative-Unprefixed
5632 bit32-16-11-SB-relative-Unprefixed
5633 bit32-16-11-FB-relative-Unprefixed
5634 )
5635 )
5637 (define-anyof-operand
5638 (name bit32-16-16-Unprefixed)
5639 (comment "m32c bit operand with 16 bit additional fields")
5640 (attrs (machine 32))
5641 (mode BI)
5642 (choices
5643 bit32-16-19-An-relative-Unprefixed
5644 bit32-16-19-SB-relative-Unprefixed
5645 bit32-16-19-FB-relative-Unprefixed
5646 bit32-16-19-absolute-Unprefixed
5647 )
5648 )
5650 (define-anyof-operand
5651 (name bit32-16-24-Unprefixed)
5652 (comment "m32c bit operand with 24 bit additional fields")
5653 (attrs (machine 32))
5654 (mode BI)
5655 (choices
5656 bit32-16-27-An-relative-Unprefixed
5657 bit32-16-27-absolute-Unprefixed
5658 )
5659 )
5661 ;-------------------------------------------------------------
5662 ; Operands for short format binary insns
5663 ;-------------------------------------------------------------
5665 (define-anyof-operand
5666 (name src16-2-S)
5667 (comment "m16c source operand of size QI for short format insns")
5668 (attrs (machine 16))
5669 (mode QI)
5670 (choices
5671 src16-2-S-8-SB-relative-QI
5672 src16-2-S-8-FB-relative-QI
5673 src16-2-S-16-absolute-QI
5674 )
5675 )
5677 (define-anyof-operand
5678 (name src32-2-S-QI)
5679 (comment "m32c source operand of size QI for short format insns")
5680 (attrs (machine 32))
5681 (mode QI)
5682 (choices
5683 src32-2-S-8-SB-relative-QI
5684 src32-2-S-8-FB-relative-QI
5685 src32-2-S-16-absolute-QI
5686 )
5687 )
5689 (define-anyof-operand
5690 (name src32-2-S-HI)
5691 (comment "m32c source operand of size QI for short format insns")
5692 (attrs (machine 32))
5693 (mode HI)
5694 (choices
5695 src32-2-S-8-SB-relative-HI
5696 src32-2-S-8-FB-relative-HI
5697 src32-2-S-16-absolute-HI
5698 )
5699 )
5701 (define-anyof-operand
5702 (name Dst16-3-S-8)
5703 (comment "m16c destination operand of size QI for short format insns")
5704 (attrs (machine 16))
5705 (mode QI)
5706 (choices
5707 dst16-3-S-R0l-direct-QI
5708 dst16-3-S-R0h-direct-QI
5709 dst16-3-S-8-8-SB-relative-QI
5710 dst16-3-S-8-8-FB-relative-QI
5711 dst16-3-S-8-16-absolute-QI
5712 )
5713 )
5715 (define-anyof-operand
5716 (name Dst16-3-S-16)
5717 (comment "m16c destination operand of size QI for short format insns")
5718 (attrs (machine 16))
5719 (mode QI)
5720 (choices
5721 dst16-3-S-R0l-direct-QI
5722 dst16-3-S-R0h-direct-QI
5723 dst16-3-S-16-8-SB-relative-QI
5724 dst16-3-S-16-8-FB-relative-QI
5725 dst16-3-S-16-16-absolute-QI
5726 )
5727 )
5729 (define-anyof-operand
5730 (name srcdst16-r0l-r0h-S)
5731 (comment "m16c r0l/r0h operand of size QI for short format insns")
5732 (attrs (machine 16))
5733 (mode SI)
5734 (choices
5735 srcdst16-r0l-r0h-S-derived
5736 )
5737 )
5739 (define-anyof-operand
5740 (name dst32-2-S-basic-QI)
5741 (comment "m32c r0l operand of size QI for short format binary insns")
5742 (attrs (machine 32))
5743 (mode QI)
5744 (choices
5745 dst32-2-S-R0l-direct-QI
5746 )
5747 )
5749 (define-anyof-operand
5750 (name dst32-2-S-basic-HI)
5751 (comment "m32c r0 operand of size HI for short format binary insns")
5752 (attrs (machine 32))
5753 (mode HI)
5754 (choices
5755 dst32-2-S-R0-direct-HI
5756 )
5757 )
5759 (define-pmacro (dst32-2-S-operands xmode)
5760 (begin
5761 (define-anyof-operand
5762 (name (.sym dst32-2-S-8- xmode))
5763 (comment "m32c operand of size " xmode " for short format binary insns")
5764 (attrs (machine 32))
5765 (mode xmode)
5766 (choices
5767 (.sym dst32-2-S-8-SB-relative- xmode)
5768 (.sym dst32-2-S-8-FB-relative- xmode)
5769 )
5770 )
5771 (define-anyof-operand
5772 (name (.sym dst32-2-S-16- xmode))
5773 (comment "m32c operand of size " xmode " for short format binary insns")
5774 (attrs (machine 32))
5775 (mode xmode)
5776 (choices
5777 (.sym dst32-2-S-16-absolute- xmode)
5778 )
5779 )
5780 ; (define-anyof-operand
5781 ; (name (.sym dst32-2-S-8-indirect- xmode))
5782 ; (comment "m32c operand of size " xmode " for short format binary insns")
5783 ; (attrs (machine 32))
5784 ; (mode xmode)
5785 ; (choices
5786 ; (.sym dst32-2-S-8-SB-relative-indirect- xmode)
5787 ; (.sym dst32-2-S-8-FB-relative-indirect- xmode)
5788 ; )
5789 ; )
5790 ; (define-anyof-operand
5791 ; (name (.sym dst32-2-S-absolute-indirect- xmode))
5792 ; (comment "m32c operand of size " xmode " for short format binary insns")
5793 ; (attrs (machine 32))
5794 ; (mode xmode)
5795 ; (choices
5796 ; (.sym dst32-2-S-16-absolute-indirect- xmode)
5797 ; )
5798 ; )
5799 )
5800 )
5802 (dst32-2-S-operands QI)
5803 (dst32-2-S-operands HI)
5804 (dst32-2-S-operands SI)
5806 (define-anyof-operand
5807 (name dst32-an-S)
5808 (comment "m32c An operand for short format binary insns")
5809 (attrs (machine 32))
5810 (mode HI)
5811 (choices
5812 dst32-1-S-A0-direct-HI
5813 dst32-1-S-A1-direct-HI
5814 )
5815 )
5817 (define-anyof-operand
5818 (name bit16-11-S)
5819 (comment "m16c bit operand for short format insns")
5820 (attrs (machine 16))
5821 (mode BI)
5822 (choices
5823 bit16-11-SB-relative-S
5824 )
5825 )
5827 (define-anyof-operand
5828 (name Rn16-push-S-anyof)
5829 (comment "m16c bit operand for short format insns")
5830 (attrs (machine 16))
5831 (mode QI)
5832 (choices
5833 Rn16-push-S-derived
5834 )
5835 )
5837 (define-anyof-operand
5838 (name An16-push-S-anyof)
5839 (comment "m16c bit operand for short format insns")
5840 (attrs (machine 16))
5841 (mode HI)
5842 (choices
5843 An16-push-S-derived
5844 )
5845 )
5847 ;=============================================================
5848 ; Common macros for instruction definitions
5849 ;
5850 (define-pmacro (set-z x)
5851 (sequence ()
5852 (set zbit (zflag x)))
5854 )
5856 (define-pmacro (set-s x)
5857 (sequence ()
5858 (set sbit (nflag x)))
5859 )
5861 (define-pmacro (set-z-and-s x)
5862 (sequence ()
5863 (set-z x)
5864 (set-s x))
5865 )
5866 \f
5867 ;=============================================================
5868 ; Unary insn macros
5869 ;-------------------------------------------------------------
5871 (define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg)
5872 (dni (.sym op mach wstr - group)
5873 (.str op wstr opg " dst" mach "-" group "-" mode)
5874 ((machine mach) RL_1ADDR)
5875 (.str op wstr opg " ${dst" mach "-" group "-" mode "}")
5876 encoding
5877 (sem mode (.sym dst mach - group - mode))
5878 ())
5879 )
5881 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem)
5882 (unary-insn-defn-g mach group mode wstr op encoding sem "")
5883 )
5886 (define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
5887 (unary-insn-defn-g 16 16 mode wstr op
5888 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode))
5889 sem opg)
5890 )
5891 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem)
5892 (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
5893 )
5895 (define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
5896 (begin
5897 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
5898 ; define the absolute-indirect insns first in order to prevent them from being selected
5899 ; when the mode is register-indirect
5900 ; (unary-insn-defn 32 24-absolute-indirect mode wstr op
5901 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5902 ; sem)
5903 (unary-insn-defn-g 32 16-Unprefixed mode wstr op
5904 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3))
5905 sem opg)
5906 ; (unary-insn-defn 32 24-indirect mode wstr op
5907 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5908 ; sem)
5909 )
5910 )
5911 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem)
5912 (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
5913 )
5915 (define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg)
5916 (begin
5917 (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg))
5918 (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg))
5919 )
5920 )
5921 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem)
5922 (unary-insn-mach-g mach op opc1 opc2 opc3 sem "")
5923 )
5925 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
5926 (begin
5927 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "")
5928 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "")
5929 )
5930 )
5932 (define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
5933 (begin
5934 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G")
5935 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G")
5936 )
5937 )
5939 ;-------------------------------------------------------------
5940 ; Sign/zero extension macros
5941 ;-------------------------------------------------------------
5943 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem)
5944 (dni (.sym op mach wstr - group)
5945 (.str op wstr " dst" mach "-" group "-" smode)
5946 ((machine mach))
5947 (.str op wstr " ${dst" mach "-" group "-" smode "}")
5948 encoding
5949 (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode))
5950 ())
5951 )
5953 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
5954 (ext-insn-defn 16 16-Ext smode dmode wstr op
5955 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode))
5956 sem)
5957 )
5959 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
5960 (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op
5961 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode))
5962 sem)
5963 )
5965 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem)
5966 (dni (.sym op 32 wstr - src-group - dst-group)
5967 (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI")
5968 ((machine 32))
5969 (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}")
5970 encoding
5971 (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI))
5972 ())
5973 )
5975 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem)
5976 (begin
5977 (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr
5978 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2))
5979 sem)
5980 (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr
5981 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2))
5982 sem)
5983 (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr
5984 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2))
5985 sem)
5986 (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr
5987 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2))
5988 sem)
5989 )
5990 )
5992 ;=============================================================
5993 ; Binary Arithmetic macros
5994 ;
5995 ;-------------------------------------------------------------
5996 ;<arith>.size:S src2,r0[l] -- for m32c
5997 ;-------------------------------------------------------------
5999 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
6000 (dni (.sym op 32 wstr .S-src2-r0- xmode)
6001 (.str op 32 wstr ":S src2,r0[l]")
6002 ((machine 32))
6003 (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}")
6004 (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit))
6005 (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S))
6006 ())
6007 )
6009 ;-------------------------------------------------------------
6010 ;<arith>.b:S src2,r0l/r0h -- for m16c
6011 ;-------------------------------------------------------------
6013 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
6014 (begin
6015 (dni (.sym op 16 .b.S-src2)
6016 (.str op ".b:S src2,r0[lh]")
6017 ((machine 16))
6018 (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}")
6019 (+ opc1 opc2 Dst16RnQI-S src16-2-S)
6020 (sem QI src16-2-S Dst16RnQI-S)
6021 ())
6022 (dni (.sym op 16 .b.S-r0l-r0h)
6023 (.str op ".b:S r0l/r0h")
6024 ((machine 16))
6025 (.str op ".b$S ${srcdst16-r0l-r0h-S}")
6026 (+ opc1 opc2 srcdst16-r0l-r0h-S)
6027 (if (eq srcdst16-r0l-r0h-S 0)
6028 (sem QI R0h R0l)
6029 (sem QI R0l R0h))
6030 ())
6031 )
6032 )
6034 ;-------------------------------------------------------------
6035 ;<arith>.b:S #imm8,dst3 -- for m16c
6036 ;-------------------------------------------------------------
6038 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem)
6039 (dni (.sym op 16 .b.S-imm8-dst3)
6040 (.str op sz ":S imm8,dst3")
6041 ((machine 16))
6042 (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}")
6043 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
6044 (sem QI Imm-8-QI Dst16-3-S-16)
6045 ())
6046 )
6048 ;-------------------------------------------------------------
6049 ;<arith>.size:Q #imm4,sp -- for m16c
6050 ;-------------------------------------------------------------
6052 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
6053 (dni (.sym op 16 -wQ-sp)
6054 (.str op ".w:q #imm4,sp")
6055 ((machine 16))
6056 (.str op ".w$Q #${Imm-12-s4},sp")
6057 (+ opc1 opc2 opc3 Imm-12-s4)
6058 (sem QI Imm-12-s4 sp)
6059 ())
6060 )
6062 ;-------------------------------------------------------------
6063 ;<arith>.size:G #imm,sp -- for m16c
6064 ;-------------------------------------------------------------
6066 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem)
6067 (dni (.sym op 16 wstr - G-sp)
6068 (.str op wstr " imm-sp " mode)
6069 ((machine 16))
6070 (.str op wstr "$G #${Imm-16-" mode "},sp")
6071 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode))
6072 (sem mode (.sym Imm-16- mode) sp)
6073 ())
6074 )
6076 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem)
6077 (begin
6078 (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem)
6079 (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem)
6080 )
6081 )
6083 ;-------------------------------------------------------------
6084 ;<arith>.size:G #imm,dst -- for m16c and m32c
6085 ;-------------------------------------------------------------
6087 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
6088 (dni (.sym op mach wstr - imm-G - dstgroup)
6089 (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
6090 ((machine mach) RL_1ADDR)
6091 (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
6092 encoding
6093 (sem dmode src (.sym dst mach - dstgroup - dmode))
6094 ())
6095 )
6097 ; m16c variants
6098 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6099 (begin
6100 (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix
6101 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode))
6102 sem)
6103 (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix
6104 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode))
6105 sem)
6106 (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix
6107 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode))
6108 sem)
6109 )
6110 )
6112 ; m32c Unprefixed variants
6113 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6114 (begin
6115 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix
6116 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode))
6117 sem)
6118 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix
6119 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode))
6120 sem)
6121 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix
6122 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode))
6123 sem)
6124 (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix
6125 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode))
6126 sem)
6127 )
6128 )
6130 ; m32c Prefixed variants
6131 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6132 (begin
6133 (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix
6134 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode))
6135 sem)
6136 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix
6137 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode))
6138 sem)
6139 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix
6140 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode))
6141 sem)
6142 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix
6143 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode))
6144 sem)
6145 )
6146 )
6148 ; All m32c variants
6149 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6150 (begin
6151 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6152 ; define the absolute-indirect insns first in order to prevent them from being selected
6153 ; when the mode is register-indirect
6154 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix
6155 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode))
6156 ; sem)
6157 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix
6158 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode))
6159 ; sem)
6160 ; Unprefixed modes next
6161 (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6163 ; Remaining indirect modes
6164 ; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix
6165 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode))
6166 ; sem)
6167 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix
6168 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode))
6169 ; sem)
6170 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix
6171 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode))
6172 ; sem)
6173 ; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix
6174 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode))
6175 ; sem)
6176 )
6177 )
6179 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem)
6180 (begin
6181 (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem))
6182 (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem))
6183 )
6184 )
6186 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6187 (begin
6188 (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem)
6189 (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem)
6190 )
6191 )
6193 ;-------------------------------------------------------------
6194 ;<arith>.size:Q #imm4,dst -- for m16c and m32c
6195 ;-------------------------------------------------------------
6197 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
6198 (dni (.sym op mach wstr - imm4-Q - dstgroup)
6199 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
6200 ((machine mach) RL_1ADDR)
6201 (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
6202 encoding
6203 (sem mode src (.sym dst mach - dstgroup - mode))
6204 ())
6205 )
6207 ; m16c variants
6208 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6209 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op
6210 (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode))
6211 sem)
6212 )
6214 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6215 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op
6216 (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode))
6217 sem)
6218 )
6220 ; m32c variants
6221 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6222 (begin
6223 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6224 ; define the absolute-indirect insns first in order to prevent them from being selected
6225 ; when the mode is register-indirect
6226 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op
6227 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6228 ; sem)
6229 (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op
6230 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4)
6231 sem)
6232 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op
6233 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6234 ; sem)
6235 )
6236 )
6238 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6239 (begin
6240 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6241 ; define the absolute-indirect insns first in order to prevent them from being selected
6242 ; when the mode is register-indirect
6243 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op
6244 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6245 ; sem)
6246 (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op
6247 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4)
6248 sem)
6249 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op
6250 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6251 ; sem)
6252 )
6253 )
6255 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem)
6256 (begin
6257 (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem))
6258 (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem))
6259 )
6260 )
6262 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6263 (begin
6264 (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6265 (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6266 )
6267 )
6269 ;-------------------------------------------------------------
6270 ;<arith>.size:G src,dst -- for m16c and m32c
6271 ;-------------------------------------------------------------
6273 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
6274 (dni (.sym op mach wstr - srcgroup - dstgroup)
6275 (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
6276 ((machine mach) RL_2ADDR)
6277 (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
6278 encoding
6279 (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
6280 ())
6281 )
6283 ; m16c variants
6284 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6285 (begin
6286 (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix
6287 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode))
6288 sem)
6289 (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix
6290 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode))
6291 sem)
6292 (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix
6293 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode))
6294 sem)
6295 )
6296 )
6298 ; m32c Prefixed variants
6299 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem)
6300 (begin
6301 (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix
6302 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6303 sem)
6304 (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix
6305 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6306 sem)
6307 (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix
6308 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6309 sem)
6310 (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix
6311 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6312 sem)
6313 )
6314 )
6316 ; all m32c variants
6317 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6318 (begin
6319 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6320 ; define the absolute-indirect insns first in order to prevent them from being selected
6321 ; when the mode is register-indirect
6322 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix
6323 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6324 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6325 ; sem)
6326 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix
6327 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6328 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6329 ; sem)
6330 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix
6331 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6332 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6333 ; sem)
6334 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix
6335 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6336 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6337 ; sem)
6338 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix
6339 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6340 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6341 ; sem)
6342 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix
6343 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6344 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6345 ; sem)
6346 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix
6347 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6348 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6349 ; sem)
6350 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix
6351 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6352 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6353 ; sem)
6354 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix
6355 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6356 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6357 ; sem)
6358 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix
6359 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6360 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6361 ; sem)
6362 ; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix
6363 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6364 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6365 ; sem)
6366 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix
6367 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6368 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6369 ; sem)
6370 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix
6371 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6372 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6373 ; sem)
6374 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix
6375 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6376 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6377 ; sem)
6378 (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix
6379 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2))
6380 sem)
6381 (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix
6382 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2))
6383 sem)
6384 (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix
6385 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2))
6386 sem)
6387 (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix
6388 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2))
6389 sem)
6390 ; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix
6391 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6392 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6393 ; sem)
6394 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix
6395 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6396 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6397 ; sem)
6398 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix
6399 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6400 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6401 ; sem)
6402 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix
6403 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6404 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6405 ; sem)
6406 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix
6407 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6408 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6409 ; sem)
6410 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix
6411 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6412 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6413 ; sem)
6414 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix
6415 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6416 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6417 ; sem)
6418 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix
6419 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6420 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6421 ; sem)
6422 ; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix
6423 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6424 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6425 ; sem)
6426 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix
6427 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6428 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6429 ; sem)
6430 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix
6431 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6432 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6433 ; sem)
6434 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix
6435 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6436 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6437 ; sem)
6438 )
6439 )
6441 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem)
6442 (begin
6443 (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem))
6444 (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem))
6445 )
6446 )
6448 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem)
6449 (begin
6450 (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem)
6451 (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem)
6452 )
6453 )
6455 ;-------------------------------------------------------------
6456 ;<arith>.size:S #imm,dst -- for m32c
6457 ;-------------------------------------------------------------
6459 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem)
6460 (dni (.sym op 32 wstr - imm-S - dstgroup)
6461 (.str op wstr " 32-imm-S-" dstgroup "-" mode)
6462 ((machine 32))
6463 (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}")
6464 encoding
6465 (sem mode src (.sym dst32- dstgroup - mode))
6466 ())
6467 )
6469 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem)
6470 (dni (.sym op 32 wstr - imm-Z - dstgroup)
6471 (.str op wstr " 32-imm-Z-" dstgroup "-" mode)
6472 ((machine 32))
6473 (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}")
6474 encoding
6475 (sem mode (const 0) (.sym dst32- dstgroup - mode))
6476 ())
6477 )
6479 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem)
6480 (begin
6481 ; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6482 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6483 ; sem)
6484 (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6485 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode))
6486 sem)
6487 (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6488 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode))
6489 sem)
6490 (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6491 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode))
6492 sem)
6493 ; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6494 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6495 ; sem)
6496 )
6497 )
6499 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem)
6500 (begin
6501 ; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6502 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6503 ; sem)
6504 (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6505 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit))
6506 sem)
6507 (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6508 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit))
6509 sem)
6510 (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6511 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit))
6512 sem)
6513 ; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6514 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6515 ; sem)
6516 )
6517 )
6519 ;-------------------------------------------------------------
6520 ;<arith>.L:S #imm1,An -- for m32c
6521 ;-------------------------------------------------------------
6523 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem)
6524 (begin
6525 (dni (.sym op 32.l-s-imm1-S-an)
6526 (.str op ".l 32-imm1-S-an")
6527 ((machine 32))
6528 (.str op ".l$S #${Imm1-S},${dst32-an-S}")
6529 (+ opc1 Imm1-S opc2 dst32-an-S)
6530 (sem SI Imm1-S dst32-an-S)
6531 ())
6532 )
6533 )
6535 ;-------------------------------------------------------------
6536 ;<arith>.L:Q #imm3,sp -- for m32c
6537 ;-------------------------------------------------------------
6539 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem)
6540 (begin
6541 (dni (.sym op 32.l-imm3-Q)
6542 (.str op ".l 32-imm3-Q")
6543 ((machine 32))
6544 (.str op ".l$Q #${Imm3-S},sp")
6545 (+ opc1 Imm3-S opc2)
6546 (sem SI Imm3-S sp)
6547 ())
6548 )
6549 )
6551 ;-------------------------------------------------------------
6552 ;<arith>.L:S #imm8,sp -- for m32c
6553 ;-------------------------------------------------------------
6555 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem)
6556 (begin
6557 (dni (.sym op 32.l-imm8-S)
6558 (.str op ".l 32-imm8-S")
6559 ((machine 32))
6560 (.str op ".l$S #${Imm-16-QI},sp")
6561 (+ opc1 opc2 opc3 opc4 Imm-16-QI)
6562 (sem SI Imm-16-QI sp)
6563 ())
6564 )
6565 )
6567 ;-------------------------------------------------------------
6568 ;<arith>.L:G #imm16,sp -- for m32c
6569 ;-------------------------------------------------------------
6571 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem)
6572 (begin
6573 (dni (.sym op 32.l-imm16-G)
6574 (.str op ".l 32-imm16-G")
6575 ((machine 32))
6576 (.str op ".l$G #${Imm-16-HI},sp")
6577 (+ opc1 opc2 opc3 opc4 Imm-16-HI)
6578 (sem SI Imm-16-HI sp)
6579 ())
6580 )
6581 )
6583 ;-------------------------------------------------------------
6584 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c
6585 ;-------------------------------------------------------------
6587 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem)
6588 (dni (.sym op mach wstr - imm4 - dstgroup)
6589 (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode)
6590 ((machine mach))
6591 (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}")
6592 encoding
6593 (sem mode src (.sym dst mach - dstgroup - mode) label)
6594 ())
6595 )
6597 ; m16c variants
6598 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
6599 (begin
6600 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op
6601 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8)
6602 sem)
6603 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op
6604 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-16-8)
6605 sem)
6606 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op
6607 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-16-8)
6608 sem)
6609 )
6610 )
6612 ; m32c variants
6613 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
6614 (begin
6615 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op
6616 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8)
6617 sem)
6618 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op
6619 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8)
6620 sem)
6621 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op
6622 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8)
6623 sem)
6624 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op
6625 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8)
6626 sem)
6627 )
6628 )
6630 (define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem)
6631 (begin
6632 (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem))
6633 (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem))
6634 )
6635 )
6637 (define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem)
6638 (begin
6639 (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem)
6640 (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem)
6641 )
6642 )
6644 ;-------------------------------------------------------------
6645 ;mov.size dsp8[sp],dst -- for m16c and m32c
6646 ;-------------------------------------------------------------
6647 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem)
6648 (dni (.sym op mach wstr -dspsp-dst- dstgroup)
6649 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6650 ((machine mach))
6651 (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}")
6652 encoding
6653 (sem mach mode dsp (.sym dst mach - dstgroup - mode))
6654 ())
6655 )
6656 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem)
6657 (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6658 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6659 ((machine mach))
6660 (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]")
6661 encoding
6662 (sem mach mode (.sym dst mach - dstgroup - mode) dsp)
6663 ())
6664 )
6666 ; m16c variants
6667 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6668 (begin
6669 (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op
6670 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6671 sem)
6672 (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op
6673 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6674 sem)
6675 (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op
6676 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6677 sem)
6678 )
6679 )
6681 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6682 (begin
6683 (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op
6684 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6685 sem)
6686 (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op
6687 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6688 sem)
6689 (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op
6690 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6691 sem)
6692 )
6693 )
6695 ; m32c variants
6696 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6697 (begin
6698 (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6699 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6700 sem)
6701 (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6702 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6703 sem)
6704 (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6705 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6706 sem)
6707 (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6708 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6709 sem)
6710 )
6711 )
6712 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6713 (begin
6714 (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6715 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6716 sem)
6717 (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6718 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6719 sem)
6720 (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6721 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6722 sem)
6723 (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6724 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6725 sem)
6726 )
6727 )
6729 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem)
6730 (begin
6731 (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6732 (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6733 )
6734 )
6736 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem)
6737 (begin
6738 (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6739 (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6740 )
6741 )
6743 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6744 (begin
6745 (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6746 (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6747 )
6748 )
6749 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6750 (begin
6751 (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6752 (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6753 )
6754 )
6756 ;-------------------------------------------------------------
6757 ; lde dsp24,dst -- for m16c
6758 ;-------------------------------------------------------------
6760 (define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp)
6761 (begin
6763 (dni (.sym lde wstr - dstgroup -u20)
6764 (.str "lde" wstr "-" dstgroup "-u20")
6765 ((machine 16))
6766 (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}")
6767 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8)
6768 (.sym dst16- dstgroup - mode) srcdisp)
6769 (nop)
6770 ())
6772 (dni (.sym lde wstr - dstgroup -u20a0)
6773 (.str "lde" wstr "-" dstgroup "-u20a0")
6774 ((machine 16))
6775 (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}")
6776 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9)
6777 (.sym dst16- dstgroup - mode) srcdisp)
6778 (nop)
6779 ())
6781 (dni (.sym lde wstr - dstgroup -a1a0)
6782 (.str "lde" wstr "-" dstgroup "-a1a0")
6783 ((machine 16))
6784 (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}")
6785 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa)
6786 (.sym dst16- dstgroup - mode))
6787 (nop)
6788 ())
6789 )
6790 )
6792 (define-pmacro (lde-dst mode wstr wbit)
6793 (begin
6794 ; like: QI .b 0
6795 (lde-dst-dsp mode wstr wbit basic Dsp-16-u20)
6796 (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6797 (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6798 )
6799 )
6801 ;-------------------------------------------------------------
6802 ; ste dst,dsp24 -- for m16c
6803 ;-------------------------------------------------------------
6805 (define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp)
6806 (begin
6808 (dni (.sym ste wstr - dstgroup -u20)
6809 (.str "ste" wstr "-" dstgroup "-u20")
6810 ((machine 16))
6811 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}")
6812 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0)
6813 (.sym dst16- dstgroup - mode) srcdisp)
6814 (nop)
6815 ())
6817 (dni (.sym ste wstr - dstgroup -u20a0)
6818 (.str "ste" wstr "-" dstgroup "-u20a0")
6819 ((machine 16))
6820 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]")
6821 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1)
6822 (.sym dst16- dstgroup - mode) srcdisp)
6823 (nop)
6824 ())
6826 (dni (.sym ste wstr - dstgroup -a1a0)
6827 (.str "ste" wstr "-" dstgroup "-a1a0")
6828 ((machine 16))
6829 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]")
6830 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2)
6831 (.sym dst16- dstgroup - mode))
6832 (nop)
6833 ())
6834 )
6835 )
6837 (define-pmacro (ste-dst mode wstr wbit)
6838 (begin
6839 ; like: QI .b 0
6840 (ste-dst-dsp mode wstr wbit basic Dsp-16-u20)
6841 (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6842 (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6843 )
6844 )
6846 ;=============================================================
6847 ; Division
6848 ;-------------------------------------------------------------
6850 (define-pmacro (div-sem divop modop opmode reg src quot rem max min)
6851 (sequence ()
6852 (if (eq src 0)
6853 (set obit (const BI 1))
6854 (sequence ((opmode quot-result) (opmode rem-result))
6855 (set quot-result (divop opmode (ext opmode reg) src))
6856 (set rem-result (modop opmode (ext opmode reg) src))
6857 (set obit (orif (gt opmode quot-result max)
6858 (lt opmode quot-result min)))
6859 (set quot quot-result)
6860 (set rem rem-result))))
6861 )
6863 ;<divop>.size #imm -- for m16c and m32c
6864 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6865 (dni (.sym op mach wstr - src)
6866 (.str op mach wstr "-" src)
6867 ((machine mach))
6868 (.str op wstr " #${" src "}")
6869 encoding
6870 (sem divop modop opmode reg src quot rem max min)
6871 ())
6872 )
6873 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6874 (div-imm-defn 16 wstr op (.sym Imm-16 - smode)
6875 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode))
6876 divop modop opmode reg quot rem max min
6877 sem)
6878 )
6879 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6880 (div-imm-defn 32 wstr op (.sym Imm-16 - smode)
6881 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode))
6882 divop modop opmode reg quot rem max min
6883 sem)
6884 )
6885 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem)
6886 (begin
6887 (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem))
6888 (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem))
6889 )
6890 )
6891 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem)
6892 (begin
6893 (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem)
6894 (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem)
6895 )
6896 )
6898 ;<divop>.size src -- for m16c and m32c
6899 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6900 (dni (.sym op mach wstr - src)
6901 (.str op mach wstr "-" src)
6902 ((machine mach))
6903 (.str op wstr " ${" src "}")
6904 encoding
6905 (sem divop modop opmode reg src quot rem max min)
6906 ())
6907 )
6908 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
6909 (div-src-defn 16 wstr op (.sym dst16-16 - smode)
6910 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode))
6911 divop modop opmode reg quot rem max min
6912 sem)
6913 )
6914 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
6915 (begin
6916 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6917 ; define the absolute-indirect insns first in order to prevent them from being selected
6918 ; when the mode is register-indirect
6919 ; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode)
6920 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode))
6921 ; divop modop opmode reg quot rem max min
6922 ; sem)
6923 (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode)
6924 (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode))
6925 divop modop opmode reg quot rem max min
6926 sem)
6927 ; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode)
6928 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode))
6929 ; divop modop opmode reg quot rem max min
6930 ; sem)
6931 )
6932 )
6933 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem)
6934 (begin
6935 (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem))
6936 (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem))
6937 )
6938 )
6939 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6940 (begin
6941 (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem)
6942 (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem)
6943 )
6944 )
6946 ;=============================================================
6947 ; Bit manipulation
6948 ;
6949 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem)
6950 (dni (.sym op mach - suffix - opnd)
6951 (.str op mach ":" suffix " " opnd)
6952 ((machine mach))
6953 (.str op "$" suffix " ${" opnd "}")
6954 encoding
6955 (sem opnd)
6956 ())
6957 )
6959 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem)
6960 (bit-insn-defn 16 op X bit16-16
6961 (+ opc1 opc2 opc3 bit16-16)
6962 sem)
6963 )
6965 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem)
6966 (begin
6967 (bit-insn-defn 32 op X bit32-24-Prefixed
6968 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3))
6969 sem)
6970 )
6971 )
6973 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6974 (begin
6975 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
6976 (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem)
6977 )
6978 )
6980 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem)
6981 (begin
6982 (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem)
6983 (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem)
6984 (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem)
6985 (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem)
6986 )
6987 )
6989 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem)
6990 (begin
6991 (bit-insn-defn 32 op X bit32-16-Unprefixed
6992 (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3))
6993 sem)
6994 )
6995 )
6997 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6998 (begin
6999 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
7000 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
7001 )
7002 )
7004 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem)
7005 (begin
7006 (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem)
7007 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
7008 )
7009 )
7011 ;=============================================================
7012 ; Bit condition
7013 ;
7014 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem)
7015 (dni (.sym op mach - bit-opnd - cond-opnd)
7016 (.str op mach " " bit-opnd " " cond-opnd)
7017 ((machine mach))
7018 (.str op "${" cond-opnd "} ${" bit-opnd "}")
7019 encoding
7020 (sem mach bit-opnd cond-opnd)
7021 ())
7022 )
7024 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem)
7025 (begin
7026 (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem)
7027 (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem)
7028 (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem)
7029 )
7030 )
7032 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem)
7033 (begin
7034 (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40
7035 (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40)
7036 sem)
7037 (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32
7038 (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32)
7039 sem)
7040 (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24
7041 (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24)
7042 sem)
7043 (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16
7044 (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16)
7045 sem)
7046 )
7047 )
7049 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7050 (begin
7051 (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem)
7052 (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem)
7053 )
7054 )
7056 ;=============================================================
7057 ;<insn>.size #imm1,#imm2,dst -- for m32c
7058 ;
7059 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
7060 (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
7061 (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode)
7062 ((machine 32))
7063 (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}")
7064 encoding
7065 (sem xmode src1 src2 (.sym dst32- dstgroup - xmode))
7066 ())
7067 )
7069 ; m32c Prefixed variants
7070 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7071 (begin
7072 (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op
7073 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7074 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode))
7075 sem)
7076 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op
7077 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7078 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode))
7079 sem)
7080 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op
7081 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7082 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode))
7083 sem)
7084 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op
7085 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7086 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode))
7087 sem)
7088 )
7089 )
7091 ; m32c Unprefixed variants
7092 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7093 (begin
7094 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op
7095 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7096 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode))
7097 sem)
7098 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op
7099 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7100 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode))
7101 sem)
7102 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op
7103 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7104 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode))
7105 sem)
7106 (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op
7107 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7108 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode))
7109 sem)
7110 )
7111 )
7113 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem)
7114 (begin
7115 (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7116 (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem)
7117 )
7118 )
7119 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem)
7120 (begin
7121 (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem)
7122 (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7123 )
7124 )
7125 \f
7126 ;=============================================================
7127 ; Insn definitions
7128 ;-------------------------------------------------------------
7129 ; abs - absolute
7130 ;-------------------------------------------------------------
7132 (define-pmacro (abs-sem mode dst)
7133 (sequence ((mode result))
7134 (set result (abs mode dst))
7135 (set obit (eq result dst))
7136 (set-z-and-s result)
7137 (set dst result))
7138 )
7139 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem)
7141 ;-------------------------------------------------------------
7142 ; adcf - addition carry flag
7143 ;-------------------------------------------------------------
7145 (define-pmacro (adcf-sem mode dst)
7146 (sequence ((mode result))
7147 (set result (addc mode dst 0 cbit))
7148 (set obit (add-oflag mode dst 0 cbit))
7149 (set cbit (add-cflag mode dst 0 cbit))
7150 (set-z-and-s result)
7151 (set dst result))
7152 )
7153 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem)
7155 ;-------------------------------------------------------------
7156 ; add - binary addition
7157 ;-------------------------------------------------------------
7159 (define-pmacro (add-sem mode src1 dst)
7160 (sequence ((mode result))
7161 (set result (add mode src1 dst))
7162 (set obit (add-oflag mode src1 dst 0))
7163 (set cbit (add-cflag mode src1 dst 0))
7164 (set-z-and-s result)
7165 (set dst result))
7166 )
7168 ; add.L:G #imm32,dst (m32 #2)
7169 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem)
7170 ; add.size:G #imm,dst (m16 #1 m32 #1)
7171 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem)
7172 ; add.size:Q #imm4,dst (m16 #2 m32 #3)
7173 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem)
7174 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem)
7175 ; add.b:S #imm8,dst3 (m16 #3)
7176 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
7177 ; add.BW:Q #imm4,sp (m16 #7)
7178 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
7179 (dnmi add16-bQ-sp "add16-bQ-sp" ()
7180 "add.b:q #${Imm-12-s4},sp"
7181 (emit add16-wQ-sp Imm-12-s4))
7182 ; add.BW:G #imm,sp (m16 #6)
7183 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
7184 ; add.BW:G src,dst (m16 #4 m32 #6)
7185 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem)
7186 ; add.B.S src2,r0l/r0h (m16 #5)
7187 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem)
7188 ; add.L:G src,dst (m32 #7)
7189 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem)
7190 ; add.L:S #imm{1,2},A0/A1 (m32 #5)
7191 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem)
7192 ; add.L:Q #imm3,sp (m32 #9)
7193 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem)
7194 ; add.L:S #imm8,sp (m32 #10)
7195 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem)
7196 ; add.L:G #imm16,sp (m32 #8)
7197 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem)
7198 ; add.BW:S #imm,dst2 (m32 #4)
7199 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem)
7200 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem)
7202 ;-------------------------------------------------------------
7203 ; adc - binary add with carry
7204 ;-------------------------------------------------------------
7206 (define-pmacro (addc-sem mode src dst)
7207 (sequence ((mode result))
7208 (set result (addc mode src dst cbit))
7209 (set obit (add-oflag mode src dst cbit))
7210 (set cbit (add-cflag mode src dst cbit))
7211 (set-z-and-s result)
7212 (set dst result))
7213 )
7215 ; adc.size:G #imm,dst
7216 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7217 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7218 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem)
7219 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem)
7221 ; adc.BW:G src,dst
7222 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7223 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7224 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem)
7225 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem)
7227 ;-------------------------------------------------------------
7228 ; dadc - decimal add with carry
7229 ; dadd - decimal addition
7230 ;-------------------------------------------------------------
7232 (define-pmacro (dadc-sem mode src dst)
7233 (sequence ((mode result))
7234 (set result (subc mode dst src (not cbit)))
7235 (set cbit (sub-cflag mode dst src (not cbit)))
7236 (set-z-and-s result)
7237 (set dst result))
7238 )
7240 (define-pmacro (decimal-subtraction16-insn op opc1 opc2)
7241 (begin
7242 ; op.b #imm8,r0l
7243 (dni (.sym op 16.b-imm8)
7244 (.str op ".b #imm8")
7245 ((machine 16))
7246 (.str op ".b #${Imm-16-QI}")
7247 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
7248 ((.sym op -sem) QI Imm-16-QI R0l)
7249 ())
7250 ; op.w #imm16,r0
7251 (dni (.sym op 16.w-imm16)
7252 (.str op ".b #imm16")
7253 ((machine 16))
7254 (.str op ".w #${Imm-16-HI}")
7255 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
7256 ((.sym op -sem) HI Imm-16-HI R0)
7257 ())
7258 ; op.b #r0h,r0l
7259 (dni (.sym op 16.b-r0h-r0l)
7260 (.str op ".b r0h,r0l")
7261 ((machine 16))
7262 (.str op ".b r0h,r0l")
7263 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2))
7264 ((.sym op -sem) QI R0h R0l)
7265 ())
7266 ; op.w #r1,r0
7267 (dni (.sym op 16.w-r1-r0)
7268 (.str op ".b r1,r0")
7269 ((machine 16))
7270 (.str op ".w r1,r0")
7271 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2))
7272 ((.sym op -sem) HI R1 R0)
7273 ())
7274 )
7275 )
7277 ; dadc for m16c
7278 (decimal-subtraction16-insn dadc #xE #x6 )
7280 ; dadc.size #imm,dst
7281 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem)
7282 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem)
7283 ; dadc.BW src,dst
7284 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem)
7285 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem)
7287 (define-pmacro (dadd-sem mode src dst)
7288 (sequence ((mode result))
7289 (set result (subc mode dst src 0))
7290 (set cbit (sub-cflag mode dst src 0))
7291 (set-z-and-s result)
7292 (set dst result))
7293 )
7295 ; dadd for m16c
7296 (decimal-subtraction16-insn dadd #xC #x4)
7298 ; dadd.size #imm,dst
7299 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem)
7300 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem)
7301 ; dadd.BW src,dst
7302 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem)
7303 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem)
7305 ;-------------------------------------------------------------;
7306 ; addx - Add extend sign with no carry
7307 ;-------------------------------------------------------------;
7309 (define-pmacro (addx-sem mode src dst)
7310 (sequence ((SI source) (SI result))
7311 (set source (zext SI (trunc QI src)))
7312 (set result (add SI source dst))
7313 (set obit (add-oflag SI source dst 0))
7314 (set cbit (add-cflag SI source dst 0))
7315 (set-z-and-s result)
7316 (set dst result))
7317 )
7319 ; addx #imm,dst
7320 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem)
7321 ; addx src,dst
7322 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem)
7324 ;-------------------------------------------------------------
7325 ; adjnz - Add/Sub and branch if not zero
7326 ;-------------------------------------------------------------
7328 (define-pmacro (arith-jnz-sem mode src dst label)
7329 (sequence ((mode result))
7330 (set result (add mode src dst))
7331 (set dst result)
7332 (if (ne result 0)
7333 (set pc label)))
7334 )
7336 ; adjnz.size #imm4,dst,label
7337 (arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem)
7339 ;-------------------------------------------------------------
7340 ; and - binary and
7341 ;-------------------------------------------------------------
7343 (define-pmacro (and-sem mode src1 dst)
7344 (sequence ((mode result))
7345 (set result (and mode src1 dst))
7346 (set-z-and-s result)
7347 (set dst result))
7348 )
7350 ; and.size:G #imm,dst (m16 #1 m32 #1)
7351 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem)
7352 ; and.b:S #imm8,dst3 (m16 #2)
7353 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem)
7354 ; and.BW:G src,dst (m16 #3 m32 #3)
7355 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem)
7356 ; and.B.S src2,r0l/r0h (m16 #4)
7357 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem)
7358 ; and.BW:S #imm,dst2 (m32 #2)
7359 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem)
7360 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem)
7362 ;-------------------------------------------------------------
7363 ; band - bit and
7364 ;-------------------------------------------------------------
7366 (define-pmacro (band-sem src)
7367 (set cbit (and src cbit))
7368 )
7369 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem)
7371 ;-------------------------------------------------------------
7372 ; bclr - bit clear
7373 ;-------------------------------------------------------------
7375 (define-pmacro (bclr-sem dst)
7376 (set dst 0)
7377 )
7378 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem)
7380 ;-------------------------------------------------------------
7381 ; bitindex - bit index
7382 ;-------------------------------------------------------------
7384 (define-pmacro (bitindex-sem mode dst)
7385 (set BitIndex dst)
7386 )
7387 (unary-insn-defn 32 16-Unprefixed QI .b bitindex
7388 (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE))
7389 bitindex-sem)
7390 (unary-insn-defn 32 16-Unprefixed HI .w bitindex
7391 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE))
7392 bitindex-sem)
7394 ;-------------------------------------------------------------
7395 ; bmCnd - bit move condition
7396 ;-------------------------------------------------------------
7398 (define-pmacro (test-condition16 cond)
7399 (case UQI cond
7400 ((#x00) (trunc BI cbit))
7401 ((#x01) (not (or cbit zbit)))
7402 ((#x02) (trunc BI zbit))
7403 ((#x03) (trunc BI sbit))
7404 ((#x04) (or zbit (xor sbit obit)))
7405 ((#x05) (trunc BI obit))
7406 ((#x06) (xor sbit obit))
7407 ((#xf8) (not cbit))
7408 ((#xf9) (or cbit zbit))
7409 ((#xfa) (not zbit))
7410 ((#xfb) (not sbit))
7411 ((#xfc) (not (or zbit (xor sbit obit))))
7412 ((#xfd) (not obit))
7413 ((#xfe) (not (xor sbit obit)))
7414 (else (const BI 0))
7415 )
7416 )
7418 (define-pmacro (test-condition32 cond)
7419 (case UQI cond
7420 ((#x00) (not cbit))
7421 ((#x01) (or cbit zbit))
7422 ((#x02) (not zbit))
7423 ((#x03) (not sbit))
7424 ((#x04) (not obit))
7425 ((#x05) (not (or zbit (xor sbit obit))))
7426 ((#x06) (not (xor sbit obit)))
7427 ((#x08) (trunc BI cbit))
7428 ((#x09) (not (or cbit zbit)))
7429 ((#x0a) (trunc BI zbit))
7430 ((#x0b) (trunc BI sbit))
7431 ((#x0c) (trunc BI obit))
7432 ((#x0d) (or zbit (xor sbit obit)))
7433 ((#x0e) (xor sbit obit))
7434 (else (const BI 0))
7435 )
7436 )
7438 (define-pmacro (bitcond-sem mach op cond)
7439 (if ((.sym test-condition mach) cond)
7440 (set op 1)
7441 (set op 0))
7442 )
7443 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem)
7445 (dni bm16-c
7446 "bm16 C"
7447 ((machine 16))
7448 "bm$cond16c c"
7449 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c)
7450 (bitcond-sem 16 cbit cond16c)
7451 ())
7453 (dni bm32-c
7454 "bm32 C"
7455 ((machine 32))
7456 "bm$cond32 c"
7457 (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32)
7458 (bitcond-sem 32 cbit cond32)
7459 ())
7461 ;-------------------------------------------------------------
7462 ; bnand
7463 ;-------------------------------------------------------------
7465 (define-pmacro (bnand-sem src)
7466 (set cbit (and (inv src) cbit))
7467 )
7468 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem)
7470 ;-------------------------------------------------------------
7471 ; bnor
7472 ;-------------------------------------------------------------
7474 (define-pmacro (bnor-sem src)
7475 (set cbit (or (inv src) cbit))
7476 )
7477 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem)
7479 ;-------------------------------------------------------------
7480 ; bnot
7481 ;-------------------------------------------------------------
7483 (define-pmacro (bnot-sem dst)
7484 (set dst (inv dst))
7485 )
7486 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem)
7488 ;-------------------------------------------------------------
7489 ; bntst
7490 ;-------------------------------------------------------------
7492 (define-pmacro (bntst-sem src)
7493 (set cbit (inv src))
7494 (set zbit (inv src))
7495 )
7496 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem)
7498 ;-------------------------------------------------------------
7499 ; bnxor
7500 ;-------------------------------------------------------------
7502 (define-pmacro (bnxor-sem src)
7503 (set cbit (xor (inv src) cbit))
7504 )
7505 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem)
7507 ;-------------------------------------------------------------
7508 ; bor
7509 ;-------------------------------------------------------------
7511 (define-pmacro (bor-sem src)
7512 (set cbit (or src cbit))
7513 )
7514 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem)
7516 ;-------------------------------------------------------------
7517 ; brk
7518 ;-------------------------------------------------------------
7520 (dni brk16
7521 "brk"
7522 ((machine 16))
7523 "brk"
7524 (+ (f-0-4 #x0) (f-4-4 #x0))
7525 (nop)
7526 ())
7528 (dni brk32
7529 "brk"
7530 ((machine 32))
7531 "brk"
7532 (+ (f-0-4 #x0) (f-4-4 #x0))
7533 (nop)
7534 ())
7536 ;-------------------------------------------------------------
7537 ; brk2
7538 ;-------------------------------------------------------------
7540 (dni brk232
7541 "brk2"
7542 ((machine 32))
7543 "brk2"
7544 (+ (f-0-4 #x0) (f-4-4 #x8))
7545 (nop)
7546 ())
7548 ;-------------------------------------------------------------
7549 ; bset
7550 ;-------------------------------------------------------------
7552 (define-pmacro (bset-sem dst)
7553 (set dst 1)
7554 )
7555 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem)
7557 ;-------------------------------------------------------------
7558 ; btst
7559 ;-------------------------------------------------------------
7561 (define-pmacro (btst-sem dst)
7562 (set zbit (inv dst))
7563 (set cbit dst)
7564 )
7565 (bitdst-insn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) #xD #x0 #x0 btst-sem)
7567 ;-------------------------------------------------------------
7568 ; btstc
7569 ;-------------------------------------------------------------
7571 (define-pmacro (btstc-sem dst)
7572 (set zbit (inv dst))
7573 (set cbit dst)
7574 (set dst (const 0))
7575 )
7576 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem)
7578 ;-------------------------------------------------------------
7579 ; btsts
7580 ;-------------------------------------------------------------
7582 (define-pmacro (btsts-sem dst)
7583 (set zbit (inv dst))
7584 (set cbit dst)
7585 (set dst (const 0))
7586 )
7587 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem)
7589 ;-------------------------------------------------------------
7590 ; bxor
7591 ;-------------------------------------------------------------
7593 (define-pmacro (bxor-sem src)
7594 (set cbit (xor src cbit))
7595 )
7596 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem)
7598 ;-------------------------------------------------------------
7599 ; clip
7600 ;-------------------------------------------------------------
7602 (define-pmacro (clip-sem mode imm1 imm2 dest)
7603 (sequence ()
7604 (if (gt mode imm1 dest)
7605 (set dest imm1))
7606 (if (lt mode imm2 dest)
7607 (set dest imm2)))
7608 )
7610 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem)
7612 ;-------------------------------------------------------------
7613 ; cmp - binary compare
7614 ;-------------------------------------------------------------
7616 (define-pmacro (cmp-sem mode src1 dst)
7617 (sequence ((mode result))
7618 (set result (sub mode dst src1))
7619 (set obit (sub-oflag mode dst src1 0))
7620 (set cbit (not (sub-cflag mode dst src1 0)))
7621 (set-z-and-s result))
7622 )
7624 ; cmp.L:G #imm32,dst (m32 #2)
7625 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem)
7626 ; cmp.size:G #imm,dst (m16 #1 m32 #1)
7627 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem)
7628 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3)
7629 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem)
7630 ; cmp.b:S #imm8,dst3 (m16 #3)
7631 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem)
7632 ; cmp.BW:G src,dst (m16 #4 m32 #5)
7633 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem)
7634 ; cmp.B.S src2,r0l/r0h (m16 #5)
7635 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem)
7636 ; cmp.L:G src,dst (m32 #6)
7637 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem)
7638 ; cmp.BW:S #imm,dst2 (m32 #4)
7639 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem)
7640 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem)
7641 ; cmp.BW:s src2,r0[l] (m32 #7)
7642 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem)
7643 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem)
7645 ;-------------------------------------------------------------
7646 ; cmpx - binary compare extend sign
7647 ;-------------------------------------------------------------
7649 (define-pmacro (cmpx-sem mode src1 dst)
7650 (sequence ((mode result))
7651 (set result (sub mode dst (ext mode src1)))
7652 (set obit (sub-oflag mode dst (ext mode src1) 0))
7653 (set cbit (sub-cflag mode dst (ext mode src1) 0))
7654 (set-z-and-s result))
7655 )
7657 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem)
7659 ;-------------------------------------------------------------
7660 ; dec - decrement
7661 ;-------------------------------------------------------------
7663 (define-pmacro (dec-sem mode dest)
7664 (sequence ((mode result))
7665 (set result (sub mode dest 1))
7666 (set-z-and-s result)
7667 (set dest result))
7668 )
7670 (dni dec16.b
7671 "dec.b Dst16-3-S-8"
7672 ((machine 16))
7673 "dec.b ${Dst16-3-S-8}"
7674 (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8)
7675 (dec-sem QI Dst16-3-S-8)
7676 ())
7678 (dni dec16.w
7679 "dec.w Dst16An-S"
7680 ((machine 16))
7681 "dec.w ${Dst16An-S}"
7682 (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S)
7683 (dec-sem HI Dst16An-S)
7684 ())
7686 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem)
7687 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem)
7689 ;-------------------------------------------------------------
7690 ; div - divide
7691 ; divu - divide unsigned
7692 ; divx - divide extension
7693 ;-------------------------------------------------------------
7695 ; div.BW #imm
7696 (div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem)
7697 (div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem)
7698 (div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem)
7699 ; div.BW src
7700 (div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem)
7701 (div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem)
7702 (div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem)
7704 (div-src-defn 32 .l div dst32-24-Prefixed-SI
7705 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI)
7706 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7707 div-sem)
7708 (div-src-defn 32 .l divu dst32-24-Prefixed-SI
7709 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI)
7710 udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0
7711 div-sem)
7712 (div-src-defn 32 .l divx dst32-24-Prefixed-SI
7713 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI)
7714 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7715 div-sem)
7717 ;-------------------------------------------------------------
7718 ; dsbb - decimal subtraction with borrow
7719 ; dsub - decimal subtraction
7720 ;-------------------------------------------------------------
7722 (define-pmacro (dsbb-sem mode src dst)
7723 (sequence ((mode result))
7724 (set result (subc mode dst src (not cbit)))
7725 (set cbit (sub-cflag mode dst src (not cbit)))
7726 (set-z-and-s result)
7727 (set dst result))
7728 )
7730 ; dsbb for m16c
7731 (decimal-subtraction16-insn dsbb #xF #x7)
7733 ; dsbb.size #imm,dst
7734 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem)
7735 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem)
7736 ; dsbb.BW src,dst
7737 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem)
7738 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem)
7740 (define-pmacro (dsub-sem mode src dst)
7741 (sequence ((mode result))
7742 (set result (subc mode dst src 0))
7743 (set cbit (sub-cflag mode dst src 0))
7744 (set-z-and-s result)
7745 (set dst result))
7746 )
7748 ; dsub for m16c
7749 (decimal-subtraction16-insn dsub #xD #x5)
7751 ; dsub.size #imm,dst
7752 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem)
7753 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem)
7754 ; dsub.BW src,dst
7755 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem)
7756 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem)
7758 ;-------------------------------------------------------------
7759 ; sub - binary subtraction
7760 ;-------------------------------------------------------------
7762 (define-pmacro (sub-sem mode src1 dst)
7763 (sequence ((mode result))
7764 (set result (sub mode dst src1))
7765 (set obit (sub-oflag mode dst src1 0))
7766 (set cbit (sub-cflag mode dst src1 0))
7767 (set dst result)
7768 (set-z-and-s result)))
7770 ; sub.size:G #imm,dst (m16 #1 m32 #1)
7771 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem)
7772 ; sub.b:S #imm8,dst3 (m16 #2)
7773 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem)
7774 ; sub.BW:G src,dst (m16 #3 m32 #4)
7775 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem)
7776 ; sub.B.S src2,r0l/r0h (m16 #4)
7777 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem)
7778 ; sub.L:G #imm32,dst (m32 #2)
7779 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem)
7780 ; sub.BW:S #imm,dst2 (m32 #3)
7781 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem)
7782 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem)
7783 ; sub.L:G src,dst (m32 #5)
7784 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem)
7786 ;-------------------------------------------------------------
7787 ; enter - enter function
7788 ; exitd - exit and deallocate stack frame
7789 ;-------------------------------------------------------------
7791 (define-pmacro (enter16-sem mach amt)
7792 (sequence ()
7793 (set (reg h-sp) (sub (reg h-sp) 2))
7794 (set (mem16 HI (reg h-sp)) (reg h-fb))
7795 (set (reg h-fb) (reg h-sp))
7796 (set (reg h-sp) (sub (reg h-sp) amt))))
7798 (define-pmacro (exit16-sem mach)
7799 (sequence ((SI newpc))
7800 (set (reg h-sp) (reg h-fb))
7801 (set (reg h-fb) (mem16 HI (reg h-sp)))
7802 (set (reg h-sp) (add (reg h-sp) 2))
7803 (set newpc (mem16 HI (reg h-sp)))
7804 (set (reg h-sp) (add (reg h-sp) 2))
7805 (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16))))
7806 (set (reg h-sp) (add (reg h-sp) 1))
7807 (set pc newpc)))
7809 (define-pmacro (enter32-sem mach amt)
7810 (sequence ()
7811 (set (reg h-sp) (sub (reg h-sp) 4))
7812 (set (mem32 SI (reg h-sp)) (reg h-fb))
7813 (set (reg h-fb) (reg h-sp))
7814 (set (reg h-sp) (sub (reg h-sp) amt))))
7816 (define-pmacro (exit32-sem mach)
7817 (sequence ((SI newpc))
7818 (set (reg h-sp) (reg h-fb))
7819 (set (reg h-fb) (mem32 SI (reg h-sp)))
7820 (set (reg h-sp) (add (reg h-sp) 4))
7821 (set newpc (mem32 SI (reg h-sp)))
7822 (set (reg h-sp) (add (reg h-sp) 4))
7823 (set pc newpc)))
7825 (dni enter16 "enter #Imm-16-QI" ((machine 16))
7826 ("enter #${Dsp-16-u8}")
7827 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8)
7828 (enter16-sem 16 Dsp-16-u8)
7829 ())
7831 (dni exitd16 "exitd" ((machine 16))
7832 ("exitd")
7833 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2))
7834 (exit16-sem 16)
7835 ())
7837 (dni enter32 "enter #Imm-8-QI" ((machine 32))
7838 ("enter #${Dsp-8-u8}")
7839 (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8)
7840 (enter32-sem 32 Dsp-8-u8)
7841 ())
7843 (dni exitd32 "exitd" ((machine 32))
7844 ("exitd")
7845 (+ (f-0-4 #xF) (f-4-4 #xC))
7846 (exit32-sem 32)
7847 ())
7849 ;-------------------------------------------------------------
7850 ; fclr - flag register clear
7851 ; fset - flag register set
7852 ;-------------------------------------------------------------
7854 (define-pmacro (set-flags-sem flag)
7855 (sequence ((SI tmp))
7856 (case DFLT flag
7857 ((#x0) (set cbit 1))
7858 ((#x1) (set dbit 1))
7859 ((#x2) (set zbit 1))
7860 ((#x3) (set sbit 1))
7861 ((#x4) (set bbit 1))
7862 ((#x5) (set obit 1))
7863 ((#x6) (set ibit 1))
7864 ((#x7) (set ubit 1)))
7865 )
7866 )
7868 (define-pmacro (clear-flags-sem flag)
7869 (sequence ((SI tmp))
7870 (case DFLT flag
7871 ((#x0) (set cbit 0))
7872 ((#x1) (set dbit 0))
7873 ((#x2) (set zbit 0))
7874 ((#x3) (set sbit 0))
7875 ((#x4) (set bbit 0))
7876 ((#x5) (set obit 0))
7877 ((#x6) (set ibit 0))
7878 ((#x7) (set ubit 0)))
7879 )
7880 )
7882 (dni fclr16 "fclr flag" ((machine 16))
7883 ("fclr ${flags16}")
7884 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5))
7885 (clear-flags-sem flags16)
7886 ())
7888 (dni fset16 "fset flag" ((machine 16))
7889 ("fset ${flags16}")
7890 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4))
7891 (set-flags-sem flags16)
7892 ())
7894 (dni fclr "fclr" ((machine 32))
7895 ("fclr ${flags32}")
7896 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32)
7897 (clear-flags-sem flags32)
7898 ())
7900 (dni fset "fset" ((machine 32))
7901 ("fset ${flags32}")
7902 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32)
7903 (set-flags-sem flags32)
7904 ())
7906 ;-------------------------------------------------------------
7907 ; inc - increment
7908 ;-------------------------------------------------------------
7910 (define-pmacro (inc-sem mode dest)
7911 (sequence ((mode result))
7912 (set result (add mode dest 1))
7913 (set-z-and-s result)
7914 (set dest result))
7915 )
7917 (dni inc16.b
7918 "inc.b Dst16-3-S-8"
7919 ((machine 16))
7920 "inc.b ${Dst16-3-S-8}"
7921 (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8)
7922 (inc-sem QI Dst16-3-S-8)
7923 ())
7925 (dni inc16.w
7926 "inc.w Dst16An-S"
7927 ((machine 16))
7928 "inc.w ${Dst16An-S}"
7929 (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S)
7930 (inc-sem HI Dst16An-S)
7931 ())
7933 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem)
7934 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem)
7936 ;-------------------------------------------------------------
7937 ; freit - fast return from interrupt (m32)
7938 ; int - interrupt
7939 ; into - interrupt on overflow
7940 ;-------------------------------------------------------------
7942 ; ??? semantics
7943 (dni freit32 "FREIT" ((machine 32))
7944 ("freit")
7945 (+ (f-0-4 9) (f-4-4 #xF))
7946 (nop)
7947 ())
7949 (dni int16 "int Dsp-10-u6" ((machine 16))
7950 ("int #${Dsp-10-u6}")
7951 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6)
7952 (c-call VOID "do_int" pc Dsp-10-u6)
7953 ())
7955 (dni into16 "into" ((machine 16))
7956 ("into")
7957 (+ (f-0-4 #xF) (f-4-4 6))
7958 (nop)
7959 ())
7961 (dni int32 "int Dsp-8-u6" ((machine 32))
7962 ("int #${Dsp-8-u6}")
7963 (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0))
7964 (c-call VOID "do_int" pc Dsp-8-u6)
7965 ())
7967 (dni into32 "into" ((machine 32))
7968 ("into")
7969 (+ (f-0-4 #xB) (f-4-4 #xF))
7970 (nop)
7971 ())
7973 ;-------------------------------------------------------------
7974 ; index (m32c)
7975 ;-------------------------------------------------------------
7977 ; TODO add support to insns allowing index
7978 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d))
7979 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d))
7980 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0)))
7981 (define-pmacro (indexw-sem mode d)
7982 (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2))))
7983 (define-pmacro (indexwd-sem mode d)
7984 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
7985 (define-pmacro (indexws-sem mode d)
7986 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
7987 (define-pmacro (indexl-sem mode d)
7988 (set SrcIndex d) (set DstIndex (sll d (const 2))))
7989 (define-pmacro (indexld-sem mode d)
7990 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
7991 (define-pmacro (indexls-sem mode d)
7992 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
7994 ; Note that "wbit" not where the size bit goes here, hence, it's
7995 ; always 0 in these calls but op2 differs instead.
7997 ; indexb src (index byte)
7998 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
7999 (unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem)
8000 ; indexbd src (index byte dest)
8001 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
8002 (unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem)
8003 ; indexbs src (index byte src)
8004 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
8005 (unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem)
8006 ; indexl src (index long)
8007 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
8008 (unary32-defn HI .w 0 indexl 9 3 3 indexl-sem)
8009 ; indexld src (index long dest)
8010 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
8011 (unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem)
8012 ; indexls src (index long src)
8013 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
8014 (unary32-defn HI .w 0 indexls 9 1 3 indexls-sem)
8015 ; indexw src (index word)
8016 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
8017 (unary32-defn HI .w 0 indexw 8 3 3 indexw-sem)
8018 ; indexwd src (index word dest)
8019 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
8020 (unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem)
8021 ; indexws (index word src)
8022 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
8023 (unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem)
8025 ;-------------------------------------------------------------
8026 ; jcc - jump on condition
8027 ;-------------------------------------------------------------
8029 (define-pmacro (jcnd32-sem cnd label)
8030 (sequence ()
8031 (case DFLT cnd
8032 ((#x00) (if (not cbit) (set pc label))) ;ltu nc
8033 ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8034 ((#x02) (if (not zbit) (set pc label))) ;ne nz
8035 ((#x03) (if (not sbit) (set pc label))) ;pz
8036 ((#x04) (if (not obit) (set pc label))) ;no
8037 ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8038 ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge
8039 ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c
8040 ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu
8041 ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z
8042 ((#x0b) (if (trunc BI sbit) (set pc label))) ;n
8043 ((#x0c) (if (trunc BI obit) (set pc label))) ;o
8044 ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8045 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8046 )
8047 )
8048 )
8050 (define-pmacro (jcnd16-sem cnd label)
8051 (sequence ()
8052 (case DFLT cnd
8053 ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c
8054 ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu
8055 ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z
8056 ((#x03) (if (trunc BI sbit) (set pc label))) ;n
8057 ((#x04) (if (not cbit) (set pc label))) ;ltu nc
8058 ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8059 ((#x06) (if (not zbit) (set pc label))) ;ne nz
8060 ((#x07) (if (not sbit) (set pc label))) ;pz
8061 ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8062 ((#x09) (if (trunc BI obit) (set pc label))) ;o
8063 ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge
8064 ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8065 ((#x0d) (if (not obit) (set pc label))) ;no
8066 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8067 )
8068 )
8069 )
8071 (dni jcnd16-5
8072 "jCnd label"
8073 (RL_JUMP RELAXABLE (machine 16))
8074 "j$cond16j5 ${Lab-8-8}"
8075 (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
8076 (jcnd16-sem cond16j5 Lab-8-8)
8077 ()
8078 )
8080 (dni jcnd16
8081 "jCnd label"
8082 (RL_JUMP RELAXABLE (machine 16))
8083 "j$cond16j ${Lab-16-8}"
8084 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
8085 (jcnd16-sem cond16j Lab-16-8)
8086 ()
8087 )
8089 (dni jcnd32
8090 "jCnd label"
8091 (RL_JUMP RELAXABLE (machine 32))
8092 "j$cond32j ${Lab-8-8}"
8093 (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
8094 (jcnd32-sem cond32j Lab-8-8)
8095 ()
8096 )
8098 ;-------------------------------------------------------------
8099 ; jmp - jump
8100 ;-------------------------------------------------------------
8102 ; jmp.s label3 (m16 #1)
8103 (dni jmp16.s "jmp.s Lab-5-3" (RL_JUMP RELAXABLE (machine 16))
8104 ("jmp.s ${Lab-5-3}")
8105 (+ (f-0-4 6) (f-4-1 0) Lab-5-3)
8106 (sequence () (set pc Lab-5-3))
8107 ())
8108 ; jmp.b label8 (m16 #2)
8109 (dni jmp16.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 16))
8110 ("jmp.b ${Lab-8-8}")
8111 (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
8112 (sequence () (set pc Lab-8-8))
8113 ())
8114 ; jmp.w label16 (m16 #3)
8115 (dni jmp16.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
8116 ("jmp.w ${Lab-8-16}")
8117 (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
8118 (sequence () (set pc Lab-8-16))
8119 ())
8120 ; jmp.a label24 (m16 #4)
8121 (dni jmp16.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
8122 ("jmp.a ${Lab-8-24}")
8123 (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
8124 (sequence () (set pc Lab-8-24))
8125 ())
8127 (define-pmacro (jmp16-sem mode dst)
8128 (set pc (and dst #xfffff))
8129 )
8130 (define-pmacro (jmp32-sem mode dst)
8131 (set pc dst)
8132 )
8133 ; jmpi.w dst (m16 #1 m32 #2)
8134 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem)
8135 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem)
8136 ; jmpi.a dst (m16 #2 m32 #2)
8137 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem)
8138 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem)
8139 ; jmps imm8 (m16 #1)
8140 (dni jmps16 "jmps Imm-8-QI" ((machine 16))
8141 ("jmps #${Imm-8-QI}")
8142 (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI)
8143 (sequence () (set pc Imm-8-QI))
8144 ())
8145 ; jmp.s label3 (m32 #1)
8146 (dni jmp32.s
8147 "jmp.s label"
8148 (RL_JUMP RELAXABLE (machine 32))
8149 "jmp.s ${Lab32-jmp-s}"
8150 (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
8151 (set pc Lab32-jmp-s)
8152 ()
8153 )
8154 ; jmp.b label8 (m32 #2)
8155 (dni jmp32.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 32))
8156 ("jmp.b ${Lab-8-8}")
8157 (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
8158 (set pc Lab-8-8)
8159 ())
8160 ; jmp.w label16 (m32 #3)
8161 (dni jmp32.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 32))
8162 ("jmp.w ${Lab-8-16}")
8163 (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
8164 (set pc Lab-8-16)
8165 ())
8166 ; jmp.a label24 (m32 #4)
8167 (dni jmp32.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 32))
8168 ("jmp.a ${Lab-8-24}")
8169 (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
8170 (set pc Lab-8-24)
8171 ())
8172 ; jmp.s imm8 (m32 #1)
8173 (dni jmps32 "jmps Imm-8-QI" (RL_JUMP (machine 32))
8174 ("jmps #${Imm-8-QI}")
8175 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
8176 (set pc Imm-8-QI)
8177 ())
8179 ;-------------------------------------------------------------
8180 ; jsr jump subroutine
8181 ;-------------------------------------------------------------
8183 (define-pmacro (jsr16-sem length dst)
8184 (sequence ((SI tpc))
8185 (set tpc (add pc length))
8186 (set (reg h-sp) (sub (reg h-sp) 2))
8187 (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8))
8188 (set (reg h-sp) (sub (reg h-sp) 1))
8189 (set (mem16 QI (reg h-sp)) (and tpc #xff))
8190 (set pc dst)
8191 )
8192 )
8193 (define-pmacro (jsr32-sem length dst)
8194 (sequence ((SI tpc))
8195 (set tpc (add pc length))
8196 (set (reg h-sp) (sub (reg h-sp) 2))
8197 (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16))
8198 (set (reg h-sp) (sub (reg h-sp) 2))
8199 (set (mem32 HI (reg h-sp)) (and tpc #xffff))
8200 (set pc dst)
8201 )
8202 )
8204 ; jsr.w label16 (m16 #1)
8205 (dni jsr16.w "jsr.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
8206 ("jsr.w ${Lab-8-16}")
8207 (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
8208 (jsr16-sem 3 Lab-8-16)
8209 ())
8210 ; jsr.a label24 (m16 #2)
8211 (dni jsr16.a "jsr.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
8212 ("jsr.a ${Lab-8-24}")
8213 (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
8214 (jsr16-sem 4 Lab-8-24)
8215 ())
8216 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem
8217 op32 op32-1 op32-2 op32-3 op32-4 op32-sem len)
8218 (begin
8219 (dni (.sym jsri16 mode - op16)
8220 (.str "jsri." mode " " op16)
8221 (RL_1ADDR (machine 16))
8222 (.str "jsri." mode " ${" op16 "}")
8223 (+ op16-1 op16-2 op16-3 op16)
8224 (op16-sem len op16)
8225 ())
8226 (dni (.sym jsri32 mode - op32)
8227 (.str "jsri." mode " " op32)
8228 (RL_1ADDR (machine 32))
8229 (.str "jsri." mode " ${" op32 "}")
8230 (+ op32-1 op32-2 op32-3 op32-4 op32)
8231 (op32-sem len op32)
8232 ())
8233 )
8234 )
8235 ; jsri.w dst (m16 #1 m32 #1))
8236 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8237 dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3)
8238 (jsri-defn w dst16-16-16-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8239 dst32-16-16-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8240 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8241 dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
8242 (dni jsri32.w "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32))
8243 ("jsri.w ${dst32-16-24-Unprefixed-HI}")
8244 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-24-Unprefixed-HI (f-10-2 #x1) (f-12-4 #xF))
8245 (jsr32-sem 6 dst32-16-24-Unprefixed-HI)
8246 ())
8248 ; jsri.a (m16 #2 m32 #2)
8249 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8250 dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3)
8251 (jsri-defn a dst16-16-16-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8252 dst32-16-16-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8253 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8254 dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
8256 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32))
8257 ("jsri.w ${dst32-16-24-Unprefixed-SI}")
8258 (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
8259 (jsr32-sem 6 dst32-16-24-Unprefixed-SI)
8260 ())
8261 ; jsr.w label16 (m32 #1)
8262 (dni jsr32.w "jsr.w label" (RL_JUMP RELAXABLE (machine 32))
8263 ("jsr.w ${Lab-8-16}")
8264 (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
8265 (jsr32-sem 3 Lab-8-16)
8266 ())
8267 ; jsr.a label16 (m32 #2)
8268 (dni jsr32.a "jsr.a label" (RL_JUMP (machine 32))
8269 ("jsr.a ${Lab-8-24}")
8270 (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
8271 (jsr32-sem 4 Lab-8-24)
8272 ())
8273 ; jsrs imm8 (m16 #1)
8274 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16))
8275 ("jsrs #${Imm-8-QI}")
8276 (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI)
8277 (jsr16-sem 2 Imm-8-QI)
8278 ())
8279 ; jsrs imm8 (m32 #1)
8280 (dni jsrs "jsrs #Imm-8-QI" ((machine 32))
8281 ("jsrs #${Imm-8-QI}")
8282 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI)
8283 (jsr32-sem 2 Imm-8-QI)
8284 ())
8286 ;-------------------------------------------------------------
8287 ; ldc - load control register
8288 ; stc - store control register
8289 ;-------------------------------------------------------------
8291 (define-pmacro (ldc32-cr1-sem src dst)
8292 (sequence ()
8293 (case DFLT dst
8294 ((#x0) (set (reg h-dct0) src))
8295 ((#x1) (set (reg h-dct1) src))
8296 ((#x2) (sequence ((HI tflag))
8297 (set tflag src)
8298 (if (and tflag #x1) (set cbit 1))
8299 (if (and tflag #x2) (set dbit 1))
8300 (if (and tflag #x4) (set zbit 1))
8301 (if (and tflag #x8) (set sbit 1))
8302 (if (and tflag #x10) (set bbit 1))
8303 (if (and tflag #x20) (set obit 1))
8304 (if (and tflag #x40) (set ibit 1))
8305 (if (and tflag #x80) (set ubit 1))))
8306 ((#x3) (set (reg h-svf) src))
8307 ((#x4) (set (reg h-drc0) src))
8308 ((#x5) (set (reg h-drc1) src))
8309 ((#x6) (set (reg h-dmd0) src))
8310 ((#x7) (set (reg h-dmd1) src))
8311 )
8312 )
8313 )
8314 (define-pmacro (ldc32-cr2-sem src dst)
8315 (sequence ()
8316 (case DFLT dst
8317 ((#x0) (set (reg h-intb) src))
8318 ((#x1) (set (reg h-sp) src))
8319 ((#x2) (set (reg h-sb) src))
8320 ((#x3) (set (reg h-fb) src))
8321 ((#x4) (set (reg h-svp) src))
8322 ((#x5) (set (reg h-vct) src))
8323 ((#x7) (set (reg h-isp) src))
8324 )
8325 )
8326 )
8327 (define-pmacro (ldc32-cr3-sem src dst)
8328 (sequence ()
8329 (case DFLT dst
8330 ((#x2) (set (reg h-dma0) src))
8331 ((#x3) (set (reg h-dma1) src))
8332 ((#x4) (set (reg h-dra0) src))
8333 ((#x5) (set (reg h-dra1) src))
8334 ((#x6) (set (reg h-dsa0) src))
8335 ((#x7) (set (reg h-dsa1) src))
8336 )
8337 )
8338 )
8339 (define-pmacro (ldc16-sem src dst)
8340 (sequence ()
8341 (case DFLT dst
8342 ((#x1) (set (reg h-intb) src))
8343 ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16)))))
8344 ((#x3) (sequence ((HI tflag))
8345 (set tflag src)
8346 (if (and tflag #x1) (set cbit 1))
8347 (if (and tflag #x2) (set dbit 1))
8348 (if (and tflag #x4) (set zbit 1))
8349 (if (and tflag #x8) (set sbit 1))
8350 (if (and tflag #x10) (set bbit 1))
8351 (if (and tflag #x20) (set obit 1))
8352 (if (and tflag #x40) (set ibit 1))
8353 (if (and tflag #x80) (set ubit 1))))
8354 ((#x4) (set (reg h-isp) src))
8355 ((#x5) (set (reg h-sp) src))
8356 ((#x6) (set (reg h-sb) src))
8357 ((#x7) (set (reg h-fb) src))
8358 )
8359 )
8360 )
8362 (define-pmacro (stc32-cr1-sem src dst)
8363 (sequence ()
8364 (case DFLT src
8365 ((#x0) (set dst (reg h-dct0)))
8366 ((#x1) (set dst (reg h-dct1)))
8367 ((#x2) (sequence ((HI tflag))
8368 (set tflag 0)
8369 (if (eq cbit 1) (set tflag (or tflag #x1)))
8370 (if (eq dbit 1) (set tflag (or tflag #x2)))
8371 (if (eq zbit 1) (set tflag (or tflag #x4)))
8372 (if (eq sbit 1) (set tflag (or tflag #x8)))
8373 (if (eq bbit 1) (set tflag (or tflag #x10)))
8374 (if (eq obit 1) (set tflag (or tflag #x20)))
8375 (if (eq ibit 1) (set tflag (or tflag #x40)))
8376 (if (eq ubit 1) (set tflag (or tflag #x80)))
8377 (set dst tflag)))
8378 ((#x3) (set dst (reg h-svf)))
8379 ((#x4) (set dst (reg h-drc0)))
8380 ((#x5) (set dst (reg h-drc1)))
8381 ((#x6) (set dst (reg h-dmd0)))
8382 ((#x7) (set dst (reg h-dmd1)))
8383 )
8384 )
8385 )
8386 (define-pmacro (stc32-cr2-sem src dst)
8387 (sequence ()
8388 (case DFLT src
8389 ((#x0) (set dst (reg h-intb)))
8390 ((#x1) (set dst (reg h-sp)))
8391 ((#x2) (set dst (reg h-sb)))
8392 ((#x3) (set dst (reg h-fb)))
8393 ((#x4) (set dst (reg h-svp)))
8394 ((#x5) (set dst (reg h-vct)))
8395 ((#x7) (set dst (reg h-isp)))
8396 )
8397 )
8398 )
8399 (define-pmacro (stc32-cr3-sem src dst)
8400 (sequence ()
8401 (case DFLT src
8402 ((#x2) (set dst (reg h-dma0)))
8403 ((#x3) (set dst (reg h-dma1)))
8404 ((#x4) (set dst (reg h-dra0)))
8405 ((#x5) (set dst (reg h-dra1)))
8406 ((#x6) (set dst (reg h-dsa0)))
8407 ((#x7) (set dst (reg h-dsa1)))
8408 )
8409 )
8410 )
8411 (define-pmacro (stc16-sem src dst)
8412 (sequence ()
8413 (case DFLT src
8414 ((#x1) (set dst (and (reg h-intb) (const #xffff))))
8415 ((#x2) (set dst (srl (reg h-intb) (const 16))))
8416 ((#x3) (sequence ((HI tflag))
8417 (set tflag 0)
8418 (if (eq cbit 1) (set tflag (or tflag #x1)))
8419 (if (eq dbit 1) (set tflag (or tflag #x2)))
8420 (if (eq zbit 1) (set tflag (or tflag #x4)))
8421 (if (eq sbit 1) (set tflag (or tflag #x8)))
8422 (if (eq bbit 1) (set tflag (or tflag #x10)))
8423 (if (eq obit 1) (set tflag (or tflag #x20)))
8424 (if (eq ibit 1) (set tflag (or tflag #x40)))
8425 (if (eq ubit 1) (set tflag (or tflag #x80)))
8426 (set dst tflag)))
8427 ((#x4) (set dst (reg h-isp)))
8428 ((#x5) (set dst (reg h-sp)))
8429 ((#x6) (set dst (reg h-sb)))
8430 ((#x7) (set dst (reg h-fb)))
8431 )
8432 )
8433 )
8435 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16))
8436 ("ldc #${Imm-16-HI},${cr16}")
8437 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI)
8438 (ldc16-sem Imm-16-HI cr16)
8439 ())
8441 (dni ldc16.dst "ldc src,dest" ((machine 16))
8442 ("ldc ${dst16-16-HI},${cr16}")
8443 (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI)
8444 (ldc16-sem dst16-16-HI cr16)
8445 ())
8446 ; ldc src,dest (m32c #4)
8447 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32))
8448 ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}")
8449 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32)
8450 (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32)
8451 ())
8452 ; ldc src,dest (m32c #5)
8453 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32))
8454 ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}")
8455 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32)
8456 (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32)
8457 ())
8458 ; ldc src,dest (m32c #6)
8459 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32))
8460 ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}")
8461 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32)
8462 (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32)
8463 ())
8464 ; ldc src,dest (m32c #1)
8465 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32))
8466 ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}")
8467 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI)
8468 (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32)
8469 ())
8470 ; ldc src,dest (m32c #2)
8471 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32))
8472 ("ldc #${Dsp-16-u24},${cr2-32}")
8473 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24)
8474 (ldc32-cr2-sem Dsp-16-u24 cr2-32)
8475 ())
8476 ; ldc src,dest (m32c #3)
8477 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32))
8478 ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}")
8479 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24)
8480 (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32)
8481 ())
8483 (dni stc16.src "stc src,dest" ((machine 16))
8484 ("stc ${cr16},${dst16-16-HI}")
8485 (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI)
8486 (stc16-sem cr16 dst16-16-HI )
8487 ())
8489 (dni stc16.pc "stc pc,dest" ((machine 16))
8490 ("stc pc,${dst16-16-HI}")
8491 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI)
8492 (sequence () (set dst16-16-HI (reg h-pc)))
8493 ())
8495 (dni stc32.src-cr1 "stc src,dst" ((machine 32))
8496 ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}")
8497 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32)
8498 (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI )
8499 ())
8501 (dni stc32.src-cr2 "stc src,dest" ((machine 32))
8502 ("stc ${cr2-32},${dst32-16-Unprefixed-SI}")
8503 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32)
8504 (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI )
8505 ())
8507 (dni stc32.src-cr3 "stc src,dst" ((machine 32))
8508 ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}")
8509 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32)
8510 (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI )
8511 ())
8513 ;-------------------------------------------------------------
8514 ; ldctx - load context
8515 ; stctx - store context
8516 ;-------------------------------------------------------------
8518 ; ??? semantics
8519 (dni ldctx16 "ldctx abs16,abs24" ((machine 16))
8520 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8521 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8522 (nop)
8523 ())
8524 (dni ldctx32 "ldctx abs16,abs24" ((machine 32))
8525 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8526 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8527 (nop)
8528 ())
8529 (dni stctx16 "stctx abs16,abs24" ((machine 16))
8530 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8531 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8532 (nop)
8533 ())
8534 (dni stctx32 "stctx abs16,abs24" ((machine 32))
8535 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8536 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8537 (nop)
8538 ())
8540 ;-------------------------------------------------------------
8541 ; lde - load from extra far data area (m16)
8542 ; ste - store to extra far data area (m16)
8543 ;-------------------------------------------------------------
8545 (lde-dst QI .b 0)
8546 (lde-dst HI .w 1)
8548 (ste-dst QI .b 0)
8549 (ste-dst HI .w 1)
8551 ;-------------------------------------------------------------
8552 ; ldipl - load interrupt permission level
8553 ;-------------------------------------------------------------
8555 ; ??? semantics
8556 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
8557 (dni ldipl16.imm "ldipl #imm" ((machine 16))
8558 ("ldipl #${Imm-13-u3}")
8559 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
8560 (nop)
8561 ())
8562 (dni ldipl32.imm "ldipl #imm" ((machine 32))
8563 ("ldipl #${Imm-13-u3}")
8564 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3)
8565 (nop)
8566 ())
8569 ;-------------------------------------------------------------
8570 ; max - maximum value
8571 ;-------------------------------------------------------------
8573 ; TODO check semantics for min -1,0
8574 (define-pmacro (max-sem mode src dst)
8575 (sequence ()
8576 (if (gt mode src dst)
8577 (set mode dst src)))
8578 )
8580 ; max.size:G #imm,dst
8581 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem)
8582 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem)
8584 ; max.BW:G src,dst
8585 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem)
8586 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem)
8588 ;-------------------------------------------------------------
8589 ; min - minimum value
8590 ;-------------------------------------------------------------
8592 (define-pmacro (min-sem mode src dst)
8593 (sequence ()
8594 (if (lt mode src dst)
8595 (set mode dst src)))
8596 )
8598 ; min.size:G #imm,dst
8599 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem)
8600 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem)
8602 ; min.BW:G src,dst
8603 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem)
8604 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem)
8606 ;-------------------------------------------------------------
8607 ; mov - move
8608 ;-------------------------------------------------------------
8610 (define-pmacro (mov-sem mode src1 dst)
8611 (sequence ((mode result))
8612 (set result src1)
8613 (set-z-and-s result)
8614 (set mode dst src1))
8615 )
8617 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst)
8618 (set dst (mem-mach mach mode (add sp src1)))
8619 )
8621 (define-pmacro (mov-src-dspsp-sem mach mode src dst1)
8622 (set (mem-mach mach mode (add sp dst1)) src)
8623 )
8625 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2)
8626 (dni (.sym mov16. size .S-imm- regn)
8627 (.str "mov." size ":S " imm "," regn)
8628 ((machine 16))
8629 (.str "mov." size "$S #${" imm "}," regn)
8630 (+ op1 op2 imm)
8631 (mov-sem mode imm (reg (.sym h- regn)))
8632 ())
8633 )
8634 ; mov.size:G #imm,dst (m16 #1 m32 #1)
8635 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
8636 ; mov.L:G #imm32,dst (m32 #2)
8637 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
8638 ; mov.BW:S #imm,dst2 (m32 #4)
8639 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
8640 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
8641 ; mov.b:S #imm8,dst3 (m16 #3)
8642 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem)
8643 ; mov.b:S #imm8,aN (m16 #4)
8644 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2))
8645 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA))
8646 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2))
8647 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA))
8648 ; mov.WL:S #imm,A0/A1 (m32 #5)
8649 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2)
8650 (dni (.sym mov32- sz - regn)
8651 (.str "mov." sz ":s" imm "," regn)
8652 ((machine 32))
8653 (.str "mov." sz "$S #${" imm "}," regn)
8654 (+ (f-0-4 op1) (f-4-4 op2) imm)
8655 (mov-sem mode imm (reg (.sym h- regn)))
8656 ())
8657 )
8658 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
8659 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
8660 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC)
8661 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD)
8663 ; mov.size:Q #imm4,dst (m16 #2 m32 #3)
8664 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8665 (binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8666 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
8667 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
8669 ; mov.BW:Z #0,dst (m16 #5 m32 #6)
8670 (dni mov16.b-Z-imm8-dst3
8671 "mov.b:Z #0,Dst16-3-S-8"
8672 ((machine 16))
8673 "mov.b$Z #0,${Dst16-3-S-8}"
8674 (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8)
8675 (mov-sem QI (const 0) Dst16-3-S-8)
8676 ())
8677 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem)
8678 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem)
8679 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem)
8680 ; mov.BW:G src,dst (m16 #6 m32 #7)
8681 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem)
8682 ; mov.B:S src2,a0/a1 (m16 #7)
8683 (dni (.sym mov 16 .b.S-An)
8684 (.str mov ".b:S src2,a[01]")
8685 ((machine 16))
8686 (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}")
8687 (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S)
8688 (mov-sem QI src16-2-S Dst16AnQI-S)
8689 ())
8690 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c)
8691 (dni (.sym mov16.b.S- op1 - op2)
8692 (.str mov ".b:S " op1 "," op2)
8693 ((machine 16))
8694 (.str mov ".b$S " op1 "," op2)
8695 (+ (f-0-4 #x3) op2c)
8696 (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2)))
8697 ())
8698 )
8699 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4))
8700 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0))
8702 ; mov.L:G src,dst (m32 #8)
8703 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem)
8704 ; mov.B:S r0l/r0h,dst2 (m16 #8)
8705 (dni (.sym mov 16 .b.S-Rn-An)
8706 (.str mov ".b:S r0[lh],src2")
8707 ((machine 16))
8708 (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}")
8709 (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S)
8710 (mov-sem QI src16-2-S Dst16RnQI-S)
8711 ())
8713 ; mov.B.S src2,r0l/r0h (m16 #9)
8714 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem)
8716 ; mov.BW:S src2,r0l/r0 (m32 #9)
8717 ; mov.BW:S src2,r1l/r1 (m32 #10)
8718 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2)
8719 (begin
8720 (dni (.sym mov32. sz - src - dst)
8721 (.str "mov." sz "src," dst)
8722 ((machine 32))
8723 (.str "mov." sz "$S ${" (.sym src - mode) "}," dst)
8724 (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode))
8725 (mov-sem mode (.sym src - mode) (reg (.sym h- dst)))
8726 ())
8727 )
8728 )
8729 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4)
8730 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4)
8731 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4)
8732 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4)
8733 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7)
8734 (mov32-src-r w 1 HI dst32-2-S-basic r1 1 7)
8735 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7)
8736 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7)
8737 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7)
8738 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7)
8740 ; mov.BW:S r0l/r0,dst2 (m32 #11)
8741 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2)
8742 (begin
8743 (dni (.sym mov32. sz - src - dst)
8744 (.str "mov." sz "src," dst)
8745 ((machine 32))
8746 (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}")
8747 (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode))
8748 (mov-sem mode (reg (.sym h- src)) (.sym dst - mode))
8749 ())
8750 )
8751 )
8752 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0)
8753 (mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0)
8754 (mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0)
8755 (mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0)
8757 ; mov.L:S src,A0/A1 (m32 #12)
8758 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2)
8759 (begin
8760 (dni (.sym mov32. sz - src - dst)
8761 (.str "mov." sz "src," dst)
8762 ((machine 32))
8763 (.str "mov.l" "$S ${" (.sym src - SI) "}," dst)
8764 (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode))
8765 (mov-sem SI (.sym src - SI) (reg (.sym h- dst)))
8766 ())
8767 )
8768 )
8769 (mov32-src-a dst32-2-S-16 a0 0 1 4)
8770 (mov32-src-a dst32-2-S-16 a1 1 1 4)
8771 (mov32-src-a dst32-2-S-8 a0 0 1 4)
8772 (mov32-src-a dst32-2-S-8 a1 1 1 4)
8774 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13)
8775 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14)
8776 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem)
8777 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem)
8779 ;-------------------------------------------------------------
8780 ; mova - move effective address
8781 ;-------------------------------------------------------------
8783 (define-pmacro (mov16a-defn dst dstop dstcode)
8784 (dni (.sym mova16. src - dst)
8785 (.str "mova src," dst)
8786 ((machine 16))
8787 (.str "mova ${dst16-16-Mova-HI}," dst)
8788 (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode))
8789 (sequence () (set HI (reg dstop) dst16-16-Mova-HI))
8790 ())
8791 )
8792 (mov16a-defn r0 h-r0 0)
8793 (mov16a-defn r1 h-r1 1)
8794 (mov16a-defn r2 h-r2 2)
8795 (mov16a-defn r3 h-r3 3)
8796 (mov16a-defn a0 h-a0 4)
8797 (mov16a-defn a1 h-a1 5)
8799 (define-pmacro (mov32a-defn dst dstop dstcode)
8800 (dni (.sym mova32. src - dst)
8801 (.str "mova src," dst)
8802 ((machine 32))
8803 (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst)
8804 (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode))
8805 (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI))
8806 ())
8807 )
8808 (mov32a-defn r2r0 h-r2r0 0)
8809 (mov32a-defn r3r1 h-r3r1 1)
8810 (mov32a-defn a0 h-a0 2)
8811 (mov32a-defn a1 h-a1 3)
8813 ;-------------------------------------------------------------
8814 ; movDir - move nibble
8815 ;-------------------------------------------------------------
8817 (define-pmacro (movdir-sem nib src dst)
8818 (sequence ((SI tmp))
8819 (case DFLT nib
8820 ((0) (set dst (or (and dst #xf0) (and src #xf))))
8821 ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4))))
8822 ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4))))
8823 ((3) (set dst (or (and dst #x0f) (and src #xf0))))
8824 )
8825 )
8826 )
8827 ; movDir src,dst
8828 (define-pmacro (mov16dir-1-defn nib dircode dir)
8829 (dni (.sym mov nib 16 ".r0l-dst")
8830 (.str "mov" nib " r0l,dst")
8831 ((machine 16))
8832 (.str "mov" nib " r0l,${dst16-16-QI}")
8833 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8834 (movdir-sem dircode (reg h-r0l) dst16-16-QI)
8835 ())
8836 )
8837 (mov16dir-1-defn ll 0 8)
8838 (mov16dir-1-defn lh 1 #xA)
8839 (mov16dir-1-defn hl 2 9)
8840 (mov16dir-1-defn hh 3 #xB)
8841 (define-pmacro (mov16dir-2-defn nib dircode dir)
8842 (dni (.sym mov nib 16 ".src-r0l")
8843 (.str "mov" nib " src,r0l")
8844 ((machine 16))
8845 (.str "mov" nib " ${dst16-16-QI},r0l")
8846 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8847 (movdir-sem dircode dst16-16-QI (reg h-r0l))
8848 ())
8849 )
8850 (mov16dir-2-defn ll 0 0)
8851 (mov16dir-2-defn lh 1 2)
8852 (mov16dir-2-defn hl 2 1)
8853 (mov16dir-2-defn hh 3 3)
8855 (define-pmacro (mov32dir-1-defn nib o1o0)
8856 (dni (.sym mov nib 32 ".r0l-dst")
8857 (.str "mov" nib " r0l,dst")
8858 ((machine 32))
8859 (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}")
8860 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8861 (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI)
8862 ())
8863 )
8864 (mov32dir-1-defn ll 0)
8865 (mov32dir-1-defn lh 1)
8866 (mov32dir-1-defn hl 2)
8867 (mov32dir-1-defn hh 3)
8868 (define-pmacro (mov32dir-2-defn nib o1o0)
8869 (dni (.sym mov nib 32 ".src-r0l")
8870 (.str "mov" nib " src,r0l")
8871 ((machine 32))
8872 (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l")
8873 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8874 (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l))
8875 ())
8876 )
8877 (mov32dir-2-defn ll 0)
8878 (mov32dir-2-defn lh 1)
8879 (mov32dir-2-defn hl 2)
8880 (mov32dir-2-defn hh 3)
8882 ;-------------------------------------------------------------
8883 ; movx - move extend sign (m32)
8884 ;-------------------------------------------------------------
8886 (define-pmacro (movx-sem mode src dst)
8887 (sequence ((SI source) (SI result))
8888 (set SI result src)
8889 (set-z-and-s result)
8890 (set dst result))
8891 )
8893 ; movx #imm,dst
8894 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem)
8896 ;-------------------------------------------------------------
8897 ; mul - multiply
8898 ;-------------------------------------------------------------
8900 (define-pmacro (mul-sem mode src1 dst)
8901 (sequence ((mode result))
8902 (set obit (add-oflag mode src1 dst 0))
8903 (set result (mul mode src1 dst))
8904 (set dst result))
8905 )
8907 ; mul.BW #imm,dst
8908 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem)
8909 ; mul.BW src,dst
8910 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
8912 ;-------------------------------------------------------------
8913 ; mulex - multiple extend sign (m32)
8914 ;-------------------------------------------------------------
8916 ; mulex src,dst
8917 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32))
8918 ; ("mulex ${dst32-24-absolute-indirect-HI}")
8919 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
8920 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI)))
8921 ; ())
8922 (dni mulex "mulex src" ((machine 32))
8923 ("mulex ${dst32-16-Unprefixed-Mulex-HI}")
8924 (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
8925 (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI)))
8926 ())
8927 ; (dni mulex-indirect "mulex [src]" ((machine 32))
8928 ; ("mulex ${dst32-24-indirect-HI}")
8929 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
8930 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI)))
8931 ; ())
8933 ;-------------------------------------------------------------
8934 ; mulu - multiply unsigned
8935 ;-------------------------------------------------------------
8937 (define-pmacro (mulu-sem mode src1 dst)
8938 (sequence ((mode result))
8939 (set obit (add-oflag mode src1 dst 0))
8940 (set result (mul mode src1 dst))
8941 (set dst result))
8942 )
8944 ; mulu.BW #imm,dst
8945 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem)
8946 ; mulu.BW src,dst
8947 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem)
8949 ;-------------------------------------------------------------
8950 ; neg - twos complement
8951 ;-------------------------------------------------------------
8953 (define-pmacro (neg-sem mode dst)
8954 (sequence ((mode result))
8955 (set result (neg mode dst))
8956 (set-z-and-s result)
8957 (set dst result))
8958 )
8960 ; neg.BW:G
8961 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem)
8963 ;-------------------------------------------------------------
8964 ; not - twos complement
8965 ;-------------------------------------------------------------
8967 (define-pmacro (not-sem mode dst)
8968 (sequence ((mode result))
8969 (set result (not mode dst))
8970 (set-z-and-s result)
8971 (set dst result))
8972 )
8974 ; not.BW:G
8975 (unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem)
8977 (dni not16.b.s
8978 "not.b:s Dst16-3-S-8"
8979 ((machine 16))
8980 "not.b:s ${Dst16-3-S-8}"
8981 (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8)
8982 (not-sem QI Dst16-3-S-8)
8983 ())
8985 ;-------------------------------------------------------------
8986 ; nop
8987 ;-------------------------------------------------------------
8989 (dni nop16
8990 "nop"
8991 ((machine 16))
8992 "nop"
8993 (+ (f-0-4 #x0) (f-4-4 #x4))
8994 (nop)
8995 ())
8997 (dni nop32
8998 "nop"
8999 ((machine 32))
9000 "nop"
9001 (+ (f-0-4 #xD) (f-4-4 #xE))
9002 (nop)
9003 ())
9005 ;-------------------------------------------------------------
9006 ; or - logical or
9007 ;-------------------------------------------------------------
9009 (define-pmacro (or-sem mode src1 dst)
9010 (sequence ((mode result))
9011 (set result (or mode src1 dst))
9012 (set-z-and-s result)
9013 (set dst result))
9014 )
9016 ; or.BW #imm,dst (m16 #1 m32 #1)
9017 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem)
9018 ; or.b:S #imm8,dst3 (m16 #2 m32 #2)
9019 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem)
9020 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem)
9021 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
9022 ; or.BW src,dst (m16 #3 m32 #3)
9023 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
9025 ;-------------------------------------------------------------
9026 ; pop - restore register/memory
9027 ;-------------------------------------------------------------
9029 ; TODO future: split this into .b and .w semantics
9030 (define-pmacro (pop-sem-mach mach mode dst)
9031 (sequence ((mode b_or_w) (SI length))
9032 (set b_or_w -1)
9033 (set b_or_w (srl b_or_w #x8))
9034 (if (eq b_or_w #x0)
9035 (set length 1) ; .b
9036 (set length 2)) ; .w
9038 (case DFLT length
9039 ((1) (set dst (mem-mach mach QI (reg h-sp))))
9040 ((2) (set dst (mem-mach mach HI (reg h-sp)))))
9041 (set (reg h-sp) (add (reg h-sp) length))
9042 )
9043 )
9045 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest))
9046 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
9048 ; pop.BW:G (m16 #1)
9049 (unary-insn-mach 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16)
9050 ; pop.BW:G (m32 #1)
9051 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
9053 ; pop.b:S r0l/r0h
9054 (dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16))
9055 "pop.b$S ${Rn16-push-S-anyof}"
9056 (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2))
9057 (pop-sem16 QI Rn16-push-S-anyof)
9058 ())
9059 ; pop.w:S a0/a1
9060 (dni pop16.b-s-an "pop.w:S a[01]" ((machine 16))
9061 "pop.w$S ${An16-push-S-anyof}"
9062 (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2))
9063 (pop-sem16 HI An16-push-S-anyof)
9064 ())
9066 ;-------------------------------------------------------------
9067 ; popc - pop control register
9068 ; pushc - push control register
9069 ;-------------------------------------------------------------
9071 (define-pmacro (popc32-cr1-sem mode dst)
9072 (sequence ()
9073 (case DFLT dst
9074 ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp))))
9075 ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp))))
9076 ((#x2) (sequence ((HI tflag))
9077 (set tflag (mem32 mode (reg h-sp)))
9078 (if (and tflag #x1) (set cbit 1))
9079 (if (and tflag #x2) (set dbit 1))
9080 (if (and tflag #x4) (set zbit 1))
9081 (if (and tflag #x8) (set sbit 1))
9082 (if (and tflag #x10) (set bbit 1))
9083 (if (and tflag #x20) (set obit 1))
9084 (if (and tflag #x40) (set ibit 1))
9085 (if (and tflag #x80) (set ubit 1))))
9086 ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp))))
9087 ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp))))
9088 ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp))))
9089 ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp))))
9090 ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp))))
9091 )
9092 (set (reg h-sp) (add (reg h-sp) 2))
9093 )
9094 )
9095 (define-pmacro (popc32-cr2-sem mode dst)
9096 (sequence ()
9097 (case DFLT dst
9098 ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp))))
9099 ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp))))
9100 ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp))))
9101 ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp))))
9102 ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp))))
9103 )
9104 (set (reg h-sp) (add (reg h-sp) 4))
9105 )
9106 )
9107 (define-pmacro (popc16-sem mode dst)
9108 (sequence ()
9109 (case DFLT dst
9110 ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000)
9111 (mem16 mode (reg h-sp)))))
9112 ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000)
9113 (mem16 mode (reg h-sp)))))
9114 ((#x3) (sequence ((HI tflag))
9115 (set tflag (mem16 mode (reg h-sp)))
9116 (if (and tflag #x1) (set cbit 1))
9117 (if (and tflag #x2) (set dbit 1))
9118 (if (and tflag #x4) (set zbit 1))
9119 (if (and tflag #x8) (set sbit 1))
9120 (if (and tflag #x10) (set bbit 1))
9121 (if (and tflag #x20) (set obit 1))
9122 (if (and tflag #x40) (set ibit 1))
9123 (if (and tflag #x80) (set ubit 1))))
9124 ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp))))
9125 ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp))))
9126 ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp))))
9127 ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp))))
9128 )
9129 (set (reg h-sp) (add (reg h-sp) 2))
9130 )
9131 )
9132 ; popc dest (m16c #1)
9133 (dni popc16.imm16 "popc dst" ((machine 16))
9134 ("popc ${cr16}")
9135 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16)
9136 (popc16-sem HI cr16)
9137 ())
9138 ; popc dest (m32c #1)
9139 (dni popc32.imm16-cr1 "popc dst" ((machine 32))
9140 ("popc ${cr1-Unprefixed-32}")
9141 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9142 (popc32-cr1-sem HI cr1-Unprefixed-32)
9143 ())
9144 ; popc dest (m32c #2)
9145 (dni popc32.imm16-cr2 "popc dst" ((machine 32))
9146 ("popc ${cr2-32}")
9147 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32)
9148 (popc32-cr2-sem SI cr2-32)
9149 ())
9151 (define-pmacro (pushc32-cr1-sem mode dst)
9152 (sequence ()
9153 (set (reg h-sp) (sub (reg h-sp) 2))
9154 (case DFLT dst
9155 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0)))
9156 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1)))
9157 ((#x2) (sequence ((HI tflag))
9158 (set tflag 0)
9159 (if (eq cbit 1) (set tflag (or tflag #x1)))
9160 (if (eq dbit 1) (set tflag (or tflag #x2)))
9161 (if (eq zbit 1) (set tflag (or tflag #x4)))
9162 (if (eq sbit 1) (set tflag (or tflag #x8)))
9163 (if (eq bbit 1) (set tflag (or tflag #x10)))
9164 (if (eq obit 1) (set tflag (or tflag #x20)))
9165 (if (eq ibit 1) (set tflag (or tflag #x40)))
9166 (if (eq ubit 1) (set tflag (or tflag #x80)))
9167 (set (mem32 mode (reg h-sp)) tflag)))
9168 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf)))
9169 ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0)))
9170 ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1)))
9171 ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0)))
9172 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1)))
9173 )
9174 )
9175 )
9176 (define-pmacro (pushc32-cr2-sem mode dst)
9177 (sequence ()
9178 (set (reg h-sp) (sub (reg h-sp) 4))
9179 (case DFLT dst
9180 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb)))
9181 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp)))
9182 ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb)))
9183 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb)))
9184 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp)))
9185 )
9186 )
9187 )
9188 (define-pmacro (pushc16-sem mode dst)
9189 (sequence ()
9190 (set (reg h-sp) (sub (reg h-sp) 2))
9191 (case DFLT dst
9192 ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff)))
9193 ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000)))
9194 ((#x3) (sequence ((HI tflag))
9195 (if (eq cbit 1) (set tflag (or tflag #x1)))
9196 (if (eq dbit 1) (set tflag (or tflag #x2)))
9197 (if (eq zbit 1) (set tflag (or tflag #x4)))
9198 (if (eq sbit 1) (set tflag (or tflag #x8)))
9199 (if (eq bbit 1) (set tflag (or tflag #x10)))
9200 (if (eq obit 1) (set tflag (or tflag #x20)))
9201 (if (eq ibit 1) (set tflag (or tflag #x40)))
9202 (if (eq ubit 1) (set tflag (or tflag #x80)))
9203 (set (mem16 mode (reg h-sp)) tflag)))
9205 ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp)))
9206 ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp)))
9207 ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb)))
9208 ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb)))
9209 )
9210 )
9211 )
9212 ; pushc src (m16c)
9213 (dni pushc16.imm16 "pushc dst" ((machine 16))
9214 ("pushc ${cr16}")
9215 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16)
9216 (pushc16-sem HI cr16)
9217 ())
9218 ; pushc src (m32c #1)
9219 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32))
9220 ("pushc ${cr1-Unprefixed-32}")
9221 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9222 (pushc32-cr1-sem HI cr1-Unprefixed-32)
9223 ())
9224 ; pushc src (m32c #2)
9225 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32))
9226 ("pushc ${cr2-32}")
9227 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32)
9228 (pushc32-cr2-sem SI cr2-32)
9229 ())
9231 ;-------------------------------------------------------------
9232 ; popm - pop multiple
9233 ; pushm - push multiple
9234 ;-------------------------------------------------------------
9236 (define-pmacro (popm-sem machine dst)
9237 (sequence ((SI addrlen))
9238 (if (eq machine 16)
9239 (set addrlen 2)
9240 (set addrlen 4))
9241 (if (and dst 1)
9242 (sequence () (set R0 (mem-mach machine HI (reg h-sp)))
9243 (set (reg h-sp) (add (reg h-sp) 2))))
9244 (if (and dst 2)
9245 (sequence () (set R1 (mem-mach machine HI (reg h-sp)))
9246 (set (reg h-sp) (add (reg h-sp) 2))))
9247 (if (and dst 4)
9248 (sequence () (set R2 (mem-mach machine HI (reg h-sp)))
9249 (set (reg h-sp) (add (reg h-sp) 2))))
9250 (if (and dst 8)
9251 (sequence () (set R3 (mem-mach machine HI (reg h-sp)))
9252 (set (reg h-sp) (add (reg h-sp) 2))))
9253 (if (and dst 16)
9254 (sequence () (set A0 (mem-mach machine HI (reg h-sp)))
9255 (set (reg h-sp) (add (reg h-sp) addrlen))))
9256 (if (and dst 32)
9257 (sequence () (set A1 (mem-mach machine HI (reg h-sp)))
9258 (set (reg h-sp) (add (reg h-sp) addrlen))))
9259 (if (and dst 64)
9260 (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp)))
9261 (set (reg h-sp) (add (reg h-sp) addrlen))))
9262 (if (eq dst 128)
9263 (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp)))
9264 (set (reg h-sp) (add (reg h-sp) addrlen))))
9265 )
9266 )
9268 (define-pmacro (pushm-sem machine dst)
9269 (sequence ((SI count) (SI addrlen))
9270 (if (eq machine 16)
9271 (set addrlen 2)
9272 (set addrlen 4))
9273 (if (eq dst 1)
9274 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9275 (set (mem-mach machine HI (reg h-sp)) (reg h-fb))))
9276 (if (and dst 2)
9277 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9278 (set (mem-mach machine HI (reg h-sp)) (reg h-sb))))
9279 (if (and dst 4)
9280 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9281 (set (mem-mach machine HI (reg h-sp)) A1)))
9282 (if (and dst 8)
9283 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9284 (set (mem-mach machine HI (reg h-sp)) A0)))
9285 (if (and dst 16)
9286 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9287 (set (mem-mach machine HI (reg h-sp)) R3)))
9288 (if (and dst 32)
9289 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9290 (set (mem-mach machine HI (reg h-sp)) R2)))
9291 (if (and dst 64)
9292 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9293 (set (mem-mach machine HI (reg h-sp)) R1)))
9294 (if (and dst 128)
9295 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9296 (set (mem-mach machine HI (reg h-sp)) R0)))
9297 )
9298 )
9300 (dni popm16 "popm regs" ((machine 16))
9301 ("popm ${Regsetpop}")
9302 (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop)
9303 (popm-sem 16 Regsetpop)
9304 ())
9305 (dni pushm16 "pushm regs" ((machine 16))
9306 ("pushm ${Regsetpush}")
9307 (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush)
9308 (pushm-sem 16 Regsetpush)
9309 ())
9310 (dni popm "popm regs" ((machine 32))
9311 ("popm ${Regsetpop}")
9312 (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop)
9313 (popm-sem 32 Regsetpop)
9314 ())
9315 (dni pushm "pushm regs" ((machine 32))
9316 ("pushm ${Regsetpush}")
9317 (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush)
9318 (pushm-sem 32 Regsetpush)
9319 ())
9321 ;-------------------------------------------------------------
9322 ; push - Save register/memory/immediate data
9323 ;-------------------------------------------------------------
9325 ; TODO future: split this into .b and .w semantics
9326 (define-pmacro (push-sem-mach mach mode dst)
9327 (sequence ((mode b_or_w) (SI length))
9328 (set b_or_w -1)
9329 (set b_or_w (srl b_or_w #x8))
9330 (if (eq b_or_w #x0)
9331 (set length 1) ; .b
9332 (if (eq b_or_w #xff)
9333 (set length 2) ; .w
9334 (set length 4))) ; .l
9335 (set (reg h-sp) (sub (reg h-sp) length))
9336 (case DFLT length
9337 ((1) (set (mem-mach mach QI (reg h-sp)) dst))
9338 ((2) (set (mem-mach mach HI (reg h-sp)) dst))
9339 ((4) (set (mem-mach mach SI (reg h-sp)) dst)))
9340 )
9341 )
9343 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst))
9344 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst))
9346 ; push.BW:G imm (m16 #1 m32 #1)
9347 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16))
9348 ("push.b$G #${Imm-16-QI}")
9349 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI)
9350 (push-sem16 QI Imm-16-QI)
9351 ())
9353 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16))
9354 ("push.w$G #${Imm-16-HI}")
9355 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI)
9356 (push-sem16 HI Imm-16-HI)
9357 ())
9359 (dni push32.b.imm "push.b #Imm-8-QI" ((machine 32))
9360 ("push.b #Imm-8-QI")
9361 (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
9362 (push-sem32 QI Imm-8-QI)
9363 ())
9365 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32))
9366 ("push.w #${Imm-8-HI}")
9367 (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI)
9368 (push-sem32 HI Imm-8-HI)
9369 ())
9371 ; push.BW:G src (m16 #2)
9372 (unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G)
9373 ; push.BW:G src (m32 #2)
9374 (unary-insn-mach 32 push #xC #x0 #xE push-sem32)
9377 ; push.b:S r0l/r0h (m16 #3)
9378 (dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16))
9379 "push.b$S ${Rn16-push-S-anyof}"
9380 (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2))
9381 (push-sem16 QI Rn16-push-S-anyof)
9382 ())
9383 ; push.w:S a0/a1 (m16 #4)
9384 (dni push16.b-s-an "push.w:S a[01]" ((machine 16))
9385 "push.w$S ${An16-push-S-anyof}"
9386 (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2))
9387 (push-sem16 HI An16-push-S-anyof)
9388 ())
9390 ; push.l imm32 (m32 #3)
9391 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32))
9392 ("push.l #${Imm-16-SI}")
9393 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI)
9394 (push-sem32 SI Imm-16-SI)
9395 ())
9396 ; push.l src (m32 #4)
9397 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32)
9399 ;-------------------------------------------------------------
9400 ; pusha - push effective address
9401 ;------------------------------------------------------------
9403 (define-pmacro (push16a-sem mode dst)
9404 (sequence ()
9405 (set (reg h-sp) (sub (reg h-sp) 2))
9406 (set (mem16 HI (reg h-sp)) dst))
9407 )
9408 (define-pmacro (push32a-sem mode dst)
9409 (sequence ()
9410 (set (reg h-sp) (sub (reg h-sp) 4))
9411 (set (mem32 SI (reg h-sp)) dst))
9412 )
9413 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem)
9414 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem)
9416 ;-------------------------------------------------------------
9417 ; reit - return from interrupt
9418 ;-------------------------------------------------------------
9420 ; ??? semantics
9421 (dni reit16 "REIT" ((machine 16))
9422 ("reit")
9423 (+ (f-0-4 #xF) (f-4-4 #xB))
9424 (nop)
9425 ())
9426 (dni reit32 "REIT" ((machine 32))
9427 ("reit")
9428 (+ (f-0-4 9) (f-4-4 #xE))
9429 (nop)
9430 ())
9432 ;-------------------------------------------------------------
9433 ; rmpa - repeat multiple and addition
9434 ;-------------------------------------------------------------
9436 ; TODO semantics
9437 (dni rmpa16.b "rmpa.size" ((machine 16))
9438 ("rmpa.b")
9439 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1))
9440 (nop)
9441 ())
9442 (dni rmpa16.w "rmpa.size" ((machine 16))
9443 ("rmpa.w")
9444 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1))
9445 (nop)
9446 ())
9447 (dni rmpa32.b "rmpa.size" ((machine 32))
9448 ("rmpa.b")
9449 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3))
9450 (nop)
9451 ())
9453 (dni rmpa32.w "rmpa.size" ((machine 32))
9454 ("rmpa.w")
9455 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3))
9456 (nop)
9457 ())
9459 ;-------------------------------------------------------------
9460 ; rolc - rotate left with carry
9461 ;-------------------------------------------------------------
9463 ; TODO check semantics
9464 ; TODO future: split this into .b and .w semantics
9465 (define-pmacro (rolc-sem mode dst)
9466 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask))
9467 (set b_or_w -1)
9468 (set b_or_w (srl b_or_w #x8))
9469 (if (eq b_or_w #x0)
9470 (set mask #x8000) ; .b
9471 (set mask #x80000000)) ; .w
9472 (set ocbit cbit)
9473 (set cbit (and dst mask))
9474 (set result (sll mode dst 1))
9475 (set result (or result ocbit))
9476 (set-z-and-s result)
9477 (set dst result))
9478 )
9479 ; rolc.BW src,dst
9480 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem)
9482 ;-------------------------------------------------------------
9483 ; rorc - rotate right with carry
9484 ;-------------------------------------------------------------
9486 ; TODO check semantics
9487 ; TODO future: split this into .b and .w semantics
9488 (define-pmacro (rorc-sem mode dst)
9489 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt))
9490 (set b_or_w -1)
9491 (set b_or_w (srl b_or_w #x8))
9492 (if (eq b_or_w #x0)
9493 (sequence () (set mask #x7fff) (set shamt 15)) ; .b
9494 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w
9495 (set ocbit cbit)
9496 (set cbit (and dst #x1))
9497 (set result (srl mode dst (const 1)))
9498 (set result (or (and result mask) (sll ocbit shamt)))
9499 (set-z-and-s result)
9500 (set dst result))
9501 )
9502 ; rorc.BW src,dst
9503 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem)
9505 ;-------------------------------------------------------------
9506 ; rot - rotate
9507 ;-------------------------------------------------------------
9509 ; TODO future: split this into .b and .w semantics
9510 (define-pmacro (rot-1-sem mode src1 dst)
9511 (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift))
9512 (case DFLT src1
9513 ((#x0) (set shift 1))
9514 ((#x1) (set shift 2))
9515 ((#x2) (set shift 3))
9516 ((#x3) (set shift 4))
9517 ((#x4) (set shift 5))
9518 ((#x5) (set shift 6))
9519 ((#x6) (set shift 7))
9520 ((#x7) (set shift 8))
9521 ((-8) (set shift -1))
9522 ((-7) (set shift -2))
9523 ((-6) (set shift -3))
9524 ((-5) (set shift -4))
9525 ((-4) (set shift -5))
9526 ((-3) (set shift -6))
9527 ((-2) (set shift -7))
9528 ((-1) (set shift -8))
9529 (else (set shift 0))
9530 )
9531 (set b_or_w -1)
9532 (set b_or_w (srl b_or_w #x8))
9533 (if (eq b_or_w #x0)
9534 (set mask #x7fff) ; .b
9535 (set mask #x7fffffff)) ; .w
9536 (set tmp dst)
9537 (if (gt mode shift 0)
9538 (sequence ()
9539 (set tmp (rol mode tmp shift))
9540 (set cbit (and tmp #x1)))
9541 (sequence ()
9542 (set tmp (ror mode tmp (mul shift -1)))
9543 (set cbit (and tmp mask))))
9544 (set-z-and-s tmp)
9545 (set dst tmp))
9546 )
9547 (define-pmacro (rot-2-sem mode dst)
9548 (sequence ((mode tmp) (mode b_or_w) (USI mask))
9549 (set b_or_w -1)
9550 (set b_or_w (srl b_or_w #x8))
9551 (if (eq b_or_w #x0)
9552 (set mask #x7fff) ; .b
9553 (set mask #x7fffffff)) ; .w
9554 (set tmp dst)
9555 (if (gt mode (reg h-r1h) 0)
9556 (sequence ()
9557 (set tmp (rol mode tmp (reg h-r1h)))
9558 (set cbit (and tmp #x1)))
9559 (sequence ()
9560 (set tmp (ror mode tmp (reg h-r1h)))
9561 (set cbit (and tmp mask))))
9562 (set-z-and-s tmp)
9563 (set dst tmp))
9564 )
9566 ; rot.BW #imm4,dst
9567 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9568 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9569 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem)
9570 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem)
9571 ; rot.BW src,dst
9573 (dni rot16.b-dst "rot r1h,dest" ((machine 16))
9574 ("rot.b r1h,${dst16-16-QI}")
9575 (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI)
9576 (rot-2-sem QI dst16-16-QI)
9577 ())
9578 (dni rot16.w-dst "rot r1h,dest" ((machine 16))
9579 ("rot.w r1h,${dst16-16-HI}")
9580 (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI)
9581 (rot-2-sem HI dst16-16-HI)
9582 ())
9584 (dni rot32.b-dst "rot r1h,dest" ((machine 32))
9585 ("rot.b r1h,${dst32-16-Unprefixed-QI}")
9586 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
9587 (rot-2-sem QI dst32-16-Unprefixed-QI)
9588 ())
9589 (dni rot32.w-dst "rot r1h,dest" ((machine 32))
9590 ("rot.w r1h,${dst32-16-Unprefixed-HI}")
9591 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
9592 (rot-2-sem HI dst32-16-Unprefixed-HI)
9593 ())
9595 ;-------------------------------------------------------------
9596 ; rts - return from subroutine
9597 ;-------------------------------------------------------------
9599 (define-pmacro (rts16-sem)
9600 (sequence ((SI tpc))
9601 (set tpc (mem16 HI (reg h-sp)))
9602 (set (reg h-sp) (add (reg h-sp) 2))
9603 (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16)))
9604 (set (reg h-sp) (add (reg h-sp) 1))
9605 (set pc tpc)
9606 )
9607 )
9608 (define-pmacro (rts32-sem)
9609 (sequence ((SI tpc))
9610 (set tpc (mem32 HI (reg h-sp)))
9611 (set (reg h-sp) (add (reg h-sp) 2))
9612 (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16)))
9613 (set (reg h-sp) (add (reg h-sp) 2))
9614 (set pc tpc)
9615 )
9616 )
9618 (dni rts16 "rts" ((machine 16))
9619 ("rts")
9620 (+ (f-0-4 #xF) (f-4-4 3))
9621 (rts16-sem)
9622 ())
9624 (dni rts32 "rts" ((machine 32))
9625 ("rts")
9626 (+ (f-0-4 #xD) (f-4-4 #xF))
9627 (rts32-sem)
9628 ())
9630 ;-------------------------------------------------------------
9631 ; sbb - subtract with borrow
9632 ;-------------------------------------------------------------
9634 (define-pmacro (sbb-sem mode src dst)
9635 (sequence ((mode result))
9636 (set result (subc mode dst src cbit))
9637 (set obit (add-oflag mode dst src cbit))
9638 (set cbit (add-oflag mode dst src cbit))
9639 (set-z-and-s result)
9640 (set dst result))
9641 )
9643 ; sbb.size:G #imm,dst
9644 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9645 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9646 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem)
9647 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem)
9649 ; sbb.BW:G src,dst
9650 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9651 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9652 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem)
9653 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem)
9655 ;-------------------------------------------------------------
9656 ; sbjnz - subtract then jump on not zero
9657 ;-------------------------------------------------------------
9659 (define-pmacro (sub-jnz-sem mode src dst label)
9660 (sequence ((mode result))
9661 (set result (sub mode dst src))
9662 (set dst result)
9663 (if (ne result 0)
9664 (set pc label)))
9665 )
9667 ; sbjnz.size #imm4,dst,label
9668 (arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem)
9670 ;-------------------------------------------------------------
9671 ; sccnd - store condition on condition (m32)
9672 ;-------------------------------------------------------------
9674 (define-pmacro (sccnd-sem cnd dst)
9675 (sequence ()
9676 (set dst 0)
9677 (case DFLT cnd
9678 ((#x00) (if (not cbit) (set dst 1))) ;ltu nc
9679 ((#x01) (if (or cbit zbit) (set dst 1))) ;leu
9680 ((#x02) (if (not zbit) (set dst 1))) ;ne nz
9681 ((#x03) (if (not sbit) (set dst 1))) ;pz
9682 ((#x04) (if (not obit) (set dst 1))) ;no
9683 ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt
9684 ((#x06) (if (xor sbit obit) (set dst 1))) ;ge
9685 ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c
9686 ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu
9687 ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z
9688 ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n
9689 ((#x0c) (if (trunc BI obit) (set dst 1))) ;o
9690 ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le
9691 ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt
9692 )
9693 )
9694 )
9696 ; scCND dst
9697 (dni sccnd
9698 "sccnd dst"
9699 ((machine 32))
9700 "sc$sccond32 ${dst32-16-Unprefixed-HI}"
9701 (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32)
9702 (sccnd-sem sccond32 dst32-16-Unprefixed-HI)
9703 ())
9705 ;-------------------------------------------------------------
9706 ; scmpu - string compare unequal (m32)
9707 ;-------------------------------------------------------------
9709 ; TODO semantics
9710 (dni scmpu.b "scmpu.b" ((machine 32))
9711 ("scmpu.b")
9712 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3))
9713 (c-call VOID "scmpu_QI_semantics")
9714 ())
9716 (dni scmpu.w "scmpu.w" ((machine 32))
9717 ("scmpu.w")
9718 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3))
9719 (c-call VOID "scmpu_HI_semantics")
9720 ())
9722 ;-------------------------------------------------------------
9723 ; sha - shift arithmetic
9724 ;-------------------------------------------------------------
9726 ; TODO future: split this into .b and .w semantics
9727 (define-pmacro (sha-sem mode src1 dst)
9728 (sequence ((mode result)(mode shift)(mode shmode))
9729 (case DFLT src1
9730 ((#x0) (set shift 1))
9731 ((#x1) (set shift 2))
9732 ((#x2) (set shift 3))
9733 ((#x3) (set shift 4))
9734 ((#x4) (set shift 5))
9735 ((#x5) (set shift 6))
9736 ((#x6) (set shift 7))
9737 ((#x7) (set shift 8))
9738 ((-8) (set shift -1))
9739 ((-7) (set shift -2))
9740 ((-6) (set shift -3))
9741 ((-5) (set shift -4))
9742 ((-4) (set shift -5))
9743 ((-3) (set shift -6))
9744 ((-2) (set shift -7))
9745 ((-1) (set shift -8))
9746 (else (set shift 0))
9747 )
9748 (set shmode -1)
9749 (set shmode (srl shmode #x8))
9750 (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1))))
9751 (if (gt mode shift 0) (set result (sll mode dst shift)))
9752 (if (eq shmode #x0) ; QI
9753 (sequence
9754 ((mode cbitamt))
9755 (if (lt mode shift #x0)
9756 (set cbitamt (sub #x8 shift)) ; sra
9757 (set cbitamt (sub shift 1))) ; sll
9758 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9759 (set obit (ne (and dst #x80) (and result #x80)))
9760 ))
9761 (if (eq shmode #xff) ; HI
9762 (sequence
9763 ((mode cbitamt))
9764 (if (lt mode shift #x0)
9765 (set cbitamt (sub 16 shift)) ; sra
9766 (set cbitamt (sub shift 1))) ; sll
9767 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9768 (set obit (ne (and dst #x8000) (and result #x8000)))
9769 ))
9770 (set-z-and-s result)
9771 (set dst result))
9772 )
9773 (define-pmacro (shar1h-sem mode dst)
9774 (sequence ((mode result)(mode shmode))
9775 (set shmode -1)
9776 (set shmode (srl shmode #x8))
9777 (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h))))
9778 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9779 (if (eq shmode #x0) ; QI
9780 (sequence
9781 ((mode cbitamt))
9782 (if (lt mode (reg h-r1h) #x0)
9783 (set cbitamt (sub #x8 (reg h-r1h))) ; sra
9784 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9785 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9786 (set obit (ne (and dst #x80) (and result #x80)))
9787 ))
9788 (if (eq shmode #xff) ; HI
9789 (sequence
9790 ((mode cbitamt))
9791 (if (lt mode (reg h-r1h) #x0)
9792 (set cbitamt (sub 16 (reg h-r1h))) ; sra
9793 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9794 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9795 (set obit (ne (and dst #x8000) (and result #x8000)))
9796 ))
9797 (set-z-and-s result)
9798 (set dst result))
9799 )
9800 ; sha.BW #imm4,dst (m16 #1 m32 #1)
9801 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9802 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9803 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem)
9804 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem)
9805 ; sha.BW r1h,dst (m16 #2 m32 #3)
9806 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16))
9807 ("sha.b r1h,${dst16-16-QI}")
9808 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI)
9809 (shar1h-sem HI dst16-16-QI)
9810 ())
9811 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16))
9812 ("sha.w r1h,${dst16-16-HI}")
9813 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI)
9814 (shar1h-sem HI dst16-16-HI)
9815 ())
9816 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32))
9817 ("sha.b r1h,${dst32-16-Unprefixed-QI}")
9818 (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9819 (shar1h-sem QI dst32-16-Unprefixed-QI)
9820 ())
9821 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32))
9822 ("sha.w r1h,${dst32-16-Unprefixed-HI}")
9823 (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9824 (shar1h-sem HI dst32-16-Unprefixed-HI)
9825 ())
9826 ; sha.L #imm,dst (m16 #3)
9827 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16))
9828 "sha.l #${Imm-sh-12-s4},r2r0"
9829 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4)
9830 (sha-sem SI Imm-sh-12-s4 (reg h-r2r0))
9831 ())
9832 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16))
9833 "sha.l #${Imm-sh-12-s4},r3r1"
9834 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4)
9835 (sha-sem SI Imm-sh-12-s4 (reg h-r3r1))
9836 ())
9837 ; sha.L r1h,dst (m16 #4)
9838 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16))
9839 "sha.l r1h,r2r0"
9840 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1))
9841 (sha-sem SI (reg h-r1h) (reg h-r2r0))
9842 ())
9843 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16))
9844 "sha.l r1h,r3r1"
9845 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1))
9846 (sha-sem SI (reg h-r1h) (reg h-r3r1))
9847 ())
9848 ; sha.L #imm8,dst (m32 #2)
9849 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem)
9850 ; sha.L r1h,dst (m32 #4)
9851 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32))
9852 ("sha.l r1h,${dst32-16-Unprefixed-SI}")
9853 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1))
9854 (shar1h-sem QI dst32-16-Unprefixed-SI)
9855 ())
9857 ;-------------------------------------------------------------
9858 ; shanc - shift arithmetic non carry (m32)
9859 ;-------------------------------------------------------------
9861 ; TODO check semantics
9862 ; shanc.L #imm8,dst
9863 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem)
9865 ;-------------------------------------------------------------
9866 ; shl - shift logical
9867 ;-------------------------------------------------------------
9869 ; TODO future: split this into .b and .w semantics
9870 (define-pmacro (shl-sem mode src1 dst)
9871 (sequence ((mode result)(mode shift)(mode shmode))
9872 (case DFLT src1
9873 ((#x0) (set shift 1))
9874 ((#x1) (set shift 2))
9875 ((#x2) (set shift 3))
9876 ((#x3) (set shift 4))
9877 ((#x4) (set shift 5))
9878 ((#x5) (set shift 6))
9879 ((#x6) (set shift 7))
9880 ((#x7) (set shift 8))
9881 ((-8) (set shift -1))
9882 ((-7) (set shift -2))
9883 ((-6) (set shift -3))
9884 ((-5) (set shift -4))
9885 ((-4) (set shift -5))
9886 ((-3) (set shift -6))
9887 ((-2) (set shift -7))
9888 ((-1) (set shift -8))
9889 (else (set shift 0))
9890 )
9891 (set shmode -1)
9892 (set shmode (srl shmode #x8))
9893 (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1))))
9894 (if (gt mode shift 0) (set result (sll mode dst shift)))
9895 (if (eq shmode #x0) ; QI
9896 (sequence
9897 ((mode cbitamt))
9898 (if (lt mode shift #x0)
9899 (set cbitamt (sub #x8 shift)); srl
9900 (set cbitamt (sub shift 1))) ; sll
9901 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9902 (set obit (ne (and dst #x80) (and result #x80)))
9903 ))
9904 (if (eq shmode #xff) ; HI
9905 (sequence
9906 ((mode cbitamt))
9907 (if (lt mode shift #x0)
9908 (set cbitamt (sub 16 shift)) ; srl
9909 (set cbitamt (sub shift 1))) ; sll
9910 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9911 (set obit (ne (and dst #x8000) (and result #x8000)))
9912 ))
9913 (set-z-and-s result)
9914 (set dst result))
9915 )
9916 (define-pmacro (shlr1h-sem mode dst)
9917 (sequence ((mode result)(mode shmode))
9918 (set shmode -1)
9919 (set shmode (srl shmode #x8))
9920 (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h))))
9921 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9922 (if (eq shmode #x0) ; QI
9923 (sequence
9924 ((mode cbitamt))
9925 (if (lt mode (reg h-r1h) #x0)
9926 (set cbitamt (sub #x8 (reg h-r1h))) ; srl
9927 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9928 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9929 (set obit (ne (and dst #x80) (and result #x80)))
9930 ))
9931 (if (eq shmode #xff) ; HI
9932 (sequence
9933 ((mode cbitamt))
9934 (if (lt mode (reg h-r1h) #x0)
9935 (set cbitamt (sub 16 (reg h-r1h))) ; srl
9936 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9937 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9938 (set obit (ne (and dst #x8000) (and result #x8000)))
9939 ))
9940 (set-z-and-s result)
9941 (set dst result))
9942 )
9943 ; shl.BW #imm4,dst (m16 #1 m32 #1)
9944 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
9945 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
9946 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem)
9947 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem)
9948 ; shl.BW r1h,dst (m16 #2 m32 #3)
9949 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16))
9950 ("shl.b r1h,${dst16-16-QI}")
9951 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI)
9952 (shlr1h-sem HI dst16-16-QI)
9953 ())
9954 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16))
9955 ("shl.w r1h,${dst16-16-HI}")
9956 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI)
9957 (shlr1h-sem HI dst16-16-HI)
9958 ())
9959 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32))
9960 ("shl.b r1h,${dst32-16-Unprefixed-QI}")
9961 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9962 (shlr1h-sem QI dst32-16-Unprefixed-QI)
9963 ())
9964 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32))
9965 ("shl.w r1h,${dst32-16-Unprefixed-HI}")
9966 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9967 (shlr1h-sem HI dst32-16-Unprefixed-HI)
9968 ())
9969 ; shl.L #imm,dst (m16 #3)
9970 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16))
9971 "shl.l #${Imm-sh-12-s4},r2r0"
9972 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4)
9973 (shl-sem SI Imm-sh-12-s4 (reg h-r2r0))
9974 ())
9975 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16))
9976 "shl.l #${Imm-sh-12-s4},r3r1"
9977 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4)
9978 (shl-sem SI Imm-sh-12-s4 (reg h-r3r1))
9979 ())
9980 ; shl.L r1h,dst (m16 #4)
9981 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16))
9982 "shl.l r1h,r2r0"
9983 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1))
9984 (shl-sem SI (reg h-r1h) (reg h-r2r0))
9985 ())
9986 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16))
9987 "shl.l r1h,r3r1"
9988 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1))
9989 (shl-sem SI (reg h-r1h) (reg h-r3r1))
9990 ())
9991 ; shl.L #imm8,dst (m32 #2)
9992 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem)
9993 ; shl.L r1h,dst (m32 #4)
9994 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32))
9995 ("shl.l r1h,${dst32-16-Unprefixed-SI}")
9996 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1))
9997 (shlr1h-sem QI dst32-16-Unprefixed-SI)
9998 ())
10000 ;-------------------------------------------------------------
10001 ; shlnc - shift logical non carry
10002 ;-------------------------------------------------------------
10004 ; TODO check semantics
10005 ; shlnc.L #imm8,dst
10006 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem)
10008 ;-------------------------------------------------------------
10009 ; sin - string input (m32)
10010 ;-------------------------------------------------------------
10012 ; TODO semantics
10013 (dni sin32.b "sin" ((machine 32))
10014 ("sin.b")
10015 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3))
10016 (c-call VOID "sin_QI_semantics")
10017 ())
10019 (dni sin32.w "sin" ((machine 32))
10020 ("sin.w")
10021 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3))
10022 (c-call VOID "sin_HI_semantics")
10023 ())
10025 ;-------------------------------------------------------------
10026 ; smovb - string move backward
10027 ;-------------------------------------------------------------
10029 ; TODO semantics
10030 (dni smovb16.b "smovb.b" ((machine 16))
10031 ("smovb.b")
10032 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9))
10033 (c-call VOID "smovb_QI_semantics")
10034 ())
10036 (dni smovb16.w "smovb.w" ((machine 16))
10037 ("smovb.w")
10038 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9))
10039 (c-call VOID "smovb_HI_semantics")
10040 ())
10042 (dni smovb32.b "smovb.b" ((machine 32))
10043 ("smovb.b")
10044 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3))
10045 (c-call VOID "smovb_QI_semantics")
10046 ())
10048 (dni smovb32.w "smovb.w" ((machine 32))
10049 ("smovb.w")
10050 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3))
10051 (c-call VOID "smovb_HI_semantics")
10052 ())
10054 ;-------------------------------------------------------------
10055 ; smovf - string move forward (m32)
10056 ;-------------------------------------------------------------
10058 ; TODO semantics
10059 (dni smovf16.b "smovf.b" ((machine 16))
10060 ("smovf.b")
10061 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8))
10062 (c-call VOID "smovf_QI_semantics")
10063 ())
10065 (dni smovf16.w "smovf.w" ((machine 16))
10066 ("smovf.w")
10067 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8))
10068 (c-call VOID "smovf_HI_semantics")
10069 ())
10071 (dni smovf32.b "smovf.b" ((machine 32))
10072 ("smovf.b")
10073 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3))
10074 (c-call VOID "smovf_QI_semantics")
10075 ())
10077 (dni smovf32.w "smovf.w" ((machine 32))
10078 ("smovf.w")
10079 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3))
10080 (c-call VOID "smovf_HI_semantics")
10081 ())
10083 ;-------------------------------------------------------------
10084 ; smovu - string move unequal (m32)
10085 ;-------------------------------------------------------------
10087 ; TODO semantics
10088 (dni smovu.b "smovu.b" ((machine 32))
10089 ("smovu.b")
10090 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3))
10091 (c-call VOID "smovu_QI_semantics")
10092 ())
10094 (dni smovu.w "smovu.w" ((machine 32))
10095 ("smovu.w")
10096 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3))
10097 (c-call VOID "smovu_HI_semantics")
10098 ())
10100 ;-------------------------------------------------------------
10101 ; sout - string output (m32)
10102 ;-------------------------------------------------------------
10104 ; TODO semantics
10105 (dni sout.b "sout.b" ((machine 32))
10106 ("sout.b")
10107 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3))
10108 (c-call VOID "sout_QI_semantics")
10109 ())
10111 (dni sout.w "sout" ((machine 32))
10112 ("sout.w")
10113 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3))
10114 (c-call VOID "sout_HI_semantics")
10115 ())
10117 ;-------------------------------------------------------------
10118 ; sstr - string store
10119 ;-------------------------------------------------------------
10121 ; TODO semantics
10122 (dni sstr16.b "sstr.b" ((machine 16))
10123 ("sstr.b")
10124 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA))
10125 (c-call VOID "sstr_QI_semantics")
10126 ())
10128 (dni sstr16.w "sstr.w" ((machine 16))
10129 ("sstr.w")
10130 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA))
10131 (c-call VOID "sstr_HI_semantics")
10132 ())
10134 (dni sstr.b "sstr" ((machine 32))
10135 ("sstr.b")
10136 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3))
10137 (c-call VOID "sstr_QI_semantics")
10138 ())
10140 (dni sstr.w "sstr" ((machine 32))
10141 ("sstr.w")
10142 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3))
10143 (c-call VOID "sstr_HI_semantics")
10144 ())
10146 ;-------------------------------------------------------------
10147 ; stnz - store on not zero
10148 ;-------------------------------------------------------------
10150 (define-pmacro (stnz-sem mode src dst)
10151 (sequence ()
10152 (if (ne zbit (const 1))
10153 (set dst src)))
10154 )
10155 ; stnz #imm8,dst3 (m16)
10156 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem)
10157 ; stnz.BW #imm,dst (m32)
10158 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem)
10159 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem)
10161 ;-------------------------------------------------------------
10162 ; stz - store on zero
10163 ;-------------------------------------------------------------
10165 (define-pmacro (stz-sem mode src dst)
10166 (sequence ()
10167 (if (eq zbit (const 1))
10168 (set dst src)))
10169 )
10170 ; stz #imm8,dst3 (m16)
10171 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem)
10172 ; stz.BW #imm,dst (m32)
10173 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem)
10174 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
10176 ;-------------------------------------------------------------
10177 ; stzx - store on zero extention
10178 ;-------------------------------------------------------------
10180 (define-pmacro (stzx-sem mode src1 src2 dst)
10181 (sequence ()
10182 (if (eq zbit (const 1))
10183 (set dst src1)
10184 (set dst src2)))
10185 )
10186 ; stzx #imm8,dst3 (m16)
10187 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16))
10188 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h")
10189 (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI)
10190 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h))
10191 ())
10192 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16))
10193 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l")
10194 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI)
10195 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l))
10196 ())
10197 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16))
10198 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]")
10199 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10200 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8)))
10201 ())
10202 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16))
10203 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]")
10204 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI)
10205 (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8)))
10206 ())
10207 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16))
10208 ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}")
10209 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u16 Imm-32-QI)
10210 (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16))
10211 ())
10212 ; stzx.BW #imm,dst (m32)
10213 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem)
10215 ;-------------------------------------------------------------
10216 ; subx - subtract extend (m32)
10217 ;-------------------------------------------------------------
10219 (define-pmacro (subx-sem mode src1 dst)
10220 (sequence ((mode result))
10221 (set result (sub mode dst (ext mode src1)))
10222 (set obit (sub-oflag mode dst (ext mode src1) 0))
10223 (set cbit (sub-cflag mode dst (ext mode src1) 0))
10224 (set dst result)
10225 (set-z-and-s result)))
10226 ; subx #imm8,dst
10227 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem)
10228 ; subx src,dst
10229 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem)
10231 ;-------------------------------------------------------------
10232 ; tst - test
10233 ;-------------------------------------------------------------
10235 (define-pmacro (tst-sem mode src1 dst)
10236 (sequence ((mode result))
10237 (set result (and mode dst src1))
10238 (set-z-and-s result))
10239 )
10241 ; tst.BW #imm,dst (m16 #1 m32 #1)
10242 (binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem)
10243 ; tst.BW src,dst (m16 #2 m32 #3)
10244 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10245 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10246 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem)
10247 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem)
10248 ; tst.BW:S #imm,dst2 (m32 #2)
10249 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem)
10250 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem)
10252 ;-------------------------------------------------------------
10253 ; und - undefined
10254 ;-------------------------------------------------------------
10256 (dni und16 "und" ((machine 16))
10257 ("und")
10258 (+ (f-0-4 #xF) (f-4-4 #xF))
10259 (nop)
10260 ())
10262 (dni und32 "und" ((machine 32))
10263 ("und")
10264 (+ (f-0-4 #xF) (f-4-4 #xF))
10265 (nop)
10266 ())
10268 ;-------------------------------------------------------------
10269 ; wait
10270 ;-------------------------------------------------------------
10272 ; ??? semantics
10273 (dni wait16 "wait" ((machine 16))
10274 ("wait")
10275 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3))
10276 (nop)
10277 ())
10279 (dni wait "wait" ((machine 32))
10280 ("wait")
10281 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3))
10282 (nop)
10283 ())
10285 ;-------------------------------------------------------------
10286 ; xchg - exchange
10287 ;-------------------------------------------------------------
10289 (define-pmacro (xchg-sem mode src dst)
10290 (sequence ((mode result))
10291 (set result src)
10292 (set src dst)
10293 (set dst result))
10294 )
10295 (define-pmacro (xchg16-defn mode sz szc src srcreg)
10296 (dni (.sym xchg16 sz - srcreg)
10297 (.str "xchg" sz "-" srcreg ",dst16-16-" mode)
10298 ((machine 16))
10299 (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}")
10300 (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode))
10301 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode))
10302 ())
10303 )
10304 (xchg16-defn QI b 0 0 r0l)
10305 (xchg16-defn QI b 0 1 r0h)
10306 (xchg16-defn QI b 0 2 r1l)
10307 (xchg16-defn QI b 0 3 r1h)
10308 (xchg16-defn HI w 1 0 r0)
10309 (xchg16-defn HI w 1 1 r1)
10310 (xchg16-defn HI w 1 2 r2)
10311 (xchg16-defn HI w 1 3 r3)
10312 (define-pmacro (xchg32-defn mode sz szc src srcreg)
10313 (dni (.sym xchg32 sz - srcreg)
10314 (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode)
10315 ((machine 32))
10316 (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}")
10317 (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src))
10318 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode))
10319 ())
10320 )
10321 (xchg32-defn QI b 0 0 r0l)
10322 (xchg32-defn QI b 0 1 r1l)
10323 (xchg32-defn QI b 0 2 a0)
10324 (xchg32-defn QI b 0 3 a1)
10325 (xchg32-defn QI b 0 4 r0h)
10326 (xchg32-defn QI b 0 5 r1h)
10327 (xchg32-defn HI w 1 0 r0)
10328 (xchg32-defn HI w 1 1 r1)
10329 (xchg32-defn HI w 1 2 a0)
10330 (xchg32-defn HI w 1 3 a1)
10331 (xchg32-defn HI w 1 4 r2)
10332 (xchg32-defn HI w 1 5 r3)
10334 ;-------------------------------------------------------------
10335 ; xor - exclusive or
10336 ;-------------------------------------------------------------
10338 (define-pmacro (xor-sem mode src1 dst)
10339 (sequence ((mode result))
10340 (set result (xor mode src1 dst))
10341 (set-z-and-s result)
10342 (set dst result))
10343 )
10345 ; xor.BW #imm,dst (m16 #1 m32 #1)
10346 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem)
10347 ; xor.BW src,dst (m16 #3 m32 #3)
10348 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem)
10350 ;-------------------------------------------------------------
10351 ; Widening
10352 ;-------------------------------------------------------------
10354 (define-pmacro (exts-sem smode dmode src dst)
10355 (set dst (ext dmode (trunc smode src)))
10356 )
10357 (define-pmacro (extz-sem smode dmode src dst)
10358 (set dst (zext dmode (trunc smode src)))
10359 )
10361 ; exts.b dst for m16c
10362 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem)
10364 ; exts.w r0 for m16c
10365 (dni exts16.w-r0
10366 "exts.w r0"
10367 ((machine 16))
10368 "exts.w r0"
10369 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3))
10370 (exts-sem HI SI R0 R2R0)
10371 ())
10373 ; exts.size dst for m32c
10374 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10375 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10376 ; exts.b src,dst for m32c
10377 (ext32-binary-defn exts .b #x1 #x7 exts-sem)
10379 ; extz.b src,dst for m32c
10380 (ext32-binary-defn extz "" #x1 #xB extz-sem)
10382 ;-------------------------------------------------------------
10383 ; Indirect
10384 ;-------------------------------------------------------------
10386 ; TODO semantics
10387 (dni srcind "SRC-INDIRECT" ((machine 32))
10388 ("src-indirect")
10389 (+ (f-0-4 4) (f-4-4 1))
10390 (set (reg h-src-indirect) 1)
10391 ())
10393 (dni destind "DEST-INDIRECT" ((machine 32))
10394 ("dest-indirect")
10395 (+ (f-0-4 0) (f-4-4 9))
10396 (set (reg h-dst-indirect) 1)
10397 ())
10399 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32))
10400 ("src-dest-indirect")
10401 (+ (f-0-4 4) (f-4-4 9))
10402 (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1))
10403 ())