include/elf/xtensa.h

   1 /* Xtensa ELF support for BFD.
   2    Copyright 2003, 2004 Free Software Foundation, Inc.
   3    Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
   4
   5    This file is part of BFD, the Binary File Descriptor library.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
  20    USA.  */
  21
  22 /* This file holds definitions specific to the Xtensa ELF ABI.  */
  23
  24 #ifndef _ELF_XTENSA_H
  25 #define _ELF_XTENSA_H
  26
  27 #include "elf/reloc-macros.h"
  28
  29 /* Relocations.  */
  30 START_RELOC_NUMBERS (elf_xtensa_reloc_type)
  31      RELOC_NUMBER (R_XTENSA_NONE, 0)
  32      RELOC_NUMBER (R_XTENSA_32, 1)
  33      RELOC_NUMBER (R_XTENSA_RTLD, 2)
  34      RELOC_NUMBER (R_XTENSA_GLOB_DAT, 3)
  35      RELOC_NUMBER (R_XTENSA_JMP_SLOT, 4)
  36      RELOC_NUMBER (R_XTENSA_RELATIVE, 5)
  37      RELOC_NUMBER (R_XTENSA_PLT, 6)
  38      RELOC_NUMBER (R_XTENSA_OP0, 8)
  39      RELOC_NUMBER (R_XTENSA_OP1, 9)
  40      RELOC_NUMBER (R_XTENSA_OP2, 10)
  41      RELOC_NUMBER (R_XTENSA_ASM_EXPAND, 11)
  42      RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12)
  43      RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15)
  44      RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16)
  45      RELOC_NUMBER (R_XTENSA_DIFF8, 17)
  46      RELOC_NUMBER (R_XTENSA_DIFF16, 18)
  47      RELOC_NUMBER (R_XTENSA_DIFF32, 19)
  48      RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20)
  49      RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21)
  50      RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22)
  51      RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23)
  52      RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24)
  53      RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25)
  54      RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26)
  55      RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27)
  56      RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28)
  57      RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29)
  58      RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30)
  59      RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31)
  60      RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32)
  61      RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33)
  62      RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34)
  63      RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35)
  64      RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36)
  65      RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37)
  66      RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38)
  67      RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39)
  68      RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40)
  69      RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41)
  70      RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42)
  71      RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43)
  72      RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44)
  73      RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45)
  74      RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46)
  75      RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47)
  76      RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48)
  77      RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49)
  78 END_RELOC_NUMBERS (R_XTENSA_max)
  79
  80 /* Processor-specific flags for the ELF header e_flags field.  */
  81
  82 /* Four-bit Xtensa machine type field.  */
  83 #define EF_XTENSA_MACH                  0x0000000f
  84
  85 /* Various CPU types.  */
  86 #define E_XTENSA_MACH                   0x00000000
  87
  88 /* Leave bits 0xf0 alone in case we ever have more than 16 cpu types.
  89    Highly unlikely, but what the heck.  */
  90
  91 #define EF_XTENSA_XT_INSN               0x00000100
  92 #define EF_XTENSA_XT_LIT                0x00000200
  93
  94
  95 /* Processor-specific dynamic array tags.  */
  96
  97 /* Offset of the table that records the GOT location(s).  */
  98 #define DT_XTENSA_GOT_LOC_OFF           0x70000000
  99
 100 /* Number of entries in the GOT location table.  */
 101 #define DT_XTENSA_GOT_LOC_SZ            0x70000001
 102
 103
 104 /* Definitions for instruction and literal property tables.  The
 105    tables for ".gnu.linkonce.*" sections are placed in the following
 106    sections:
 107
 108    instruction tables:  .gnu.linkonce.x.*
 109    literal tables:      .gnu.linkonce.p.*
 110 */
 111
 112 #define XTENSA_INSN_SEC_NAME ".xt.insn"
 113 #define XTENSA_LIT_SEC_NAME  ".xt.lit"
 114 #define XTENSA_PROP_SEC_NAME ".xt.prop"
 115
 116 typedef struct property_table_entry_t
 117 {
 118   bfd_vma address;
 119   bfd_vma size;
 120   flagword flags;
 121 } property_table_entry;
 122
 123 /* Flags in the property tables to specify whether blocks of memory are
 124    literals, instructions, data, or unreachable.  For instructions,
 125    blocks that begin loop targets and branch targets are designated.
 126    Blocks that do not allow density instructions, instruction reordering
 127    or transformation are also specified.  Finally, for branch targets,
 128    branch target alignment priority is included.  Alignment of the next
 129    block is specified in the current block and the size of the current
 130    block does not include any fill required to align to the next
 131    block.  */
 132
 133 #define XTENSA_PROP_LITERAL             0x00000001
 134 #define XTENSA_PROP_INSN                0x00000002
 135 #define XTENSA_PROP_DATA                0x00000004
 136 #define XTENSA_PROP_UNREACHABLE         0x00000008
 137 /* Instruction-only properties at beginning of code. */
 138 #define XTENSA_PROP_INSN_LOOP_TARGET    0x00000010
 139 #define XTENSA_PROP_INSN_BRANCH_TARGET  0x00000020
 140 /* Instruction-only properties about code. */
 141 #define XTENSA_PROP_INSN_NO_DENSITY     0x00000040
 142 #define XTENSA_PROP_INSN_NO_REORDER     0x00000080
 143 #define XTENSA_PROP_INSN_NO_TRANSFORM   0x00000100
 144
 145 /*  Branch target alignment information.  This transmits information
 146     to the linker optimization about the priority of aligning a
 147     particular block for branch target alignment: None, low priority,
 148     high priority, or required.  These only need to be checked in
 149     instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
 150     Common usage is:
 151
 152     switch (GET_XTENSA_PROP_BT_ALIGN(flags))
 153     case XTENSA_PROP_BT_ALIGN_NONE:
 154     case XTENSA_PROP_BT_ALIGN_LOW:
 155     case XTENSA_PROP_BT_ALIGN_HIGH:
 156     case XTENSA_PROP_BT_ALIGN_REQUIRE:
 157 */
 158 #define XTENSA_PROP_BT_ALIGN_MASK       0x00000600
 159
 160 /* No branch target alignment.  */
 161 #define XTENSA_PROP_BT_ALIGN_NONE       0x0
 162 /* Low priority branch target alignment.  */
 163 #define XTENSA_PROP_BT_ALIGN_LOW        0x1
 164 /* High priority branch target alignment. */
 165 #define XTENSA_PROP_BT_ALIGN_HIGH       0x2
 166 /* Required branch target alignment.  */
 167 #define XTENSA_PROP_BT_ALIGN_REQUIRE    0x3
 168
 169 #define GET_XTENSA_PROP_BT_ALIGN(flag) \
 170   (((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
 171 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
 172   (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
 173     (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
 174
 175 /* Alignment is specified in the block BEFORE the one that needs
 176    alignment.  Up to 5 bits.  Use GET_XTENSA_PROP_ALIGNMENT(flags) to
 177    get the required alignment specified as a power of 2.  Use
 178    SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
 179    alignment.  Be careful of side effects since the SET will evaluate
 180    flags twice.  Also, note that the SIZE of a block in the property
 181    table does not include the alignment size, so the alignment fill
 182    must be calculated to determine if two blocks are contiguous.
 183    TEXT_ALIGN is not currently implemented but is a placeholder for a
 184    possible future implementation.  */
 185
 186 #define XTENSA_PROP_ALIGN               0x00000800
 187
 188 #define XTENSA_PROP_ALIGNMENT_MASK      0x0001f000
 189
 190 #define GET_XTENSA_PROP_ALIGNMENT(flag) \
 191   (((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
 192 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
 193   (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
 194     (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
 195
 196 #define XTENSA_PROP_INSN_ABSLIT        0x00020000
 197
 198 #endif /* _ELF_XTENSA_H */