* elf32-spu.c (build_stub): Fix malloc under-allocation.
[binutils.git] / bfd / cpu-mips.c
blobc55cbf0a2624596a2ea6dccad5a9bc07ac8fc812
1 /* bfd back-end for mips support
2 Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001,
3 2002, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
4 Written by Steve Chamberlain of Cygnus Support.
6 This file is part of BFD, the Binary File Descriptor library.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "libbfd.h"
27 static const bfd_arch_info_type *mips_compatible
28 (const bfd_arch_info_type *, const bfd_arch_info_type *);
30 /* The default routine tests bits_per_word, which is wrong on mips as
31 mips word size doesn't correlate with reloc size. */
33 static const bfd_arch_info_type *
34 mips_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
36 if (a->arch != b->arch)
37 return NULL;
39 /* Machine compatibility is checked in
40 _bfd_mips_elf_merge_private_bfd_data. */
42 return a;
45 #define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
46 { \
47 BITS_WORD, /* bits in a word */ \
48 BITS_ADDR, /* bits in an address */ \
49 8, /* 8 bits in a byte */ \
50 bfd_arch_mips, \
51 NUMBER, \
52 "mips", \
53 PRINT, \
54 3, \
55 DEFAULT, \
56 mips_compatible, \
57 bfd_default_scan, \
58 bfd_arch_default_fill, \
59 NEXT, \
62 enum
64 I_mips3000,
65 I_mips3900,
66 I_mips4000,
67 I_mips4010,
68 I_mips4100,
69 I_mips4111,
70 I_mips4120,
71 I_mips4300,
72 I_mips4400,
73 I_mips4600,
74 I_mips4650,
75 I_mips5000,
76 I_mips5400,
77 I_mips5500,
78 I_mips6000,
79 I_mips7000,
80 I_mips8000,
81 I_mips9000,
82 I_mips10000,
83 I_mips12000,
84 I_mips14000,
85 I_mips16000,
86 I_mips16,
87 I_mips5,
88 I_mipsisa32,
89 I_mipsisa32r2,
90 I_mipsisa64,
91 I_mipsisa64r2,
92 I_sb1,
93 I_loongson_2e,
94 I_loongson_2f,
95 I_loongson_3a,
96 I_mipsocteon,
97 I_mipsocteonp,
98 I_mipsocteon2,
99 I_xlr,
100 I_micromips
103 #define NN(index) (&arch_info_struct[(index) + 1])
105 static const bfd_arch_info_type arch_info_struct[] =
107 N (32, 32, bfd_mach_mips3000, "mips:3000", FALSE, NN(I_mips3000)),
108 N (32, 32, bfd_mach_mips3900, "mips:3900", FALSE, NN(I_mips3900)),
109 N (64, 64, bfd_mach_mips4000, "mips:4000", FALSE, NN(I_mips4000)),
110 N (64, 64, bfd_mach_mips4010, "mips:4010", FALSE, NN(I_mips4010)),
111 N (64, 64, bfd_mach_mips4100, "mips:4100", FALSE, NN(I_mips4100)),
112 N (64, 64, bfd_mach_mips4111, "mips:4111", FALSE, NN(I_mips4111)),
113 N (64, 64, bfd_mach_mips4120, "mips:4120", FALSE, NN(I_mips4120)),
114 N (64, 64, bfd_mach_mips4300, "mips:4300", FALSE, NN(I_mips4300)),
115 N (64, 64, bfd_mach_mips4400, "mips:4400", FALSE, NN(I_mips4400)),
116 N (64, 64, bfd_mach_mips4600, "mips:4600", FALSE, NN(I_mips4600)),
117 N (64, 64, bfd_mach_mips4650, "mips:4650", FALSE, NN(I_mips4650)),
118 N (64, 64, bfd_mach_mips5000, "mips:5000", FALSE, NN(I_mips5000)),
119 N (64, 64, bfd_mach_mips5400, "mips:5400", FALSE, NN(I_mips5400)),
120 N (64, 64, bfd_mach_mips5500, "mips:5500", FALSE, NN(I_mips5500)),
121 N (32, 32, bfd_mach_mips6000, "mips:6000", FALSE, NN(I_mips6000)),
122 N (64, 64, bfd_mach_mips7000, "mips:7000", FALSE, NN(I_mips7000)),
123 N (64, 64, bfd_mach_mips8000, "mips:8000", FALSE, NN(I_mips8000)),
124 N (64, 64, bfd_mach_mips9000, "mips:9000", FALSE, NN(I_mips9000)),
125 N (64, 64, bfd_mach_mips10000,"mips:10000", FALSE, NN(I_mips10000)),
126 N (64, 64, bfd_mach_mips12000,"mips:12000", FALSE, NN(I_mips12000)),
127 N (64, 64, bfd_mach_mips14000,"mips:14000", FALSE, NN(I_mips14000)),
128 N (64, 64, bfd_mach_mips16000,"mips:16000", FALSE, NN(I_mips16000)),
129 N (64, 64, bfd_mach_mips16, "mips:16", FALSE, NN(I_mips16)),
130 N (64, 64, bfd_mach_mips5, "mips:mips5", FALSE, NN(I_mips5)),
131 N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)),
132 N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)),
133 N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)),
134 N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)),
135 N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, NN(I_sb1)),
136 N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
137 N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)),
138 N (64, 64, bfd_mach_mips_loongson_3a, "mips:loongson_3a", FALSE, NN(I_loongson_3a)),
139 N (64, 64, bfd_mach_mips_octeon,"mips:octeon", FALSE, NN(I_mipsocteon)),
140 N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
141 N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
142 N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
143 N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0)
146 /* The default architecture is mips:3000, but with a machine number of
147 zero. This lets the linker distinguish between a default setting
148 of mips, and an explicit setting of mips:3000. */
150 const bfd_arch_info_type bfd_mips_arch =
151 N (32, 32, 0, "mips", TRUE, &arch_info_struct[0]);