1 .*: file format elf32
-.*arm
2 architecture
: arm
, flags
0x00000112:
3 EXEC_P
, HAS_SYMS
, D_PAGED
6 Disassembly of section
.plt
:
9 819c
: e52de004
push {lr
} ; .*
10 81a0
: e59fe004 ldr lr
, \
[pc
, #
4\
] ; .*
11 81a4
: e08fe00e
add lr
, pc
, lr
12 81a8
: e5bef008 ldr pc
, \
[lr
, #
8\
]!
13 81ac
: 00008100 .word
0x00008100
14 81b0: e08e0000
add r0
, lr
, r0
15 81b4: e5901004 ldr r1
, \
[r0
, #
4]
17 81bc
: e52d2004
push {r2
} ; .*
18 81c0
: e59f200c ldr r2
, \
[pc
, #
12\
] ; .*
19 81c4
: e59f100c ldr r1
, \
[pc
, #
12\
] ; .*
20 81c8
: e79f2002 ldr r2
, \
[pc
, r2\
]
21 81cc
: e081100f
add r1
, r1
, pc
23 81d4: 000080f4 .word
0x000080f4
24 81d8: 000080d8 .word
0x000080d8
26 Disassembly of section
.text
:
29 81dc
: e59f0004 ldr r0
, \
[pc
, #
4\
] ; .*
30 81e0
: fafffff2 blx
81b0 .*
31 81e4
: e1a00000
nop ; .*
32 81e8
: 000080d4 .word
0x000080d4
33 81ec
: 4801 ldr r0
, \
[pc
, #
4\
] ; .*
34 81ee
: f7ff efe0 blx
81b0 .*
36 81f4: 000080c5
.word
0x000080c5
38 Disassembly of section
.foo
:
41 4001000: e59f0004 ldr r0
, \
[pc
, #
4\
] ; .*
42 4001004: e79f0000 ldr r0
, \
[pc
, r0\
]
43 4001008: e1a00000
nop ; .*
44 400100c
: fc00f2b4
.word
0xfc00f2b4
45 4001010: e59f0004 ldr r0
, \
[pc
, #
4\
] ; .*
46 4001014: fa000005 blx
4001030 .*
47 4001018: e1a00000
nop ; .*
48 400101c
: fc00f2a0
.word
0xfc00f2a0
49 4001020: 4801 ldr r0
, \
[pc
, #
4\
] ; .*
50 4001022: f000 f809 bl
4001038 .*
51 4001026: 46c0
nop ; .*
52 4001028: fc00f291
.word
0xfc00f291
53 400102c
: 00000000 .word
0x00000000
55 04001030 <__unnamed_veneer
>:
56 4001030: e51ff004 ldr pc
, \
[pc
, #
-4\
] ; .*
57 4001034: 000081b0 .word
0x000081b0
59 04001038 <__unnamed_veneer
>:
61 400103a
: 46c0
nop ; .*
62 400103c
: e51ff004 ldr pc
, \
[pc
, #
-4\
] ; .*
63 4001040: 000081b0 .word
0x000081b0
64 4001044: 00000000 .word
0x00000000