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ld/testsuite/
[binutils.git] / bfd / coff-arm.c
blob40420fa70a8eaa2eb7d8ca7a8d1fbe860d29a277
1 /* BFD back-end for ARM COFF files.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
6
7 This file is part of BFD, the Binary File Descriptor library.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
22
23 #include "bfd.h"
24 #include "sysdep.h"
25 #include "libbfd.h"
26 #include "coff/arm.h"
27 #include "coff/internal.h"
28
29 #ifdef COFF_WITH_PE
30 #include "coff/pe.h"
31 #endif
32
33 #include "libcoff.h"
34
35 /* Macros for manipulation the bits in the flags field of the coff data
36 structure. */
37 #define APCS_26_FLAG(abfd) \
38 (coff_data (abfd)->flags & F_APCS_26)
39
40 #define APCS_FLOAT_FLAG(abfd) \
41 (coff_data (abfd)->flags & F_APCS_FLOAT)
42
43 #define PIC_FLAG(abfd) \
44 (coff_data (abfd)->flags & F_PIC)
45
46 #define APCS_SET(abfd) \
47 (coff_data (abfd)->flags & F_APCS_SET)
48
49 #define SET_APCS_FLAGS(abfd, flgs) \
50 do \
51 { \
52 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
53 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
54 } \
55 while (0)
56
57 #define INTERWORK_FLAG(abfd) \
58 (coff_data (abfd)->flags & F_INTERWORK)
59
60 #define INTERWORK_SET(abfd) \
61 (coff_data (abfd)->flags & F_INTERWORK_SET)
62
63 #define SET_INTERWORK_FLAG(abfd, flg) \
64 do \
65 { \
66 coff_data (abfd)->flags &= ~F_INTERWORK; \
67 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
68 } \
69 while (0)
70
71 #ifndef NUM_ELEM
72 #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
73 #endif
74
75 typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
76 /* Some typedefs for holding instructions. */
77 typedef unsigned long int insn32;
78 typedef unsigned short int insn16;
79
80 /* The linker script knows the section names for placement.
81 The entry_names are used to do simple name mangling on the stubs.
82 Given a function name, and its type, the stub can be found. The
83 name can be changed. The only requirement is the %s be present. */
84
85 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
86 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
87
88 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
89 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
90
91 /* Used by the assembler. */
92
93 static bfd_reloc_status_type
94 coff_arm_reloc (bfd *abfd,
95 arelent *reloc_entry,
96 asymbol *symbol ATTRIBUTE_UNUSED,
97 void * data,
98 asection *input_section ATTRIBUTE_UNUSED,
99 bfd *output_bfd,
100 char **error_message ATTRIBUTE_UNUSED)
101 {
102 symvalue diff;
103
104 if (output_bfd == NULL)
105 return bfd_reloc_continue;
106
107 diff = reloc_entry->addend;
108
109 #define DOIT(x) \
110 x = ((x & ~howto->dst_mask) \
111 | (((x & howto->src_mask) + diff) & howto->dst_mask))
112
113 if (diff != 0)
114 {
115 reloc_howto_type *howto = reloc_entry->howto;
116 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
117
118 switch (howto->size)
119 {
120 case 0:
121 {
122 char x = bfd_get_8 (abfd, addr);
123 DOIT (x);
124 bfd_put_8 (abfd, x, addr);
125 }
126 break;
127
128 case 1:
129 {
130 short x = bfd_get_16 (abfd, addr);
131 DOIT (x);
132 bfd_put_16 (abfd, (bfd_vma) x, addr);
133 }
134 break;
135
136 case 2:
137 {
138 long x = bfd_get_32 (abfd, addr);
139 DOIT (x);
140 bfd_put_32 (abfd, (bfd_vma) x, addr);
141 }
142 break;
143
144 default:
145 abort ();
146 }
147 }
148
149 /* Now let bfd_perform_relocation finish everything up. */
150 return bfd_reloc_continue;
151 }
152
153 /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
154 in this file), then TARGET_UNDERSCORE should be defined, otherwise it
155 should not. */
156 #ifndef TARGET_UNDERSCORE
157 #define TARGET_UNDERSCORE '_'
158 #endif
159
160 #ifndef PCRELOFFSET
161 #define PCRELOFFSET TRUE
162 #endif
163
164 /* These most certainly belong somewhere else. Just had to get rid of
165 the manifest constants in the code. */
166
167 #ifdef ARM_WINCE
168
169 #define ARM_26D 0
170 #define ARM_32 1
171 #define ARM_RVA32 2
172 #define ARM_26 3
173 #define ARM_THUMB12 4
174 #define ARM_SECTION 14
175 #define ARM_SECREL 15
176
177 #else
178
179 #define ARM_8 0
180 #define ARM_16 1
181 #define ARM_32 2
182 #define ARM_26 3
183 #define ARM_DISP8 4
184 #define ARM_DISP16 5
185 #define ARM_DISP32 6
186 #define ARM_26D 7
187 /* 8 is unused. */
188 #define ARM_NEG16 9
189 #define ARM_NEG32 10
190 #define ARM_RVA32 11
191 #define ARM_THUMB9 12
192 #define ARM_THUMB12 13
193 #define ARM_THUMB23 14
194
195 #endif
196
197 static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
198 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
199 static bfd_reloc_status_type aoutarm_fix_pcrel_26
200 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
201 static bfd_reloc_status_type coff_thumb_pcrel_12
202 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
203 #ifndef ARM_WINCE
204 static bfd_reloc_status_type coff_thumb_pcrel_9
205 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
206 static bfd_reloc_status_type coff_thumb_pcrel_23
207 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
208 #endif
209
210 static reloc_howto_type aoutarm_std_reloc_howto[] =
211 {
212 #ifdef ARM_WINCE
213 HOWTO (ARM_26D,
214 2,
215 2,
216 24,
217 TRUE,
218 0,
219 complain_overflow_dont,
220 aoutarm_fix_pcrel_26_done,
221 "ARM_26D",
222 TRUE, /* partial_inplace. */
223 0x00ffffff,
224 0x0,
225 PCRELOFFSET),
226 HOWTO (ARM_32,
227 0,
228 2,
229 32,
230 FALSE,
231 0,
232 complain_overflow_bitfield,
233 coff_arm_reloc,
234 "ARM_32",
235 TRUE, /* partial_inplace. */
236 0xffffffff,
237 0xffffffff,
238 PCRELOFFSET),
239 HOWTO (ARM_RVA32,
240 0,
241 2,
242 32,
243 FALSE,
244 0,
245 complain_overflow_bitfield,
246 coff_arm_reloc,
247 "ARM_RVA32",
248 TRUE, /* partial_inplace. */
249 0xffffffff,
250 0xffffffff,
251 PCRELOFFSET),
252 HOWTO (ARM_26,
253 2,
254 2,
255 24,
256 TRUE,
257 0,
258 complain_overflow_signed,
259 aoutarm_fix_pcrel_26 ,
260 "ARM_26",
261 FALSE,
262 0x00ffffff,
263 0x00ffffff,
264 PCRELOFFSET),
265 HOWTO (ARM_THUMB12,
266 1,
267 1,
268 11,
269 TRUE,
270 0,
271 complain_overflow_signed,
272 coff_thumb_pcrel_12 ,
273 "ARM_THUMB12",
274 FALSE,
275 0x000007ff,
276 0x000007ff,
277 PCRELOFFSET),
278 EMPTY_HOWTO (-1),
279 EMPTY_HOWTO (-1),
280 EMPTY_HOWTO (-1),
281 EMPTY_HOWTO (-1),
282 EMPTY_HOWTO (-1),
283 EMPTY_HOWTO (-1),
284 EMPTY_HOWTO (-1),
285 EMPTY_HOWTO (-1),
286 EMPTY_HOWTO (-1),
287 HOWTO (ARM_SECTION,
288 0,
289 1,
290 16,
291 FALSE,
292 0,
293 complain_overflow_bitfield,
294 coff_arm_reloc,
295 "ARM_SECTION",
296 TRUE, /* partial_inplace. */
297 0x0000ffff,
298 0x0000ffff,
299 PCRELOFFSET),
300 HOWTO (ARM_SECREL,
301 0,
302 2,
303 32,
304 FALSE,
305 0,
306 complain_overflow_bitfield,
307 coff_arm_reloc,
308 "ARM_SECREL",
309 TRUE, /* partial_inplace. */
310 0xffffffff,
311 0xffffffff,
312 PCRELOFFSET),
313 #else /* not ARM_WINCE */
314 HOWTO (ARM_8,
315 0,
316 0,
317 8,
318 FALSE,
319 0,
320 complain_overflow_bitfield,
321 coff_arm_reloc,
322 "ARM_8",
323 TRUE,
324 0x000000ff,
325 0x000000ff,
326 PCRELOFFSET),
327 HOWTO (ARM_16,
328 0,
329 1,
330 16,
331 FALSE,
332 0,
333 complain_overflow_bitfield,
334 coff_arm_reloc,
335 "ARM_16",
336 TRUE,
337 0x0000ffff,
338 0x0000ffff,
339 PCRELOFFSET),
340 HOWTO (ARM_32,
341 0,
342 2,
343 32,
344 FALSE,
345 0,
346 complain_overflow_bitfield,
347 coff_arm_reloc,
348 "ARM_32",
349 TRUE,
350 0xffffffff,
351 0xffffffff,
352 PCRELOFFSET),
353 HOWTO (ARM_26,
354 2,
355 2,
356 24,
357 TRUE,
358 0,
359 complain_overflow_signed,
360 aoutarm_fix_pcrel_26 ,
361 "ARM_26",
362 FALSE,
363 0x00ffffff,
364 0x00ffffff,
365 PCRELOFFSET),
366 HOWTO (ARM_DISP8,
367 0,
368 0,
369 8,
370 TRUE,
371 0,
372 complain_overflow_signed,
373 coff_arm_reloc,
374 "ARM_DISP8",
375 TRUE,
376 0x000000ff,
377 0x000000ff,
378 TRUE),
379 HOWTO (ARM_DISP16,
380 0,
381 1,
382 16,
383 TRUE,
384 0,
385 complain_overflow_signed,
386 coff_arm_reloc,
387 "ARM_DISP16",
388 TRUE,
389 0x0000ffff,
390 0x0000ffff,
391 TRUE),
392 HOWTO (ARM_DISP32,
393 0,
394 2,
395 32,
396 TRUE,
397 0,
398 complain_overflow_signed,
399 coff_arm_reloc,
400 "ARM_DISP32",
401 TRUE,
402 0xffffffff,
403 0xffffffff,
404 TRUE),
405 HOWTO (ARM_26D,
406 2,
407 2,
408 24,
409 FALSE,
410 0,
411 complain_overflow_dont,
412 aoutarm_fix_pcrel_26_done,
413 "ARM_26D",
414 TRUE,
415 0x00ffffff,
416 0x0,
417 FALSE),
418 /* 8 is unused */
419 EMPTY_HOWTO (-1),
420 HOWTO (ARM_NEG16,
421 0,
422 -1,
423 16,
424 FALSE,
425 0,
426 complain_overflow_bitfield,
427 coff_arm_reloc,
428 "ARM_NEG16",
429 TRUE,
430 0x0000ffff,
431 0x0000ffff,
432 FALSE),
433 HOWTO (ARM_NEG32,
434 0,
435 -2,
436 32,
437 FALSE,
438 0,
439 complain_overflow_bitfield,
440 coff_arm_reloc,
441 "ARM_NEG32",
442 TRUE,
443 0xffffffff,
444 0xffffffff,
445 FALSE),
446 HOWTO (ARM_RVA32,
447 0,
448 2,
449 32,
450 FALSE,
451 0,
452 complain_overflow_bitfield,
453 coff_arm_reloc,
454 "ARM_RVA32",
455 TRUE,
456 0xffffffff,
457 0xffffffff,
458 PCRELOFFSET),
459 HOWTO (ARM_THUMB9,
460 1,
461 1,
462 8,
463 TRUE,
464 0,
465 complain_overflow_signed,
466 coff_thumb_pcrel_9 ,
467 "ARM_THUMB9",
468 FALSE,
469 0x000000ff,
470 0x000000ff,
471 PCRELOFFSET),
472 HOWTO (ARM_THUMB12,
473 1,
474 1,
475 11,
476 TRUE,
477 0,
478 complain_overflow_signed,
479 coff_thumb_pcrel_12 ,
480 "ARM_THUMB12",
481 FALSE,
482 0x000007ff,
483 0x000007ff,
484 PCRELOFFSET),
485 HOWTO (ARM_THUMB23,
486 1,
487 2,
488 22,
489 TRUE,
490 0,
491 complain_overflow_signed,
492 coff_thumb_pcrel_23 ,
493 "ARM_THUMB23",
494 FALSE,
495 0x07ff07ff,
496 0x07ff07ff,
497 PCRELOFFSET)
498 #endif /* not ARM_WINCE */
499 };
500
501 #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
502
503 #ifdef COFF_WITH_PE
504 /* Return TRUE if this relocation should
505 appear in the output .reloc section. */
506
507 static bfd_boolean
508 in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
509 reloc_howto_type * howto)
510 {
511 return !howto->pc_relative && howto->type != ARM_RVA32;
512 }
513 #endif
514
515 #define RTYPE2HOWTO(cache_ptr, dst) \
516 (cache_ptr)->howto = \
517 (dst)->r_type < NUM_RELOCS \
518 ? aoutarm_std_reloc_howto + (dst)->r_type \
519 : NULL
520
521 #define coff_rtype_to_howto coff_arm_rtype_to_howto
522
523 static reloc_howto_type *
524 coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
525 asection *sec,
526 struct internal_reloc *rel,
527 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
528 struct internal_syment *sym ATTRIBUTE_UNUSED,
529 bfd_vma *addendp)
530 {
531 reloc_howto_type * howto;
532
533 if (rel->r_type >= NUM_RELOCS)
534 return NULL;
535
536 howto = aoutarm_std_reloc_howto + rel->r_type;
537
538 if (rel->r_type == ARM_RVA32)
539 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
540
541 #if defined COFF_WITH_PE && defined ARM_WINCE
542 if (rel->r_type == ARM_SECREL)
543 {
544 bfd_vma osect_vma;
545
546 if (h && (h->type == bfd_link_hash_defined
547 || h->type == bfd_link_hash_defweak))
548 osect_vma = h->root.u.def.section->output_section->vma;
549 else
550 {
551 asection *sec;
552 int i;
553
554 /* Sigh, the only way to get the section to offset against
555 is to find it the hard way. */
556
557 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
558 sec = sec->next;
559
560 osect_vma = sec->output_section->vma;
561 }
562
563 *addendp -= osect_vma;
564 }
565 #endif
566
567 return howto;
568 }
569
570 /* Used by the assembler. */
571
572 static bfd_reloc_status_type
573 aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
574 arelent *reloc_entry ATTRIBUTE_UNUSED,
575 asymbol *symbol ATTRIBUTE_UNUSED,
576 void * data ATTRIBUTE_UNUSED,
577 asection *input_section ATTRIBUTE_UNUSED,
578 bfd *output_bfd ATTRIBUTE_UNUSED,
579 char **error_message ATTRIBUTE_UNUSED)
580 {
581 /* This is dead simple at present. */
582 return bfd_reloc_ok;
583 }
584
585 /* Used by the assembler. */
586
587 static bfd_reloc_status_type
588 aoutarm_fix_pcrel_26 (bfd *abfd,
589 arelent *reloc_entry,
590 asymbol *symbol,
591 void * data,
592 asection *input_section,
593 bfd *output_bfd,
594 char **error_message ATTRIBUTE_UNUSED)
595 {
596 bfd_vma relocation;
597 bfd_size_type addr = reloc_entry->address;
598 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
599 bfd_reloc_status_type flag = bfd_reloc_ok;
600
601 /* If this is an undefined symbol, return error. */
602 if (symbol->section == &bfd_und_section
603 && (symbol->flags & BSF_WEAK) == 0)
604 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
605
606 /* If the sections are different, and we are doing a partial relocation,
607 just ignore it for now. */
608 if (symbol->section->name != input_section->name
609 && output_bfd != (bfd *)NULL)
610 return bfd_reloc_continue;
611
612 relocation = (target & 0x00ffffff) << 2;
613 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
614 relocation += symbol->value;
615 relocation += symbol->section->output_section->vma;
616 relocation += symbol->section->output_offset;
617 relocation += reloc_entry->addend;
618 relocation -= input_section->output_section->vma;
619 relocation -= input_section->output_offset;
620 relocation -= addr;
621
622 if (relocation & 3)
623 return bfd_reloc_overflow;
624
625 /* Check for overflow. */
626 if (relocation & 0x02000000)
627 {
628 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
629 flag = bfd_reloc_overflow;
630 }
631 else if (relocation & ~(bfd_vma) 0x03ffffff)
632 flag = bfd_reloc_overflow;
633
634 target &= ~0x00ffffff;
635 target |= (relocation >> 2) & 0x00ffffff;
636 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
637
638 /* Now the ARM magic... Change the reloc type so that it is marked as done.
639 Strictly this is only necessary if we are doing a partial relocation. */
640 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
641
642 return flag;
643 }
644
645 static bfd_reloc_status_type
646 coff_thumb_pcrel_common (bfd *abfd,
647 arelent *reloc_entry,
648 asymbol *symbol,
649 void * data,
650 asection *input_section,
651 bfd *output_bfd,
652 char **error_message ATTRIBUTE_UNUSED,
653 thumb_pcrel_branchtype btype)
654 {
655 bfd_vma relocation = 0;
656 bfd_size_type addr = reloc_entry->address;
657 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
658 bfd_reloc_status_type flag = bfd_reloc_ok;
659 bfd_vma dstmsk;
660 bfd_vma offmsk;
661 bfd_vma signbit;
662
663 /* NOTE: This routine is currently used by GAS, but not by the link
664 phase. */
665 switch (btype)
666 {
667 case b9:
668 dstmsk = 0x000000ff;
669 offmsk = 0x000001fe;
670 signbit = 0x00000100;
671 break;
672
673 case b12:
674 dstmsk = 0x000007ff;
675 offmsk = 0x00000ffe;
676 signbit = 0x00000800;
677 break;
678
679 case b23:
680 dstmsk = 0x07ff07ff;
681 offmsk = 0x007fffff;
682 signbit = 0x00400000;
683 break;
684
685 default:
686 abort ();
687 }
688
689 /* If this is an undefined symbol, return error. */
690 if (symbol->section == &bfd_und_section
691 && (symbol->flags & BSF_WEAK) == 0)
692 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
693
694 /* If the sections are different, and we are doing a partial relocation,
695 just ignore it for now. */
696 if (symbol->section->name != input_section->name
697 && output_bfd != (bfd *)NULL)
698 return bfd_reloc_continue;
699
700 switch (btype)
701 {
702 case b9:
703 case b12:
704 relocation = ((target & dstmsk) << 1);
705 break;
706
707 case b23:
708 if (bfd_big_endian (abfd))
709 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
710 else
711 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
712 break;
713
714 default:
715 abort ();
716 }
717
718 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
719 relocation += symbol->value;
720 relocation += symbol->section->output_section->vma;
721 relocation += symbol->section->output_offset;
722 relocation += reloc_entry->addend;
723 relocation -= input_section->output_section->vma;
724 relocation -= input_section->output_offset;
725 relocation -= addr;
726
727 if (relocation & 1)
728 return bfd_reloc_overflow;
729
730 /* Check for overflow. */
731 if (relocation & signbit)
732 {
733 if ((relocation & ~offmsk) != ~offmsk)
734 flag = bfd_reloc_overflow;
735 }
736 else if (relocation & ~offmsk)
737 flag = bfd_reloc_overflow;
738
739 target &= ~dstmsk;
740 switch (btype)
741 {
742 case b9:
743 case b12:
744 target |= (relocation >> 1);
745 break;
746
747 case b23:
748 if (bfd_big_endian (abfd))
749 target |= (((relocation & 0xfff) >> 1)
750 | ((relocation << 4) & 0x07ff0000));
751 else
752 target |= (((relocation & 0xffe) << 15)
753 | ((relocation >> 12) & 0x7ff));
754 break;
755
756 default:
757 abort ();
758 }
759
760 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
761
762 /* Now the ARM magic... Change the reloc type so that it is marked as done.
763 Strictly this is only necessary if we are doing a partial relocation. */
764 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
765
766 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
767 return flag;
768 }
769
770 #ifndef ARM_WINCE
771 static bfd_reloc_status_type
772 coff_thumb_pcrel_23 (bfd *abfd,
773 arelent *reloc_entry,
774 asymbol *symbol,
775 void * data,
776 asection *input_section,
777 bfd *output_bfd,
778 char **error_message)
779 {
780 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
781 input_section, output_bfd, error_message,
782 b23);
783 }
784
785 static bfd_reloc_status_type
786 coff_thumb_pcrel_9 (bfd *abfd,
787 arelent *reloc_entry,
788 asymbol *symbol,
789 void * data,
790 asection *input_section,
791 bfd *output_bfd,
792 char **error_message)
793 {
794 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
795 input_section, output_bfd, error_message,
796 b9);
797 }
798 #endif /* not ARM_WINCE */
799
800 static bfd_reloc_status_type
801 coff_thumb_pcrel_12 (bfd *abfd,
802 arelent *reloc_entry,
803 asymbol *symbol,
804 void * data,
805 asection *input_section,
806 bfd *output_bfd,
807 char **error_message)
808 {
809 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
810 input_section, output_bfd, error_message,
811 b12);
812 }
813
814 static const struct reloc_howto_struct *
815 coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
816 {
817 #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
818
819 if (code == BFD_RELOC_CTOR)
820 switch (bfd_get_arch_info (abfd)->bits_per_address)
821 {
822 case 32:
823 code = BFD_RELOC_32;
824 break;
825 default:
826 return NULL;
827 }
828
829 switch (code)
830 {
831 #ifdef ARM_WINCE
832 ASTD (BFD_RELOC_32, ARM_32);
833 ASTD (BFD_RELOC_RVA, ARM_RVA32);
834 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
835 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
836 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL);
837 #else
838 ASTD (BFD_RELOC_8, ARM_8);
839 ASTD (BFD_RELOC_16, ARM_16);
840 ASTD (BFD_RELOC_32, ARM_32);
841 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
842 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
843 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
844 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
845 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
846 ASTD (BFD_RELOC_RVA, ARM_RVA32);
847 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
848 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
849 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
850 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
851 #endif
852 default: return NULL;
853 }
854 }
855
856 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
857 #define COFF_PAGE_SIZE 0x1000
858
859 /* Turn a howto into a reloc nunmber. */
860 #define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
861 #define BADMAG(x) ARMBADMAG(x)
862 #define ARM 1 /* Customize coffcode.h. */
863
864 #ifndef ARM_WINCE
865 /* Make sure that the 'r_offset' field is copied properly
866 so that identical binaries will compare the same. */
867 #define SWAP_IN_RELOC_OFFSET H_GET_32
868 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
869 #endif
870
871 /* Extend the coff_link_hash_table structure with a few ARM specific fields.
872 This allows us to store global data here without actually creating any
873 global variables, which is a no-no in the BFD world. */
874 struct coff_arm_link_hash_table
875 {
876 /* The original coff_link_hash_table structure. MUST be first field. */
877 struct coff_link_hash_table root;
878
879 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
880 bfd_size_type thumb_glue_size;
881
882 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
883 bfd_size_type arm_glue_size;
884
885 /* An arbitrary input BFD chosen to hold the glue sections. */
886 bfd * bfd_of_glue_owner;
887
888 /* Support interworking with old, non-interworking aware ARM code. */
889 int support_old_code;
890 };
891
892 /* Get the ARM coff linker hash table from a link_info structure. */
893 #define coff_arm_hash_table(info) \
894 ((struct coff_arm_link_hash_table *) ((info)->hash))
895
896 /* Create an ARM coff linker hash table. */
897
898 static struct bfd_link_hash_table *
899 coff_arm_link_hash_table_create (bfd * abfd)
900 {
901 struct coff_arm_link_hash_table * ret;
902 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
903
904 ret = bfd_malloc (amt);
905 if (ret == NULL)
906 return NULL;
907
908 if (!_bfd_coff_link_hash_table_init (&ret->root,
909 abfd,
910 _bfd_coff_link_hash_newfunc,
911 sizeof (struct coff_link_hash_entry)))
912 {
913 free (ret);
914 return NULL;
915 }
916
917 ret->thumb_glue_size = 0;
918 ret->arm_glue_size = 0;
919 ret->bfd_of_glue_owner = NULL;
920
921 return & ret->root.root;
922 }
923
924 static void
925 arm_emit_base_file_entry (struct bfd_link_info *info,
926 bfd *output_bfd,
927 asection *input_section,
928 bfd_vma reloc_offset)
929 {
930 bfd_vma addr = reloc_offset
931 - input_section->vma
932 + input_section->output_offset
933 + input_section->output_section->vma;
934
935 if (coff_data (output_bfd)->pe)
936 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
937 fwrite (& addr, 1, sizeof (addr), (FILE *) info->base_file);
938
939 }
940 \f
941 #ifndef ARM_WINCE
942 /* The thumb form of a long branch is a bit finicky, because the offset
943 encoding is split over two fields, each in it's own instruction. They
944 can occur in any order. So given a thumb form of long branch, and an
945 offset, insert the offset into the thumb branch and return finished
946 instruction.
947
948 It takes two thumb instructions to encode the target address. Each has
949 11 bits to invest. The upper 11 bits are stored in one (identified by
950 H-0.. see below), the lower 11 bits are stored in the other (identified
951 by H-1).
952
953 Combine together and shifted left by 1 (it's a half word address) and
954 there you have it.
955
956 Op: 1111 = F,
957 H-0, upper address-0 = 000
958 Op: 1111 = F,
959 H-1, lower address-0 = 800
960
961 They can be ordered either way, but the arm tools I've seen always put
962 the lower one first. It probably doesn't matter. krk@cygnus.com
963
964 XXX: Actually the order does matter. The second instruction (H-1)
965 moves the computed address into the PC, so it must be the second one
966 in the sequence. The problem, however is that whilst little endian code
967 stores the instructions in HI then LOW order, big endian code does the
968 reverse. nickc@cygnus.com. */
969
970 #define LOW_HI_ORDER 0xF800F000
971 #define HI_LOW_ORDER 0xF000F800
972
973 static insn32
974 insert_thumb_branch (insn32 br_insn, int rel_off)
975 {
976 unsigned int low_bits;
977 unsigned int high_bits;
978
979 BFD_ASSERT ((rel_off & 1) != 1);
980
981 rel_off >>= 1; /* Half word aligned address. */
982 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
983 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
984
985 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
986 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
987 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
988 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
989 else
990 /* FIXME: the BFD library should never abort except for internal errors
991 - it should return an error status. */
992 abort (); /* Error - not a valid branch instruction form. */
993
994 return br_insn;
995 }
996
997 \f
998 static struct coff_link_hash_entry *
999 find_thumb_glue (struct bfd_link_info *info,
1000 const char *name,
1001 bfd *input_bfd)
1002 {
1003 char *tmp_name;
1004 struct coff_link_hash_entry *myh;
1005 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1006
1007 tmp_name = bfd_malloc (amt);
1008
1009 BFD_ASSERT (tmp_name);
1010
1011 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1012
1013 myh = coff_link_hash_lookup
1014 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1015
1016 if (myh == NULL)
1017 /* xgettext:c-format */
1018 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"),
1019 input_bfd, tmp_name, name);
1020
1021 free (tmp_name);
1022
1023 return myh;
1024 }
1025 #endif /* not ARM_WINCE */
1026
1027 static struct coff_link_hash_entry *
1028 find_arm_glue (struct bfd_link_info *info,
1029 const char *name,
1030 bfd *input_bfd)
1031 {
1032 char *tmp_name;
1033 struct coff_link_hash_entry * myh;
1034 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1035
1036 tmp_name = bfd_malloc (amt);
1037
1038 BFD_ASSERT (tmp_name);
1039
1040 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1041
1042 myh = coff_link_hash_lookup
1043 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1044
1045 if (myh == NULL)
1046 /* xgettext:c-format */
1047 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"),
1048 input_bfd, tmp_name, name);
1049
1050 free (tmp_name);
1051
1052 return myh;
1053 }
1054
1055 /*
1056 ARM->Thumb glue:
1057
1058 .arm
1059 __func_from_arm:
1060 ldr r12, __func_addr
1061 bx r12
1062 __func_addr:
1063 .word func @ behave as if you saw a ARM_32 reloc
1064 */
1065
1066 #define ARM2THUMB_GLUE_SIZE 12
1067 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1068 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1069 static const insn32 a2t3_func_addr_insn = 0x00000001;
1070
1071 /*
1072 Thumb->ARM: Thumb->(non-interworking aware) ARM
1073
1074 .thumb .thumb
1075 .align 2 .align 2
1076 __func_from_thumb: __func_from_thumb:
1077 bx pc push {r6, lr}
1078 nop ldr r6, __func_addr
1079 .arm mov lr, pc
1080 __func_change_to_arm: bx r6
1081 b func .arm
1082 __func_back_to_thumb:
1083 ldmia r13! {r6, lr}
1084 bx lr
1085 __func_addr:
1086 .word func
1087 */
1088
1089 #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
1090 #ifndef ARM_WINCE
1091 static const insn16 t2a1_bx_pc_insn = 0x4778;
1092 static const insn16 t2a2_noop_insn = 0x46c0;
1093 static const insn32 t2a3_b_insn = 0xea000000;
1094
1095 static const insn16 t2a1_push_insn = 0xb540;
1096 static const insn16 t2a2_ldr_insn = 0x4e03;
1097 static const insn16 t2a3_mov_insn = 0x46fe;
1098 static const insn16 t2a4_bx_insn = 0x4730;
1099 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1100 static const insn32 t2a6_bx_insn = 0xe12fff1e;
1101 #endif
1102
1103 /* TODO:
1104 We should really create new local (static) symbols in destination
1105 object for each stub we create. We should also create local
1106 (static) symbols within the stubs when switching between ARM and
1107 Thumb code. This will ensure that the debugger and disassembler
1108 can present a better view of stubs.
1109
1110 We can treat stubs like literal sections, and for the THUMB9 ones
1111 (short addressing range) we should be able to insert the stubs
1112 between sections. i.e. the simplest approach (since relocations
1113 are done on a section basis) is to dump the stubs at the end of
1114 processing a section. That way we can always try and minimise the
1115 offset to and from a stub. However, this does not map well onto
1116 the way that the linker/BFD does its work: mapping all input
1117 sections to output sections via the linker script before doing
1118 all the processing.
1119
1120 Unfortunately it may be easier to just to disallow short range
1121 Thumb->ARM stubs (i.e. no conditional inter-working branches,
1122 only branch-and-link (BL) calls. This will simplify the processing
1123 since we can then put all of the stubs into their own section.
1124
1125 TODO:
1126 On a different subject, rather than complaining when a
1127 branch cannot fit in the number of bits available for the
1128 instruction we should generate a trampoline stub (needed to
1129 address the complete 32bit address space). */
1130
1131 /* The standard COFF backend linker does not cope with the special
1132 Thumb BRANCH23 relocation. The alternative would be to split the
1133 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
1134 bit simpler simply providing our own relocation driver. */
1135
1136 /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
1137 This code is a very slightly modified copy of
1138 _bfd_coff_generic_relocate_section. It would be a much more
1139 maintainable solution to have a MACRO that could be expanded within
1140 _bfd_coff_generic_relocate_section that would only be provided for
1141 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
1142 is different from the original. */
1143
1144 static bfd_boolean
1145 coff_arm_relocate_section (bfd *output_bfd,
1146 struct bfd_link_info *info,
1147 bfd *input_bfd,
1148 asection *input_section,
1149 bfd_byte *contents,
1150 struct internal_reloc *relocs,
1151 struct internal_syment *syms,
1152 asection **sections)
1153 {
1154 struct internal_reloc * rel;
1155 struct internal_reloc * relend;
1156 #ifndef ARM_WINCE
1157 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
1158 #endif
1159
1160 rel = relocs;
1161 relend = rel + input_section->reloc_count;
1162
1163 for (; rel < relend; rel++)
1164 {
1165 int done = 0;
1166 long symndx;
1167 struct coff_link_hash_entry * h;
1168 struct internal_syment * sym;
1169 bfd_vma addend;
1170 bfd_vma val;
1171 reloc_howto_type * howto;
1172 bfd_reloc_status_type rstat;
1173 bfd_vma h_val;
1174
1175 symndx = rel->r_symndx;
1176
1177 if (symndx == -1)
1178 {
1179 h = NULL;
1180 sym = NULL;
1181 }
1182 else
1183 {
1184 h = obj_coff_sym_hashes (input_bfd)[symndx];
1185 sym = syms + symndx;
1186 }
1187
1188 /* COFF treats common symbols in one of two ways. Either the
1189 size of the symbol is included in the section contents, or it
1190 is not. We assume that the size is not included, and force
1191 the rtype_to_howto function to adjust the addend as needed. */
1192
1193 if (sym != NULL && sym->n_scnum != 0)
1194 addend = - sym->n_value;
1195 else
1196 addend = 0;
1197
1198 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
1199 sym, &addend);
1200 if (howto == NULL)
1201 return FALSE;
1202
1203 /* The relocation_section function will skip pcrel_offset relocs
1204 when doing a relocatable link. However, we want to convert
1205 ARM_26 to ARM_26D relocs if possible. We return a fake howto in
1206 this case without pcrel_offset set, and adjust the addend to
1207 compensate. 'partial_inplace' is also set, since we want 'done'
1208 relocations to be reflected in section's data. */
1209 if (rel->r_type == ARM_26
1210 && h != NULL
1211 && info->relocatable
1212 && (h->root.type == bfd_link_hash_defined
1213 || h->root.type == bfd_link_hash_defweak)
1214 && (h->root.u.def.section->output_section
1215 == input_section->output_section))
1216 {
1217 static reloc_howto_type fake_arm26_reloc =
1218 HOWTO (ARM_26,
1219 2,
1220 2,
1221 24,
1222 TRUE,
1223 0,
1224 complain_overflow_signed,
1225 aoutarm_fix_pcrel_26 ,
1226 "ARM_26",
1227 TRUE,
1228 0x00ffffff,
1229 0x00ffffff,
1230 FALSE);
1231
1232 addend -= rel->r_vaddr - input_section->vma;
1233 #ifdef ARM_WINCE
1234 /* FIXME: I don't know why, but the hack is necessary for correct
1235 generation of bl's instruction offset. */
1236 addend -= 8;
1237 #endif
1238 howto = & fake_arm26_reloc;
1239 }
1240
1241 #ifdef ARM_WINCE
1242 /* MS ARM-CE makes the reloc relative to the opcode's pc, not
1243 the next opcode's pc, so is off by one. */
1244 if (howto->pc_relative && !info->relocatable)
1245 addend -= 8;
1246 #endif
1247
1248 /* If we are doing a relocatable link, then we can just ignore
1249 a PC relative reloc that is pcrel_offset. It will already
1250 have the correct value. If this is not a relocatable link,
1251 then we should ignore the symbol value. */
1252 if (howto->pc_relative && howto->pcrel_offset)
1253 {
1254 if (info->relocatable)
1255 continue;
1256 /* FIXME - it is not clear which targets need this next test
1257 and which do not. It is known that it is needed for the
1258 VxWorks and EPOC-PE targets, but it is also known that it
1259 was suppressed for other ARM targets. This ought to be
1260 sorted out one day. */
1261 #ifdef ARM_COFF_BUGFIX
1262 /* We must not ignore the symbol value. If the symbol is
1263 within the same section, the relocation should have already
1264 been fixed, but if it is not, we'll be handed a reloc into
1265 the beginning of the symbol's section, so we must not cancel
1266 out the symbol's value, otherwise we'll be adding it in
1267 twice. */
1268 if (sym != NULL && sym->n_scnum != 0)
1269 addend += sym->n_value;
1270 #endif
1271 }
1272
1273 val = 0;
1274
1275 if (h == NULL)
1276 {
1277 asection *sec;
1278
1279 if (symndx == -1)
1280 {
1281 sec = bfd_abs_section_ptr;
1282 val = 0;
1283 }
1284 else
1285 {
1286 sec = sections[symndx];
1287 val = (sec->output_section->vma
1288 + sec->output_offset
1289 + sym->n_value
1290 - sec->vma);
1291 }
1292 }
1293 else
1294 {
1295 /* We don't output the stubs if we are generating a
1296 relocatable output file, since we may as well leave the
1297 stub generation to the final linker pass. If we fail to
1298 verify that the name is defined, we'll try to build stubs
1299 for an undefined name... */
1300 if (! info->relocatable
1301 && ( h->root.type == bfd_link_hash_defined
1302 || h->root.type == bfd_link_hash_defweak))
1303 {
1304 asection * h_sec = h->root.u.def.section;
1305 const char * name = h->root.root.string;
1306
1307 /* h locates the symbol referenced in the reloc. */
1308 h_val = (h->root.u.def.value
1309 + h_sec->output_section->vma
1310 + h_sec->output_offset);
1311
1312 if (howto->type == ARM_26)
1313 {
1314 if ( h->class == C_THUMBSTATFUNC
1315 || h->class == C_THUMBEXTFUNC)
1316 {
1317 /* Arm code calling a Thumb function. */
1318 unsigned long int tmp;
1319 bfd_vma my_offset;
1320 asection * s;
1321 long int ret_offset;
1322 struct coff_link_hash_entry * myh;
1323 struct coff_arm_link_hash_table * globals;
1324
1325 myh = find_arm_glue (info, name, input_bfd);
1326 if (myh == NULL)
1327 return FALSE;
1328
1329 globals = coff_arm_hash_table (info);
1330
1331 BFD_ASSERT (globals != NULL);
1332 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1333
1334 my_offset = myh->root.u.def.value;
1335
1336 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1337 ARM2THUMB_GLUE_SECTION_NAME);
1338 BFD_ASSERT (s != NULL);
1339 BFD_ASSERT (s->contents != NULL);
1340 BFD_ASSERT (s->output_section != NULL);
1341
1342 if ((my_offset & 0x01) == 0x01)
1343 {
1344 if (h_sec->owner != NULL
1345 && INTERWORK_SET (h_sec->owner)
1346 && ! INTERWORK_FLAG (h_sec->owner))
1347 _bfd_error_handler
1348 /* xgettext:c-format */
1349 (_("%B(%s): warning: interworking not enabled.\n"
1350 " first occurrence: %B: arm call to thumb"),
1351 h_sec->owner, input_bfd, name);
1352
1353 --my_offset;
1354 myh->root.u.def.value = my_offset;
1355
1356 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
1357 s->contents + my_offset);
1358
1359 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
1360 s->contents + my_offset + 4);
1361
1362 /* It's a thumb address. Add the low order bit. */
1363 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
1364 s->contents + my_offset + 8);
1365
1366 if (info->base_file)
1367 arm_emit_base_file_entry (info, output_bfd, s,
1368 my_offset + 8);
1369
1370 }
1371
1372 BFD_ASSERT (my_offset <= globals->arm_glue_size);
1373
1374 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1375 - input_section->vma);
1376
1377 tmp = tmp & 0xFF000000;
1378
1379 /* Somehow these are both 4 too far, so subtract 8. */
1380 ret_offset =
1381 s->output_offset
1382 + my_offset
1383 + s->output_section->vma
1384 - (input_section->output_offset
1385 + input_section->output_section->vma
1386 + rel->r_vaddr)
1387 - 8;
1388
1389 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
1390
1391 bfd_put_32 (output_bfd, (bfd_vma) tmp,
1392 contents + rel->r_vaddr - input_section->vma);
1393 done = 1;
1394 }
1395 }
1396
1397 #ifndef ARM_WINCE
1398 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */
1399 else if (howto->type == ARM_THUMB23)
1400 {
1401 if ( h->class == C_EXT
1402 || h->class == C_STAT
1403 || h->class == C_LABEL)
1404 {
1405 /* Thumb code calling an ARM function. */
1406 asection * s = 0;
1407 bfd_vma my_offset;
1408 unsigned long int tmp;
1409 long int ret_offset;
1410 struct coff_link_hash_entry * myh;
1411 struct coff_arm_link_hash_table * globals;
1412
1413 myh = find_thumb_glue (info, name, input_bfd);
1414 if (myh == NULL)
1415 return FALSE;
1416
1417 globals = coff_arm_hash_table (info);
1418
1419 BFD_ASSERT (globals != NULL);
1420 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1421
1422 my_offset = myh->root.u.def.value;
1423
1424 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1425 THUMB2ARM_GLUE_SECTION_NAME);
1426
1427 BFD_ASSERT (s != NULL);
1428 BFD_ASSERT (s->contents != NULL);
1429 BFD_ASSERT (s->output_section != NULL);
1430
1431 if ((my_offset & 0x01) == 0x01)
1432 {
1433 if (h_sec->owner != NULL
1434 && INTERWORK_SET (h_sec->owner)
1435 && ! INTERWORK_FLAG (h_sec->owner)
1436 && ! globals->support_old_code)
1437 _bfd_error_handler
1438 /* xgettext:c-format */
1439 (_("%B(%s): warning: interworking not enabled.\n"
1440 " first occurrence: %B: thumb call to arm\n"
1441 " consider relinking with --support-old-code enabled"),
1442 h_sec->owner, input_bfd, name);
1443
1444 -- my_offset;
1445 myh->root.u.def.value = my_offset;
1446
1447 if (globals->support_old_code)
1448 {
1449 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
1450 s->contents + my_offset);
1451
1452 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
1453 s->contents + my_offset + 2);
1454
1455 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
1456 s->contents + my_offset + 4);
1457
1458 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
1459 s->contents + my_offset + 6);
1460
1461 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
1462 s->contents + my_offset + 8);
1463
1464 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
1465 s->contents + my_offset + 12);
1466
1467 /* Store the address of the function in the last word of the stub. */
1468 bfd_put_32 (output_bfd, h_val,
1469 s->contents + my_offset + 16);
1470
1471 if (info->base_file)
1472 arm_emit_base_file_entry (info, output_bfd, s,
1473 my_offset + 16);
1474 }
1475 else
1476 {
1477 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
1478 s->contents + my_offset);
1479
1480 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
1481 s->contents + my_offset + 2);
1482
1483 ret_offset =
1484 /* Address of destination of the stub. */
1485 ((bfd_signed_vma) h_val)
1486 - ((bfd_signed_vma)
1487 /* Offset from the start of the current section to the start of the stubs. */
1488 (s->output_offset
1489 /* Offset of the start of this stub from the start of the stubs. */
1490 + my_offset
1491 /* Address of the start of the current section. */
1492 + s->output_section->vma)
1493 /* The branch instruction is 4 bytes into the stub. */
1494 + 4
1495 /* ARM branches work from the pc of the instruction + 8. */
1496 + 8);
1497
1498 bfd_put_32 (output_bfd,
1499 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
1500 s->contents + my_offset + 4);
1501
1502 }
1503 }
1504
1505 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
1506
1507 /* Now go back and fix up the original BL insn to point
1508 to here. */
1509 ret_offset =
1510 s->output_offset
1511 + my_offset
1512 - (input_section->output_offset
1513 + rel->r_vaddr)
1514 -4;
1515
1516 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1517 - input_section->vma);
1518
1519 bfd_put_32 (output_bfd,
1520 (bfd_vma) insert_thumb_branch (tmp,
1521 ret_offset),
1522 contents + rel->r_vaddr - input_section->vma);
1523
1524 done = 1;
1525 }
1526 }
1527 #endif
1528 }
1529
1530 /* If the relocation type and destination symbol does not
1531 fall into one of the above categories, then we can just
1532 perform a direct link. */
1533
1534 if (done)
1535 rstat = bfd_reloc_ok;
1536 else
1537 if ( h->root.type == bfd_link_hash_defined
1538 || h->root.type == bfd_link_hash_defweak)
1539 {
1540 asection *sec;
1541
1542 sec = h->root.u.def.section;
1543 val = (h->root.u.def.value
1544 + sec->output_section->vma
1545 + sec->output_offset);
1546 }
1547
1548 else if (! info->relocatable)
1549 {
1550 if (! ((*info->callbacks->undefined_symbol)
1551 (info, h->root.root.string, input_bfd, input_section,
1552 rel->r_vaddr - input_section->vma, TRUE)))
1553 return FALSE;
1554 }
1555 }
1556
1557 if (info->base_file)
1558 {
1559 /* Emit a reloc if the backend thinks it needs it. */
1560 if (sym && pe_data(output_bfd)->in_reloc_p(output_bfd, howto))
1561 arm_emit_base_file_entry (info, output_bfd, input_section,
1562 rel->r_vaddr);
1563 }
1564
1565 if (done)
1566 rstat = bfd_reloc_ok;
1567 #ifndef ARM_WINCE
1568 /* Only perform this fix during the final link, not a relocatable link. */
1569 else if (! info->relocatable
1570 && howto->type == ARM_THUMB23)
1571 {
1572 /* This is pretty much a copy of what the default
1573 _bfd_final_link_relocate and _bfd_relocate_contents
1574 routines do to perform a relocation, with special
1575 processing for the split addressing of the Thumb BL
1576 instruction. Again, it would probably be simpler adding a
1577 ThumbBRANCH23 specific macro expansion into the default
1578 code. */
1579
1580 bfd_vma address = rel->r_vaddr - input_section->vma;
1581
1582 if (address > high_address)
1583 rstat = bfd_reloc_outofrange;
1584 else
1585 {
1586 bfd_vma relocation = val + addend;
1587 int size = bfd_get_reloc_size (howto);
1588 bfd_boolean overflow = FALSE;
1589 bfd_byte *location = contents + address;
1590 bfd_vma x = bfd_get_32 (input_bfd, location);
1591 bfd_vma src_mask = 0x007FFFFE;
1592 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1593 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1594 bfd_vma check;
1595 bfd_signed_vma signed_check;
1596 bfd_vma add;
1597 bfd_signed_vma signed_add;
1598
1599 BFD_ASSERT (size == 4);
1600
1601 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */
1602 relocation -= (input_section->output_section->vma
1603 + input_section->output_offset);
1604
1605 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */
1606 relocation -= address;
1607
1608 /* No need to negate the relocation with BRANCH23. */
1609 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1610 /* howto->rightshift == 1 */
1611
1612 /* Drop unwanted bits from the value we are relocating to. */
1613 check = relocation >> howto->rightshift;
1614
1615 /* If this is a signed value, the rightshift just dropped
1616 leading 1 bits (assuming twos complement). */
1617 if ((bfd_signed_vma) relocation >= 0)
1618 signed_check = check;
1619 else
1620 signed_check = (check
1621 | ((bfd_vma) - 1
1622 & ~((bfd_vma) - 1 >> howto->rightshift)));
1623
1624 /* Get the value from the object file. */
1625 if (bfd_big_endian (input_bfd))
1626 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
1627 else
1628 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
1629
1630 /* Get the value from the object file with an appropriate sign.
1631 The expression involving howto->src_mask isolates the upper
1632 bit of src_mask. If that bit is set in the value we are
1633 adding, it is negative, and we subtract out that number times
1634 two. If src_mask includes the highest possible bit, then we
1635 can not get the upper bit, but that does not matter since
1636 signed_add needs no adjustment to become negative in that
1637 case. */
1638 signed_add = add;
1639
1640 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1641 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
1642
1643 /* howto->bitpos == 0 */
1644 /* Add the value from the object file, shifted so that it is a
1645 straight number. */
1646 signed_check += signed_add;
1647 relocation += signed_add;
1648
1649 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1650
1651 /* Assumes two's complement. */
1652 if ( signed_check > reloc_signed_max
1653 || signed_check < reloc_signed_min)
1654 overflow = TRUE;
1655
1656 /* Put the relocation into the correct bits.
1657 For a BLX instruction, make sure that the relocation is rounded up
1658 to a word boundary. This follows the semantics of the instruction
1659 which specifies that bit 1 of the target address will come from bit
1660 1 of the base address. */
1661 if (bfd_big_endian (input_bfd))
1662 {
1663 if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
1664 relocation += 2;
1665 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1666 }
1667 else
1668 {
1669 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
1670 relocation += 2;
1671 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1672 }
1673
1674 /* Add the relocation to the correct bits of X. */
1675 x = ((x & ~howto->dst_mask) | relocation);
1676
1677 /* Put the relocated value back in the object file. */
1678 bfd_put_32 (input_bfd, x, location);
1679
1680 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1681 }
1682 }
1683 #endif
1684 else
1685 if (info->relocatable && ! howto->partial_inplace)
1686 rstat = bfd_reloc_ok;
1687 else
1688 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1689 contents,
1690 rel->r_vaddr - input_section->vma,
1691 val, addend);
1692 /* Only perform this fix during the final link, not a relocatable link. */
1693 if (! info->relocatable
1694 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
1695 {
1696 /* Determine if we need to set the bottom bit of a relocated address
1697 because the address is the address of a Thumb code symbol. */
1698 int patchit = FALSE;
1699
1700 if (h != NULL
1701 && ( h->class == C_THUMBSTATFUNC
1702 || h->class == C_THUMBEXTFUNC))
1703 {
1704 patchit = TRUE;
1705 }
1706 else if (sym != NULL
1707 && sym->n_scnum > N_UNDEF)
1708 {
1709 /* No hash entry - use the symbol instead. */
1710 if ( sym->n_sclass == C_THUMBSTATFUNC
1711 || sym->n_sclass == C_THUMBEXTFUNC)
1712 patchit = TRUE;
1713 }
1714
1715 if (patchit)
1716 {
1717 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1718 bfd_vma x = bfd_get_32 (input_bfd, location);
1719
1720 bfd_put_32 (input_bfd, x | 1, location);
1721 }
1722 }
1723
1724 switch (rstat)
1725 {
1726 default:
1727 abort ();
1728 case bfd_reloc_ok:
1729 break;
1730 case bfd_reloc_outofrange:
1731 (*_bfd_error_handler)
1732 (_("%B: bad reloc address 0x%lx in section `%A'"),
1733 input_bfd, input_section, (unsigned long) rel->r_vaddr);
1734 return FALSE;
1735 case bfd_reloc_overflow:
1736 {
1737 const char *name;
1738 char buf[SYMNMLEN + 1];
1739
1740 if (symndx == -1)
1741 name = "*ABS*";
1742 else if (h != NULL)
1743 name = NULL;
1744 else
1745 {
1746 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1747 if (name == NULL)
1748 return FALSE;
1749 }
1750
1751 if (! ((*info->callbacks->reloc_overflow)
1752 (info, (h ? &h->root : NULL), name, howto->name,
1753 (bfd_vma) 0, input_bfd, input_section,
1754 rel->r_vaddr - input_section->vma)))
1755 return FALSE;
1756 }
1757 }
1758 }
1759
1760 return TRUE;
1761 }
1762
1763 #ifndef COFF_IMAGE_WITH_PE
1764
1765 bfd_boolean
1766 bfd_arm_allocate_interworking_sections (struct bfd_link_info * info)
1767 {
1768 asection * s;
1769 bfd_byte * foo;
1770 struct coff_arm_link_hash_table * globals;
1771
1772 globals = coff_arm_hash_table (info);
1773
1774 BFD_ASSERT (globals != NULL);
1775
1776 if (globals->arm_glue_size != 0)
1777 {
1778 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1779
1780 s = bfd_get_section_by_name
1781 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1782
1783 BFD_ASSERT (s != NULL);
1784
1785 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
1786
1787 s->size = globals->arm_glue_size;
1788 s->contents = foo;
1789 }
1790
1791 if (globals->thumb_glue_size != 0)
1792 {
1793 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1794
1795 s = bfd_get_section_by_name
1796 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1797
1798 BFD_ASSERT (s != NULL);
1799
1800 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
1801
1802 s->size = globals->thumb_glue_size;
1803 s->contents = foo;
1804 }
1805
1806 return TRUE;
1807 }
1808
1809 static void
1810 record_arm_to_thumb_glue (struct bfd_link_info * info,
1811 struct coff_link_hash_entry * h)
1812 {
1813 const char * name = h->root.root.string;
1814 register asection * s;
1815 char * tmp_name;
1816 struct coff_link_hash_entry * myh;
1817 struct bfd_link_hash_entry * bh;
1818 struct coff_arm_link_hash_table * globals;
1819 bfd_vma val;
1820 bfd_size_type amt;
1821
1822 globals = coff_arm_hash_table (info);
1823
1824 BFD_ASSERT (globals != NULL);
1825 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1826
1827 s = bfd_get_section_by_name
1828 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1829
1830 BFD_ASSERT (s != NULL);
1831
1832 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1833 tmp_name = bfd_malloc (amt);
1834
1835 BFD_ASSERT (tmp_name);
1836
1837 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1838
1839 myh = coff_link_hash_lookup
1840 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1841
1842 if (myh != NULL)
1843 {
1844 free (tmp_name);
1845 /* We've already seen this guy. */
1846 return;
1847 }
1848
1849 /* The only trick here is using globals->arm_glue_size as the value. Even
1850 though the section isn't allocated yet, this is where we will be putting
1851 it. */
1852 bh = NULL;
1853 val = globals->arm_glue_size + 1;
1854 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1855 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1856
1857 free (tmp_name);
1858
1859 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;
1860
1861 return;
1862 }
1863
1864 #ifndef ARM_WINCE
1865 static void
1866 record_thumb_to_arm_glue (struct bfd_link_info * info,
1867 struct coff_link_hash_entry * h)
1868 {
1869 const char * name = h->root.root.string;
1870 asection * s;
1871 char * tmp_name;
1872 struct coff_link_hash_entry * myh;
1873 struct bfd_link_hash_entry * bh;
1874 struct coff_arm_link_hash_table * globals;
1875 bfd_vma val;
1876 bfd_size_type amt;
1877
1878 globals = coff_arm_hash_table (info);
1879
1880 BFD_ASSERT (globals != NULL);
1881 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1882
1883 s = bfd_get_section_by_name
1884 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1885
1886 BFD_ASSERT (s != NULL);
1887
1888 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1889 tmp_name = bfd_malloc (amt);
1890
1891 BFD_ASSERT (tmp_name);
1892
1893 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1894
1895 myh = coff_link_hash_lookup
1896 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1897
1898 if (myh != NULL)
1899 {
1900 free (tmp_name);
1901 /* We've already seen this guy. */
1902 return;
1903 }
1904
1905 bh = NULL;
1906 val = globals->thumb_glue_size + 1;
1907 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1908 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1909
1910 /* If we mark it 'thumb', the disassembler will do a better job. */
1911 myh = (struct coff_link_hash_entry *) bh;
1912 myh->class = C_THUMBEXTFUNC;
1913
1914 free (tmp_name);
1915
1916 /* Allocate another symbol to mark where we switch to arm mode. */
1917
1918 #define CHANGE_TO_ARM "__%s_change_to_arm"
1919 #define BACK_FROM_ARM "__%s_back_from_arm"
1920
1921 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
1922 tmp_name = bfd_malloc (amt);
1923
1924 BFD_ASSERT (tmp_name);
1925
1926 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
1927
1928 bh = NULL;
1929 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
1930 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1931 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);
1932
1933 free (tmp_name);
1934
1935 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1936
1937 return;
1938 }
1939 #endif /* not ARM_WINCE */
1940
1941 /* Select a BFD to be used to hold the sections used by the glue code.
1942 This function is called from the linker scripts in ld/emultempl/
1943 {armcoff/pe}.em */
1944
1945 bfd_boolean
1946 bfd_arm_get_bfd_for_interworking (bfd * abfd,
1947 struct bfd_link_info * info)
1948 {
1949 struct coff_arm_link_hash_table * globals;
1950 flagword flags;
1951 asection * sec;
1952
1953 /* If we are only performing a partial link do not bother
1954 getting a bfd to hold the glue. */
1955 if (info->relocatable)
1956 return TRUE;
1957
1958 globals = coff_arm_hash_table (info);
1959
1960 BFD_ASSERT (globals != NULL);
1961
1962 if (globals->bfd_of_glue_owner != NULL)
1963 return TRUE;
1964
1965 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
1966
1967 if (sec == NULL)
1968 {
1969 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1970 | SEC_CODE | SEC_READONLY);
1971 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME,
1972 flags);
1973 if (sec == NULL
1974 || ! bfd_set_section_alignment (abfd, sec, 2))
1975 return FALSE;
1976 }
1977
1978 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
1979
1980 if (sec == NULL)
1981 {
1982 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1983 | SEC_CODE | SEC_READONLY);
1984 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME,
1985 flags);
1986
1987 if (sec == NULL
1988 || ! bfd_set_section_alignment (abfd, sec, 2))
1989 return FALSE;
1990 }
1991
1992 /* Save the bfd for later use. */
1993 globals->bfd_of_glue_owner = abfd;
1994
1995 return TRUE;
1996 }
1997
1998 bfd_boolean
1999 bfd_arm_process_before_allocation (bfd * abfd,
2000 struct bfd_link_info * info,
2001 int support_old_code)
2002 {
2003 asection * sec;
2004 struct coff_arm_link_hash_table * globals;
2005
2006 /* If we are only performing a partial link do not bother
2007 to construct any glue. */
2008 if (info->relocatable)
2009 return TRUE;
2010
2011 /* Here we have a bfd that is to be included on the link. We have a hook
2012 to do reloc rummaging, before section sizes are nailed down. */
2013 _bfd_coff_get_external_symbols (abfd);
2014
2015 globals = coff_arm_hash_table (info);
2016
2017 BFD_ASSERT (globals != NULL);
2018 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2019
2020 globals->support_old_code = support_old_code;
2021
2022 /* Rummage around all the relocs and map the glue vectors. */
2023 sec = abfd->sections;
2024
2025 if (sec == NULL)
2026 return TRUE;
2027
2028 for (; sec != NULL; sec = sec->next)
2029 {
2030 struct internal_reloc * i;
2031 struct internal_reloc * rel;
2032
2033 if (sec->reloc_count == 0)
2034 continue;
2035
2036 /* Load the relocs. */
2037 /* FIXME: there may be a storage leak here. */
2038 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
2039
2040 BFD_ASSERT (i != 0);
2041
2042 for (rel = i; rel < i + sec->reloc_count; ++rel)
2043 {
2044 unsigned short r_type = rel->r_type;
2045 long symndx;
2046 struct coff_link_hash_entry * h;
2047
2048 symndx = rel->r_symndx;
2049
2050 /* If the relocation is not against a symbol it cannot concern us. */
2051 if (symndx == -1)
2052 continue;
2053
2054 /* If the index is outside of the range of our table, something has gone wrong. */
2055 if (symndx >= obj_conv_table_size (abfd))
2056 {
2057 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"),
2058 abfd, symndx);
2059 continue;
2060 }
2061
2062 h = obj_coff_sym_hashes (abfd)[symndx];
2063
2064 /* If the relocation is against a static symbol it must be within
2065 the current section and so cannot be a cross ARM/Thumb relocation. */
2066 if (h == NULL)
2067 continue;
2068
2069 switch (r_type)
2070 {
2071 case ARM_26:
2072 /* This one is a call from arm code. We need to look up
2073 the target of the call. If it is a thumb target, we
2074 insert glue. */
2075
2076 if (h->class == C_THUMBEXTFUNC)
2077 record_arm_to_thumb_glue (info, h);
2078 break;
2079
2080 #ifndef ARM_WINCE
2081 case ARM_THUMB23:
2082 /* This one is a call from thumb code. We used to look
2083 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
2084 up the target of the call. If it is an arm target, we
2085 insert glue. If the symbol does not exist it will be
2086 given a class of C_EXT and so we will generate a stub
2087 for it. This is not really a problem, since the link
2088 is doomed anyway. */
2089
2090 switch (h->class)
2091 {
2092 case C_EXT:
2093 case C_STAT:
2094 case C_LABEL:
2095 record_thumb_to_arm_glue (info, h);
2096 break;
2097 default:
2098 ;
2099 }
2100 break;
2101 #endif
2102
2103 default:
2104 break;
2105 }
2106 }
2107 }
2108
2109 return TRUE;
2110 }
2111
2112 #endif /* ! defined (COFF_IMAGE_WITH_PE) */
2113
2114 #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup
2115 #define coff_relocate_section coff_arm_relocate_section
2116 #define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2117 #define coff_adjust_symndx coff_arm_adjust_symndx
2118 #define coff_link_output_has_begun coff_arm_link_output_has_begun
2119 #define coff_final_link_postscript coff_arm_final_link_postscript
2120 #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data
2121 #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data
2122 #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags
2123 #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data
2124 #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create
2125
2126 /* When doing a relocatable link, we want to convert ARM_26 relocs
2127 into ARM_26D relocs. */
2128
2129 static bfd_boolean
2130 coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED,
2131 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2132 bfd *ibfd,
2133 asection *sec,
2134 struct internal_reloc *irel,
2135 bfd_boolean *adjustedp)
2136 {
2137 if (irel->r_type == ARM_26)
2138 {
2139 struct coff_link_hash_entry *h;
2140
2141 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
2142 if (h != NULL
2143 && (h->root.type == bfd_link_hash_defined
2144 || h->root.type == bfd_link_hash_defweak)
2145 && h->root.u.def.section->output_section == sec->output_section)
2146 irel->r_type = ARM_26D;
2147 }
2148 *adjustedp = FALSE;
2149 return TRUE;
2150 }
2151
2152 /* Called when merging the private data areas of two BFDs.
2153 This is important as it allows us to detect if we are
2154 attempting to merge binaries compiled for different ARM
2155 targets, eg different CPUs or different APCS's. */
2156
2157 static bfd_boolean
2158 coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2159 {
2160 BFD_ASSERT (ibfd != NULL && obfd != NULL);
2161
2162 if (ibfd == obfd)
2163 return TRUE;
2164
2165 /* If the two formats are different we cannot merge anything.
2166 This is not an error, since it is permissable to change the
2167 input and output formats. */
2168 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
2169 || obfd->xvec->flavour != bfd_target_coff_flavour)
2170 return TRUE;
2171
2172 /* Determine what should happen if the input ARM architecture
2173 does not match the output ARM architecture. */
2174 if (! bfd_arm_merge_machines (ibfd, obfd))
2175 return FALSE;
2176
2177 /* Verify that the APCS is the same for the two BFDs. */
2178 if (APCS_SET (ibfd))
2179 {
2180 if (APCS_SET (obfd))
2181 {
2182 /* If the src and dest have different APCS flag bits set, fail. */
2183 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
2184 {
2185 _bfd_error_handler
2186 /* xgettext: c-format */
2187 (_("ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
2188 ibfd, obfd,
2189 APCS_26_FLAG (ibfd) ? 26 : 32,
2190 APCS_26_FLAG (obfd) ? 26 : 32
2191 );
2192
2193 bfd_set_error (bfd_error_wrong_format);
2194 return FALSE;
2195 }
2196
2197 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
2198 {
2199 const char *msg;
2200
2201 if (APCS_FLOAT_FLAG (ibfd))
2202 /* xgettext: c-format */
2203 msg = _("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers");
2204 else
2205 /* xgettext: c-format */
2206 msg = _("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers");
2207
2208 _bfd_error_handler (msg, ibfd, obfd);
2209
2210 bfd_set_error (bfd_error_wrong_format);
2211 return FALSE;
2212 }
2213
2214 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
2215 {
2216 const char * msg;
2217
2218 if (PIC_FLAG (ibfd))
2219 /* xgettext: c-format */
2220 msg = _("ERROR: %B is compiled as position independent code, whereas target %B is absolute position");
2221 else
2222 /* xgettext: c-format */
2223 msg = _("ERROR: %B is compiled as absolute position code, whereas target %B is position independent");
2224 _bfd_error_handler (msg, ibfd, obfd);
2225
2226 bfd_set_error (bfd_error_wrong_format);
2227 return FALSE;
2228 }
2229 }
2230 else
2231 {
2232 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
2233
2234 /* Set up the arch and fields as well as these are probably wrong. */
2235 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2236 }
2237 }
2238
2239 /* Check the interworking support. */
2240 if (INTERWORK_SET (ibfd))
2241 {
2242 if (INTERWORK_SET (obfd))
2243 {
2244 /* If the src and dest differ in their interworking issue a warning. */
2245 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
2246 {
2247 const char * msg;
2248
2249 if (INTERWORK_FLAG (ibfd))
2250 /* xgettext: c-format */
2251 msg = _("Warning: %B supports interworking, whereas %B does not");
2252 else
2253 /* xgettext: c-format */
2254 msg = _("Warning: %B does not support interworking, whereas %B does");
2255
2256 _bfd_error_handler (msg, ibfd, obfd);
2257 }
2258 }
2259 else
2260 {
2261 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
2262 }
2263 }
2264
2265 return TRUE;
2266 }
2267
2268 /* Display the flags field. */
2269
2270 static bfd_boolean
2271 coff_arm_print_private_bfd_data (bfd * abfd, void * ptr)
2272 {
2273 FILE * file = (FILE *) ptr;
2274
2275 BFD_ASSERT (abfd != NULL && ptr != NULL);
2276
2277 /* xgettext:c-format */
2278 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);
2279
2280 if (APCS_SET (abfd))
2281 {
2282 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
2283 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
2284
2285 if (APCS_FLOAT_FLAG (abfd))
2286 fprintf (file, _(" [floats passed in float registers]"));
2287 else
2288 fprintf (file, _(" [floats passed in integer registers]"));
2289
2290 if (PIC_FLAG (abfd))
2291 fprintf (file, _(" [position independent]"));
2292 else
2293 fprintf (file, _(" [absolute position]"));
2294 }
2295
2296 if (! INTERWORK_SET (abfd))
2297 fprintf (file, _(" [interworking flag not initialised]"));
2298 else if (INTERWORK_FLAG (abfd))
2299 fprintf (file, _(" [interworking supported]"));
2300 else
2301 fprintf (file, _(" [interworking not supported]"));
2302
2303 fputc ('\n', file);
2304
2305 return TRUE;
2306 }
2307
2308 /* Copies the given flags into the coff_tdata.flags field.
2309 Typically these flags come from the f_flags[] field of
2310 the COFF filehdr structure, which contains important,
2311 target specific information.
2312 Note: Although this function is static, it is explicitly
2313 called from both coffcode.h and peicode.h. */
2314
2315 static bfd_boolean
2316 _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags)
2317 {
2318 flagword flag;
2319
2320 BFD_ASSERT (abfd != NULL);
2321
2322 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
2323
2324 /* Make sure that the APCS field has not been initialised to the opposite
2325 value. */
2326 if (APCS_SET (abfd)
2327 && ( (APCS_26_FLAG (abfd) != flag)
2328 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
2329 || (PIC_FLAG (abfd) != (flags & F_PIC))
2330 ))
2331 return FALSE;
2332
2333 flag |= (flags & (F_APCS_FLOAT | F_PIC));
2334
2335 SET_APCS_FLAGS (abfd, flag);
2336
2337 flag = (flags & F_INTERWORK);
2338
2339 /* If the BFD has already had its interworking flag set, but it
2340 is different from the value that we have been asked to set,
2341 then assume that that merged code will not support interworking
2342 and set the flag accordingly. */
2343 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
2344 {
2345 if (flag)
2346 /* xgettext: c-format */
2347 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
2348 abfd);
2349 else
2350 /* xgettext: c-format */
2351 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"),
2352 abfd);
2353 flag = 0;
2354 }
2355
2356 SET_INTERWORK_FLAG (abfd, flag);
2357
2358 return TRUE;
2359 }
2360
2361 /* Copy the important parts of the target specific data
2362 from one instance of a BFD to another. */
2363
2364 static bfd_boolean
2365 coff_arm_copy_private_bfd_data (bfd * src, bfd * dest)
2366 {
2367 BFD_ASSERT (src != NULL && dest != NULL);
2368
2369 if (src == dest)
2370 return TRUE;
2371
2372 /* If the destination is not in the same format as the source, do not do
2373 the copy. */
2374 if (src->xvec != dest->xvec)
2375 return TRUE;
2376
2377 /* Copy the flags field. */
2378 if (APCS_SET (src))
2379 {
2380 if (APCS_SET (dest))
2381 {
2382 /* If the src and dest have different APCS flag bits set, fail. */
2383 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
2384 return FALSE;
2385
2386 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
2387 return FALSE;
2388
2389 if (PIC_FLAG (dest) != PIC_FLAG (src))
2390 return FALSE;
2391 }
2392 else
2393 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
2394 | PIC_FLAG (src));
2395 }
2396
2397 if (INTERWORK_SET (src))
2398 {
2399 if (INTERWORK_SET (dest))
2400 {
2401 /* If the src and dest have different interworking flags then turn
2402 off the interworking bit. */
2403 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2404 {
2405 if (INTERWORK_FLAG (dest))
2406 {
2407 /* xgettext:c-format */
2408 _bfd_error_handler (("\
2409 Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
2410 dest, src);
2411 }
2412
2413 SET_INTERWORK_FLAG (dest, 0);
2414 }
2415 }
2416 else
2417 {
2418 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2419 }
2420 }
2421
2422 return TRUE;
2423 }
2424
2425 /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
2426 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */
2427 #define LOCAL_LABEL_PREFIX ""
2428 #ifndef USER_LABEL_PREFIX
2429 #define USER_LABEL_PREFIX "_"
2430 #endif
2431
2432 /* Like _bfd_coff_is_local_label_name, but
2433 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
2434 non-local.
2435 b) Allow other prefixes than ".", e.g. an empty prefix would cause all
2436 labels of the form Lxxx to be stripped. */
2437
2438 static bfd_boolean
2439 coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED,
2440 const char * name)
2441 {
2442 #ifdef USER_LABEL_PREFIX
2443 if (USER_LABEL_PREFIX[0] != 0)
2444 {
2445 size_t len = strlen (USER_LABEL_PREFIX);
2446
2447 if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
2448 return FALSE;
2449 }
2450 #endif
2451
2452 #ifdef LOCAL_LABEL_PREFIX
2453 /* If there is a prefix for local labels then look for this.
2454 If the prefix exists, but it is empty, then ignore the test. */
2455
2456 if (LOCAL_LABEL_PREFIX[0] != 0)
2457 {
2458 size_t len = strlen (LOCAL_LABEL_PREFIX);
2459
2460 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
2461 return FALSE;
2462
2463 /* Perform the checks below for the rest of the name. */
2464 name += len;
2465 }
2466 #endif
2467
2468 return name[0] == 'L';
2469 }
2470
2471 /* This piece of machinery exists only to guarantee that the bfd that holds
2472 the glue section is written last.
2473
2474 This does depend on bfd_make_section attaching a new section to the
2475 end of the section list for the bfd. */
2476
2477 static bfd_boolean
2478 coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info)
2479 {
2480 return (sub->output_has_begun
2481 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
2482 }
2483
2484 static bfd_boolean
2485 coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED,
2486 struct coff_final_link_info * pfinfo)
2487 {
2488 struct coff_arm_link_hash_table * globals;
2489
2490 globals = coff_arm_hash_table (pfinfo->info);
2491
2492 BFD_ASSERT (globals != NULL);
2493
2494 if (globals->bfd_of_glue_owner != NULL)
2495 {
2496 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
2497 return FALSE;
2498
2499 globals->bfd_of_glue_owner->output_has_begun = TRUE;
2500 }
2501
2502 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
2503 }
2504
2505 #include "coffcode.h"
2506
2507 #ifndef TARGET_LITTLE_SYM
2508 #define TARGET_LITTLE_SYM armcoff_little_vec
2509 #endif
2510 #ifndef TARGET_LITTLE_NAME
2511 #define TARGET_LITTLE_NAME "coff-arm-little"
2512 #endif
2513 #ifndef TARGET_BIG_SYM
2514 #define TARGET_BIG_SYM armcoff_big_vec
2515 #endif
2516 #ifndef TARGET_BIG_NAME
2517 #define TARGET_BIG_NAME "coff-arm-big"
2518 #endif
2519
2520 #ifndef TARGET_UNDERSCORE
2521 #define TARGET_UNDERSCORE 0
2522 #endif
2523
2524 #ifndef EXTRA_S_FLAGS
2525 #ifdef COFF_WITH_PE
2526 #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
2527 #else
2528 #define EXTRA_S_FLAGS SEC_CODE
2529 #endif
2530 #endif
2531
2532 /* Forward declaration for use initialising alternative_target field. */
2533 extern const bfd_target TARGET_BIG_SYM ;
2534
2535 /* Target vectors. */
2536 CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
2537 CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)
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