| blob | c03c1c9cc8aabc3aa74a8633b3da782cd962e50c |
1 2006-05-25 Alan Modra <amodra@bigpond.net.au>
3 * bfd/elf.c (sym_is_global): Return a bfd_boolean.
4 (ignore_section_sym): New function.
5 (elf_map_symbols): Use ignore_section_sym to discard some syms.
6 (_bfd_elf_symbol_from_bfd_symbol): Ensure section belongs to
7 bfd before using elf_section_syms.
9 2006-05-25 Nathan Sidwell <nathan@codesourcery.com>
11 * gas/config/tc-m68k.c (mcf52235_ctrl, mcf5225_ctrl): New.
12 (m68k_cpus): Add 52230, 52233, 52234, 52235, 5224, 5225.
14 2006-05-24 Paul Brook <paul@codesourcery.com>
16 Backport from mainline.
17 * bfd/elf-bfd.h (elf_backend_data): Add
18 elf_backend_output_arch_local_syms
19 * bfd/elf32-arm.c (output_arch_syminfo): Define.
20 (elf32_arm_ouput_plt_map_sym, elf32_arm_output_plt_map,
21 elf32_arm_output_arch_local_syms): New functions.
22 (elf_backend_output_arch_local_syms): Define.
23 * bfd/elflink.c (bfd_elf_final_link): Call
24 elf_backend_output_arch_local_syms.
25 * bfd/elfxx-target.h (elf_backend_output_arch_local_syms): Provide
26 default definition.
27 (elfNN_bed): Add elf_backend_output_arch_local_syms.
28 * ld/testsuite/ld-arm/arm-app-abs32.d: Update expected output.
29 * ld/testsuite/ld-arm/arm-app.d: Ditto.
30 * ld/testsuite/ld-arm/arm-lib-plt32.d: Ditto.
31 * ld/testsuite/ld-arm/arm-lib.d: Ditto.
32 * ld/testsuite/ld-arm/mixed-app-v5.d: Ditto.
33 * ld/testsuite/ld-arm/mixed-app.d: Ditto.
34 * ld/testsuite/ld-arm/mixed-lib.d: Ditto.
36 2006-05-24 Paul Brook <paul@codesourcery.com>
38 Backport from mainline.
39 * bfd/elf32-arm.c (put_arm_insn, put_thumb_insn): New functions.
40 (elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub,
41 elf32_arm_finish_dynamic_symbol): Use them.
43 2006-05-22 Richard Sandiford <richard@codesourcery.com>
45 opcodes/
46 * m68k-dis.c (m68k_scan_mask): Add missing return.
48 2006-05-20 Nathan Sidwell <nathan@codesourcery.com>
50 * binutils/testsuite/binutils-all/objcopy.exp: Skip for uclinux
51 targets.
53 2006-05-15 Paul Brook <paul@codesourcery.com>
55 Backport from mainline.
56 * bfd/cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
57 (bfd_is_arm_special_symbol_name): ... to this. Add type argument.
58 Check symbol name is of specified type.
59 * bfd/elf32-arm.c (elf32_arm_is_target_special_symbol,
60 arm_elf_find_function, elf32_arm_output_symbol_hook): Use
61 bfd_is_arm_special_symbol_name.
62 * bfd/bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
63 BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
64 BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
65 (bfd_is_arm_mapping_symbol_name): Remove prototype.
66 (bfd_is_arm_special_symbol_name): Add prototype.
67 * bfd/bfd-in2.h: Regenerate.
68 * gas/config/tc-arm.c (arm_adjust_symtab): Use
69 bfd_is_arm_special_symbol_name.
70 * ld/testsuite/ld-arm/arm-be8.d: New test.
71 * ld/testsuite/ld-arm/arm-be8.s: New test.
72 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-be8.
74 2006-05-12 Carlos O'Donell <carlos@codesourcery.com>
76 * binutils/doc/binutils.texi: Rename "Index" to "Binutils Index"
78 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
80 * bfd/doc/bfd.texinfo: Rename "Index" to "BFD Index"
81 * ld/ld.texinfo: Rename "Index" to "LD Index"
82 * gas/doc/as.texinfo: Rename "Index" to "AS Index"
83 Rename "ABORT" to "ABORT (COFF)"
85 2006-05-06 Joseph S. Myers <joseph@codesourcery.com>
87 Backport:
88 2006-03-30 Jakub Jelinek <jakub@redhat.com>
89 * ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
90 bfd_find_nearest_line succeeded for %C or %D, but filename
91 is NULL, print section+offset at the end.
93 2006-05-05 Julian Brown <julian@codesourcery.com>
95 * gas/config/tc-arm.c (stdarg.h): include.
96 (arm_it): Add uncond_value field. Add isvec and issingle to operand
97 array.
98 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
99 REG_TYPE_NSDQ (single, double or quad vector reg).
100 (reg_expected_msgs): Update.
101 (BAD_FPU): Add macro for unsupported FPU instruction error.
102 (parse_neon_type): Support 'd' as an alias for .f64.
103 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
104 sets of registers.
105 (parse_vfp_reg_list): Don't update first arg on error.
106 (parse_neon_mov): Support extra syntax for VFP moves.
107 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
108 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
109 (parse_operands): Support isvec, issingle operands fields, new parse
110 codes above.
111 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
112 msr variants.
113 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
114 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
115 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
116 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
117 shapes.
118 (neon_shape): Redefine in terms of above.
119 (neon_shape_class): New enumeration, table of shape classes.
120 (neon_shape_el): New enumeration. One element of a shape.
121 (neon_shape_el_size): Register widths of above, where appropriate.
122 (neon_shape_info): New struct. Info for shape table.
123 (neon_shape_tab): New array.
124 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
125 (neon_check_shape): Rewrite as...
126 (neon_select_shape): New function to classify instruction shapes,
127 driven by new table neon_shape_tab array.
128 (neon_quad): New function. Return 1 if shape should set Q flag in
129 instructions (or equivalent), 0 otherwise.
130 (type_chk_of_el_type): Support F64.
131 (el_type_of_type_chk): Likewise.
132 (neon_check_type): Add support for VFP type checking (VFP data
133 elements fill their containing registers).
134 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
135 in thumb mode for VFP instructions.
136 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
137 and encode the current instruction as if it were that opcode.
138 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
139 arguments, call function in PFN.
140 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
141 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
142 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
143 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
144 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
145 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
146 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
147 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
148 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
149 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
150 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
151 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
152 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
153 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
154 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
155 neon_quad.
156 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
157 between VFP and Neon turns out to belong to Neon. Perform
158 architecture check and fill in condition field if appropriate.
159 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
160 (do_neon_cvt): Add support for VFP variants of instructions.
161 (neon_cvt_flavour): Extend to cover VFP conversions.
162 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
163 vmov variants.
164 (do_neon_ldr_str): Handle single-precision VFP load/store.
165 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
166 NS_NULL not NS_IGNORE.
167 (opcode_tag): Add OT_csuffixF for operands which either take a
168 conditional suffix, or have 0xF in the condition field.
169 (md_assemble): Add support for OT_csuffixF.
170 (NCE): Replace macro with...
171 (NCE_tag, NCE, NCEF): New macros.
172 (nCE): Replace macro with...
173 (nCE_tag, nCE, nCEF): New macros.
174 (insns): Add support for VFP insns or VFP versions of insns msr, mrs,
175 vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
176 vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
177 vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
178 together.
180 * gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
181 all-true IT blocks.
182 * gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
183 unconditional Neon instructions are rejected...
184 * gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
185 * gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
186 (with IT).
187 * gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
188 mode.
189 * gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
190 * gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
191 mode.
192 * gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
193 syntax.
194 * gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
195 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
196 * gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
197 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
198 mode.
200 2006-05-05 Mark Shinwell <shinwell@codesourcery.com>
202 * configure: Regenerate.
203 * configure.in: Enable gprof for cross builds.
205 2006-05-03 Julian Brown <julian@codesourcery.com>
207 * gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.
209 2006-05-03 Paul Brook <paul@codesourcery.com>
211 * bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
212 (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
213 (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
214 * bfd/reloc.c: Ditto.
215 * bfd/bfd-in2.h: Regenerate.
216 * bfd/libbfd.h: Regenerate.
217 * bfd/libcoff.h: Regenerate.
218 * gas/config/tc-arm.c (parse_half): New function.
219 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
220 (parse_operands): Ditto.
221 (do_mov16): Reject invalid relocations.
222 (do_t_mov16): Ditto. Use Thumb reloc numbers.
223 (insns): Replace Iffff with HALF.
224 (md_apply_fix): Add MOVW and MOVT relocs.
225 (tc_gen_reloc): Ditto.
226 * gas/doc/c-arm.texi: Document relocation operators
227 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
228 * ld/testsuite/ld-arm/arm-movwt.d: New test.
229 * ld/testsuite/ld-arm/arm-movwt.s: New test.
230 * ld/testsuite/ld-arm/arm.ld: Add .far.
232 2006-05-02 Joseph Myers <joseph@codesourcery.com>
234 * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset
235 by 4 here.
236 (md_apply_fix3): Multiply offset by 4 here for
237 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
238 * gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
239 wstrh.
240 * gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
241 * gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
242 and wldrh.
243 * gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
244 messages.
246 2006-05-01 Paul Brook <paul@codesourcery.com>
248 * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
249 bit for R_ARM_REL32.
250 * gas/config/tc-arm.c (arm_optimize_expr): New function.
251 * gas/config/tc-arm.h (md_optimize_expr): Define
252 (arm_optimize_expr): Add prototype.
253 (TC_FORCE_RELOCATION_SUB_SAME): Define.
254 * ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
255 * ld/testsuite/ld-arm/thumb-rel32.d: New test.
256 * ld/testsuite/ld-arm/thumb-rel32.s: New test.
258 2006-04-29 Paul Brook <paul@codesourcery.com>
260 * opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
261 arm instructions.
262 (neon_opcodes): Add conditional execution specifiers.
263 (thumb_opcodes): Ditto.
264 (thumb32_opcodes): Ditto.
265 (arm_conditional): Change 0xe to "al" and add "" to end.
266 (ifthen_state, ifthen_next_state, ifthen_address): New.
267 (IFTHEN_COND): Define.
268 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
269 (print_insn_arm): Change %c to use new values of arm_conditional.
270 (print_insn_thumb16): Print thumb conditions. Add %I.
271 (print_insn_thumb32): Print thumb conditions.
272 (find_ifthen_state): New function.
273 (print_insn): Track IT block state.
274 * gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
275 * gas/testsuite/gas/arm/thumb32.d: Ditto.
276 * gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
277 * gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
278 * binutils/testsuite/binutils-all/arm/objdump.exp: New file.
279 * binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
281 2006-04-28 Mark Mitchell <mark@codesourcery.com>
283 * doc/as.texinfo: Mention that some .type syntaxes are not
284 supported on all architectures.
286 2006-04-27 Richard Sandiford <richard@codesourcery.com>
288 include/opcodes/
289 * m68k.h (mcf_mask): Define.
291 opcodes/
292 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
293 and fmovem entries. Put register list entries before immediate
294 mask entries. Use "l" rather than "L" in the fmovem entries.
295 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
296 out from INFO.
297 (m68k_scan_mask): New function, split out from...
298 (print_insn_m68k): ...here. If no architecture has been set,
299 first try printing an m680x0 instruction, then try a Coldfire one.
301 2006-04-27 Richard Sandiford <richard@codesourcery.com>
303 bfd/
304 * elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
305 (elf_m68k_plt_info): Likewise.
306 (elf_m68k_plt_info): New table.
307 (CFV4E_PLT_ENTRY_SIZE): Rename to...
308 (ISAB_PLT_ENTRY_SIZE): ...this.
309 (CFV4E_FLAG): Delete.
310 (elf_cfv4e_plt0_entry): Rename to...
311 (elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0)
312 for the second instruction too.
313 (elf_cfv4e_plt_entry): Rename to...
314 (elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0).
315 (elf_isab_plt_info): New table.
316 (CPU32_FLAG): Delete.
317 (PLT_CPU32_ENTRY_SIZE): Rename to...
318 (CPU32_PLT_ENTRY_SIZE): ...this.
319 (elf_cpu32_plt0_entry): Update bounds accordingly.
320 (elf_cpu32_plt_entry): Likewise.
321 (elf_cpu32_plt_info): New table.
322 (elf_m68k_link_hash_table): Add a plt_info field.
323 (elf_m68k_link_hash_table_create): Initialize it.
324 (elf_m68k_get_plt_info): New function.
325 (elf_m68k_always_size_sections): Likewise.
326 (elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
327 (elf_m68k_install_pcrel_field): New function.
328 (elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
329 elf_m68k_install_pcrel_field.
330 (elf_m68k_finish_dynamic_sections): Likewise.
331 (elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
332 (elf_backend_always_size_sections): Define.
334 2006-04-26 Julian Brown <julian@codesourcery.com>
336 * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
337 checking.
338 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
339 architecture version checks.
340 (insns): Allow overlapping instructions to be used in VFP mode.
342 * gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
343 VFP/Neon instructions.
344 * gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
345 * gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
346 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
347 * gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
349 * opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
350 as vldm/vstm.
352 2006-04-26 Julian Brown <julian@codesourcery.com>
354 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
355 (is_quarter_float): Rename from above. Simplify slightly.
356 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
357 number.
358 (parse_neon_mov): Parse floating-point constants.
359 (neon_qfloat_bits): Fix encoding.
360 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
361 preference to integer encoding when using the F32 type.
363 * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
364 constants.
365 * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
366 * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
367 for VMOV.F32.
369 * opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
370 constant VMOV.
372 2006-04-24 Julian Brown <julian@codesourcery.com>
374 * libiberty/floatformat.c (floatformat_to_double): Fix (biased)
375 exponent=0 case.
377 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
379 * Makefile.tpl: Add install-html to install target deps.
380 * Makefile.in: Regenerate.
382 2006-04-07 Julian Brown <julian@codesourcery.com>
384 * gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
385 zero-initialising structures containing it will lead to invalid
386 types).
387 (arm_it): Add vectype to each operand.
388 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
389 defined field.
390 (neon_typed_alias): New structure. Extra information for typed
391 register aliases.
392 (reg_entry): Add neon type info field.
393 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
394 Break out alternative syntax for coprocessor registers, etc. into...
395 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
396 out from arm_reg_parse.
397 (parse_neon_type): Move. Return SUCCESS/FAIL.
398 (first_error): New function. Call to ensure first error which occurs
399 is reported.
400 (parse_neon_operand_type): Parse exactly one type.
401 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
402 (parse_typed_reg_or_scalar): New function. Handle core of both
403 arm_typed_reg_parse and parse_scalar.
404 (arm_typed_reg_parse): Parse a register with an optional type.
405 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
406 result.
407 (parse_scalar): Parse a Neon scalar with optional type.
408 (parse_reg_list): Use first_error.
409 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
410 (neon_alias_types_same): New function. Return true if two (alias) types
411 are the same.
412 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
413 of elements.
414 (insert_reg_alias): Return new reg_entry not void.
415 (insert_neon_reg_alias): New function. Insert type/index information as
416 well as register for alias.
417 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
418 make typed register aliases accordingly.
419 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
420 of line.
421 (s_unreq): Delete type information if present.
422 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
423 (s_arm_unwind_save_mmxwcg): Likewise.
424 (s_arm_unwind_movsp): Likewise.
425 (s_arm_unwind_setfp): Likewise.
426 (parse_shift): Likewise.
427 (parse_shifter_operand): Likewise.
428 (parse_address): Likewise.
429 (parse_tb): Likewise.
430 (tc_arm_regname_to_dw2regnum): Likewise.
431 (md_pseudo_table): Add dn, qn.
432 (parse_neon_mov): Handle typed operands.
433 (parse_operands): Likewise.
434 (neon_type_mask): Add N_SIZ.
435 (N_ALLMODS): New macro.
436 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
437 (el_type_of_type_chk): Add some safeguards.
438 (modify_types_allowed): Fix logic bug.
439 (neon_check_type): Handle operands with types.
440 (neon_three_same): Remove redundant optional arg handling.
441 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
442 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
443 (do_neon_step): Adjust accordingly.
444 (neon_cmode_for_logic_imm): Use first_error.
445 (do_neon_bitfield): Call neon_check_type.
446 (neon_dyadic): Rename to...
447 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
448 allow modification of type of the destination.
449 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
450 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
451 (do_neon_compare): Make destination be an untyped bitfield.
452 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
453 (neon_mul_mac): Return early in case of errors.
454 (neon_move_immediate): Use first_error.
455 (neon_mac_reg_scalar_long): Fix type to include scalar.
456 (do_neon_dup): Likewise.
457 (do_neon_mov): Likewise (in several places).
458 (do_neon_tbl_tbx): Fix type.
459 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
460 (do_neon_ld_dup): Exit early in case of errors and/or use first_error.
461 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
462 Handle .dn/.qn directives.
463 (REGDEF): Add zero for reg_entry neon field.
465 * gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
466 * gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
468 2006-04-03 Carlos O'Donell <carlos@codesourcery.com>
470 * Makefile.tpl: Add install-html target.
471 * Makefile.def: Add install-html target.
472 * Makefile.in: Regenerate.
473 * configure.in: Add --with-datarootdir, --with-docdir,
474 and --with-htmldir options.
475 * configure: Regenerate.
476 * opcodes/Makefile.am: Add install-html target.
477 * opcodes/Makefile.in: Regenerate.
478 * libiberty/Makefile.in: Add install-html, install-html-am, and
479 install-html-recursive targets. Define mkdir_p and
480 NORMAL_INSTALL.
481 * libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
482 * libiberty/configure: Regenerate.
483 * libiberty/testsuite/Makefile.in: Add install-html and html targets.
484 * ld/Makefile.am: Add install-html, install-html-am, and
485 install-html-recursive targets.
486 * ld/Makefile.in: Regenerate.
487 * ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
488 * ld/configure: Regenerate.
489 * ld/po/Make-in: Add install-html target.
490 * intl/Makefile.in: Add html info and dvi and install-html to .PHONY
491 Add install-html target.
492 * gprof/po/Make-in: Add install-html target.
493 * gprof/Makefile.am: Add install-html, install-html-am and
494 install-html-recursive targets.
495 * gprof/Makefile.in: Regenerate.
496 * gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
497 * gprof/configure: Regenerate.
498 * gas/po/Make-in: Add install-html target.
499 * gas/Makefile.am: Add install-html and install-html-recursive targets.
500 * gas/Makefile.in: Regenerate.
501 * gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
502 * gas/configure: Regenerate.
503 * gas/doc/Makefile.am: Add install-html and install-html-am targets.
504 * gas/doc/Makefile.in: Regenerate.
505 * binutils/po/Make-in: Add install-html target.
506 * binutils/Makefile.am: Add install-html and install-html-recursive targets.
507 * binutils/Makefile.in: Regenerate.
508 * binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
509 * binutils/configure: Regenerate.
510 * binutils/doc/Makefile.am: Add install-html and install-html-am targets.
511 * binutils/doc/Makefile.in: Regenerate.
512 * bfd/po/Make-in: Add install-html target.
513 * bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
514 htmldir. Add install-html and install-html-recursive targets.
515 * bfd/Makefile.in: Regenerate.
516 * bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
517 * bfd/configure: Regenerate.
518 * bfd/doc/Makefile.am: Add install-html and install-html-am targets.
519 Define datarootdir, docdir and htmldir.
520 * bfd/doc/Makefile.in: Regenerate.
521 * etc/Makefile.in: Add install-html target. Add htmldir,
522 docdir and datarootdir.
523 * etc/configure.texi: Document install-html target.
524 * etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
525 * etc/configure: Regenerate.
527 2005-04-03 Julian Brown <julian@codesourcery.com>
528 Nathan Sidwell <nathan@codesourcery.com>
530 * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
532 * gas/config/tc-arm.c (limits.h): Include.
533 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
534 (fpu_vfp_v3_or_neon_ext): Declare constants.
535 (neon_el_type): New enumeration of types for Neon vector elements.
536 (neon_type_el): New struct. Define type and size of a vector element.
537 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
538 instruction.
539 (neon_type): Define struct. The type of an instruction.
540 (arm_it): Add 'vectype' for the current instruction.
541 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
542 (vfp_sp_reg_pos): Rename to...
543 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
544 tags.
545 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
546 (Neon D or Q register).
547 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
548 D register.
549 (GE_OPT_PREFIX_BIG): Define constant, for use in...
550 (my_get_expression): Allow above constant as argument to accept
551 64-bit constants with optional prefix.
552 (arm_reg_parse): Add extra argument to return the specific type of
553 register in when either a D or Q register (REG_TYPE_NDQ) is requested.
554 Can be NULL.
555 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
556 (parse_reg_list): Update for new arm_reg_parse args.
557 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
558 (parse_neon_el_struct_list): New function. Parse element/structure
559 register lists for VLD<n>/VST<n> instructions.
560 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
561 (s_arm_unwind_save_mmxwr): Likewise.
562 (s_arm_unwind_save_mmxwcg): Likewise.
563 (s_arm_unwind_movsp): Likewise.
564 (s_arm_unwind_setfp): Likewise.
565 (parse_big_immediate): New function. Parse an immediate, which may
566 be 64 bits wide. Put results in inst.operands[i].
567 (parse_shift): Update for new arm_reg_parse args.
568 (parse_address): Likewise. Add parsing of alignment specifiers.
569 (parse_neon_mov): Parse the operands of a VMOV instruction.
570 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
571 OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
572 OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
573 OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
574 OP_oRNQ, OP_oRNDQ.
575 (parse_operands): Handle new codes above.
576 (encode_arm_vfp_sp_reg): Rename to...
577 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
578 selected VFP version only supports D0-D15.
579 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
580 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
581 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
582 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
583 encode_arm_vfp_reg name, and allow 32 D regs.
584 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
585 (do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
586 insns allowing 32 D regs.
587 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
588 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
589 constant-load and conversion insns introduced with VFPv3.
590 (neon_tab_entry): New struct.
591 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
592 those which are the targets of pseudo-instructions.
593 (neon_opc): Enumerate opcodes, use as indices into...
594 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
595 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
596 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
597 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
598 neon_enc_tab.
599 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
600 Neon instructions.
601 (neon_type_mask): New. Compact type representation for type
602 checking.
603 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
604 permitted type combinations.
605 (N_IGNORE_TYPE): New macro.
606 (neon_check_shape): New function. Check an instruction shape for
607 multiple alternatives. Return the specific shape for the current
608 instruction.
609 (neon_modify_type_size): New function. Modify a vector type and
610 size, depending on the bit mask in argument 1.
611 (neon_type_promote): New function. Convert a given "key" type (of an
612 operand) into the correct type for a different operand, based on a bit
613 mask.
614 (type_chk_of_el_type): New function. Convert a type and size into the
615 compact representation used for type checking.
616 (el_type_of_type_ckh): New function. Reverse of above (only when a
617 single bit is set in the bit mask).
618 (modify_types_allowed): New function. Alter a mask of allowed types
619 based on a bit mask of modifications.
620 (neon_check_type): New function. Check the type of the current
621 instruction against the variable argument list. The "key" type of the
622 instruction is returned.
623 (neon_dp_fixup): New function. Fill in and modify instruction bits for
624 a Neon data-processing instruction depending on whether we're in ARM
625 mode or Thumb-2 mode.
626 (neon_logbits): New function.
627 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
628 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
629 (do_neon_qshl_imm, neon_cmode_for_logic_imm)
630 (neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
631 (neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
632 (neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
633 (do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
634 (do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
635 (neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
636 (neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
637 (do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
638 (do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
639 (do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
640 (do_neon_qmovun, do_neon_rshift_sat_narrow)
641 (do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
642 (do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
643 (do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
644 (neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
645 (do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
646 (do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
647 (do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
648 (do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
649 (do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
650 (do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
651 (do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
652 functions. Neon bit encoding and encoding helpers.
653 (parse_neon_type): New function. Parse Neon type specifier.
654 (opcode_lookup): Allow parsing of Neon type specifiers.
655 (REGNUM2, REGSETH, REGSET2): New macros.
656 (reg_names): Add new VFPv3 and Neon registers.
657 (NUF, nUF, NCE, nCE): New macros for opcode table.
658 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
659 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
660 fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
661 fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
662 vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
663 veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
664 vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
665 vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
666 vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
667 v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
668 vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
669 vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
670 vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
671 vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
672 vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
673 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
674 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
675 (arm_option_cpu_value): Add vfp3 and neon.
676 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
677 Fix VFPv1 attribute.
679 * gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
680 instruction.
681 * gas/testsuite/gas/arm/copro.d: Update accordingly.
682 * gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
683 in ARM mode.
684 * gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
685 * gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
686 instructions.
687 * gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
688 * gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
689 loads and stores.
690 * gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
691 * gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
692 register loads and stores.
693 * gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
694 * gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
695 operands.
696 * gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
697 * gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
698 instructions.
699 * gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
700 * gas/testsuite/gas/arm/vfp1xD.d: Likewise.
701 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
702 * gas/testsuite/gas/arm/vfp2.d: Likewise.
703 * gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
704 * gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
705 range for VFP instructions.
706 * gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
707 * gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
708 constant-load and conversion instructions.
709 * gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
711 * include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
712 (FPU_NEON_EXT_V1): Likewise.
713 (FPU_VFP_HARD): Update.
714 (FPU_VFP_V3): Define macro.
715 (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
717 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
718 convert %<code>[zy] into %[zy]<code>. Expand meaning of
719 %<bitfield>['`?].
720 Add unified load/store instruction names.
721 (neon_opcode_table): New.
722 (arm_opcodes): Expand meaning of %<bitfield>['`?].
723 (arm_decode_bitfield): New.
724 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
725 Use arm_decode_bitfield and adjust numeric specifiers.
726 Adjust %z & %y.
727 (print_insn_neon): New.
728 (print_insn_arm): Adjust print_insn_coprocessor call. Call
729 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
730 (print_insn_thumb32): Likewise.
732 2005-04-01 Paul Brook <paul@codesourcery.com>
734 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
736 2006-03-30 Mark Mitchell <mark@codesourcery.com>
738 * libiberty/configure.ac: Add cygpath for mingw hosts.
739 * libiberty.configure: Rebuilt.
740 * libiberty/Makefile.in: Add cygpath.
741 * libiberty/cygpath.c: New.
743 2006-03-30 Jim Blandy <jimb@codesourcery.com>
745 * include/libiberty.h (pex_write_input): New declaration.
747 * libiberty/pex-common.c (pex_write_input): New function.
748 * libiberty/pexecute.txh (pex_write_input): Document it.
749 * libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
750 * libiberty/pex-unix.c (pex_unix_fdopenw): New function.
751 (funcs): List it as our fdopenw function.
752 * libiberty/pex-win32.c (pex_win32_fdopenw): New function.
753 (funcs): List it as our fdopenw function.
754 * libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
755 * libiberty/pex-msdos (funcs): Same.
756 * libiberty/functions.texi: Regenerated.
758 * libiberty/pex-common.h (struct pex_obj): Doc fixes.
760 * libiberty/functions.texi: Regenerate.
762 2006-03-27 Mark Mitchell <mark@codesourcery.com>
764 * libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
765 in parent.
767 2006-03-26 Nathan Sidwell <nathan@codesourcery.com>
769 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
770 cfloat/m68881 to correct architecture before using it.
772 2006-03-21 Paul Brook <paul@codesourcery.com>
774 * gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
776 2006-03-21 Nathan Sidwell <nathan@codesourcery.com>
778 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
779 (m68k_ip): ... here. Use for all chips. Protect against buffer
780 overrun and avoid excessive copying.
782 * gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
783 m68020_control_regs, m68040_control_regs, m68060_control_regs,
784 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
785 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
786 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
787 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
788 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
789 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
790 mcf5282_ctrl, mcfv4e_ctrl): ... these.
791 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
792 (struct m68k_cpu): Change chip field to control_regs.
793 (current_chip): Remove.
794 (control_regs): New.
795 (m68k_archs, m68k_extensions): Adjust.
796 (m68k_cpus): Reorder to be in cpu number order. Adjust.
797 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
798 (find_cf_chip): Reimplement for new organization of cpu table.
799 (select_control_regs): Remove.
800 (mri_chip): Adjust.
801 (struct save_opts): Save control regs, not chip.
802 (s_save, s_restore): Adjust.
803 (m68k_lookup_cpu): Give deprecated warning when necessary.
804 (m68k_init_arch): Adjust.
805 (md_show_usage): Adjust for new cpu table organization.
806 * include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
807 cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
808 cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
809 cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
810 cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
812 2006-03-20 Mark Mitchell <mark@codesourcery.com>
814 * libiberty/pex-win32.c (<errno.h>): Include.
815 (fix_argv): Remove.
816 (argv_to_cmdline): New function.
817 (std_suffixes): New variable.
818 (no_suffixes): Likewise.
819 (find_executable): New function.
820 (win32_spawn): Likewise.
821 (spawn_script): Use win32_spawn instead of _spawnv[p].
822 (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
823 (pex_win32_wait): Likewise.
825 2006-03-21 Richard Sandiford <richard@codesourcery.com>
827 * bfd/cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
828 incompatible. Likewise MAC and EMAC code.
829 * bfd/elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
830 bfd_get_compatible to set the new bfd architecture. Rely on it
831 to detect incompatibilities.
832 * gas/config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
833 mcfemac instead of mcfmac.
834 * ld/testsuite/ld-m68k/merge-error-1a.s,
835 * ld/testsuite/ld-m68k/merge-error-1b.s,
836 * ld/testsuite/ld-m68k/merge-error-1a.d,
837 * ld/testsuite/ld-m68k/merge-error-1b.d,
838 * ld/testsuite/ld-m68k/merge-error-1c.d,
839 * ld/testsuite/ld-m68k/merge-error-1d.d,
840 * ld/testsuite/ld-m68k/merge-error-1e.d,
841 * ld/testsuite/ld-m68k/merge-ok-1a.d,
842 * ld/testsuite/ld-m68k/merge-ok-1b.d: New tests.
843 * ld/testsuite/ld-m68k/m68k.exp: Run them.
845 2006-03-20 Paul Brook <paul@codesourcery.com>
847 * gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
848 * gas/testsuite/gas/arm/thumb32.d: Correct expected output.
850 2006-03-20 Paul Brook <paul@codesourcery.com>
852 * gas/config/tc-arm.c (parse_operands): Set default error message.
854 2006-03-20 Paul Brook <paul@codesourcery.com>
856 * gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
858 2006-03-20 Paul Brook <paul@codesourcery.com>
860 * gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
862 * gas/testsuite/gas/arm/blx-local.d: New test.
863 * gas/testsuite/gas/arm/blx-local.d: New test.
865 2006-03-20 Paul Brook <paul@codesourcery.com>
867 * gas/config/tc-arm.c (THUMB2_LOAD_BIT): Define.
868 (move_or_literal_pool): Handle Thumb-2 instructions.
869 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
871 * gas/testsuite/gas/arm/thumb2_pool.d: New test.
872 * gas/testsuite/gas/arm/thumb2_pool.s: New test.