1 @c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
6 @node M68HC11-Dependent
7 @chapter M68HC11 and M68HC12 Dependent Features
10 @node Machine Dependencies
11 @chapter M68HC11 and M68HC12 Dependent Features
14 @cindex M68HC11 and M68HC12 support
16 * M68HC11-Opts:: M68HC11 and M68HC12 Options
17 * M68HC11-Syntax:: Syntax
18 * M68HC11-Float:: Floating Point
19 * M68HC11-opcodes:: Opcodes
23 @section M68HC11 and M68HC12 Options
25 @cindex options, M68HC11
26 @cindex M68HC11 options
27 The Motorola 68HC11 and 68HC12 version of @code{@value{AS}} has a few machine
30 @cindex @samp{-m68hc11}
31 This option switches the assembler in the M68HC11 mode. In this mode,
32 the assembler only accepts 68HC11 operands and mnemonics. It produces
35 @cindex @samp{-m68hc12}
36 This option switches the assembler in the M68HC12 mode. In this mode,
37 the assembler also accepts 68HC12 operands and mnemonics. It produces
38 code for the 68HC12. A fiew 68HC11 instructions are replaced by
39 some 68HC12 instructions as recommended by Motorola specifications.
41 @cindex @samp{--strict-direct-mode}
42 You can use the @samp{--strict-direct-mode} option to disable
43 the automatic translation of direct page mode addressing into
44 extended mode when the instruction does not support direct mode.
45 For example, the @samp{clr} instruction does not support direct page
46 mode addressing. When it is used with the direct page mode,
47 @code{@value{AS}} will ignore it and generate an absolute addressing.
48 This option prevents @code{@value{AS}} from doing this, and the wrong
49 usage of the direct page mode will raise an error.
51 @cindex @samp{--short-branchs}
52 The @samp{--short-branchs} option turns off the translation of
53 relative branches into absolute branches when the branch offset is
54 out of range. By default @code{@value{AS}} transforms the relative
55 branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
56 @samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls},
57 @samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into
58 an absolute branch when the offset is out of the -128 .. 127 range.
59 In that case, the @samp{bsr} instruction is translated into a
60 @samp{jsr}, the @samp{bra} instruction is translated into a
61 @samp{jmp} and the conditional branchs instructions are inverted and
62 followed by a @samp{jmp}. This option disables these translations
63 and @code{@value{AS}} will generate an error if a relative branch
64 is out of range. This option does not affect the optimization
65 associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes.
67 @cindex @samp{--force-long-branchs}
68 The @samp{--force-long-branchs} option forces the translation of
69 relative branches into absolute branches. This option does not affect
70 the optimization associated to the @samp{jbra}, @samp{jbsr} and
71 @samp{jbXX} pseudo opcodes.
73 @cindex @samp{--print-insn-syntax}
74 You can use the @samp{--print-insn-syntax} option to obtain the
75 syntax description of the instruction when an error is detected.
77 @cindex @samp{--print-opcodes}
78 The @samp{--print-opcodes} option prints the list of all the
79 instructions with their syntax. The first item of each line
80 represents the instruction name and the rest of the line indicates
81 the possible operands for that instruction. The list is printed
82 in alphabetical order. Once the list is printed @code{@value{AS}}
85 @cindex @samp{--generate-example}
86 The @samp{--generate-example} option is similar to @samp{--print-opcodes}
87 but it generates an example for each instruction instead.
92 @cindex M68HC11 syntax
93 @cindex syntax, M68HC11
95 In the M68HC11 syntax, the instruction name comes first and it may
96 be followed by one or several operands (up to three). Operands are
97 separated by comma (@samp{,}). In the normal mode,
98 @code{@value{AS}} will complain if too many operands are specified for
99 a given instruction. In the MRI mode (turned on with @samp{-M} option),
100 it will treat them as comments. Example:
109 @cindex M68HC11 addressing modes
110 @cindex addressing modes, M68HC11
111 The following addressing modes are understood:
116 @item Address Register
117 @samp{@var{number},X}, @samp{@var{number},Y}
119 The @var{number} may be omitted in which case 0 is assumed.
121 @item Direct Addressing mode
122 @samp{*@var{symbol}}, or @samp{*@var{digits}}
125 @samp{@var{symbol}}, or @samp{@var{digits}}
129 @section Floating Point
131 @cindex floating point, M68HC11
132 @cindex M68HC11 floating point
133 Packed decimal (P) format floating literals are not supported.
134 Feel free to add the code!
136 The floating point formats generated by directives are these.
139 @cindex @code{float} directive, M68HC11
141 @code{Single} precision floating point constants.
143 @cindex @code{double} directive, M68HC11
145 @code{Double} precision floating point constants.
147 @cindex @code{extend} directive M68HC11
148 @cindex @code{ldouble} directive M68HC11
151 @code{Extended} precision (@code{long double}) floating point constants.
155 @node M68HC11-opcodes
158 @cindex M68HC11 opcodes
159 @cindex opcodes, M68HC11
160 @cindex instruction set, M68HC11
163 * M68HC11-Branch:: Branch Improvement
167 @subsection Branch Improvement
169 @cindex pseudo-opcodes, M68HC11
170 @cindex M68HC11 pseudo-opcodes
171 @cindex branch improvement, M68HC11
172 @cindex M68HC11 branch improvement
174 Certain pseudo opcodes are permitted for branch instructions.
175 They expand to the shortest branch instruction that reach the
176 target. Generally these mnemonics are made by prepending @samp{j} to
177 the start of Motorola mnemonic. These pseudo opcodes are not affected
178 by the @samp{--short-branchs} or @samp{--force-long-branchs} options.
180 The following table summarizes the pseudo-operations.
184 +-------------------------------------------------------------+
186 | --short-branchs --force-long-branchs |
187 +--------------------------+----------------------------------+
188 Pseudo-Op |BYTE WORD | BYTE WORD |
189 +--------------------------+----------------------------------+
190 bsr | bsr <pc-rel> <error> | jsr <abs> |
191 bra | bra <pc-rel> <error> | jmp <abs> |
192 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
193 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
194 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
195 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
197 +--------------------------+----------------------------------+
199 NX: negative of condition XX
206 These are the simplest jump pseudo-operations; they always map to one
207 particular machine instruction, depending on the displacement to the
211 Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations,
212 where @var{XX} is a conditional branch or condition-code test. The full
213 list of pseudo-ops in this family is:
215 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
216 jbcs jbne jblt jble jbls jbvc jbmi
219 For the cases of non-PC relative displacements and long displacements,
220 @code{@value{AS}} issues a longer code fragment in terms of
221 @var{NX}, the opposite condition to @var{XX}. For example, for the
222 non-PC relative case: