opcodes/frv-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN.
   5    - the resultant file is machine generated, cgen-dis.in isn't
   6
   7    Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
   8    2008, 2010  Free Software Foundation, Inc.
   9
  10    This file is part of libopcodes.
  11
  12    This library is free software; you can redistribute it and/or modify
  13    it under the terms of the GNU General Public License as published by
  14    the Free Software Foundation; either version 3, or (at your option)
  15    any later version.
  16
  17    It is distributed in the hope that it will be useful, but WITHOUT
  18    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  19    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  20    License for more details.
  21
  22    You should have received a copy of the GNU General Public License
  23    along with this program; if not, write to the Free Software Foundation, Inc.,
  24    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  25
  26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  27    Keep that in mind.  */
  28
  29 #include "sysdep.h"
  30 #include <stdio.h>
  31 #include "ansidecl.h"
  32 #include "dis-asm.h"
  33 #include "bfd.h"
  34 #include "symcat.h"
  35 #include "libiberty.h"
  36 #include "frv-desc.h"
  37 #include "frv-opc.h"
  38 #include "opintl.h"
  39
  40 /* Default text to print if an instruction isn't recognized.  */
  41 #define UNKNOWN_INSN_MSG _("*unknown*")
  42
  43 static void print_normal
  44   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  45 static void print_address
  46   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  47 static void print_keyword
  48   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  49 static void print_insn_normal
  50   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  51 static int print_insn
  52   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
  53 static int default_print_insn
  54   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  55 static int read_insn
  56   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  57    unsigned long *);
  58 \f
  59 /* -- disassembler routines inserted here.  */
  60
  61 /* -- dis.c */
  62 static void
  63 print_at (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  64           void * dis_info,
  65           long reloc_ann ATTRIBUTE_UNUSED,
  66           long value ATTRIBUTE_UNUSED,
  67           bfd_vma pc ATTRIBUTE_UNUSED,
  68           int length ATTRIBUTE_UNUSED)
  69 {
  70   disassemble_info *info = (disassemble_info *) dis_info;
  71
  72   (*info->fprintf_func) (info->stream, "@");
  73 }
  74
  75 static void
  76 print_spr (CGEN_CPU_DESC cd,
  77            void * dis_info,
  78            CGEN_KEYWORD *names,
  79            long regno,
  80            unsigned int attrs)
  81 {
  82   /* Use the register index format for any unnamed registers.  */
  83   if (cgen_keyword_lookup_value (names, regno) == NULL)
  84     {
  85       disassemble_info *info = (disassemble_info *) dis_info;
  86       (*info->fprintf_func) (info->stream, "spr[%ld]", regno);
  87     }
  88   else
  89     print_keyword (cd, dis_info, names, regno, attrs);
  90 }
  91
  92 static void
  93 print_hi (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  94           void * dis_info,
  95           long value,
  96           unsigned int attrs ATTRIBUTE_UNUSED,
  97           bfd_vma pc ATTRIBUTE_UNUSED,
  98           int length ATTRIBUTE_UNUSED)
  99 {
 100   disassemble_info *info = (disassemble_info *) dis_info;
 101
 102   (*info->fprintf_func) (info->stream, value ? "0x%lx" : "hi(0x%lx)", value);
 103 }
 104
 105 static void
 106 print_lo (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 107           void * dis_info,
 108           long value,
 109           unsigned int attrs ATTRIBUTE_UNUSED,
 110           bfd_vma pc ATTRIBUTE_UNUSED,
 111           int length ATTRIBUTE_UNUSED)
 112 {
 113   disassemble_info *info = (disassemble_info *) dis_info;
 114   if (value)
 115     (*info->fprintf_func) (info->stream, "0x%lx", value);
 116   else
 117     (*info->fprintf_func) (info->stream, "lo(0x%lx)", value);
 118 }
 119
 120 /* -- */
 121
 122 void frv_cgen_print_operand
 123   (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
 124
 125 /* Main entry point for printing operands.
 126    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
 127    of dis-asm.h on cgen.h.
 128
 129    This function is basically just a big switch statement.  Earlier versions
 130    used tables to look up the function to use, but
 131    - if the table contains both assembler and disassembler functions then
 132      the disassembler contains much of the assembler and vice-versa,
 133    - there's a lot of inlining possibilities as things grow,
 134    - using a switch statement avoids the function call overhead.
 135
 136    This function could be moved into `print_insn_normal', but keeping it
 137    separate makes clear the interface between `print_insn_normal' and each of
 138    the handlers.  */
 139
 140 void
 141 frv_cgen_print_operand (CGEN_CPU_DESC cd,
 142                            int opindex,
 143                            void * xinfo,
 144                            CGEN_FIELDS *fields,
 145                            void const *attrs ATTRIBUTE_UNUSED,
 146                            bfd_vma pc,
 147                            int length)
 148 {
 149   disassemble_info *info = (disassemble_info *) xinfo;
 150
 151   switch (opindex)
 152     {
 153     case FRV_OPERAND_A0 :
 154       print_normal (cd, info, fields->f_A, 0, pc, length);
 155       break;
 156     case FRV_OPERAND_A1 :
 157       print_normal (cd, info, fields->f_A, 0, pc, length);
 158       break;
 159     case FRV_OPERAND_ACC40SI :
 160       print_keyword (cd, info, & frv_cgen_opval_acc_names, fields->f_ACC40Si, 0);
 161       break;
 162     case FRV_OPERAND_ACC40SK :
 163       print_keyword (cd, info, & frv_cgen_opval_acc_names, fields->f_ACC40Sk, 0);
 164       break;
 165     case FRV_OPERAND_ACC40UI :
 166       print_keyword (cd, info, & frv_cgen_opval_acc_names, fields->f_ACC40Ui, 0);
 167       break;
 168     case FRV_OPERAND_ACC40UK :
 169       print_keyword (cd, info, & frv_cgen_opval_acc_names, fields->f_ACC40Uk, 0);
 170       break;
 171     case FRV_OPERAND_ACCGI :
 172       print_keyword (cd, info, & frv_cgen_opval_accg_names, fields->f_ACCGi, 0);
 173       break;
 174     case FRV_OPERAND_ACCGK :
 175       print_keyword (cd, info, & frv_cgen_opval_accg_names, fields->f_ACCGk, 0);
 176       break;
 177     case FRV_OPERAND_CCI :
 178       print_keyword (cd, info, & frv_cgen_opval_cccr_names, fields->f_CCi, 0);
 179       break;
 180     case FRV_OPERAND_CPRDOUBLEK :
 181       print_keyword (cd, info, & frv_cgen_opval_cpr_names, fields->f_CPRk, 0);
 182       break;
 183     case FRV_OPERAND_CPRI :
 184       print_keyword (cd, info, & frv_cgen_opval_cpr_names, fields->f_CPRi, 0);
 185       break;
 186     case FRV_OPERAND_CPRJ :
 187       print_keyword (cd, info, & frv_cgen_opval_cpr_names, fields->f_CPRj, 0);
 188       break;
 189     case FRV_OPERAND_CPRK :
 190       print_keyword (cd, info, & frv_cgen_opval_cpr_names, fields->f_CPRk, 0);
 191       break;
 192     case FRV_OPERAND_CRI :
 193       print_keyword (cd, info, & frv_cgen_opval_cccr_names, fields->f_CRi, 0);
 194       break;
 195     case FRV_OPERAND_CRJ :
 196       print_keyword (cd, info, & frv_cgen_opval_cccr_names, fields->f_CRj, 0);
 197       break;
 198     case FRV_OPERAND_CRJ_FLOAT :
 199       print_keyword (cd, info, & frv_cgen_opval_cccr_names, fields->f_CRj_float, 0);
 200       break;
 201     case FRV_OPERAND_CRJ_INT :
 202       print_keyword (cd, info, & frv_cgen_opval_cccr_names, fields->f_CRj_int, 0);
 203       break;
 204     case FRV_OPERAND_CRK :
 205       print_keyword (cd, info, & frv_cgen_opval_cccr_names, fields->f_CRk, 0);
 206       break;
 207     case FRV_OPERAND_FCCI_1 :
 208       print_keyword (cd, info, & frv_cgen_opval_fccr_names, fields->f_FCCi_1, 0);
 209       break;
 210     case FRV_OPERAND_FCCI_2 :
 211       print_keyword (cd, info, & frv_cgen_opval_fccr_names, fields->f_FCCi_2, 0);
 212       break;
 213     case FRV_OPERAND_FCCI_3 :
 214       print_keyword (cd, info, & frv_cgen_opval_fccr_names, fields->f_FCCi_3, 0);
 215       break;
 216     case FRV_OPERAND_FCCK :
 217       print_keyword (cd, info, & frv_cgen_opval_fccr_names, fields->f_FCCk, 0);
 218       break;
 219     case FRV_OPERAND_FRDOUBLEI :
 220       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRi, 0);
 221       break;
 222     case FRV_OPERAND_FRDOUBLEJ :
 223       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRj, 0);
 224       break;
 225     case FRV_OPERAND_FRDOUBLEK :
 226       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRk, 0);
 227       break;
 228     case FRV_OPERAND_FRI :
 229       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRi, 0);
 230       break;
 231     case FRV_OPERAND_FRINTI :
 232       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRi, 0);
 233       break;
 234     case FRV_OPERAND_FRINTIEVEN :
 235       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRi, 0);
 236       break;
 237     case FRV_OPERAND_FRINTJ :
 238       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRj, 0);
 239       break;
 240     case FRV_OPERAND_FRINTJEVEN :
 241       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRj, 0);
 242       break;
 243     case FRV_OPERAND_FRINTK :
 244       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRk, 0);
 245       break;
 246     case FRV_OPERAND_FRINTKEVEN :
 247       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRk, 0);
 248       break;
 249     case FRV_OPERAND_FRJ :
 250       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRj, 0);
 251       break;
 252     case FRV_OPERAND_FRK :
 253       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRk, 0);
 254       break;
 255     case FRV_OPERAND_FRKHI :
 256       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRk, 0);
 257       break;
 258     case FRV_OPERAND_FRKLO :
 259       print_keyword (cd, info, & frv_cgen_opval_fr_names, fields->f_FRk, 0);
 260       break;
 261     case FRV_OPERAND_GRDOUBLEK :
 262       print_keyword (cd, info, & frv_cgen_opval_gr_names, fields->f_GRk, 0);
 263       break;
 264     case FRV_OPERAND_GRI :
 265       print_keyword (cd, info, & frv_cgen_opval_gr_names, fields->f_GRi, 0);
 266       break;
 267     case FRV_OPERAND_GRJ :
 268       print_keyword (cd, info, & frv_cgen_opval_gr_names, fields->f_GRj, 0);
 269       break;
 270     case FRV_OPERAND_GRK :
 271       print_keyword (cd, info, & frv_cgen_opval_gr_names, fields->f_GRk, 0);
 272       break;
 273     case FRV_OPERAND_GRKHI :
 274       print_keyword (cd, info, & frv_cgen_opval_gr_names, fields->f_GRk, 0);
 275       break;
 276     case FRV_OPERAND_GRKLO :
 277       print_keyword (cd, info, & frv_cgen_opval_gr_names, fields->f_GRk, 0);
 278       break;
 279     case FRV_OPERAND_ICCI_1 :
 280       print_keyword (cd, info, & frv_cgen_opval_iccr_names, fields->f_ICCi_1, 0);
 281       break;
 282     case FRV_OPERAND_ICCI_2 :
 283       print_keyword (cd, info, & frv_cgen_opval_iccr_names, fields->f_ICCi_2, 0);
 284       break;
 285     case FRV_OPERAND_ICCI_3 :
 286       print_keyword (cd, info, & frv_cgen_opval_iccr_names, fields->f_ICCi_3, 0);
 287       break;
 288     case FRV_OPERAND_LI :
 289       print_normal (cd, info, fields->f_LI, 0, pc, length);
 290       break;
 291     case FRV_OPERAND_LRAD :
 292       print_normal (cd, info, fields->f_LRAD, 0, pc, length);
 293       break;
 294     case FRV_OPERAND_LRAE :
 295       print_normal (cd, info, fields->f_LRAE, 0, pc, length);
 296       break;
 297     case FRV_OPERAND_LRAS :
 298       print_normal (cd, info, fields->f_LRAS, 0, pc, length);
 299       break;
 300     case FRV_OPERAND_TLBPRL :
 301       print_normal (cd, info, fields->f_TLBPRL, 0, pc, length);
 302       break;
 303     case FRV_OPERAND_TLBPROPX :
 304       print_normal (cd, info, fields->f_TLBPRopx, 0, pc, length);
 305       break;
 306     case FRV_OPERAND_AE :
 307       print_normal (cd, info, fields->f_ae, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 308       break;
 309     case FRV_OPERAND_CALLANN :
 310       print_at (cd, info, fields->f_reloc_ann, 0, pc, length);
 311       break;
 312     case FRV_OPERAND_CCOND :
 313       print_normal (cd, info, fields->f_ccond, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 314       break;
 315     case FRV_OPERAND_COND :
 316       print_normal (cd, info, fields->f_cond, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 317       break;
 318     case FRV_OPERAND_D12 :
 319       print_normal (cd, info, fields->f_d12, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 320       break;
 321     case FRV_OPERAND_DEBUG :
 322       print_normal (cd, info, fields->f_debug, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 323       break;
 324     case FRV_OPERAND_EIR :
 325       print_normal (cd, info, fields->f_eir, 0, pc, length);
 326       break;
 327     case FRV_OPERAND_HINT :
 328       print_normal (cd, info, fields->f_hint, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 329       break;
 330     case FRV_OPERAND_HINT_NOT_TAKEN :
 331       print_keyword (cd, info, & frv_cgen_opval_h_hint_not_taken, fields->f_hint, 0);
 332       break;
 333     case FRV_OPERAND_HINT_TAKEN :
 334       print_keyword (cd, info, & frv_cgen_opval_h_hint_taken, fields->f_hint, 0);
 335       break;
 336     case FRV_OPERAND_LABEL16 :
 337       print_address (cd, info, fields->f_label16, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 338       break;
 339     case FRV_OPERAND_LABEL24 :
 340       print_address (cd, info, fields->f_label24, 0|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 341       break;
 342     case FRV_OPERAND_LDANN :
 343       print_at (cd, info, fields->f_reloc_ann, 0, pc, length);
 344       break;
 345     case FRV_OPERAND_LDDANN :
 346       print_at (cd, info, fields->f_reloc_ann, 0, pc, length);
 347       break;
 348     case FRV_OPERAND_LOCK :
 349       print_normal (cd, info, fields->f_lock, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 350       break;
 351     case FRV_OPERAND_PACK :
 352       print_keyword (cd, info, & frv_cgen_opval_h_pack, fields->f_pack, 0);
 353       break;
 354     case FRV_OPERAND_S10 :
 355       print_normal (cd, info, fields->f_s10, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 356       break;
 357     case FRV_OPERAND_S12 :
 358       print_normal (cd, info, fields->f_d12, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 359       break;
 360     case FRV_OPERAND_S16 :
 361       print_normal (cd, info, fields->f_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 362       break;
 363     case FRV_OPERAND_S5 :
 364       print_normal (cd, info, fields->f_s5, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 365       break;
 366     case FRV_OPERAND_S6 :
 367       print_normal (cd, info, fields->f_s6, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 368       break;
 369     case FRV_OPERAND_S6_1 :
 370       print_normal (cd, info, fields->f_s6_1, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 371       break;
 372     case FRV_OPERAND_SLO16 :
 373       print_lo (cd, info, fields->f_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 374       break;
 375     case FRV_OPERAND_SPR :
 376       print_spr (cd, info, & frv_cgen_opval_spr_names, fields->f_spr, 0|(1<<CGEN_OPERAND_VIRTUAL));
 377       break;
 378     case FRV_OPERAND_U12 :
 379       print_normal (cd, info, fields->f_u12, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 380       break;
 381     case FRV_OPERAND_U16 :
 382       print_normal (cd, info, fields->f_u16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 383       break;
 384     case FRV_OPERAND_U6 :
 385       print_normal (cd, info, fields->f_u6, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 386       break;
 387     case FRV_OPERAND_UHI16 :
 388       print_hi (cd, info, fields->f_u16, 0, pc, length);
 389       break;
 390     case FRV_OPERAND_ULO16 :
 391       print_lo (cd, info, fields->f_u16, 0, pc, length);
 392       break;
 393
 394     default :
 395       /* xgettext:c-format */
 396       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 397                opindex);
 398     abort ();
 399   }
 400 }
 401
 402 cgen_print_fn * const frv_cgen_print_handlers[] =
 403 {
 404   print_insn_normal,
 405 };
 406
 407
 408 void
 409 frv_cgen_init_dis (CGEN_CPU_DESC cd)
 410 {
 411   frv_cgen_init_opcode_table (cd);
 412   frv_cgen_init_ibld_table (cd);
 413   cd->print_handlers = & frv_cgen_print_handlers[0];
 414   cd->print_operand = frv_cgen_print_operand;
 415 }
 416
 417 \f
 418 /* Default print handler.  */
 419
 420 static void
 421 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 422               void *dis_info,
 423               long value,
 424               unsigned int attrs,
 425               bfd_vma pc ATTRIBUTE_UNUSED,
 426               int length ATTRIBUTE_UNUSED)
 427 {
 428   disassemble_info *info = (disassemble_info *) dis_info;
 429
 430   /* Print the operand as directed by the attributes.  */
 431   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 432     ; /* nothing to do */
 433   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 434     (*info->fprintf_func) (info->stream, "%ld", value);
 435   else
 436     (*info->fprintf_func) (info->stream, "0x%lx", value);
 437 }
 438
 439 /* Default address handler.  */
 440
 441 static void
 442 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 443                void *dis_info,
 444                bfd_vma value,
 445                unsigned int attrs,
 446                bfd_vma pc ATTRIBUTE_UNUSED,
 447                int length ATTRIBUTE_UNUSED)
 448 {
 449   disassemble_info *info = (disassemble_info *) dis_info;
 450
 451   /* Print the operand as directed by the attributes.  */
 452   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 453     ; /* Nothing to do.  */
 454   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 455     (*info->print_address_func) (value, info);
 456   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 457     (*info->print_address_func) (value, info);
 458   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 459     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 460   else
 461     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 462 }
 463
 464 /* Keyword print handler.  */
 465
 466 static void
 467 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 468                void *dis_info,
 469                CGEN_KEYWORD *keyword_table,
 470                long value,
 471                unsigned int attrs ATTRIBUTE_UNUSED)
 472 {
 473   disassemble_info *info = (disassemble_info *) dis_info;
 474   const CGEN_KEYWORD_ENTRY *ke;
 475
 476   ke = cgen_keyword_lookup_value (keyword_table, value);
 477   if (ke != NULL)
 478     (*info->fprintf_func) (info->stream, "%s", ke->name);
 479   else
 480     (*info->fprintf_func) (info->stream, "???");
 481 }
 482 \f
 483 /* Default insn printer.
 484
 485    DIS_INFO is defined as `void *' so the disassembler needn't know anything
 486    about disassemble_info.  */
 487
 488 static void
 489 print_insn_normal (CGEN_CPU_DESC cd,
 490                    void *dis_info,
 491                    const CGEN_INSN *insn,
 492                    CGEN_FIELDS *fields,
 493                    bfd_vma pc,
 494                    int length)
 495 {
 496   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 497   disassemble_info *info = (disassemble_info *) dis_info;
 498   const CGEN_SYNTAX_CHAR_TYPE *syn;
 499
 500   CGEN_INIT_PRINT (cd);
 501
 502   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 503     {
 504       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 505         {
 506           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 507           continue;
 508         }
 509       if (CGEN_SYNTAX_CHAR_P (*syn))
 510         {
 511           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 512           continue;
 513         }
 514
 515       /* We have an operand.  */
 516       frv_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 517                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 518     }
 519 }
 520 \f
 521 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 522    the extract info.
 523    Returns 0 if all is well, non-zero otherwise.  */
 524
 525 static int
 526 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 527            bfd_vma pc,
 528            disassemble_info *info,
 529            bfd_byte *buf,
 530            int buflen,
 531            CGEN_EXTRACT_INFO *ex_info,
 532            unsigned long *insn_value)
 533 {
 534   int status = (*info->read_memory_func) (pc, buf, buflen, info);
 535
 536   if (status != 0)
 537     {
 538       (*info->memory_error_func) (status, pc, info);
 539       return -1;
 540     }
 541
 542   ex_info->dis_info = info;
 543   ex_info->valid = (1 << buflen) - 1;
 544   ex_info->insn_bytes = buf;
 545
 546   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
 547   return 0;
 548 }
 549
 550 /* Utility to print an insn.
 551    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
 552    The result is the size of the insn in bytes or zero for an unknown insn
 553    or -1 if an error occurs fetching data (memory_error_func will have
 554    been called).  */
 555
 556 static int
 557 print_insn (CGEN_CPU_DESC cd,
 558             bfd_vma pc,
 559             disassemble_info *info,
 560             bfd_byte *buf,
 561             unsigned int buflen)
 562 {
 563   CGEN_INSN_INT insn_value;
 564   const CGEN_INSN_LIST *insn_list;
 565   CGEN_EXTRACT_INFO ex_info;
 566   int basesize;
 567
 568   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
 569   basesize = cd->base_insn_bitsize < buflen * 8 ?
 570                                      cd->base_insn_bitsize : buflen * 8;
 571   insn_value = cgen_get_insn_value (cd, buf, basesize);
 572
 573
 574   /* Fill in ex_info fields like read_insn would.  Don't actually call
 575      read_insn, since the incoming buffer is already read (and possibly
 576      modified a la m32r).  */
 577   ex_info.valid = (1 << buflen) - 1;
 578   ex_info.dis_info = info;
 579   ex_info.insn_bytes = buf;
 580
 581   /* The instructions are stored in hash lists.
 582      Pick the first one and keep trying until we find the right one.  */
 583
 584   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
 585   while (insn_list != NULL)
 586     {
 587       const CGEN_INSN *insn = insn_list->insn;
 588       CGEN_FIELDS fields;
 589       int length;
 590       unsigned long insn_value_cropped;
 591
 592 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 593       /* Not needed as insn shouldn't be in hash lists if not supported.  */
 594       /* Supported by this cpu?  */
 595       if (! frv_cgen_insn_supported (cd, insn))
 596         {
 597           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 598           continue;
 599         }
 600 #endif
 601
 602       /* Basic bit mask must be correct.  */
 603       /* ??? May wish to allow target to defer this check until the extract
 604          handler.  */
 605
 606       /* Base size may exceed this instruction's size.  Extract the
 607          relevant part from the buffer. */
 608       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
 609           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 610         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
 611                                            info->endian == BFD_ENDIAN_BIG);
 612       else
 613         insn_value_cropped = insn_value;
 614
 615       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 616           == CGEN_INSN_BASE_VALUE (insn))
 617         {
 618           /* Printing is handled in two passes.  The first pass parses the
 619              machine insn and extracts the fields.  The second pass prints
 620              them.  */
 621
 622           /* Make sure the entire insn is loaded into insn_value, if it
 623              can fit.  */
 624           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
 625               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 626             {
 627               unsigned long full_insn_value;
 628               int rc = read_insn (cd, pc, info, buf,
 629                                   CGEN_INSN_BITSIZE (insn) / 8,
 630                                   & ex_info, & full_insn_value);
 631               if (rc != 0)
 632                 return rc;
 633               length = CGEN_EXTRACT_FN (cd, insn)
 634                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
 635             }
 636           else
 637             length = CGEN_EXTRACT_FN (cd, insn)
 638               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 639
 640           /* Length < 0 -> error.  */
 641           if (length < 0)
 642             return length;
 643           if (length > 0)
 644             {
 645               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
 646               /* Length is in bits, result is in bytes.  */
 647               return length / 8;
 648             }
 649         }
 650
 651       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 652     }
 653
 654   return 0;
 655 }
 656
 657 /* Default value for CGEN_PRINT_INSN.
 658    The result is the size of the insn in bytes or zero for an unknown insn
 659    or -1 if an error occured fetching bytes.  */
 660
 661 #ifndef CGEN_PRINT_INSN
 662 #define CGEN_PRINT_INSN default_print_insn
 663 #endif
 664
 665 static int
 666 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
 667 {
 668   bfd_byte buf[CGEN_MAX_INSN_SIZE];
 669   int buflen;
 670   int status;
 671
 672   /* Attempt to read the base part of the insn.  */
 673   buflen = cd->base_insn_bitsize / 8;
 674   status = (*info->read_memory_func) (pc, buf, buflen, info);
 675
 676   /* Try again with the minimum part, if min < base.  */
 677   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
 678     {
 679       buflen = cd->min_insn_bitsize / 8;
 680       status = (*info->read_memory_func) (pc, buf, buflen, info);
 681     }
 682
 683   if (status != 0)
 684     {
 685       (*info->memory_error_func) (status, pc, info);
 686       return -1;
 687     }
 688
 689   return print_insn (cd, pc, info, buf, buflen);
 690 }
 691
 692 /* Main entry point.
 693    Print one instruction from PC on INFO->STREAM.
 694    Return the size of the instruction (in bytes).  */
 695
 696 typedef struct cpu_desc_list
 697 {
 698   struct cpu_desc_list *next;
 699   CGEN_BITSET *isa;
 700   int mach;
 701   int endian;
 702   CGEN_CPU_DESC cd;
 703 } cpu_desc_list;
 704
 705 int
 706 print_insn_frv (bfd_vma pc, disassemble_info *info)
 707 {
 708   static cpu_desc_list *cd_list = 0;
 709   cpu_desc_list *cl = 0;
 710   static CGEN_CPU_DESC cd = 0;
 711   static CGEN_BITSET *prev_isa;
 712   static int prev_mach;
 713   static int prev_endian;
 714   int length;
 715   CGEN_BITSET *isa;
 716   int mach;
 717   int endian = (info->endian == BFD_ENDIAN_BIG
 718                 ? CGEN_ENDIAN_BIG
 719                 : CGEN_ENDIAN_LITTLE);
 720   enum bfd_architecture arch;
 721
 722   /* ??? gdb will set mach but leave the architecture as "unknown" */
 723 #ifndef CGEN_BFD_ARCH
 724 #define CGEN_BFD_ARCH bfd_arch_frv
 725 #endif
 726   arch = info->arch;
 727   if (arch == bfd_arch_unknown)
 728     arch = CGEN_BFD_ARCH;
 729
 730   /* There's no standard way to compute the machine or isa number
 731      so we leave it to the target.  */
 732 #ifdef CGEN_COMPUTE_MACH
 733   mach = CGEN_COMPUTE_MACH (info);
 734 #else
 735   mach = info->mach;
 736 #endif
 737
 738 #ifdef CGEN_COMPUTE_ISA
 739   {
 740     static CGEN_BITSET *permanent_isa;
 741
 742     if (!permanent_isa)
 743       permanent_isa = cgen_bitset_create (MAX_ISAS);
 744     isa = permanent_isa;
 745     cgen_bitset_clear (isa);
 746     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
 747   }
 748 #else
 749   isa = info->insn_sets;
 750 #endif
 751
 752   /* If we've switched cpu's, try to find a handle we've used before */
 753   if (cd
 754       && (cgen_bitset_compare (isa, prev_isa) != 0
 755           || mach != prev_mach
 756           || endian != prev_endian))
 757     {
 758       cd = 0;
 759       for (cl = cd_list; cl; cl = cl->next)
 760         {
 761           if (cgen_bitset_compare (cl->isa, isa) == 0 &&
 762               cl->mach == mach &&
 763               cl->endian == endian)
 764             {
 765               cd = cl->cd;
 766               prev_isa = cd->isas;
 767               break;
 768             }
 769         }
 770     }
 771
 772   /* If we haven't initialized yet, initialize the opcode table.  */
 773   if (! cd)
 774     {
 775       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
 776       const char *mach_name;
 777
 778       if (!arch_type)
 779         abort ();
 780       mach_name = arch_type->printable_name;
 781
 782       prev_isa = cgen_bitset_copy (isa);
 783       prev_mach = mach;
 784       prev_endian = endian;
 785       cd = frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
 786                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
 787                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
 788                                  CGEN_CPU_OPEN_END);
 789       if (!cd)
 790         abort ();
 791
 792       /* Save this away for future reference.  */
 793       cl = xmalloc (sizeof (struct cpu_desc_list));
 794       cl->cd = cd;
 795       cl->isa = prev_isa;
 796       cl->mach = mach;
 797       cl->endian = endian;
 798       cl->next = cd_list;
 799       cd_list = cl;
 800
 801       frv_cgen_init_dis (cd);
 802     }
 803
 804   /* We try to have as much common code as possible.
 805      But at this point some targets need to take over.  */
 806   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
 807      but if not possible try to move this hook elsewhere rather than
 808      have two hooks.  */
 809   length = CGEN_PRINT_INSN (cd, pc, info);
 810   if (length > 0)
 811     return length;
 812   if (length < 0)
 813     return -1;
 814
 815   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 816   return cd->default_insn_bitsize / 8;
 817 }